Thyristor half-bridge converter circuit topology based on three coupling inductors and control method
Through the topology and control method of the thyristor half-bridge converter with three-coupled inductor, the locking thyristor is used to achieve active shutdown, which solves the problem of strong thyristor shutdown dependence in the prior art and improves the efficiency and reliability of the converter.
Patent Information
- Application Number
- CN202510721557.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-07-25
AI Technical Summary
In the existing series inductive forced converter thyristor half-bridge converter, the shutdown of the bridge arm thyristor depends on another thyristor, and independent active shutdown cannot be achieved, resulting in interdependence during shutdown, affecting the reliability and efficiency of the converter.
The topology and control method of the thyristor half-bridge converter with a three-coupled inductor are used to realize active shutdown by turning on the latching thyristor, providing an additional auxiliary shutdown loop, and using the current sensing of the three-coupled inductor to achieve independent shutdown of the thyristor.
It realizes reliable and active shutdown of the thyristor, reduces operating losses, and improves the operating efficiency and reliability of the converter.
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Figure CN120377686A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of high-power power electronic converters, and particularly relates to a thyristor half-bridge converter circuit topology and control method based on a three-coupled inductor. Background Art
[0002] The forced commutation series inductor type thyristor converter is an important topology in early power electronic technology for solving the turn-off problem of thyristors (SCRs), and is mainly applied to scenarios where forced turn-off of AC-DC conversion is required. A thyristor (SCR) can only be turned on by gate triggering, but cannot be directly turned off by the gate, and must rely on external conditions (such as current zero-crossing or reverse voltage) to turn off. In the existing series inductor type forced commutation thyristor half-bridge converter, the upper and lower half-bridges are directly connected through a single double-winding coupled inductor, and each thyristor is shunted with a capacitor. When the thyristor in the upper arm conducts, the coupled inductor and the shunted capacitor form an LC resonance circuit, and the resonance discharge current will induce a reverse voltage in the lower arm through the coupled inductor, thereby turning off the thyristor in the lower arm. Similarly, when the lower arm conducts, the upper arm is turned off through the forced commutation circuit. However, the turn-off of the thyristors in the bridge arm requires the turn-on of another thyristor, resulting in mutual dependence during turn-off and unable to achieve independent and active turn-off of each thyristor. Summary of the Invention
[0003] To overcome the shortcomings of the prior art, the present invention proposes a thyristor half-bridge converter topology and control method based on a three-coupled inductor.
[0004] The technical solution of the present invention includes:
[0005] A thyristor half-bridge converter circuit topology based on a three-coupled inductor, comprising a support capacitor Cdc, a resistor R1, three capacitors C1, C2, C3, four thyristors S1, S2, S3, S4, a set of three-coupled inductors, and three diodes D1, D2, D3. Among them, capacitor C1 and capacitor C2 are connected in series. The positive terminal of capacitor C1 is connected to the positive terminal of support capacitor Cdc, and the negative terminal of capacitor C2 is connected to the negative terminal of support capacitor Cdc; diodes D1 and D2 are connected in series in the forward direction. The cathode of diode D1 is connected to the positive terminal of support capacitor Cdc, and the anode of diode D2 is connected to the negative terminal of support capacitor Cdc; the three-coupled inductor is composed of a first winding L1, a second winding L2, and a third winding L3. The anode of thyristor S1 is connected to the positive terminal of support capacitor Cdc, and the cathode is connected to the same-named terminal of the first winding L1 of the three-coupled inductor. The non-same-named terminal of the first winding L1 of the three-coupled inductor is connected to the same-named terminal of the second winding L2 of the three-coupled inductor. The non-same-named terminal of the second winding L2 of the three-coupled inductor is connected to the anode of thyristor S2, and the cathode of thyristor S2 is connected to the negative terminal of support capacitor Cdc; capacitor C1 and diode D1 are connected in parallel across thyristor S1 and the first winding L1 of the three-coupled inductor, and capacitor C2 and diode D2 are connected in parallel across thyristor S2 and the second winding L2 of the three-coupled inductor, that is, the negative terminal of capacitor C1 and the anode of diode D1 are connected to the non-same-named terminal of coupled inductor L1, and the positive terminal of capacitor C2 and the cathode of diode D2 are connected to the same-named terminal of the second winding L2 of the three-coupled inductor; one end of resistor R1 is connected to the cathode of diode D3, and the other end is connected to the positive terminal of capacitor C3. The anode of diode D3 is connected to the negative terminal of capacitor C3. Thyristors S3 and S4 are connected in antiparallel. The cathode of thyristor S3 and the anode of thyristor S4 are connected to the positive terminal of capacitor C3. The anode of thyristor S3 and the cathode of thyristor S4 are connected to the same-named terminal of the third winding L3 of the three-coupled inductor. The non-same-named terminal of the third winding L3 of the three-coupled inductor is connected to the negative terminal of capacitor C3.
[0006] A control method for a thyristor half-bridge converter circuit topology based on a three-coupled inductor, the control method comprising: when the system is running, thyristors S1 and S2 adopt a traditional pulse width modulation working mode, and thyristors S1 and S2 are not simultaneously turned on. When thyristor S1 is turned on, thyristor S2 is in the off state, and when thyristor S2 is turned on, thyristor S1 is in the off state;
[0007] For thyristor S3, when the system starts to work, thyristor S3 and thyristor S1 are simultaneously triggered and turned on until it is detected that the voltage of capacitor C3 is the same as the voltage of support capacitor Cdc, then thyristor S3 is not triggered to turn on.
[0008] A computing device, comprising: at least one processor and a memory storing program instructions; when the program instructions are read and executed by the processor, the computing device is caused to execute a control method for a thyristor half-bridge converter circuit topology based on a three-coupled inductor.
[0009] A readable storage medium storing program instructions, which, when read and executed by a computing device, cause the computing device to execute a control method for a thyristor half-bridge converter circuit topology based on a three-coupled inductor.
[0010] Compared with the existing solutions, the beneficial effects of the present invention are as follows:
[0011] 1) By adopting a three-coupled inductor, an additional auxiliary turn-off loop is provided. When it is necessary to turn off the thyristor of the upper bridge arm or the lower bridge arm, in addition to turning on the thyristor of the lower bridge arm or the upper bridge arm, active turn-off can also be achieved by conducting the blocking thyristor, with high reliability.
[0012] 2) During normal operation, the thyristors S3 and S4 do not need to be continuously conducted. When it is necessary to block all thyristor devices, the blocking thyristor can be conducted. When the current of the auxiliary turn-off loop decays to zero, the blocking thyristor can be naturally turned off, and the converter has high operating efficiency. Description of the Drawings
[0013] Figure 1 It is a schematic diagram of a thyristor half-bridge converter circuit topology based on a three-coupled inductor. Detailed Embodiments
[0014] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.
[0015] Figure 1 It is a schematic diagram of a thyristor half-bridge converter circuit topology based on a three-coupled inductor. As Figure 1As shown in the figure, the circuit topology includes a support capacitor Cdc, a resistor R1, three capacitors C1, C2, C3, four thyristors S1, S2, S3, S4, a set of three-coupled inductors, and three diodes D1, D2, D3. Among them, capacitor C1 and capacitor C2 are connected in series. The positive electrode of capacitor C1 is connected to the positive electrode of support capacitor Cdc, and the negative electrode of capacitor C2 is connected to the negative electrode of support capacitor Cdc; diode D1 and diode D2 are connected in series in the forward direction. The cathode of diode D1 is connected to the positive electrode of support capacitor Cdc, and the anode of diode D2 is connected to the negative electrode of support capacitor Cdc; the three-coupled inductor consists of a first winding L1, a second winding L2, and a third winding L3; the anode of thyristor S1 is connected to the positive electrode of support capacitor Cdc, and the cathode is connected to the same-named end of the first winding L1 of the three-coupled inductor. The non-same-named end of the first winding L1 of the three-coupled inductor is connected to the same-named end of the second winding L2 of the three-coupled inductor. The non-same-named end of the second winding L2 of the three-coupled inductor is connected to the anode of thyristor S2, and the cathode of thyristor S2 is connected to the negative electrode of support capacitor Cdc; capacitor C1 and diode D1 are connected in parallel across thyristor S1 and the first winding L1 of the three-coupled inductor. Capacitor C2 and diode D2 are connected in parallel across thyristor S2 and the second winding L2 of the three-coupled inductor. That is, the negative electrode of capacitor C1 and the anode of diode D1 are connected to the non-same-named end of the first winding L1 of the three-coupled inductor, and the positive electrode of capacitor C2 and the cathode of diode D2 are connected to the same-named end of the second winding L2 of the three-coupled inductor; one end of resistor R1 is connected to the cathode of diode D3, and the other end is connected to the positive electrode of capacitor C3. The cathode of diode D3 is connected to the positive electrode of capacitor C3, and the anode is connected to the negative electrode of capacitor C3. Thyristor S3 and thyristor S4 are connected in antiparallel. The cathode of thyristor S3 and the anode of thyristor S4 are connected to the positive electrode of capacitor C3. The anode of thyristor S3 and the cathode of thyristor S4 are connected to the same-named end of the third winding L3 of the three-coupled inductor. The non-same-named end of the third winding L3 of the three-coupled inductor is connected to the negative electrode of capacitor C3.
[0016] In one embodiment, the capacitance value range of the support capacitor Cdc is 0 to 100 mF, and the capacitance value ranges of capacitors C1, C2, and C3 are 0 to 500 μF.
[0017] In one embodiment, the coupling coefficient value range between the first winding L1 of the three-coupled inductor and the second winding L2 of the three-coupled inductor is [0.8, 1], the coupling coefficient value range between the first winding L1 of the three-coupled inductor and the third winding L3 of the three-coupled inductor is [0.8, 1], and the coupling coefficient value range between the second winding L2 of the three-coupled inductor and the third winding L3 of the three-coupled inductor is [0.8, 1].
[0018] According to the embodiments of the present invention, a control method for a thyristor half-bridge converter circuit topology based on a three-coupled inductor is also provided, which can achieve self-turn-off of thyristors. The following references Figure 1Describe the control process of the control method, which includes:
[0019] When the system is running, thyristors S1 and S2 adopt the traditional pulse width modulation working mode, and the switching frequency is 0 - 1 kHz. Thyristors S1 and S2 do not conduct simultaneously. When thyristor S1 conducts, thyristor S2 is in the off state, and when thyristor S2 conducts, thyristor S1 is in the off state. For thyristor S3, when the system starts to work, thyristor S3 is triggered and conducts simultaneously with thyristor S1 until it is monitored that the voltage of capacitor C3 is the same as the voltage of the support capacitor Cdc, then thyristor S3 is not triggered to conduct. When receiving the system locking instruction, thyristor S4 is triggered to conduct, and capacitor C3 discharges through thyristor S4 and the third winding L3 of the three - coupled inductor. By inducing a positive voltage at the same - name ends of the first winding L1 and the second winding L2 of the three - coupled inductor, the current flowing through thyristors S1 and S2 is attenuated to zero, thus turning off thyristors S1 and S2.
[0020] According to the present invention, there is also provided a computing device, including: at least one processor and a memory storing program instructions; when the program instructions are read and executed by the processor, the computing device is made to execute the above - mentioned control method for the thyristor half - bridge converter circuit topology based on the three - coupled inductor.
[0021] According to the present invention, there is also provided a readable storage medium storing program instructions. When the program instructions are read and executed by a computing device, the computing device is made to execute the above - mentioned control method for the thyristor half - bridge converter circuit topology based on the three - coupled inductor.
[0022] In the specification provided here, a large number of specific details are described. However, it can be understood that the embodiments of the present invention can be practiced without these specific details. In some instances, well - known methods, structures, and technologies are not shown in detail so as not to obscure the understanding of this specification.
[0023] Although the present invention is described according to a limited number of embodiments, those skilled in the art in this technical field will understand, based on the above description, that other embodiments can be conceived within the scope of the present invention thus described. In addition, it should be noted that the language used in this specification is mainly selected for readability and teaching purposes, rather than for the purpose of explaining or limiting the subject matter of the present invention.
Claims
1. A thyristor half-bridge converter circuit topology based on a three-coupled inductor, characterized in that, It includes a support capacitor Cdc, a resistor R1, capacitors C1, C2, C3, thyristors S1, S2, S3, S4, a set of three-coupled inductors, and diodes D1, D2, D3. Among them, capacitor C1 and capacitor C2 are connected in series. The positive electrode of capacitor C1 is connected to the positive electrode of support capacitor Cdc, and the negative electrode of capacitor C2 is connected to the negative electrode of support capacitor Cdc; diodes D1 and D2 are connected in series forward. The cathode of diode D1 is connected to the positive electrode of support capacitor Cdc, and the anode of diode D2 is connected to the negative electrode of support capacitor Cdc; the three-coupled inductor consists of a first winding L1, a second winding L2, and a third winding L3; the anode of thyristor S1 is connected to the positive electrode of support capacitor Cdc, and the cathode is connected to the same-named end of the first winding L1 of the three-coupled inductor. The non-same-named end of the first winding L1 of the three-coupled inductor is connected to the same-named end of the second winding L2 of the three-coupled inductor. The non-same-named end of the second winding L2 of the three-coupled inductor is connected to the anode of thyristor S2, and the cathode of thyristor S2 is connected to the negative electrode of support capacitor Cdc; capacitor C1 and diode D1 are connected in parallel across thyristor S1 and the first winding L1 of the three-coupled inductor, and capacitor C2 and diode D2 are connected in parallel across thyristor S2 and the second winding L2 of the three-coupled inductor, that is, the negative electrode of capacitor C1 and the anode of diode D1 are connected to the non-same-named end of the first winding L1 of the three-coupled inductor, and the positive electrode of capacitor C2 and the cathode of diode D2 are connected to the same-named end of the second winding L2 of the three-coupled inductor; one end of resistor R1 is connected to the cathode of diode D3, and the other end is connected to the positive electrode of capacitor C3. The cathode of diode D3 is connected to the positive electrode of capacitor C3, and the anode is connected to the negative electrode of capacitor C3. Thyristors S3 and S4 are connected in antiparallel. The cathode of thyristor S3 and the anode of thyristor S4 are connected to the positive electrode of capacitor C3, and the anode of thyristor S3 and the cathode of thyristor S4 are connected to the same-named end of the third winding L3 of the three-coupled inductor. The non-same-named end of the third winding L3 of the three-coupled inductor is connected to the negative electrode of capacitor C3.
2. The thyristor half-bridge converter circuit topology based on a three-coupled inductor according to claim 1, characterized in that, The capacitance value range of the support capacitor Cdc is 0 to 100 mF.
3. The thyristor half-bridge converter circuit topology based on a three-coupled inductor according to claim 1, wherein The capacitance value ranges of capacitors C1, C2, and C3 are 0 to 500 μF.
4. The thyristor half-bridge converter circuit topology based on a three-coupled inductor according to claim 1, characterized in that, The coupling coefficient value range between the first winding L1 and the second winding L2 of the three-coupled inductor is [0.8, 1], the coupling coefficient value range between the first winding L1 and the third winding L3 of the three-coupled inductor is [0.8, 1], and the coupling coefficient value range between the second winding L2 and the third winding L3 of the three-coupled inductor is [0.8, 1].
5. A control method for a thyristor half-bridge converter circuit topology based on a three-coupled inductor, which is executed for the thyristor half-bridge converter circuit topology based on a three-coupled inductor according to any one of claims 1-4, characterized in that, It includes: When the system is running, thyristors S1 and S2 adopt the traditional pulse width modulation working mode. Thyristors S1 and S2 are not turned on simultaneously. When thyristor S1 is turned on, thyristor S2 is in the off state, and when thyristor S2 is turned on, thyristor S1 is in the off state; For thyristor S3, when the system starts to work, thyristor S3 and thyristor S1 are triggered and turned on simultaneously until it is detected that the voltage of capacitor C3 is the same as the voltage of the support capacitor Cdc, then thyristor S3 is not triggered to conduct.
6. The control method of the thyristor half-bridge converter circuit topology based on a three-coupled inductor according to claim 5, characterized in that, When adopting the traditional pulse width modulation working mode, the switching frequency of the thyristor S1 is 0 - 1 kHz.
7. The control method of the thyristor half-bridge converter circuit topology based on a three-coupled inductor according to claim 5, characterized in that, When adopting the traditional pulse width modulation working mode, the switching frequency of the thyristor S2 is 0 - 1 kHz.
8. The control method of the thyristor half-bridge converter circuit topology based on a three-coupled inductor according to claim 5, characterized in that After receiving the system blocking instruction, trigger the thyristor S4 to conduct, and the capacitor C3 discharges through the thyristor S4 and the third winding L3 of the three - coupled inductor. By inducing a positive voltage at the same - name terminals of the first winding L1 and the second winding L2 of the three - coupled inductor, the current flowing through the thyristor S1 and the thyristor S2 is attenuated to zero, thereby turning off the thyristor S1 and the thyristor S2.
9. A computing device, characterized in that, Including: At least one processor and a memory storing program instructions; When the program instructions are read and executed by the processor, the computing device is caused to execute the control method of the thyristor half - bridge converter circuit topology based on a three - coupled inductor according to any one of claims 5 - 8.
10. A readable storage medium storing program instructions, characterized in that, When the program instructions are read and executed by the computing device, the computing device is caused to execute the control method of the thyristor half - bridge converter circuit topology based on a three - coupled inductor according to any one of claims 5 - 8.