Dynamic memristor-based peak code modulation circuit

Abstract

The invention discloses a peak code modulation circuit based on a dynamic memristor, which comprises the dynamic memristor and a signal conversion module, and is characterized in that the signal conversion module comprises a signal isolation module, a feature extraction module and a pulse conversion module which are connected in sequence. The dynamic memristor generates a voltage signal with a slow-rising and steep-falling characteristic under constant current input. The signal isolation module comprises a high-impedance input buffer circuit; the feature extraction module comprises an asymmetric time constant signal processing circuit used for performing enhanced extraction on the steep drop feature of the memristor output signal; and the pulse conversion module comprises a dual-threshold positive feedback hysteresis comparison circuit and is used for converting the output signal of the feature extraction module into a rectangular digital pulse. The circuit is specially designed according to the characteristics of the memristor, is simple in structure, is easy to integrate, can achieve the efficient conversion from an analog signal to a standard digital pulse, and is suitable for the fields of neuromorphic calculation and low-power-consumption signal processing.

Description

Technical Field

[0001] The present invention relates to a modulation circuit for spike-encoded signals, and more particularly to a spike-encoding modulation circuit based on a dynamic memristor. Background Art

[0002] Spiking Neural Networks (SNNs) are a class of computational architectures that simulate the information encoding and processing methods of biological neural networks, and their information transmission depends on spike pulses encoded in time. Compared with traditional artificial neural networks, SNNs have significant advantages in processing time-series data and reducing power consumption. However, converting analog signals in the real world into spike-encoded forms usually requires complex analog-to-digital conversion circuits and additional digital processing units, which not only increases the system complexity but also raises the power consumption.

[0003] As the fourth basic passive circuit element, the memristor has received extensive attention in the field of neuromorphic computing in recent years. In particular, memristors with dynamic characteristics can achieve behaviors similar to biological neurons, such as the integrate-and-fire function. When these devices receive continuous input signals, periodic resistance state transitions occur, resulting in spike pulses. However, the pulse signals directly generated by memristors usually exhibit an "ascending slowly and descending steeply" analog waveform and cannot be directly compatible with digital systems, requiring additional signal modulation circuits for processing.

[0004] In the prior art, the circuit schemes for memristor signal modulation mainly have the following problems: 1. Using a general comparator to directly process the output signal of the memristor cannot effectively capture the "steep descent" feature, resulting in insufficient pulse timing accuracy; 2. Failing to consider the high-impedance characteristic of the memristor and directly loading it will cause signal distortion; 3. The circuit structure is complex and the power consumption is high. Summary of the Invention

[0005] Object of the Invention: Aiming at the above prior art, a spike-encoding modulation circuit based on a dynamic memristor is proposed. This circuit can effectively extract and digitally convert the "steep descent" feature for the "ascending slowly and descending steeply" characteristic of the memristor output signal, making its output signal compatible with digital systems.

[0006] Technical solution: A spiking coding modulation circuit based on a dynamic memristor, including a dynamic memristor and a signal conversion circuit; the signal conversion circuit includes a signal isolation module, a feature extraction module, and a pulse conversion module connected in sequence; wherein: the dynamic memristor is used to output a voltage pulse signal with a "slow rise and steep fall" from an input constant current, and the pulse frequency is proportional to the input current intensity; the signal isolation module includes a high-impedance input buffer circuit connected between the dynamic memristor and the feature extraction module; the feature extraction module includes an asymmetric time constant signal processing circuit for strongly extracting the "steep fall" feature of the output signal of the memristor; the pulse conversion module includes a dual-threshold positive feedback hysteresis comparison circuit for converting the output signal of the feature extraction module into a rectangular digital pulse.

[0007] Further, the feature extraction module exhibits a band-pass characteristic in the frequency domain, and the center frequency matches the frequency component of the "steep fall" feature of the output signal of the dynamic memristor.

[0008] Further, the asymmetric time constant signal processing circuit includes an operational amplifier U2, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2. The inverting input terminal of the operational amplifier U2 receives the input signal through a series network of the resistor R1 and the capacitor C1. The parallel network of the capacitor C2 and the resistor R2 serves as a feedback loop between the inverting input terminal and the output terminal of the operational amplifier U2. The non-inverting input terminal of the operational amplifier U2 is the reference voltage VT1; the asymmetric time constants are the input time constant τ1 and the feedback time constant τ2, τ1 = C1·R1, τ2 = C2·R2, and τ1 > τ2 is satisfied.

[0009] Further, in the feature extraction module, the range of the time constant τ1 is 25 - 400 microseconds, and the range of the time constant τ2 is 2 - 75 microseconds.

[0010] Further, in the feature extraction module, the resistance value of the resistor R1 is 0.5 kΩ - 2 kΩ, the capacitance value of the capacitor C1 is 50 nF - 200 nF, the resistance value of the resistor R2 is 200 kΩ - 500 kΩ, and the capacitance value of the capacitor C2 is 10 pF - 150 pF.

[0011] Further, in the feature extraction module, the ratio of the time constant τ1 to the time constant τ2 satisfies that the ratio of τ1 / τ2 is in the range of 2 - 20.

[0012] Further, the positive feedback network of the pulse conversion module forms a hysteresis comparator structure with dual-threshold characteristics. When the input signal exceeds the upper threshold V H it outputs a high level, and when the input signal is lower than the lower threshold V L it outputs a low level, where V H and VL The difference between them is the hysteresis voltage Ensure stable operation in a noisy environment.

[0013] Furthermore, the dual-threshold positive feedback hysteresis comparison circuit includes an operational amplifier U3, a resistor R3, and a resistor R4. The non-inverting input terminal of the operational amplifier U3 is connected to the output terminal of the feature extraction module through the resistor R3. A resistor R4 is connected between the non-inverting input terminal and the output terminal of the operational amplifier U3 to form positive feedback. A reference voltage VT2 is applied to the inverting input terminal of the operational amplifier U3.

[0014] Furthermore, the impedance matching of the signal isolation module, the feature extraction module, and the pulse conversion module satisfies the following conditions: the output impedance of the signal isolation module is less than 1 / 10 of the input impedance of the feature extraction module, and the output impedance of the feature extraction module is less than 1 / 10 of the input impedance of the pulse conversion module.

[0015] Furthermore, each resistor is a digital potentiometer, and its resistance value is set by a microcontroller or an FPGA.

[0016] Advantages: 1. For the "slow rise and steep fall" characteristic of the memristor, the feature extraction module enhances the response to the "steep fall" feature, realizes accurate capture of the state jump of the memristor, and has high extraction efficiency. Specifically, the frequency compensation design principle is adopted to make the feature extraction circuit selectively enhance the response to the "steep fall" feature of the memristor, while appropriately attenuating other signal components. This design idea is different from traditional signal processing circuits. And through specific parameter matching, the gain of the feature extraction module in the middle frequency band is accurately corresponding to the characteristic frequency of the dynamic memristor, enhancing the signal capture ability and time accuracy of the system.

[0017] 2. The pulse conversion module adopts a positive feedback dual-threshold comparison structure. By setting reasonable hysteresis characteristics, the stability of the circuit in a noisy environment is improved, and the problem of false triggering is avoided.

[0018] 3. The signal isolation module adopts a follower circuit with a high input impedance, effectively preventing the subsequent circuit from affecting the working state of the memristor, and at the same time, the correct signal input can be obtained.

[0019] 4. The entire modulation circuit only includes three operational amplifiers and a small number of passive components. The circuit scale is small, which is convenient for integration with the memristor array. The final output of the circuit is a standard digital pulse, which can be directly connected to a digital neuromorphic processing system. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is the overall structural schematic diagram of the circuit of the present invention;

[0021] Figure 2Schematic diagram of the memristor in the present invention;

[0022] Figure 3 Signal waveform diagrams of key nodes of the present invention, where (a) is the output waveform of the dynamic memristor, (b) is the output waveform of the signal isolation module, (c) is the output waveform of the feature extraction module, and (d) is the output waveform of the pulse conversion module. Detailed implementation manners

[0023] The following further explains the present invention with reference to the accompanying drawings.

[0024] As Figure 1 shown, a spike coding modulation circuit based on a dynamic memristor includes a dynamic memristor and a signal conversion circuit. The signal conversion circuit consists of three parts: a signal isolation module, a feature extraction circuit, and a pulse conversion module.

[0025] The dynamic memristor adopts a sandwich structure. As Figure 2 shown, it includes a bottom electrode, a middle oxide dielectric layer, and a top electrode. This memristor has forward threshold switching characteristics and high parasitic capacitance. Under a constant current input, it will generate a voltage signal with a "slow rise and steep fall" shape. The characteristics of this signal are that the voltage rises slowly and then suddenly drops rapidly, and the pulse frequency is proportional to the input current intensity. This waveform is similar to the spike discharge of biological neurons, but it cannot be directly compatible with digital systems.

[0026] The signal isolation module is a high-impedance input buffer circuit composed of an operational amplifier U1. The positive input terminal of U1 is connected to the output terminal of the memristor, and the negative input terminal of U1 is directly connected to the output terminal of U1. This module circuit has the characteristics of high input impedance and low output impedance, which can effectively avoid the influence of subsequent circuits on the working state of the memristor and maintain the integrity of the output waveform of the memristor.

[0027] The feature extraction module is an asymmetric time-constant signal processing circuit, and its core is an operational amplifier U2. The input signal is connected to the inverting input terminal of U2 after passing through a resistor R1 and a capacitor C1. A feedback path is formed by connecting a network in parallel with a resistor R2 and a capacitor C2 between the inverting input terminal and the output terminal of U2. In this embodiment, the non-inverting input terminal of U2 obtains a reference voltage VT1 = V CC / 5 through a resistor voltage division circuit, and V CC is the supply voltage. This module circuit is specially designed to strengthen the extraction of the "steep fall" feature of the memristor output. The transfer function H(s) of this module circuit can be expressed as:

[0028]

[0029] Among them, K = R2 / R1 is the gain coefficient, τ1 = C1·E1 is the input time constant, and τ2 = C2·R2 is the feedback time constant. Through the asymmetric time constant design with τ1 > τ2, the circuit exhibits band-pass characteristics in the frequency domain.

[0030] The transfer function H(s) can be further analyzed as follows:

[0031] 1. Low-frequency band (s → 0): The gain approaches zero, suppressing the DC component and the slowly varying "ramp-up" part of the memristor output.

[0032] 2. Mid-frequency band The gain reaches its peak, corresponding to the "sharp drop" frequency characteristic of the memristor. In this embodiment, the center frequency of the feature extraction module is between 5 kHz and 15 kHz.

[0033] 3. High-frequency band (s → ∞): The gain decays at a rate of 20 dB / decade, effectively suppressing high-frequency noise interference.

[0034] This carefully designed frequency response characteristic enables the circuit to accurately capture the moment of the memristor state transition in a complex noise environment, significantly improving the time accuracy of encoding.

[0035] In this embodiment, R1 is taken as 1 kΩ, C1 is taken as 100 nF, R2 is taken as 200 kΩ, and the capacitor C2 is taken as 100 pF, that is, K = 200, τ1 = 100 μs, and τ2 = 20 μs.

[0036] In some embodiments, the range of the time constant τ1 can be set to 25 - 400 microseconds, and the range of the time constant τ2 can be set to 2 - 75 microseconds. Correspondingly, the resistance value of the resistor R1 is 0.5 kΩ - 2 kΩ, the capacitance value of the capacitor C1 is 50 nF - 200 nF, the resistance value of the resistor R2 is 200 kΩ - 500 kΩ, and the capacitance value of the capacitor C2 is 10 pF - 150 pF.

[0037] The ratio relationship between τ1 and τ2 is crucial for the circuit performance. Further, through experimental verification, when the ratio of τ1 / τ2 is in the range of 2 to 20, the circuit has the best extraction effect on the "sharp drop" feature of the memristor.

[0038] The pulse conversion module is a dual-threshold positive feedback hysteresis comparison circuit composed of an operational amplifier U3 and related resistors. The non-inverting input terminal of U3 is connected to the output terminal of the feature extraction module through a resistor R3, and a resistor R4 is connected between the non-inverting input terminal and the output terminal of U3 to form positive feedback. This module circuit also has an adjustable threshold setting. By adjusting the VT2 reference voltage at the inverting input terminal and the resistance ratio of the resistors R3 and R4, the trigger threshold can be flexibly set to adapt to feature extraction signals of different amplitudes. In this embodiment, the negative input terminal of U3 is connected to VT2 = VCC A constant voltage of 1 / 2 is used as the threshold reference. This module circuit converts the analog signal output by the feature extraction module into a standard digital pulse output, ensuring that the signal is compatible with the digital system. The hysteresis characteristic generated by the positive feedback path excludes the influence of the circuit on the small fluctuations of the input signal and avoids false triggering.

[0039] As Figure 3 shown, the pulse conversion module utilizes the dual-threshold characteristic of the hysteresis comparator to achieve precise conversion of the signal output by the feature extraction module. When the signal output by the feature extraction module generates a positive waveform due to the "sharp drop" feature of the memristor, its voltage amplitude will quickly exceed the high threshold V H of the comparator, triggering the output to jump from low level to high level; subsequently, even if the input signal fluctuates slightly, as long as it is not lower than the low threshold V L , the output will remain at the high level state. This design effectively prevents false triggering caused by signal noise and small fluctuations, greatly improving the anti-interference ability of the system.

[0040] V H and V L The difference between them is the hysteresis voltage of the hysteresis comparator The hysteresis voltage can be controlled by adjusting the ratio of resistors R3 and R4. The larger this ratio, the wider the hysteresis window and the stronger the anti-noise ability, but it may also lead to a decrease in the sensitivity to weak signals. After optimization, in this embodiment, the resistor R3 = 10 kΩ, the resistor R4 = 100 kΩ, and the configuration of R4 / R3 = 10 achieves a good balance between noise immunity and sensitivity. When the memristor generates a "slow rise and sharp drop" signal, the feature extraction module will have a significant response to the "sharp drop" part and form a positive pulse. These pulses are processed by the dual-threshold positive feedback hysteresis comparison circuit and then converted into a standard digital square wave output.

[0041] There is a carefully designed cascading relationship among the three functional modules of the circuit of the present invention, forming a complete signal processing link. The low output impedance of the signal isolation module and the high input impedance of the feature extraction module form a good match, ensuring that the signal output by the memristor is accurately transmitted without distortion; the feature extraction module enhances the "sharp drop" feature of the input signal while adjusting the signal to the level range suitable for processing by the pulse conversion module; the pulse conversion module generates digital pulses with high time accuracy and stable amplitude according to the waveform features output by the feature extraction module. The parameter coordination among the three modules is the key to the high performance of the system. Changing the parameters of any one module requires synchronous adjustment of the parameters of other modules to maintain the best performance. Experiments show that when the output impedance of the signal isolation module is less than 1 / 10 of the input impedance of the feature extraction module and the output impedance of the feature extraction module is less than 1 / 10 of the input impedance of the pulse conversion module, the system operates in the best state.

[0042] In some embodiments, operational amplifiers U1, U2, and U3 adopt a low-power CMOS process, and the supply voltage V CC is 1.2 - 5V, and the bandwidth is ≥1MHz.

[0043] The method for fabricating the dynamic memristor of the present invention is as follows:

[0044] 1. Prepare an oxide dielectric layer doped with metal atoms:

[0045] The dielectric layer of the memristor is prepared by magnetron sputtering technology. First, the ITO glass substrate is subjected to a standard cleaning procedure, and then an oxide thin film doped with metal atoms is deposited in a magnetron sputtering device. During the deposition process, appropriate Ar and O2 flow rates and their ratios are controlled, and an extremely thin conductive metal atom layer is inserted between the oxide layers to form a sandwich structure. Specific process parameters can be appropriately adjusted according to the device characteristics to obtain stable memristive characteristics. Among them, the oxide layer material can be TaO x 、SiO x 、HfO x 、polyimide, NbO x 、VO x and other materials, which can produce a "slow rise and steep fall" characteristic; the metal atom layer can be Ag, etc. The low-resistance ITO glass also serves as the bottom electrode.

[0046] 2. Prepare a metal top electrode:

[0047] The patterned top electrode is prepared by thermal evaporation using a mask plate. Evaporation is carried out under an appropriate background vacuum degree, and an appropriate evaporation rate is controlled to form a uniform metal electrode layer. The top electrode material can be an ionizable conductive material such as Ag.

[0048] Through the above steps, the fabricated memristor can generate a voltage signal with a "slow rise and steep fall" characteristic under a constant current input. After being processed by the modulation circuit of the present invention, this signal can be converted into a standard pulse signal compatible with a digital system, thereby realizing an efficient conversion from an analog signal to spike coding.

[0049] In the present invention, the circuit parameters can be appropriately adjusted according to actual application requirements. For example, by changing the proportional relationship between the time constants τ1 and τ2 in the feature extraction circuit and changing the values of capacitors and resistors, the output of memristors with different frequency characteristics can be optimized; by adjusting the threshold setting of the pulse conversion circuit, the sensitivity and noise immunity of the output pulse can be controlled.

[0050] In some embodiments, to meet the requirements of different application scenarios, the present invention can also have the following variations:

[0051] 1. The feature extraction circuit can optimize parameters according to the specific characteristics of the memristor, and obtain the best feature extraction effect by adjusting the time constant ratio and gain coefficient.

[0052] 2. The pulse conversion circuit can be replaced by other types of threshold processing circuits, such as using FPGA single-chip microcomputers, etc., to meet different application requirements.

[0053] 3. The present invention can be extended and applied to a variety of neuromorphic computing scenarios, including but not limited to:

[0054] a) Biomedical signal processing: By adjusting the device parameters of the feature extraction module and the pulse conversion module, the recognition of specific waveforms in bioelectric signals such as electrocardiogram (ECG) can be optimized, and a low-power biomedical signal monitoring system can be realized;

[0055] b) Sensor interface circuit: Connect various analog sensors, such as temperature, pressure, light intensity and other sensors, and convert their output signals into frequency-encoded digital pulses for easy processing by the neuromorphic processor;

[0056] c) Audio signal processing: By optimizing the parameter configuration, it can be used for feature extraction and encoding of sound signals, and applied to the low-power speech recognition front end.

[0057] To adapt to different application scenarios, the present invention can use digital potentiometers to replace key fixed resistors to achieve dynamic adjustment of parameters. In particular, R1 and R2 of the feature extraction module and R3 and R4 of the pulse conversion module can use digital potentiometers, which can be adjusted in real time through a microcontroller or FPGA, enabling the system to adapt to different input signal characteristics.

[0058] The present invention deeply analyzes the output waveform of the memristor and carefully designs a matching signal processing circuit, realizing the co-optimization from the device to the system. In particular, through the asymmetric time constant network and the dynamic threshold positive feedback structure, the problem of incompatibility between the memristor output signal and the traditional digital system is solved, and a low-power and high-sensitivity spike coding conversion scheme is provided.

[0059] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can still be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A spike coding modulation circuit based on a dynamic memristor, characterized in that It includes a dynamic memristor and a signal conversion circuit; the signal conversion circuit includes a signal isolation module, a feature extraction module, and a pulse conversion module connected in sequence; where: The dynamic memristor is used to output the input constant current as a voltage pulse signal with a "slow rise and steep fall", and the pulse frequency is proportional to the input current intensity; The signal isolation module includes a high-impedance input buffer circuit connected between the dynamic memristor and the feature extraction module; The feature extraction module includes an asymmetric time constant signal processing circuit for strongly extracting the "steep fall" feature of the output signal of the memristor; The pulse conversion module includes a dual-threshold positive feedback hysteresis comparison circuit for converting the output signal of the feature extraction module into a rectangular digital pulse.

2. The spiking coding modulation circuit based on a dynamic memristor according to claim 1, wherein The feature extraction module exhibits a band-pass characteristic in the frequency domain, and the center frequency matches the frequency component of the "steep fall" feature of the output signal of the dynamic memristor.

3. The spiking coding modulation circuit based on a dynamic memristor according to claim 2, wherein The asymmetric time constant signal processing circuit includes an operational amplifier U2, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2. The inverting input terminal of the operational amplifier U2 receives the input signal through a series network of the resistor R1 and the capacitor C1. The parallel network of the capacitor C2 and the resistor R2 serves as a feedback loop between the inverting input terminal and the output terminal of the operational amplifier U2. The non-inverting input terminal of the operational amplifier U2 is the reference voltage VT1; the asymmetric time constants are the input time constant τ1 and the feedback time constant τ2, τ1 = C1·R1, τ2 = C2·R2, and τ1>τ2 is satisfied.

4. The spiking coding modulation circuit based on a dynamic memristor according to claim 3, wherein In the feature extraction module, the range of the time constant τ1 is 25 - 400 microseconds, and the range of the time constant τ2 is 2 - 75 microseconds.

5. The spiking coding modulation circuit based on a dynamic memristor according to claim 4, wherein In the feature extraction module, the resistance value of the resistor R1 is 0.5 kΩ - 2 kΩ, the capacitance value of the capacitor C1 is 50 nF - 200 nF, the resistance value of the resistor R2 is 200 kΩ - 500 kΩ, and the capacitance value of the capacitor C2 is 10 pF - 150 pF.

6. The spike coding modulation circuit based on a dynamic memristor according to any one of claims 3-5, characterized in that, In the feature extraction module, the ratio of the time constant τ1 to the time constant τ2 satisfies that the ratio of τ1 / τ2 is in the range of 2 - 20.

7. The spiking coding modulation circuit based on a dynamic memristor according to any one of claims 1-5, characterized in that The positive feedback network of the pulse conversion module forms a hysteresis comparator structure with dual-threshold characteristics. When the input signal exceeds the upper threshold V H , a high level is output. When the input signal is lower than the lower threshold V L , a low level is output, where the difference between V H and V L is the hysteresis voltage to ensure stable operation in a noisy environment.

8. The spiking coding modulation circuit based on a dynamic memristor according to claim 7, wherein The dual-threshold positive feedback hysteresis comparison circuit includes an operational amplifier U3, a resistor R3, and a resistor R4. The non-inverting input terminal of the operational amplifier U3 is connected to the output terminal of the feature extraction module through the resistor R3. A resistor R4 is connected between the non-inverting input terminal and the output terminal of the operational amplifier U3 to form positive feedback, and the inverting input terminal of the operational amplifier U3 is connected to the reference voltage VT2.

9. The spike coding modulation circuit based on a dynamic memristor according to claim 1 or 8, characterized in that, The impedance matching of the signal isolation module, the feature extraction module, and the pulse conversion module satisfies the following conditions: the output impedance of the signal isolation module is less than 1 / 10 of the input impedance of the feature extraction module, and the output impedance of the feature extraction module is less than 1 / 10 of the input impedance of the pulse conversion module.

10. The spike coding modulation circuit based on a dynamic memristor according to claim 3 or 8, characterized in that Each resistor uses a digital potentiometer, and the resistance value is set by a microcontroller or an FPGA.

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