Circuit design method, device and equipment based on improved culture gene algorithm

Abstract

The invention discloses a circuit design method and device based on an improved culture gene algorithm, equipment and a medium, and relates to the technical field of circuit design. The method comprises the following steps: setting a coding format, an evaluation function and a plurality of performance functions according to attribute information of a target circuit; randomly generating a plurality of coding groups as individuals of the first generation population; determining a processing circuit corresponding to each individual; calculating the fitness value of each individual through an evaluation function; the elite individuals are reserved to serve as individuals of the next-generation population, crossover and mutation are conducted on the other individuals of the current population according to the dynamically-adjusted crossover probability and mutation probability, the individuals of the next-generation population are generated, and dynamic neighborhood search is conducted on the generated individuals of the next-generation population; and determining the processing circuit corresponding to the optimal individual as a target circuit. According to the method provided by the embodiment of the invention, the algorithm convergence speed can be accelerated, the computing resource consumption is reduced, the algorithm is effectively prevented from falling into local optimum, and the global search capability is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and in particular, to a circuit design method, device, equipment, and medium based on an improved memetic algorithm. Background Art

[0002] With the rapid development of integrated circuit technology, the design of large-scale digital circuits has become increasingly complex. Traditional design methods mainly rely on manual experience and rules, and it is difficult to cope with the increasing circuit scale and complexity. The memetic algorithm (MA), as an optimization method that combines global search and local search strategies, has shown great potential in solving complex optimization problems. However, there are some problems with the existing memetic algorithm when dealing with the optimization design of large-scale digital circuits, such as slow convergence speed and easy to fall into local optimum. Summary of the Invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. For this purpose, the present invention proposes a circuit design method, equipment, and medium based on an improved memetic algorithm, which can accelerate the algorithm convergence speed, reduce the consumption of computing resources, effectively avoid the algorithm falling into local optimum, and improve the global search ability.

[0004] In a first aspect, according to an embodiment of the present invention, a circuit design method based on an improved memetic algorithm, the method includes the following steps:

[0005] According to the attribute information of the target circuit, set the encoding format, evaluation function, and multiple functional functions; each of the functional functions has a corresponding performance index;

[0006] According to the encoding format, randomly generate multiple encoding groups as individuals of the first-generation population; each of the encoding groups includes multiple encodings, each of the encodings includes an input code and an identification code, the identification code is used to indicate the functional function corresponding to the encoding, and the input code is used to indicate the input value of the functional function corresponding to the encoding;

[0007] According to all the encodings in the encoding group of each individual, determine the processing circuit corresponding to each individual, and the output value of each processing circuit;

[0008] According to the output value and the performance indexes of all the functional functions included in each encoding group, calculate the fitness value of each individual through the evaluation function;

[0009] Determine the elite individuals of the current population according to the fitness value, retain the elite individuals as the individuals of the next generation population, and perform crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate the individuals of the next generation population, and perform dynamic neighborhood search on the generated individuals of the next generation population to optimize and adjust the individuals of the next generation population;

[0010] According to the individuals of the next generation population, return the steps of determining the processing circuit corresponding to each individual and the output value of each processing circuit according to all the codes in the coding group of each individual, until the last generation population is determined according to the preset termination condition;

[0011] Determine the processing circuit corresponding to the optimal individual as the target circuit according to the individuals of the last generation population.

[0012] According to some embodiments of the present invention, the processing circuit includes a plurality of processing units, and each code of the coding group corresponds to one processing unit; the determining the processing circuit corresponding to each individual and the output value of each processing circuit according to all the codes in the coding group of each individual includes:

[0013] Determine the connection relationship between each processing unit and the input value of each processing unit according to the input code of each code of the coding group;

[0014] Determine the functional function corresponding to each processing unit according to the identification code of each code of each coding group;

[0015] Connect all the processing units of the coding group according to the connection relationship to obtain the processing circuit corresponding to each individual;

[0016] According to the input value of each processing unit of the processing circuit, perform an operation on the input value through the functional function of each processing unit to obtain the operation result of each processing unit, and use the operation result of the last processing unit as the output value of the processing circuit.

[0017] According to some embodiments of the present invention, the performance indicators include the signal delay, power consumption and complexity of the functional function, and the connection power consumption and connection complexity of the connection lines between the processing units; the calculating the fitness value of each individual through the evaluation function according to the output value and the performance indicators of all the functional functions included in each coding group includes:

[0018] Obtain the value to be compared, and determine the function score of each individual according to the difference between the output value and the value to be compared;

[0019] Determine the performance score of each individual according to the signal delay, power consumption, complexity, connection power consumption, and connection complexity of each said individual;

[0020] Determine the fitness value of each individual according to the function score and the performance score.

[0021] According to some embodiments of the present invention, the determining the performance score of each individual according to the signal delay, power consumption, complexity, connection power consumption, and connection complexity of each said individual includes:

[0022] Sum the signal delays of each function function of the individual, and then multiply by a first weight to obtain a first score;

[0023] Sum the power consumptions of each function function of the individual, and then multiply by a second weight to obtain a second score;

[0024] Sum the complexities of each function function of the individual, and then multiply by a third weight to obtain a third score;

[0025] Sum the connection power consumptions between each processing unit of the individual, and then multiply by a fourth weight to obtain a fourth score;

[0026] Sum the connection complexities between each processing unit of the individual, and then multiply by a fifth weight to obtain a fifth score;

[0027] Sum the first score, the second score, the third score, the fourth score, and the fifth score to obtain the performance score.

[0028] According to some embodiments of the present invention, the determining the fitness value of each individual according to the function score and the performance score includes:

[0029] Multiply the function score by a sixth weight and then sum it with the performance score to obtain a sixth score;

[0030] Take the negation of the sixth score to obtain the fitness value.

[0031] According to some embodiments of the present invention, the determining the elite individuals of the current population according to the fitness value, retaining the elite individuals as individuals of the next-generation population, and performing crossover and mutation on the remaining individuals of the current population with a dynamically adjusted crossover probability and mutation probability to generate individuals of the next-generation population includes:

[0032] Sort the fitness values of each individual in the current population from largest to smallest, and take a number of the individuals ranked among the top several as the elite individuals of the current population, and retain the elite individuals as the individuals of the next-generation population;

[0033] With dynamically adjusted crossover probability and mutation probability, perform crossover and mutation on the remaining individuals in the current population to generate individuals of the next-generation population; the larger the fitness value of an individual, the smaller the crossover probability and the mutation probability, and as the generation number of the current population increases, the crossover probability and the mutation probability gradually decrease.

[0034] According to some embodiments of the present invention, the dynamically neighborhood search for the individuals of the generated next-generation population and the optimization and adjustment of the individuals of the next-generation population include:

[0035] For all individuals of the generated next-generation population, select some individuals as candidate individuals;

[0036] According to a preset first probability, select a number of codes within the candidate individuals as candidate codes;

[0037] According to a preset second probability, determine the adjustment depth of each candidate code, and adjust the candidate code according to the adjustment depth to form a new individual; the new individual also serves as an individual of the next-generation population.

[0038] In a second aspect, a circuit design device based on an improved memetic algorithm according to an embodiment of the present invention includes at least one control processor and a memory communicatively connected to the at least one control processor; the memory stores instructions executable by the at least one control processor, and the instructions are executed by the at least one control processor so that the at least one control processor can execute the circuit design method based on the improved memetic algorithm described in the first aspect embodiments.

[0039] In a third aspect, an electronic device according to an embodiment of the present invention includes the circuit design device based on the improved memetic algorithm described in the second aspect embodiments.

[0040] In a fourth aspect, a computer-readable storage medium according to an embodiment of the present invention stores computer-executable instructions for causing a computer to execute the circuit design method based on the improved memetic algorithm described in the first aspect embodiments.

[0041] The circuit design method, device, equipment, and medium based on the improved memetic algorithm according to the embodiments of the present invention have at least the following beneficial effects: Through the adaptive crossover and mutation strategy and the elite retention mechanism, the method accelerates the algorithm convergence speed and reduces the consumption of computing resources; through the dynamic neighborhood search technology, the method effectively avoids the algorithm falling into local optimality and improves the global search ability; the method can significantly improve the performance indicators of large-scale digital circuit design, such as reducing power consumption, reducing latency, and optimizing area.

[0042] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The above and / or additional aspects and advantages of the present invention will become apparent and be readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0044] Figure 1 is a flowchart of the steps of the circuit design method based on the improved memetic algorithm according to the embodiments of the present invention;

[0045] Figure 2 is a functional schematic diagram of the target circuit according to the embodiments of the present invention;

[0046] Figure 3 is a schematic diagram of the principle of the image filter according to the embodiments of the present invention;

[0047] Figure 4 is a specific schematic diagram of the principle of the image filter according to the embodiments of the present invention;

[0048] Figure 5 is a schematic diagram of the processing unit included in the processing circuit according to the embodiments of the present invention;

[0049] Figure 6 is a schematic diagram of the functional function according to the embodiments of the present invention;

[0050] Figure 7 is a schematic diagram of the target circuit according to the embodiments of the present invention;

[0051] Figure 8 is a schematic diagram of the configuration of each weight according to the embodiments of the present invention;

[0052] Figure 9 is a schematic diagram of the principle of crossing individuals according to the embodiments of the present invention;

[0053] Figure 10 is a schematic diagram of the principle of mutating individuals according to the embodiments of the present invention;

[0054] Figure 11It is a schematic flowchart of the circuit design method based on the improved memetic algorithm according to the embodiments of the present invention. Detailed implementation manners

[0055] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as a limitation to the present application. For the step numbers in the following embodiments, they are only set for the convenience of explanation and illustration, and no limitation is imposed on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0056] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by terms such as up, down, front, back, left, right, etc. related to the orientation description is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.

[0057] The terms "first", "second", "third", "fourth", etc. in the specification, claims and drawings of the present invention are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include steps or units not listed, or may optionally further include other steps or units inherent to these processes, methods, products or devices.

[0058] Referring to "embodiments" in the present invention means that specific features, structures or characteristics described in connection with the embodiments may be included in at least one embodiment of the present invention. The phrase appears in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments.

[0059] With the rapid development of integrated circuit technology, the design of large-scale digital circuits has become increasingly complex. Traditional design methods mainly rely on manual experience and rules, making it difficult to cope with the increasing circuit scale and complexity. As an optimization method that combines global search and local search strategies, the memetic algorithm has shown great potential in solving complex optimization problems. However, there are some problems with existing memetic algorithms when dealing with the optimization design of large-scale digital circuits, such as slow convergence speed and easy to fall into local optima.

[0060] Therefore, the embodiments of the present invention provide a circuit design method, device, equipment, and medium based on an improved memetic algorithm. The circuit design is carried out through the improved memetic algorithm, which combines an adaptive crossover and mutation strategy, an elite retention mechanism, and a dynamic neighborhood search technique, aiming to improve the efficiency and performance of digital circuit design, reduce circuit resource consumption, and enhance the running speed and stability, and avoid falling into local optima.

[0061] The following will describe in detail the circuit design method, equipment, and medium based on the improved memetic algorithm according to the embodiments of the present invention with reference to the accompanying drawings.

[0062] On the one hand, the embodiments of the present invention propose a circuit design method based on an improved memetic algorithm, as Figure 1 shown, the method includes the following steps:

[0063] Step S100: Set the encoding format, evaluation function, and multiple functional functions according to the attribute information of the target circuit; each functional function has a corresponding performance index;

[0064] Step S200: Randomly generate multiple coding groups as individuals of the first-generation population according to the encoding format; each coding group includes multiple codings, each coding contains an input code and an identification code, the identification code is used to indicate the functional function corresponding to the coding, and the input code is used to indicate the input value of the functional function corresponding to the coding;

[0065] Step S300: Determine the processing circuit corresponding to each individual and the output value of each processing circuit according to all the codings in the coding group of each individual;

[0066] Step S400: Calculate the fitness value of each individual through the evaluation function according to the output value and the performance indexes of all the functional functions included in each coding group;

[0067] Step S500: Determine the elite individuals of the current population according to the fitness values, retain the elite individuals as the individuals of the next-generation population, and perform crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate the individuals of the next-generation population, and perform dynamic neighborhood search on the generated individuals of the next-generation population to optimize and adjust the individuals of the next-generation population;

[0068] Step S600: According to the individuals of the next-generation population, return to Step S300 - Step S500 until the last-generation population is determined according to the preset termination conditions;

[0069] Step S700: Determine the processing circuit corresponding to the optimal individual as the target circuit according to the individuals of the last-generation population.

[0070] Specifically, for the circuit design method based on the improved memetic algorithm according to the embodiments of the present application, first, clarify the attribute information of the target circuit, including functions and performance, etc. Then, according to the functions and performance of the target circuit, design the coding format, evaluation function, and functional function. Then, according to the initial parameters designed for the target circuit, randomly generate a certain number of individuals as the first-generation population. Determine the processing circuit and its output value of each individual through the coding group of each individual, so as to calculate the fitness value of each individual through the evaluation function. The fitness value is evaluated based on the performance indicators of each processing circuit (such as correctness, power consumption, delay, area, etc.). Then, directly retain the optimal individual in the parent population to the offspring population (each generation of population serves as the parent population of the next generation and the offspring population of the previous generation), and dynamically adjust the crossover and mutation probabilities according to the evolutionary state of the current population and the fitness values of the individuals, perform crossover and mutation operations to generate new offspring individuals, perform dynamic neighborhood search on the individuals in the offspring population to further optimize the individual fitness values; regard the elite individuals and the offspring individuals together as the next-generation population, and recalculate the fitness value of each individual in the next-generation population, repeat Step S300 - Step S500 until the preset conditions are met (such as reaching the preset number of iterations or the fitness value no longer significantly improves), obtain the last-generation population, and regard the individual with the largest fitness value in the last-generation population as the optimal individual. The processing circuit corresponding to this optimal individual is the optimal solution for the target circuit design. This method can accelerate the algorithm convergence speed and reduce the consumption of computing resources through the adaptive crossover and mutation strategy and the elite retention mechanism; effectively avoid the algorithm falling into local optimum and improve the global search ability through the dynamic neighborhood search technology; this method can significantly improve the performance indicators of large-scale digital circuit design, such as reducing power consumption, reducing delay, and optimizing area, etc.

[0071] In this example, taking the target circuit as an image filter, the circuit design method based on the improved memetic algorithm of the embodiments of the present application is described in detail; it should be noted that this method is also applicable to the design of other digital circuits, not limited to this.

[0072] As Figure 2 shown, assuming that the target circuit to be designed is an image filter, after designing the circuit, it is necessary to verify its filtering performance; the closer the filtered image is to the original image, the better the performance of the image filter, and vice versa. Therefore, for the finally designed image filter, the image obtained after processing the noisy image should be as consistent as possible with the original image. As Figure 3 shown, in the image filter designed in this example, each pixel point of the processed image is obtained by processing the corresponding 9 pixel points in the original image through the circuit. As Figure 4 shown, any adjacent three rows and three columns of 9 pixel points in the original image generate a corresponding pixel point after passing through the image filter.

[0073] In this example, the processing circuit corresponding to each individual is composed of multiple processing units. As Figure 5 shown, assuming that according to the attribute information of the target circuit, 32 processing units of 4*8 are designed, namely CLB9 - CLB40, and each processing unit has a corresponding function function. The design of the function function, as well as the signal delay, power consumption, and complexity of each function function, and the connection power consumption and connection complexity of the connection lines between the processing units are as Figure 6As shown. In this example, each code corresponds to a processing unit, and each code has three digits. Two of the digits are input codes, corresponding to two input values of the processing unit, and the other digit is an identification code for indicating the functional function corresponding to the processing unit. Each processing unit performs an operation on the two input values through the functional function and obtains an output value according to the operation result. Each code can be expressed as (input code 1, input code 2, identification code). Among them, when the input code is 0-8, it means that the input code corresponds to the pixel value of a certain pixel point. For example, assuming that input code 1 is the number 5, it means that input code 1 corresponds to the pixel value of the 6th pixel point among 9 pixel points. When the input code is a number greater than 8, it means that the input code corresponds to the output value of a certain processing unit. For example, when input code 1 is the number 9, it means that input code 1 corresponds to the output value of processing unit CLB9. The identification code is used to indicate the corresponding functional function. When the identification code is the number 9, it corresponds to the functional function numbered 9 (x >> 2). When the identification code is the number 15, it corresponds to the functional function numbered 15 (min(x, y), where x represents the value corresponding to input code 1 and y represents the value corresponding to input code 2). Finally, multiple codes form a code group, and each code group corresponds to an individual. For example, an exemplary code group is: (4, 6, 1)(1, 7, 15)(3, 8, 15)(4, 1, 9)(12, 11, 9)(0, 0, 0)(0, 0, 0)(0, 0, 0)(0, 0, 0)(13, 9, 11)(0, 0, 0)(0, 0, 0)(16, 19, 0)(0, 0, 0)(0, 0, 0)(0, 0, 0)(21, 13, 11)(0, 0, 0)(0, 0, 0)(18, 11, 14)(10, 28, 14)(0, 0, 0)(0, 0, 0)(0, 0, 0)(25, 9, 14)(0, 0, 0)(0, 0, 0)(0, 0, 0)(29, 33, 15)(0, 0, 0)(0, 0, 0)(0, 0, 0); The processing circuit corresponding to this code group is as Figure 7 shown.

[0074] After determining the format of the code, multiple code groups can be randomly generated as individuals of the first-generation population according to the code format, and the processing circuit corresponding to each individual and the output value of each processing circuit can be determined according to all the codes in the code group of each individual. In this example, step S300 described above specifically includes the following three steps:

[0075] Step S310: Determine the connection relationship between each processing unit and the input value of each processing unit according to the input codes of each code in the code group;

[0076] Step S320: Determine the functional function corresponding to each processing unit according to the identification codes of each code in each code group;

[0077] Step S330: Connect all the processing units of the coding group according to the connection relationship to obtain the processing circuit corresponding to each individual;

[0078] Step S340: According to the input values of each processing unit of the processing circuit, perform operations on the input values through the functional functions of each processing unit to obtain the operation results of each processing unit, and use the operation result of the last processing unit as the output value of the processing circuit.

[0079] Taking the above coding group: (4, 6, 1)(1, 7, 15)(3, 8, 15)(4, 1, 9)(12, 11, 9)(0, 0, 0)(0, 0, 0)(0, 0, 0)(0, 0, 0)(13, 9, 11)(0, 0, 0)(0, 0, 0)(16, 19, 0)(0, 0, 0)(0, 0, 0)(0, 0, 0)(21, 13, 11)(0, 0, 0)(0, 0, 0)(18, 11, 14)(10, 28, 14)(0, 0, 0)(0, 0, 0)(0, 0, 0)(25, 9, 14)(0, 0, 0)(0, 0, 0)(0, 0, 0)(29, 33, 15)(0, 0, 0)(0, 0, 0)(0, 0, 0) as an example, according to the input codes of each code, the connection relationship between each processing unit and the input values of each processing unit can be determined. According to the identification codes of each code, the functional function corresponding to each processing unit can be determined. For example, the code (4, 6, 1) indicates that its input values are the pixel values of the fifth pixel point and the seventh pixel point, and its corresponding functional function is the functional function numbered 1: x, indicating the output of the pixel value of the fifth pixel point; the code (12, 11, 9) indicates that its input values are the output values of the processing unit CLB12 and the output value of the processing unit CLB11 respectively, and its functional function is the functional function numbered 9: x >> 2, that is, shifting the output value of the processing unit CLB12 to the right by 2 bits (equivalent to multiplying the decimal number by 4). Thus, it can be seen that according to each code in the coding group, the final processing circuit of the coding group and the output value of the processing circuit can be determined. It should be noted that after each processing unit performs an operation, the operation result is output to the next processing unit. For example, as Figure 7 shown, the operation results of the processing unit CLB12 and the processing unit CLB11 are both output to the processing unit CLB13 for calculation; for the last processing unit, such as the processing unit CLB37, the final output value is calculated and output.

[0080] For all individuals in the first-generation population, each individual has a corresponding processing circuit. The input data (the pixel values of the pixels in the noisy image) needs to be input into the processing circuits of each individual respectively to obtain the output value of each individual. Then, according to the output value of each individual, the fitness value of each individual needs to be calculated to determine the individuals with better functions and performances. Specifically, in this example, the above step S400: calculating the fitness value of each individual through an evaluation function according to the output value and the performance indicators of all functional functions included in each coding group includes the following three steps:

[0081] S410: Obtain the value to be compared, and determine the function score of each individual according to the difference between the output value and the value to be compared;

[0082] S420: Determine the performance score of each individual according to the signal delay, power consumption, complexity, connection power consumption and connection complexity of each individual;

[0083] S430: Determine the fitness value of each individual according to the function score and the performance score.

[0084] Specifically, in this example, the value to be compared refers to the pixel values of each pixel point in the original image, and the output value refers to each pixel point obtained after the noisy image is processed by the processing circuit. Subtract each pixel point in the output value from the corresponding pixel point in the value to be compared, and then sum the absolute values of all the differences to obtain the function score of the individual corresponding to each processing circuit. The calculation formula of the function score is as follows:

[0085]

[0086] Among them, M is the total number of rows of pixel points in the original image, N is the total number of columns of pixel points in the original image. Since 9 pixel points in every adjacent three rows and three columns form 1 pixel point, the pixel points obtained after being processed by the processing circuit will be reduced by two rows and two columns. Therefore, the value range of i is 1 to (M - 2), and the value range of j is 1 to (N - 2). v(i, j) represents the pixel value of the pixel point in the i-th row and j-th column of the filtered image, and w(i, j) represents the pixel value of the pixel point in the i-th row and j-th column of the original image; after taking the absolute value of the differences of all pixel points and adding them up, the function score F1 of each individual is obtained.

[0087] In this example, the above step S420: determining the performance score of each individual according to the signal delay, power consumption, complexity, connection power consumption and connection complexity of each individual specifically includes the following six steps:

[0088] Step S421: After summing up the signal delays of each functional function of the individual, multiply by the first weight to obtain the first score;

[0089] Step S422: After summing up the power consumptions of each functional function of the individual, multiply by the second weight to obtain the second score;

[0090] Step S423: After summing up the complexities of each functional function of the individual, multiply by the third weight to obtain the third score;

[0091] Step S424: After summing up the connection power consumptions between each processing unit of the individual, multiply by the fourth weight to obtain the fourth score;

[0092] Step S425: After summing up the connection complexities between each processing unit of the individual, multiply by the fifth weight to obtain the fifth score;

[0093] Step S426: Sum up the first score, the second score, the third score, the fourth score and the fifth score to obtain the performance score.

[0094] Specifically, as Figure 5 shown, the signal delay of the functional function numbered 0 is 1, the complexity is 8, and the power consumption is 5; the signal delay of the functional function numbered 1 is 2, the complexity is 16, and the power consumption is 5,..., the signal delay of the functional function numbered 15 is 16, the complexity is 240, and the power consumption is 145; the connection power consumption of the connection line between the processing units is 10, and the connection complexity is 16. The calculation formula of the performance score is as follows:

[0095] F2 = SD * a sd + Pb * a pb + Cb * a cb + Pw * a pw + Cw * a cw ;

[0096] wherein, SD represents the sum of the signal delays of all functional functions included in the processing circuit corresponding to each individual, a sd represents the first weight, Pb represents the sum of the complexities of all functional functions included in the processing circuit corresponding to each individual, a pb represents the second weight, Cb represents the sum of the power consumptions of all functional functions included in the processing circuit corresponding to each individual, a cb represents the third weight, Pw represents the connection power consumption of all connection lines of the processing circuit corresponding to each individual, a pw represents the fourth weight, Cw represents the sum of the connection complexities of all connection lines of the processing circuit corresponding to each individual, a dw represents the fifth weight.

[0097] In this example, the above-mentioned step S430: Determine the fitness value of each individual according to the function score and the performance score, specifically including the following two steps:

[0098] Step S431: Multiply the function score by the sixth weight and then sum it with the performance score to obtain the sixth score.

[0099] Step S432: Invert the sixth score to obtain the fitness value.

[0100] The calculation formula for the fitness value is as follows:

[0101] F = (-1) * (F1 * β + F2);

[0102] F1 is used to represent the error between the filtered image and the original image, β represents the sixth weight; F2 represents the complexity, energy consumption, signal delay, etc. of the processing circuit. The smaller the value of the sixth score, the better. After multiplying by -1, it becomes the larger the better. Therefore, the larger the fitness value of the individual, the better. In this example, the first weight a sd , the second weight a pb , the third weight a cb , the fourth weight a pw , the fifth weight a cw , the sixth weight β take values as Figure 8 shown, where a sd is 10 9 , a pb is 10 5 , a cb is 10 3 , a pw is 10 2 , a cw is 10 0 , β is 10 8 .

[0103] After obtaining the fitness value of each individual, it is necessary to determine the elite individuals of the current population according to the fitness value, retain the elite individuals as the individuals of the next generation population, and perform crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate the individuals of the next generation population, which specifically includes the following two steps:

[0104] Step 510: Sort the fitness values of each individual in the current population from largest to smallest, take the top several individuals as the elite individuals of the current population, and retain the elite individuals as the individuals of the next generation population;

[0105] Step 520: Perform crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate the individuals of the next generation population; the larger the fitness value of the individual, the smaller the crossover probability and mutation probability, and as the number of generations of the current population increases, the crossover probability and mutation probability gradually decrease.

[0106] Specifically, the fitness values of each individual in the first-generation population are sorted from largest to smallest, and several individuals with the highest fitness values are selected as elite individuals, which are directly retained in the next-generation population; for the remaining individuals in the first-generation population, crossover and mutation are performed to generate individuals in the next-generation population. As Figure 9 shown, Parents represents the parent population, and Children represents the offspring population. When performing crossover, one-point crossover (randomly select a crossover point, divide the two parent individuals into left and right parts, and exchange the segments after the crossover point to generate offspring individuals), two-point crossover (randomly select two crossover points in the parent individuals, and exchange the segments between the two points to generate offspring individuals), parameterized uniform crossover (parameterized uniform crossover, by presetting the exchange probability, control each segment to independently select the parent source), or other crossover methods can be selected. As Figure 10 shown, in addition to performing crossover on the parent population, mutation can also be performed on the parent population. Randomly select a code in the coding group, and then randomly select several numbers in the code and change them to some new random values to form an offspring individual.

[0107] It should be noted that as the number of generations of evolution increases, the crossover probability and mutation probability gradually decrease; for individuals with high fitness values, the crossover probability and mutation probability are smaller than those of individuals with low fitness values. By dynamically adjusting the crossover and mutation strategies and the elite retention mechanism, the convergence speed of the algorithm is accelerated and the consumption of computing resources is reduced.

[0108] At the same time, for the generated offspring individuals, dynamic neighborhood search also needs to be performed to optimize and adjust the individuals in the offspring population, which specifically includes the following three steps:

[0109] Step 530: Select some individuals as candidate individuals from all the individuals in the generated next-generation population;

[0110] Step 540: Select several codes within the candidate individuals according to a preset first probability as candidate codes;

[0111] Step 550: Determine the adjustment depth of each candidate code according to a preset second probability, and adjust the candidate codes according to the adjustment depth to form new individuals; the new individuals also serve as individuals in the next-generation population.

[0112] The dynamic neighborhood search technique dynamically adjusts the scope and depth of neighborhood search according to the characteristics of the current individual: Select several individuals with higher fitness values as candidate individuals, and then determine whether each code within the candidate individuals is selected with a certain probability (the first probability). The selected ones are used as candidate codes, and then determine how much the current value changes (i.e., adjust the depth) with a certain probability (the second probability). For example, about 30% of the coded digits of an individual are selected, and the selected digits are subject to certain changes, such as +1, -1, +2, -2, etc., to form new individuals. The dynamic neighborhood search technique effectively prevents the algorithm from falling into local optima and improves the global search ability.

[0113] After generating the individuals of each new generation of population, return to steps S300 - S500 for iteration until a preset termination condition is reached, such as reaching a preset number of iterations or the fitness values of the individuals in the new population no longer significantly improve. After obtaining the last generation of population, select the individual with the highest fitness as the optimal individual, and the processing circuit corresponding to this optimal individual is used as the target circuit.

[0114] The overall process of the circuit design method based on the improved memetic algorithm in the embodiments of this application is as Figure 11 shown. This method uses an adaptive crossover and mutation strategy and an elite retention mechanism to accelerate the convergence speed of the algorithm and reduce the consumption of computing resources; it effectively prevents the algorithm from falling into local optima through the dynamic neighborhood search technique and improves the global search ability; this method can significantly improve the performance indicators of large-scale digital circuit design, such as reducing power consumption, reducing latency, and optimizing area, etc.

[0115] On the other hand, this application also provides a circuit design device based on the improved memetic algorithm, including:

[0116] A processor, which can be implemented in ways such as a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, etc., and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application;

[0117] A memory, which can be implemented in forms such as a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM), etc. The memory can store an operating system and other application programs. When implementing the technical solutions provided in the embodiments of this specification through software or firmware, the relevant program codes are stored in the memory and are called by the processor to execute the circuit design method based on the improved memetic algorithm in the embodiments of this application;

[0118] An input / output interface for implementing information input and output;

[0119] A communication interface for implementing communication interaction between this device and other devices, which can achieve communication through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.);

[0120] A bus for transmitting information between various components of the device (such as a processor, a memory, an input / output interface, and a communication interface);

[0121] Among them, the processor, the memory, the input / output interface, and the communication interface achieve communication connections with each other inside the device through the bus.

[0122] On the other hand, an embodiment of the present application also provides an electronic device, including the circuit design device based on the improved memetic algorithm as described above.

[0123] On the other hand, an embodiment of the present application also provides a storage medium, which is a computer-readable storage medium. The storage medium stores a computer program, and when the computer program is executed by a processor, it implements the above-mentioned circuit design method based on the improved memetic algorithm.

[0124] As a non-transitory computer-readable storage medium, the memory can be used to store non-transitory software programs and non-transitory computer-executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely set relative to the processor, and these remote memories can be connected to the processor through a network. Examples of the above network include but are not limited to the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof. The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and may be located in one place, or may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0125] Although specific embodiments are described herein, those of ordinary skill in the art will recognize that many other modifications or alternative embodiments are also within the scope of the present disclosure. For example, any one of the functions and / or processing capabilities described in connection with a particular device or component can be performed by any other device or component. Additionally, although various exemplary implementations and architectures have been described in accordance with embodiments of the present disclosure, those of ordinary skill in the art will recognize that many other modifications to the exemplary implementations and architectures described herein are also within the scope of the present disclosure.

[0126] Certain aspects of the present disclosure have been described above with reference to block diagrams and flowcharts of systems, methods, systems, and / or computer program products according to exemplary embodiments. It should be understood that one or more blocks in the block diagrams and flowcharts, and combinations of blocks in the block diagrams and flowcharts, can be implemented respectively by executing computer-executable program instructions. Similarly, according to some embodiments, some blocks in the block diagrams and flowcharts may not need to be executed in the order shown, or may not need to be executed at all. Additionally, additional components and / or operations beyond those shown in the blocks of the block diagrams and flowcharts may exist in certain embodiments.

[0127] Accordingly, the blocks in the block diagrams and flowcharts support combinations of means for performing the specified functions, combinations of elements or steps for performing the specified functions, and means for program instructions for performing the specified functions. It should also be understood that each block in the block diagrams and flowcharts, and combinations of blocks in the block diagrams and flowcharts, can be implemented by a special purpose hardware computer system that performs a particular function, element, or step, or by a combination of special purpose hardware and computer instructions.

[0128] The program modules, applications, etc. described herein may include one or more software components, including, for example, software objects, methods, data structures, etc. Each such software component may include computer-executable instructions that, upon execution, cause at least a portion of the functions described herein (e.g., one or more operations of the exemplary methods described herein) to be performed.

[0129] Software components can be coded in any of a variety of programming languages. An exemplary programming language can be a low-level programming language, such as an assembly language associated with a particular hardware architecture and / or operating system platform. Software components that include assembly language instructions may need to be converted by an assembler into executable machine code before being executed by the hardware architecture and / or platform. Another exemplary programming language can be a higher-level programming language that can be ported across multiple architectures. Software components that include a higher-level programming language may need to be converted by an interpreter or compiler into an intermediate representation before execution. Other examples of programming languages include, but are not limited to, macro languages, shell or command languages, job control languages, scripting languages, database query or search languages, or report writing languages. In one or more exemplary embodiments, software components containing instructions in one of the above examples of programming languages can be directly executed by an operating system or other software components without first being converted into another form.

[0130] Software components can be stored as files or other data storage constructs. Software components with similar types or related functions can be stored together in, for example, a specific directory, folder, or library. Software components can be static (e.g., pre-set or fixed) or dynamic (e.g., created or modified at execution time).

[0131] The embodiments of the present invention have been described in detail above in conjunction with the accompanying drawings. However, the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the scope of knowledge possessed by those of ordinary skill in the relevant art.

Claims

1. A circuit design method based on an improved memetic algorithm, characterized in that, The steps include: Set an encoding format, an evaluation function, and multiple functional functions according to the attribute information of the target circuit; each of the functional functions has a corresponding performance index; Randomly generate multiple coding groups as individuals of the first-generation population according to the encoding format; each of the coding groups includes multiple codings, each of the codings includes an input code and an identification code, the identification code is used to indicate the functional function corresponding to the coding, and the input code is used to indicate the input value of the functional function corresponding to the coding; Determine the processing circuit corresponding to each individual and the output value of each processing circuit according to all the codings in the coding group of each individual; Calculate the fitness value of each individual through the evaluation function according to the output value and the performance indexes of all the functional functions included in each coding group; Determine the elite individuals of the current population according to the fitness value, retain the elite individuals as individuals of the next-generation population, and perform crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate individuals of the next-generation population, and perform dynamic neighborhood search on the generated individuals of the next-generation population to optimize and adjust the individuals of the next-generation population; According to the individuals of the next-generation population, return to the step of determining the processing circuit corresponding to each individual and the output value of each processing circuit according to all the codings in the coding group of each individual until the last-generation population is determined according to the preset termination condition; Determine the processing circuit corresponding to the optimal individual as the target circuit according to the individuals of the last-generation population; 2. The circuit design method based on the improved memetic algorithm according to claim 1, characterized in that The processing circuit includes multiple processing units, and each of the codings in the coding group corresponds to one of the processing units; The step of determining the processing circuit corresponding to each individual and the output value of each processing circuit according to all the codings in the coding group of each individual includes: Determine the connection relationship between each processing unit and the input value of each processing unit according to the input code of each coding in the coding group; Determine the functional function corresponding to each processing unit according to the identification code of each coding in each coding group; Connect all the processing units in the coding group according to the connection relationship to obtain the processing circuit corresponding to each individual; Perform an operation on the input value through the functional function of each processing unit according to the input value of each processing unit in the processing circuit to obtain the operation result of each processing unit, and use the operation result of the last processing unit as the output value of the processing circuit; 3. The circuit design method based on the improved memetic algorithm according to claim 2, wherein The performance indexes include the signal delay, power consumption, and complexity of the functional function, as well as the connection power consumption and connection complexity of the connection lines between the processing units; the step of calculating the fitness value of each individual through the evaluation function according to the output value and the performance indexes of all the functional functions included in each coding group includes: Obtain the values to be compared, and determine the function scores of each individual according to the difference between the output value and the values to be compared; Determine the performance scores of each individual according to the signal delay, power consumption, complexity, connection power consumption, and connection complexity of each individual; Determine the fitness value of each individual according to the function score and the performance score.

4. The circuit design method based on the improved memetic algorithm according to claim 3, characterized in that The step of determining the performance scores of each individual according to the signal delay, power consumption, complexity, connection power consumption, and connection complexity of each individual includes: Sum up the signal delays of each functional function of the individual, and then multiply by the first weight to obtain the first score; Sum up the power consumptions of each functional function of the individual, and then multiply by the second weight to obtain the second score; Sum up the complexities of each functional function of the individual, and then multiply by the third weight to obtain the third score; Sum up the connection power consumptions between each processing unit of the individual, and then multiply by the fourth weight to obtain the fourth score; Sum up the connection complexities between each processing unit of the individual, and then multiply by the fifth weight to obtain the fifth score; Sum up the first score, the second score, the third score, the fourth score, and the fifth score to obtain the performance score.

5. The circuit design method based on the improved memetic algorithm according to claim 3, wherein The step of determining the fitness value of each individual according to the function score and the performance score includes: Multiply the function score by the sixth weight and then sum it with the performance score to obtain the sixth score; Take the inverse of the sixth score to obtain the fitness value.

6. The circuit design method based on the improved memetic algorithm according to claim 1, wherein The step of determining the elite individuals of the current population according to the fitness value, retaining the elite individuals as the individuals of the next-generation population, and performing crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate the individuals of the next-generation population includes: Sort the fitness values of each individual in the current population from largest to smallest, and take several individuals ranked in the top several positions as the elite individuals of the current population, and retain the elite individuals as the individuals of the next-generation population; Perform crossover and mutation on the remaining individuals of the current population with dynamically adjusted crossover probability and mutation probability to generate the individuals of the next-generation population; the larger the fitness value of the individual, the smaller the crossover probability and the mutation probability, and as the generation number of the current population increases, the crossover probability and the mutation probability gradually decrease.

7. The circuit design method based on the improved memetic algorithm according to claim 1, wherein The step of performing dynamic neighborhood search on the individuals of the generated next-generation population to optimize and adjust the individuals of the next-generation population includes: Select some individuals from all the individuals of the generated next-generation population as candidate individuals; Select several codes within the candidate individuals according to the preset first probability as candidate codes; Determine the adjustment depth of each candidate code according to the preset second probability, and adjust the candidate code according to the adjustment depth to form a new individual; the new individual is also used as the individual of the next-generation population.

8. A circuit design device based on an improved memetic algorithm, characterized in that Comprising at least one control processor and a memory communicatively connected to the at least one control processor; The memory stores instructions executable by the at least one control processor, and the instructions are executed by the at least one control processor to enable the at least one control processor to execute the circuit design method based on the improved memetic algorithm according to any one of claims 1 to 7.

9. An electronic device, characterized in that, Comprising the circuit design device based on the improved memetic algorithm according to claim 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to execute the circuit design method based on the improved memetic algorithm according to any one of claims 1 to 7.

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