Vertical cavity surface emitting laser

Abstract

The invention relates to a vertical cavity surface emitting laser which comprises a first distributed Bragg reflector, an active layer, an oxide layer and a second distributed Bragg reflector which are located on the front face of a substrate and sequentially stacked in the direction away from the substrate. The active layer comprises a first heterojunction layer, a quantum well layer and a second heterojunction layer which are sequentially stacked in the direction away from the substrate. Wherein the first heterojunction layer and the second heterojunction layer are made of aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the aluminum component in the second heterojunction layer are gradually increased in the direction away from the quantum well layer. The bandwidth supported by the VCSEL can be increased at least under the condition that the volume of the VCSEL is not increased.

Description

[0001] Cross - reference to related applications

[0002] This disclosure claims priority to U.S. Patent Application No. 63 / 626,181, filed with the U.S. Patent Office on January 29, 2024, entitled "High speed VCSEL with narrow SCH layers", the entire content of which is incorporated herein by reference. Technical field

[0003] The present invention relates to the field of semiconductor lasers, and particularly to a vertical - cavity surface - emitting laser. Background art

[0004] VCSEL (Vertical - Cavity Surface - Emitting Laser) is a semiconductor laser, and its basic structure mainly includes an active layer and DBR (Distributed Bragg Reflector - DBR) mirrors with optical feedback function.

[0005] VCSEL can generate a circular light spot that is easy to couple with an optical fiber, and has many advantages such as high modulation rate, low transmission loss, high temperature stability, low threshold current, low power consumption, high reliability, and easy integration with other optical devices.

[0006] However, with the development of high - speed data communication technology, the market has put forward higher requirements for the bandwidth supported by VCSEL. Therefore, how to increase the bandwidth supported by VCSEL without increasing the volume of VCSEL has become one of the important research and development directions. Summary of the invention

[0007] Based on this, it is necessary to provide a vertical - cavity surface - emitting laser for the technical problems in the above - mentioned background art, which can at least increase the bandwidth supported by VCSEL without increasing the volume of VCSEL.

[0008] To achieve the above and other objects, according to various embodiments of the present disclosure, a first aspect of the present disclosure provides a vertical - cavity surface - emitting laser, including a first distributed Bragg reflector, an active layer, an oxide layer, and a second distributed Bragg reflector, which are sequentially stacked on the front surface of a substrate in a direction away from the substrate; the active layer includes a first heterojunction layer, a quantum well layer, and a second heterojunction layer, which are sequentially stacked in a direction away from the substrate; wherein, the materials of the first heterojunction layer and the second heterojunction layer both include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases in a direction away from the quantum well layer.

[0009] In the vertical cavity surface emitting laser in the above embodiments, by providing that the active layer includes a quantum well layer located between a first heterojunction layer and a second heterojunction layer, and providing that the materials of the first heterojunction layer and the second heterojunction layer both include gallium aluminum arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases in the direction away from the quantum well layer, the time for carriers to enter the active layer via the first heterojunction layer or the second heterojunction layer is reduced, so that the bandwidth supported by the VCSEL can be increased without increasing the volume of the VCSEL.

[0010] In one embodiment, the first heterojunction layer includes a first part located between its central cross-section and the quantum well layer, and the proportion of the aluminum component in the first part of the first heterojunction layer is 10%-40%. By setting the part of the first heterojunction layer close to the quantum well layer to have a relatively low proportion of the aluminum component, the part of the first heterojunction layer away from the quantum well layer is set to have a relatively high proportion of the aluminum component, so as to reduce the time for carriers to enter the active layer via the first heterojunction layer without changing the thickness of the first heterojunction layer, and thus the bandwidth supported by the VCSEL can be increased without increasing the volume of the VCSEL.

[0011] In one embodiment, the second heterojunction layer includes a first part located between its central cross-section and the quantum well layer, and the proportion of the aluminum component in the first part of the second heterojunction layer is 10%-40%. By setting the part of the second heterojunction layer close to the quantum well layer to have a relatively low proportion of the aluminum component, the part of the second heterojunction layer away from the quantum well layer is set to have a relatively high proportion of the aluminum component, so as to reduce the time for carriers to enter the active layer via the second heterojunction layer without changing the thickness of the second heterojunction layer, and thus the bandwidth supported by the VCSEL can be increased without increasing the volume of the VCSEL.

[0012] In one embodiment, the aluminum component in the first heterojunction layer and the second heterojunction layer increases linearly or in a gradient manner in the direction away from the quantum well layer.

[0013] In one embodiment, the quantum well layer includes sub-quantum well layers and barrier layers alternately stacked in sequence in the direction away from the substrate; wherein, in the quantum well layer, the top sub-quantum well layer is adjacent to the second heterojunction layer, and the bottom sub-quantum well layer is adjacent to the first heterojunction layer.

[0014] In one embodiment, the quantum well layer includes a first gallium aluminum arsenide barrier layer and a second gallium aluminum arsenide barrier layer. The first gallium aluminum arsenide barrier layer is located between the bottom sub-quantum well layer and the first heterojunction layer; the second gallium aluminum arsenide barrier layer is located between the top sub-quantum well layer and the second heterojunction layer; the proportion of the aluminum component in the first gallium aluminum arsenide barrier layer is 10%-40%; the proportion of the aluminum component in the second gallium aluminum arsenide barrier layer is 10%-40%.

[0015] In one embodiment, the barrier layer comprises gallium aluminum arsenide or gallium aluminum arsenide phosphide; wherein, the aluminum component in the barrier layer remains unchanged along the direction away from the quantum well layer.

[0016] In one embodiment, the oxide layer includes a light-emitting aperture; the light-emitting aperture is located within the orthographic projection of the second distributed Bragg reflector on the top surface of the oxide layer.

[0017] In one embodiment, the ratio of the maximum opening size to the minimum opening size of the light-emitting aperture is 1.25 - 1.35.

[0018] In one embodiment, the vertical cavity surface emitting laser further includes a first contact layer and a second contact layer. The first contact layer is located on the top surface of the first distributed Bragg reflector and surrounds the active layer; the second contact layer is located on the top surface of the second distributed Bragg reflector and surrounds the light-emitting aperture.

[0019] In one embodiment, the first contact layer comprises gallium aluminum arsenide or gallium aluminum arsenide phosphide; the proportion of the aluminum component in the first contact layer is 10% - 40%.

[0020] In one embodiment, the second contact layer comprises gallium aluminum arsenide or gallium aluminum arsenide phosphide; the proportion of the aluminum component in the second contact layer is 10% - 40%.

[0021] According to various embodiments of the present disclosure, a second aspect of the present disclosure provides a laser array, including a plurality of vertical cavity surface emitting lasers as described in any one of the foregoing embodiments arranged in rows and columns; wherein, the vertical cavity surface emitting lasers in the same row are all connected to the corresponding row selection line; the vertical cavity surface emitting lasers in the same column are all connected to the corresponding column selection line; the vertical cavity surface emitting lasers in different rows are respectively connected to different row selection lines; the vertical cavity surface emitting lasers in different columns are respectively connected to different column selection lines; by selecting a row selection line and a column selection line, the vertical cavity surface emitting laser connected to both the selected row selection line and the selected column selection line is selected.

[0022] According to various embodiments of the present disclosure, a third aspect of the present disclosure provides a light-emitting device, including:

[0023] a vertical cavity surface emitting laser as described in any one of the foregoing embodiments; or

[0024] a laser array as described in any one of the foregoing embodiments. Description of the Drawings

[0025] To better describe and illustrate the embodiments and / or examples of the applications disclosed herein, one or more drawings may be referred to. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed applications, the currently described embodiments and / or examples, and the currently understood best mode of these applications.

[0026] Figures 1 - 3 It shows a schematic longitudinal sectional view of a vertical cavity surface emitting laser provided in different embodiments of the present disclosure;

[0027] Figure 4 It shows a schematic three-dimensional structure view of a vertical cavity surface emitting laser provided in an embodiment of the present disclosure;

[0028] Figure 5 It shows a schematic diagram of the refractive index change of the heterojunction layer and the active layer in the VCSEL provided in an embodiment of the present disclosure with respect to position. Among them, (1) the figure is a schematic diagram of the refractive index change of the heterojunction layer and the active layer in the VCSEL that can support a 50G bandwidth in the related art with respect to position, and (2) the figure is a schematic diagram of the refractive index change of the heterojunction layer and the active layer described in the embodiment of the present application with respect to position;

[0029] Figure 6 It shows a schematic top view of a laser array provided in an embodiment of the present disclosure;

[0030] Figure 7 It shows a schematic longitudinal sectional view of a laser array provided in another embodiment of the present disclosure, where Figure 7 It can be a schematic longitudinal sectional view obtained along the Figure 6 AA' direction shown in;

[0031] Figure 8 It shows a schematic flow chart of a method for fabricating a vertical cavity surface emitting laser provided in an embodiment of the present disclosure.

[0032] Explanation of reference numerals:

[0033] 11. Substrate; 12. First distributed Bragg reflector; 13 / 13a / 13b. Active layer; 14 / 14a / 14b. Oxide layer; 15 / 15a / 15b. Second distributed Bragg reflector; 131. First heterojunction layer; 132. Quantum well layer; 133. Second heterojunction layer; 1321. Sub-quantum well layer; 1322. Barrier layer; 1323. First aluminum gallium arsenide barrier layer; 1324. Second aluminum gallium arsenide barrier layer; 141. Light output hole; 161. First contact layer; 162. Second contact layer. Detailed implementation manners

[0034] To facilitate an understanding of the present disclosure, the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. Preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure may be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms used herein in the description of the present disclosure are for the purpose of describing particular embodiments only and are not intended to limit the present disclosure. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0036] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and / or portions, these elements, components, regions, layers and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Thus, a first element, component, region, layer or portion discussed below may be denoted as a second element, component, region, layer or portion without departing from the teachings of the present disclosure.

[0037] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. are used herein for convenience in describing the relationship of one element or feature to another element or feature shown in the figures. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0038] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0039] Embodiments of the application are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present disclosure. As such, variations from the shown shapes due to, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, embodiments of the present disclosure should not be limited to the particular shapes of regions shown herein, but include shape deviations due to, for example, manufacturing. Thus, the regions shown in the figures are substantially schematic, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the present disclosure.

[0040] In the embodiments of the present disclosure, the multi-layer structure may be formed layer by layer or integrally formed; wherein, adjacent two-layer structures may be in contact or isolated from each other.

[0041] In the embodiments of the present disclosure, the vertical substrate may be the upper surface of the vertical substrate, and the parallel substrate may be the upper surface of the parallel substrate.

[0042] Please refer to Figures 1 to 7 . It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present disclosure. Although only the components related to the present disclosure are shown in the illustrations and are not drawn according to the number, shape and size of the components in actual implementation, the types, numbers and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0043] After entering the information age, the rapid development of Internet technology has effectively driven the demand for high-speed data communication. Major Internet giants have also established ultra-large-scale data centers, and at the same time, higher communication requirements have been put forward for high-speed data transmission systems. Establishing a high-bandwidth and low-power data communication system is one of the inevitable trends in the future development of high-speed data communication.

[0044] VCSEL can generate a circular light spot that is easy to couple with an optical fiber, and has many advantages such as high modulation rate, low transmission loss, high temperature stability, low threshold current, low power consumption, high reliability and easy integration with other optical devices. Therefore, vertical-cavity surface-emitting lasers (VCSELs) are currently the mainstream light sources for high-speed communication applications.

[0045] The basic structure of a VCSEL mainly includes an active layer and DBR (Distributed Bragg Reflector) mirrors with optical feedback functions. The active layer is sandwiched between the two side DBRs, jointly forming a Fabry-Perot resonator. The excitation source generates optical gain through spontaneous emission in the gain medium of the active layer. The light wave in the resonator reflects between the top and bottom DBRs to form a stable standing wave, which is continuously amplified after stimulated emission and finally forms a laser.

[0046] Please refer to Figure 1 In some embodiments, a vertical cavity surface emitting laser is provided, including a first distributed Bragg reflector 12, an active layer 13, an oxide layer 14, and a second distributed Bragg reflector 15 that are sequentially stacked on the front surface of the substrate 11 in a direction away from the substrate 11 (e.g., the oz direction); the active layer 13 includes a first heterojunction layer 131, a quantum well layer 132, and a second heterojunction layer 133 that are sequentially stacked in a direction away from the substrate 11; wherein, the materials of the first heterojunction layer 131 and the second heterojunction layer 133 both include aluminum gallium arsenide, and the aluminum component (e.g., the content of aluminum atoms) in the first heterojunction layer 131 and the second heterojunction layer 133 gradually increases in a direction away from the quantum well layer 132.

[0047] Please continue to refer to Figure 1 By setting the active layer 13 to include the quantum well layer 132 located between the first heterojunction layer 131 and the second heterojunction layer 133, and setting the materials of the first heterojunction layer 131 and the second heterojunction layer 133 to both include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer 131 and the second heterojunction layer 133 gradually increases in a direction away from the quantum well layer 132, the time for carriers to enter the active layer 13 via the first heterojunction layer 131 or the second heterojunction layer 133 is reduced, so that the bandwidth supported by the VCSEL can be increased without increasing the volume of the VCSEL.

[0048] As an example, please continue to refer to Figure 1 The substrate 11 can be composed of a semiconductor material, an insulating material, a semi-insulating material, or any combination thereof. The substrate 11 can be a single-layer structure or a multi-layer structure. For example, the substrate 11 can be a gallium arsenide (GaAs) substrate, an indium phosphide (InP) substrate, or other III / V semiconductor substrates or II / VI semiconductor substrates. The type of the substrate should not limit the protection scope of the present disclosure. The substrate 11 can include one or more of elements such as word lines, bit lines, and transistors, which are omitted because they have little relation to the inventive points of this solution.

[0049] As an example, please continue to refer to Figure 1, generally, one or more components such as word lines, bit lines, and transistors need to be fabricated in the substrate 11. To reduce the lattice mismatch between the first distributed Bragg reflector 12 and the substrate 11, or to prevent possible defects in the substrate 11 from having an adverse effect on the first distributed Bragg reflector 12, a buffer layer (not shown) can be provided between the substrate 11 and the first distributed Bragg reflector 12 to effectively improve the yield and reliability of fabricating semiconductor devices.

[0050] As an example, please continue to refer to Figure 1 , the central cross-section of the quantum well region of the quantum well layer 132 is located within the antinode interval of the standing-wave electric field of the vertical cavity surface-emitting laser; the position of the antinode is z, and the antinode interval is [z - λ / 8, z + λ / 8], where λ is the wavelength of the standing wave, to minimize the energy loss of the internal film layer and improve the light extraction efficiency and quality of the VCSEL.

[0051] Please continue to refer to Figure 1 , in some embodiments, the first heterojunction layer 131 includes a first part (not shown) located between its central cross-section and the quantum well layer 132, and the aluminum component ratio of the first part in the first heterojunction layer 131 is 10% - 40%. For example, the aluminum component ratio of the first part in the first heterojunction layer 131 can be 10%, 20%, 30%, or 40%, etc.

[0052] Exemplarily, please continue to refer to Figure 1 , it can be set that the aluminum component ratio (e.g., the content of aluminum atoms) of the first part in the first heterojunction layer 131 is 10%, and the aluminum component ratio of the remaining part in the first heterojunction layer 131 is 90%. By setting the part of the first heterojunction layer 131 close to the quantum well layer 132 to have a relatively low aluminum component ratio, the aluminum component ratio of the part of the first heterojunction layer 131 away from the quantum well layer 132 is relatively high, so as to reduce the time for carriers to enter the active layer 13 through the first heterojunction layer 131 without changing the thickness of the first heterojunction layer 131, thereby increasing the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0053] Please continue to refer to Figure 1 , in some embodiments, the second heterojunction layer 133 includes a first part located between its central cross-section and the quantum well layer 132, and the aluminum component ratio of the first part in the second heterojunction layer 133 is 10% - 40%. For example, the aluminum component ratio of the first part in the second heterojunction layer 133 can be 10%, 20%, 30%, or 40%, etc.

[0054] Exemplarily, please continue to refer to Figure 1, the aluminum component ratio of the first part in the second heterojunction layer 133 can be set to 10%, and the aluminum component ratio of the remaining part in the second heterojunction layer 133 can be set to 90%. By setting the part of the second heterojunction layer 133 close to the quantum well layer 132 to have a relatively low aluminum component ratio, the aluminum component ratio of the part of the second heterojunction layer 133 away from the quantum well layer 132 is relatively high, so as to reduce the time for carriers to enter the active layer 13 through the second heterojunction layer 133 without changing the thickness of the second heterojunction layer 133, thereby increasing the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0055] Please continue to refer to Figure 1 , in some embodiments, the aluminum component in the first heterojunction layer 131 and the second heterojunction layer 133 increases linearly or gradiently in the direction away from the quantum well layer 132, so as to meet the process preparation requirements of different application scenarios.

[0056] Please refer to Figure 2 , in some embodiments, the quantum well layer 132 includes sub-quantum well layers 1321 and barrier layers 1322 that are alternately stacked in sequence in the direction away from the substrate 11; among them, in the quantum well layer 132, the top sub-quantum well layer 1321 is adjacent to the second heterojunction layer 133, and the bottom sub-quantum well layer 1321 is adjacent to the first heterojunction layer 131.

[0057] Please refer to Figure 3 , in some embodiments, the quantum well layer 132 includes a first aluminum gallium arsenide barrier layer 1323 and a second aluminum gallium arsenide barrier layer 1324. The first aluminum gallium arsenide barrier layer 1323 is located between the bottom sub-quantum well layer 1321 and the first heterojunction layer 131; the second aluminum gallium arsenide barrier layer 1324 is located between the top sub-quantum well layer 1321 and the second heterojunction layer 133; the aluminum component ratio in the first aluminum gallium arsenide barrier layer 1323 can be set to be the same as the aluminum component ratio of the first part in the second heterojunction layer 133.

[0058] Exemplarily, the aluminum component ratio in the first aluminum gallium arsenide barrier layer can be set to 10%-40%. For example, the aluminum component ratio in the first aluminum gallium arsenide barrier layer can be set to 10%, 20%, 30% or 40%, etc.

[0059] Exemplarily, the aluminum component ratio in the second aluminum gallium arsenide barrier layer can be set to 10%-40%. For example, the aluminum component ratio in the second aluminum gallium arsenide barrier layer can be set to 10%, 20%, 30% or 40%, etc.

[0060] Please refer to Figure 3, in some embodiments, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be greater than 0 and less than 25 nm; the thickness of the barrier layer 1322 can be greater than 0 and less than 20 nm. For example, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be set to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, etc.; the thickness of the barrier layer 1322 can be set to 5 nm, 10 nm, 15 nm, 20 nm, etc.

[0061] Please refer to Figure 3 , in some embodiments, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be greater than 0 and less than 20 nm; the thickness of the barrier layer 1322 can be greater than 0 and less than 15 nm. For example, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be set to 5 nm, 10 nm, 15 nm, 20 nm, etc.; the thickness of the barrier layer 1322 can be set to 5 nm, 10 nm, 15 nm, etc.

[0062] Please refer to Figure 3 , in some embodiments, the barrier layer 1322 includes gallium aluminum arsenide or gallium aluminum arsenide phosphide; wherein, the aluminum component in the barrier layer 1322 remains unchanged along the direction away from the quantum well layer 132.

[0063] Please refer to Figure 4 , in some embodiments, the oxide layer 14 includes a light extraction hole 141; the oxide layer 14 has at least the effects of optical confinement and electrical confinement. The light extraction hole 141 is located within the orthographic projection of the second distributed Bragg reflector 15 on the top surface of the oxide layer 14.

[0064] In some embodiments, the ratio of the maximum opening size to the minimum opening size of the light extraction hole is 1.25 - 1.35. For example, the ratio of the maximum opening size to the minimum opening size of the light extraction hole is 1.25, 1.30, 1.35, etc.

[0065] In some embodiments, the opening size of the light extraction hole is 6 microns - 9 microns. For example, the opening size of the light extraction hole can be 6 microns, 7 microns, 8 microns, 9 microns, etc.

[0066] Please refer to Figure 4 , in some embodiments, the vertical cavity surface emitting laser further includes a first contact layer 161 and a second contact layer 162. The first contact layer 161 is located on the top surface of the first distributed Bragg reflector 12 and surrounds the active layer 13; the second contact layer 162 is located on the top surface of the second distributed Bragg reflector 15 and surrounds the light extraction hole 141.

[0067] Please refer to Figure 4, in some embodiments, the first contact layer 161 and the first distributed Bragg reflector 12 both have an n-type conductivity type. The thickness of the first contact layer 161 is an integer multiple of half a wavelength, where the half wavelength is half of the standing wave electric field wavelength of the vertical cavity surface emitting laser. This avoids mutual suppression of the reflected waves and improves the light output efficiency of the vertical cavity surface emitting laser.

[0068] In some embodiments, the first contact layer includes gallium aluminum arsenide or gallium aluminum arsenide phosphide; the aluminum component ratio in the first contact layer is the same as the aluminum component ratio of the first part in the first heterojunction layer. For example, the aluminum component ratio in the first contact layer can be set to 10% - 40%.

[0069] In some embodiments, the second contact layer includes gallium aluminum arsenide or gallium aluminum arsenide phosphide; the aluminum component ratio in the second contact layer is the same as the aluminum component ratio of the first part in the second heterojunction layer. For example, the aluminum component ratio in the second contact layer can be set to 10% - 40%.

[0070] As an example, please continue to refer to Figures 1 - 3 , the optical thickness of the active layer 13, the optical thickness of the first distributed Bragg reflector 12, and the optical thickness of the second distributed Bragg reflector 14 jointly define the resonant cavity wavelength of the VCSEL, which can be designed within the emission wavelength range of the active layer 13 to achieve laser emission.

[0071] As an example, the central cross-section of the quantum well region of the quantum well layer is located within the antinode interval of the standing wave electric field of the vertical cavity surface emitting laser; the position of the antinode is z, and the antinode interval is [z - λ / 8, z + λ / 8], where λ is the wavelength of the standing wave, which can minimize the energy loss of the internal film layer and improve the light output efficiency and quality of the VCSEL.

[0072] In some embodiments, please continue to refer to Figures 1 - 3 , the first distributed Bragg reflector 12 may include a stack of multiple first reflection layers (not shown), and the first reflection layer includes a first sub-reflection layer (not shown) and a second sub-reflection layer (not shown) with different refractive indices. The first sub-reflection layer in the first distributed Bragg reflector 12 is adjacent to the substrate 11; the first sub-reflection layer and the second sub-reflection layer of adjacent first reflection layers are adjacent; the first sub-reflection layer includes indium gallium phosphide, and the lattice constant of the compound in the second sub-reflection layer is greater than that of indium gallium phosphide.

[0073] In some embodiments, please continue to refer to Figures 1 - 3, the first sub-reflector layer includes indium gallium phosphide, and the lattice constant of the compound in the second sub-reflector layer is greater than that of indium gallium phosphide, which can cancel out the stress in the first reflector layer in the first distributed Bragg reflector 12 and reduce the warpage; currently, for related vertical cavity surface emitting lasers, by alternately growing epitaxial layer mirrors of two materials with different refractive indices according to an optical thickness of a quarter wavelength, a very high reflectivity (>99%) can be obtained, which can meet the special requirements of the device structure for the mirror. However, due to the lattice difference between the substrate and the epitaxial layer, stress accumulates in each thin epitaxial layer, and at the same time, because the overall thickness of the epitaxial layer mirror is too thick, the warpage of the epitaxial wafer becomes larger, thus affecting the yield of the semiconductor chip. In the vertical cavity surface emitting laser according to the embodiment of the present disclosure, by providing a plurality of stacked first reflector layers in the first distributed Bragg reflector 12, the first reflector layer includes an indium gallium phosphide first sub-reflector layer and a second sub-reflector layer with different refractive indices. The first sub-reflector layer in the first distributed Bragg reflector 12 is adjacent to the substrate 11, the first sub-reflector layer and the second sub-reflector layer of adjacent first reflector layers are adjacent, and by setting the lattice constant of the compound in the second sub-reflector layer to be greater than that of indium gallium phosphide, the stress between the sub-reflector layers in the first distributed Bragg reflector 12 can be cancelled out, the warpage degree can be reduced, and the yield of the semiconductor chip can be improved.

[0074] In some embodiments, please continue to refer to Figures 1 - 3 , the second distributed Bragg reflector 14 includes a plurality of stacked second reflector layers (not shown), the second reflector layer includes a third sub-reflector layer (not shown) and a fourth sub-reflector layer (not shown) with different refractive indices, and the third sub-reflector layer and the fourth sub-reflector layer of adjacent second reflector layers are adjacent; both the third sub-reflector layer and the fourth sub-reflector layer include aluminum gallium arsenide, and the aluminum contents of the third sub-reflector layer and the fourth sub-reflector layer are different.

[0075] Exemplarily, the third sub-reflector layer and the fourth sub-reflector layer include Al x Ga 1-x As, Al x Ga 1-x As material is uniformly re-combined by AlAs and GaAs, and has advantages such as high carrier mobility, adjustable Al component, and very small lattice mismatch with GaAs. Among them, the Al x Ga 1-x As in the third sub-reflector layer, x < 0.1; the Al x Ga 1-x As in the fourth sub-reflector layer, x > 0.9. By alternately growing the third sub-reflector layer with a high refractive index and the fourth sub-reflector layer with a low refractive index, the number of periods can be increased to obtain a high reflectivity, meeting the special requirements of the VCSEL structure for the mirror.

[0076] In some embodiments, the first sub-reflection layer comprises In y Ga 1-y P; where y ∈ [0, 0.48], for example, 0, 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, or 0.48, etc.

[0077] In some embodiments, the second sub-reflection layer comprises aluminum arsenide or aluminum gallium arsenide.

[0078] As an example, the first sub-reflection layer can be In 0.48 Ga 0.52 P, the substrate can be GaAs, the lattice constant of In 0.48 Ga 0.52 P is less than that of the GaAs substrate, the first sub-reflection layer is under tensile stress, the second sub-reflection layer comprises Al x Ga 1-x As, usually x > 0.9, the lattice constant of the second sub-reflection layer is greater than that of In 0.48 Ga 0.52 P, the second sub-reflection layer is under compressive stress, so that the tensile stress and compressive stress cancel each other out within each DBR period (i.e., the first reflection layer), reducing the wafer warpage.

[0079] Specifically, for a VCSEL with a wavelength of 940 nm, the refractive index difference between the high and low Al-composition AlGaAs is about 0.465, and the refractive index difference between In 0.48 Ga 0.52 P and AlGaAs is about 0.246. Using InGaP as the DBR material, in order to obtain sufficient reflectivity, a low warpage can be maintained when the DBR thickness is relatively thick.

[0080] Please refer to Figure 5 , in some embodiments, Figure 5 in (1) of which is a schematic diagram showing the variation of the refractive index of the heterojunction layer and the active layer with position in a VCSEL that can support a 50G bandwidth in the related art. Figure 5 in (2) of which is a schematic diagram showing the variation of the refractive index of the heterojunction layer and the active layer with position according to the embodiments of the present application. By comparing Figure 5 (1) and (2) in it, it can be clearly found that in the embodiments of the present application, by providing that the active layer comprises a quantum well layer located between the first heterojunction layer and the second heterojunction layer, and providing that the materials of the first heterojunction layer and the second heterojunction layer both comprise aluminum gallium arsenide, and the aluminum composition in the first heterojunction layer and the second heterojunction layer gradually increases in the direction away from the quantum well layer, the time for carriers to enter the active layer via the first heterojunction layer or the second heterojunction layer is reduced, and the bandwidth supported by the VCSEL can be effectively increased without increasing the volume of the VCSEL.

[0081] In some embodiments, a laser array is provided, including a plurality of vertical-cavity surface-emitting lasers (VCSELs) arranged in rows and columns as described in any one of the foregoing embodiments; wherein, the VCSELs in the same row are all connected to corresponding row selection lines; the VCSELs in the same column are all connected to corresponding column selection lines; the VCSELs in different rows are respectively connected to different row selection lines; the VCSELs in different columns are respectively connected to different column selection lines; by selecting a row selection line and a column selection line, the VCSELs connected to both the selected row selection line and the selected column selection line can be selected, a common anode driving method can be realized, and an N-type transistor with a faster response speed can be used to drive the light-emitting structure of the VCSEL, reducing the volume of the driving system while increasing the driving frequency and speed of the VCSEL. By setting that the VCSELs in the same row are all connected to corresponding row selection lines, the VCSELs in the same column are all connected to corresponding column selection lines, the VCSELs in different rows are respectively connected to different row selection lines, and the VCSELs in different columns are respectively connected to different column selection lines, when a certain VCSEL fails, the faulty laser can be quickly located, improving the operation efficiency of the device.

[0082] As an example, please refer to Figures 6 - 7 , the first vertical-cavity surface-emitting laser 100a, the second vertical-cavity surface-emitting laser 100b, the third vertical-cavity surface-emitting laser 100c, the fourth vertical-cavity surface-emitting laser 100d, the fifth vertical-cavity surface-emitting laser 100e, and the sixth vertical-cavity surface-emitting laser 100f arranged in rows and columns share a common anode electrode; among the first vertical-cavity surface-emitting laser 100a, the second vertical-cavity surface-emitting laser 100b, the third vertical-cavity surface-emitting laser 100c, the fourth vertical-cavity surface-emitting laser 100d, the fifth vertical-cavity surface-emitting laser 100e, and the sixth vertical-cavity surface-emitting laser 100f, the cathode electrodes of any adjacent vertical-cavity surface-emitting lasers are insulated from each other. In the case of simplifying the anode drive, it is convenient to realize the independent cathode drive of different VCSELs, meeting the drive control requirements of the customized light-emitting scheme of the laser array.

[0083] As an example, an isolation structure is included between adjacent vertical-cavity surface-emitting lasers, and the isolation structure extends along the direction perpendicular to the substrate (such as the oz direction) to the top surface of the first distributed Bragg reflector. On the premise of simplifying the structure and preparation process steps of the laser array, the mutual influence between adjacent VCSELs is avoided.

[0084] As an example, please continue to refer to Figures 6 - 7, the isolation structure can be an isolation trench. An isolation trench is provided between the first vertical cavity surface emitting laser 100a and the second vertical cavity surface emitting laser 100b, and the isolation trench extends along the direction perpendicular to the substrate (e.g., the oz direction) to the top surface of the first distributed Bragg reflector 12; the active layer 13a, the oxide layer 14a, and the second distributed Bragg reflector 15a of the first vertical cavity surface emitting laser 100a are insulated from the active layer 13b, the oxide layer 14b, and the second distributed Bragg reflector 15b of the second vertical cavity surface emitting laser 100b via the isolation trench; the first vertical cavity surface emitting laser 100a and the second vertical cavity surface emitting laser 100b share the substrate 11 and the first distributed Bragg reflector 12, which simplifies the manufacturing process and cost of the laser array.

[0085] In some embodiments, a light emitting device is provided, including the vertical cavity surface emitting laser as described in any one of the foregoing embodiments.

[0086] In some embodiments, a light emitting device is provided, including the laser array as described in any one of the foregoing embodiments.

[0087] As an example, please refer to Figure 8 , a method for manufacturing a vertical cavity surface emitting laser is provided, including:

[0088] Step S602: Provide a substrate;

[0089] Step S604: Form a first distributed Bragg reflector, an active layer, an oxide layer, and a second distributed Bragg reflector on the front surface of the substrate in a stacked manner along the direction away from the substrate; the active layer includes a first heterojunction layer, a quantum well layer, and a second heterojunction layer stacked in sequence along the direction away from the substrate; wherein, the materials of the first heterojunction layer and the second heterojunction layer both include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases along the direction away from the quantum well layer.

[0090] As an example, please continue to refer to Figure 8 , by setting the active layer to include a quantum well layer located between the first heterojunction layer and the second heterojunction layer, and setting the materials of the first heterojunction layer and the second heterojunction layer both to include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases along the direction away from the quantum well layer, the time for carriers to enter the active layer via the first heterojunction layer or the second heterojunction layer is reduced, so that the bandwidth supported by the VCSEL can be increased without increasing the volume of the VCSEL.

[0091] It should be understood that although Figure 8The steps in the flowchart are shown in sequence according to the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 8 At least some of the steps in Figure 8 may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least some of the steps or stages in other steps or other steps.

[0092] Please note that the above embodiments are for illustrative purposes only and do not imply a limitation on the present disclosure.

[0093] Each embodiment in this specification is described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0094] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0095] The above-described embodiments only represent several implementation manners of the present disclosure. Their descriptions are relatively specific and detailed, but should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present disclosure, several modifications and improvements can still be made, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure patent shall be subject to the appended claims.

Claims

1. A vertical cavity surface emitting laser, characterized in that, It includes a first distributed Bragg reflector, an active layer, an oxide layer, and a second distributed Bragg reflector that are located on the front side of the substrate and are stacked in sequence in a direction away from the substrate; The active layer includes a first heterojunction layer, a quantum well layer, and a second heterojunction layer that are stacked in sequence in a direction away from the substrate; Wherein, the materials of the first heterojunction layer and the second heterojunction layer both include gallium aluminum arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases in a direction away from the quantum well layer.

2. The vertical cavity surface emitting laser according to claim 1, characterized in that, The first heterojunction layer includes a first part located between its central cross-section and the quantum well layer, The proportion of the aluminum component in the first part of the first heterojunction layer is 10%-40%; and / or The second heterojunction layer includes a first part located between its central cross-section and the quantum well layer, The proportion of the aluminum component in the first part of the second heterojunction layer is 10%-40%.

3. The vertical cavity surface emitting laser according to claim 1, characterized in that, The aluminum component in the first heterojunction layer and the second heterojunction layer increases linearly or in a gradient in a direction away from the quantum well layer.

4. The vertical cavity surface emitting laser according to any one of claims 1-3, characterized in that, The quantum well layer includes a sub-quantum well layer and a barrier layer that are alternately stacked in sequence in a direction away from the substrate; Wherein, in the quantum well layer, the top sub-quantum well layer is adjacent to the second heterojunction layer, and the bottom sub-quantum well layer is adjacent to the first heterojunction layer.

5. The vertical cavity surface emitting laser according to claim 4, characterized in that: The quantum well layer includes: A first gallium aluminum arsenide barrier layer located between the bottom sub-quantum well layer and the first heterojunction layer; A second gallium aluminum arsenide barrier layer located between the top sub-quantum well layer and the second heterojunction layer; The proportion of the aluminum component in the first gallium aluminum arsenide barrier layer is 10%-40%; The proportion of the aluminum component in the second gallium aluminum arsenide barrier layer is 10%-40%.

6. The vertical cavity surface emitting laser according to claim 4, characterized in that The barrier layer includes gallium aluminum arsenide or gallium aluminum arsenide phosphide; Wherein, the aluminum component in the barrier layer remains unchanged in a direction away from the quantum well layer.

7. The vertical cavity surface emitting laser according to any one of claims 1-3, characterized in that, The oxide layer includes a light-emitting hole; The light-emitting hole is located within the orthographic projection of the second distributed Bragg reflector on the top surface of the oxide layer.

8. The vertical cavity surface emitting laser according to claim 7, characterized in that, The ratio of the maximum opening size to the minimum opening size of the light-emitting hole is 1.25-1.

35.

9. The vertical cavity surface emitting laser according to claim 7, wherein: It further includes: A first contact layer located on the top surface of the first distributed Bragg reflector and surrounding the active layer; And A second contact layer located on the top surface of the second distributed Bragg reflector and surrounding the light-emitting hole.

10. The vertical cavity surface emitting laser according to claim 9, characterized in that: The first contact layer includes gallium aluminum arsenide or gallium aluminum arsenide phosphide; the proportion of the aluminum component in the first contact layer is 10%-40%; and / or The second contact layer includes gallium aluminum arsenide or gallium aluminum arsenide phosphide; the proportion of the aluminum component in the second contact layer is 10%-40%.

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