A PFC channel failure fault detection and device protection circuit, method, device and medium

Abstract

A PFC channel failure fault detection and device protection circuit, method, device, and medium are disclosed. The circuit comprises a channel current detection module for detecting and comparing three channel currents with a set current threshold; a PWM wave logic operation module composed of three trigger integrated modules, each identically structured and containing two D flip-flops. Each trigger integrated module receives PWM waves from the driver chip pin and the switch control pin of the corresponding channel of the PFC circuit at its two input terminals, respectively. The trigger integrated modules perform logic operations on these PWM waves. A processor determines the type of abnormality in each PFC channel with no channel current based on the results of the logic operations and adjusts accordingly based on the total input current. The present invention reduces the input current by lowering the device frequency to below the current rating of the open channel, thereby controlling the current in the event of a PFC channel failure and preventing device damage.

Description

Technical Field

[0001] The present invention belongs to the technical field of PFC circuit protection, and more specifically, relates to a PFC channel failure fault detection and device protection circuit, method, device and medium. Background Art

[0002] In the currently used multi-channel interleaved PFC circuit, the PFC channels are switched on and off alternately at the same time, which increases the current that the unit can carry. However, when some PFC channels fail, all the current will flow only through the remaining channels, causing the current to exceed the device's carrying capacity and eventually explode.

[0003] Current control methods for multi-channel interleaved PFC circuits are divided into software-controlled PFC and hardware-controlled PFC. Software-controlled PFC primarily uses a chip to send PWM control signals, adjusting the duty cycles of the three channels to ensure proper operation. Connecting a simulation device to a computer allows you to observe whether the chip is transmitting PWM waves, but the results are not intuitive and can be cumbersome. Hardware-controlled PFC primarily uses a hardware chip to control the three current channels. This process requires adjusting the parameters of the corresponding peripheral components on the chip based on the values ​​of sampling resistors. Without external test equipment and test points, the PWM output cannot be observed.

[0004] CN116039383A discloses a fast fault protection system, method, and vehicle for an on-board charger, comprising a PFC power circuit, a high-voltage bus capacitor, a bridge-type isolation conversion power circuit, a PFC controller, and a bridge circuit controller. The PFC power circuit is connected to the high-voltage bus capacitor and the PFC controller, respectively. The bridge-type isolation conversion power circuit is connected to the high-voltage bus capacitor and the bridge circuit controller, respectively. The bridge circuit controller and the PFC controller are connected via a hard-wired channel. The PFC controller determines, based on a sampled signal, whether the PFC power circuit is in an abnormal state that causes circuit failure. If so, it outputs a fault protection signal and inputs it to the bridge circuit controller via a hard-wired channel. Upon detecting the fault protection signal output by the PFC controller, the bridge circuit controller stops the output of the bridge-type isolation conversion power circuit. However, the specific fault type cannot be visualized. After a fault is reported, the current cannot be adjusted according to actual usage, but the device is directly shut down, reducing device utilization.

[0005] CN118868585A discloses a control method, apparatus, device, and storage medium for a multi-channel PFC circuit. This control method includes: updating the fault count value for each PFC path in the multi-channel PFC circuit based on the fault detection results of each path; and adjusting the current limit value for the corresponding PFC path in response to the fault count value being greater than or equal to a set threshold. However, the specific fault type cannot be visualized, and current limiting cannot guarantee that all PFC paths are free of abnormalities. If a path abnormality occurs, there is no guarantee that the limited current value will meet the allowable threshold for the remaining paths, posing a risk of damage to path components. Summary of the Invention

[0006] To address the deficiencies in the prior art, the present invention provides a PFC channel failure fault detection and device protection circuit, method, apparatus, and medium.

[0007] The present invention adopts the following technical solutions.

[0008] The first aspect of the present invention provides a PFC channel failure fault detection and device protection circuit, comprising: a total current detection module, a channel current detection module, a processor, a PWM wave logic operation module, a comparator integration module, and several temperature detection modules, specifically:

[0009] The channel current detection module is used to detect the three channel currents of the PFC circuit and compare them with the set current threshold, and output the three channel currents and the current comparison results to the processor;

[0010] The PWM wave logic operation module consists of three trigger integrated modules. Each trigger integrated module has the same structure and contains two D flip-flops. The two D flip-flops are cascaded with inverted clocks. The two input ends of each trigger integrated module receive the PWM waves from the driver chip pin and the switch tube control pin of the corresponding channel of the PFC circuit respectively. The trigger integrated module performs logical operations on the PWM waves and outputs the logical operation results to the processor.

[0011] Several temperature detection modules respectively detect the temperatures of the three channels of the PFC circuit. Their output ends are respectively connected to the three input ends of the comparator integrated module. The comparator integrated module compares the temperature detection values ​​of the three channels with the set temperature and outputs the temperature comparison results to the processor. The total current detection module is used to detect the total input current. The processor is used to control whether each trigger integrated module and the temperature detection module are enabled, and to determine the type of abnormality of each channel of the PFC circuit without channel current based on the logic operation results. After determining that each channel without channel current has an abnormality, the processor determines whether each channel with channel current has an overload temperature abnormality based on the temperature comparison results, and makes corresponding adjustments based on the total input current.

[0012] Preferably, the trigger integrated module further includes three inverters, specifically:

[0013] The PWM wave of the switch control pin of one channel of the PFC circuit is input into the data input of the first D flip-flop after passing through the second inverter. The PWM wave of the driver chip pin of the corresponding channel is input into the clock input of the first D flip-flop after passing through the first inverter. The clock input is connected to the clock input of the second D flip-flop through the third inverter. The main output of the first D flip-flop is connected to the data input of the second D flip-flop, and the main output of the second D flip-flop outputs the logic operation result to the processor.

[0014] Preferably, the channel current detection module includes three current detection modules and three comparators, specifically:

[0015] The voltages of the sampling resistors of the three channels of the PFC circuit are respectively input to the input ends of the three current detection modules. The output ends of the three current detection modules all output the detected currents to the processor. The output ends of the three current detection modules are also respectively connected to the first input ends of the three comparators. The second input ends of the three comparators all receive the product of the set current threshold and the sampling resistor of the corresponding channel. The output ends of the three comparators respectively output the current comparison results of the three channel currents.

[0016] A second aspect of the present invention provides a method for fault detection and device protection of a PFC channel failure based on the circuit described in the first aspect of the present invention, comprising:

[0017] The three-channel current of the PFC circuit is collected to determine whether current is flowing in each channel. If current is flowing in all channels, the device equipped with the PFC circuit is controlled to operate normally. Otherwise, it is considered that there is an abnormality in each channel of the PFC circuit, and the frequency of the device is reduced based on the channel current of each channel and the total input current.

[0018] After the frequency is reduced, the trigger integrated module corresponding to each channel without channel current in the PFC circuit is enabled. The trigger integrated module performs a logical operation on the PWM wave of the driver chip pin and the switch control pin of the corresponding channel, and determines the type of abnormality of the corresponding channel based on the logical operation result;

[0019] When the abnormality type is a driver chip abnormality, the system determines whether the set temperature detection conditions are met through timing. If so, the temperature of each channel with channel current is collected and compared with the set temperature to determine whether these channels have overload temperature abnormalities, and control whether the equipment equipped with the PFC circuit continues to operate.

[0020] Preferably, the frequency of the device is reduced according to the channel current of each channel and the total input current, specifically:

[0021] If there is only one channel with no channel current, the compressor frequency of the device equipped with the PFC circuit will be f 1 is reduced until the total input current I 1 is less than the sum of the current thresholds set for the two channels; if there is no channel current in two channels, the frequency of the device equipped with the PFC circuit will be f 1 is reduced until the total input current I 1 is less than the current threshold set for one channel.

[0022] Preferably, the determining of the abnormality type of the corresponding channel according to the logic operation result is specifically:

[0023] When the logic operation result of the trigger integrated module is high level, the abnormality type of the corresponding channel of the PFC circuit is the abnormality of the driver chip, otherwise the abnormality type is the abnormality of the switch tube.

[0024] Preferably, the set temperature detection conditions are specifically:

[0025] The timing starts when an abnormality is detected in each channel of the PFC circuit. When the timing is greater than the set time threshold T 1, and no external command to terminate the operation of the device is received during this period, the set temperature detection condition is met.

[0026] Preferably, the temperature of each channel with channel current is collected, compared with the set temperature, and whether these channels have overload temperature abnormalities, and whether the equipment equipped with the PFC circuit continues to operate is controlled. Specifically,

[0027] By comparing the voltage output by each temperature detection module corresponding to each channel with the reference voltage of the set temperature, the temperature of each channel is compared with the set temperature;

[0028] When the voltage output by the temperature detection module corresponding to a certain channel is greater than the reference voltage of the set temperature, it is considered that an overload temperature abnormality has occurred in that channel, and the equipment equipped with this PFC circuit is controlled to stop operation. If the voltage output by the temperature detection modules corresponding to all channels with channel current is less than or equal to the reference voltage of the set temperature, the equipment continues to operate with the current of each channel.

[0029] A third aspect of the present invention provides a device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the steps of the method for fault detection and device protection of a PFC channel failure according to the second aspect of the present invention.

[0030] A fourth aspect of the present invention provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the steps of the method for fault detection and device protection of PFC channel failure according to the second aspect of the present invention are used.

[0031] The beneficial effects of the present invention lie in that, compared to the prior art, it detects the current in each of three channels. When current is detected in only one or two channels, the device frequency is reduced to reduce the input current to below the current tolerance of the open channel, thereby controlling the current in the event of PFC channel failure and preventing device damage. PWM wave detection is performed on the driver chip pins and the control pins of the switch tube in the channel without current using hardware, enabling rapid detection of the type of anomaly. After a driver anomaly is reported, a timing method is used to trigger channel temperature detection. Temperature detection of the channel with current is performed to determine whether the temperature anomaly in the normal channel is caused by excessive current. If a temperature anomaly occurs, a shutdown command is executed to protect the mainboard components. This not only protects the failed circuit, but also detects and protects the normal channel with excessive current caused by the failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 1 is a structural diagram of a circuit according to an embodiment of the present invention;

[0033] Figure 2 Flowchart of a circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0034] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments described in this application are only part of the embodiments of the present invention, not all of them. Based on the spirit of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0035] like Figure 1 As shown, embodiment 1 of the present invention proposes a PFC channel failure fault detection and device protection circuit, including: a total current detection module, a channel current detection module, a processor, a PWM wave logic operation module, a comparator integration module and three temperature detection modules t 1. t 2. t 3. Specifically:

[0036] The channel current detection module is used to detect the three channel currents of the PFC circuit and compare the three channel currents with the set current threshold, and output the three channel currents and the current comparison results to the processor; in this embodiment, the processor is a DSP processor;

[0037] In this embodiment, the channel current detection module preferably includes three current detection modules and three comparators, specifically:

[0038] The voltages of the sampling resistors of the three channels of the PFC circuit are input to the inputs of the three current detection modules. The outputs of the three current detection modules output the detected currents to the processor. The outputs of the three current detection modules are also connected to the first inputs of three comparators. The second inputs of the three comparators receive the product of a set current threshold and the sampling resistor of the corresponding channel. The outputs of the three comparators output the current comparison results of the three channel currents. When the comparator outputs a high level, it indicates that the current of the corresponding channel is greater than the set current threshold, and power is supplied to the enable terminal of the corresponding trigger.

[0039] The PWM wave logic operation module consists of three trigger integrated modules. Each trigger integrated module has the same structure and contains two D flip-flops. The two input ends of each trigger integrated module receive the PWM waves of the driver chip pin and the switch tube control pin of the corresponding channel of the PFC circuit respectively. The trigger integrated module performs logical operations on these PWM waves and outputs the logical operation results to the processor.

[0040] In this embodiment, the trigger integrated module preferably further includes three inverters, specifically:

[0041] When the trigger enable terminal receives power, it starts to perform logic operations on the PWM wave of the driver chip pin of the corresponding channel and the PWM wave of the switch tube control pin. The PWM wave of the switch tube control pin of one channel of the PFC circuit (the PWM wave of the switch tube control pin of three channels is in Figure 1 They are PWM1, PWM2, and PWM3 respectively, that is, Figure 1 middle V 4 、V 5 、V 6 are equal to PWM1, PWM2, PWM3 respectively) after passing through the second inverter and input to the data input terminal of the first D flip-flop, the PWM wave of the driver chip pin of the corresponding channel (the PWM wave of the driver chip pin of the three channels is in Figure 1 The V 4 ” 、V 5 ” 、V 6 ” ) is input to the clock input terminal of the first D flip-flop after passing through the first inverter, and the clock input terminal is connected to the clock input terminal of the second D flip-flop through the third inverter; the main output terminal of the first D flip-flop is connected to the data input terminal of the second D flip-flop, and the main output terminal of the second D flip-flop outputs the logic operation result to the processor.

[0042] The three temperature detection modules respectively detect the temperatures of the three channels of the PFC circuit. Their output terminals are connected to the three input terminals of the comparator integrated module. The comparator integrated module is used to compare the output values ​​of the three temperature detection modules with the set temperature and output the temperature comparison results to the processor. The total current detection module is used to detect the total input current.

[0043] It should be noted that the temperature detection module outputs a voltage, so the comparator integrated module compares the output values ​​of the three temperature detection modules with the reference voltage of the set temperature, and the voltage comparison result is the temperature comparison result of the output values ​​of the three temperature detection modules and the set temperature;

[0044] The processor is used to control whether each trigger integrated module is enabled and each temperature detection module is enabled, and to determine the type of abnormality of each channel with no channel current in the PFC circuit based on the results of logical operations. After determining that each channel with no channel current has an abnormality, it then determines whether each channel with channel current has an overload temperature abnormality based on the temperature comparison result, and makes corresponding adjustments to various abnormalities in combination with the total input current.

[0045] like Figure 2 As shown, embodiment 2 of the present invention provides a method for fault detection and device protection of PFC channel failure based on the circuit described in the first aspect of the present invention, including:

[0046] The three-channel current of the PFC circuit is collected to determine whether current is flowing in each channel. If current is flowing in all channels, the device equipped with the PFC circuit is controlled to operate normally. Otherwise, it is considered that there is an abnormality in each channel of the PFC circuit, and the frequency of the device is reduced based on the channel current of each channel and the total input current.

[0047] Specifically, in this embodiment, the device equipped with the PFC circuit is a unit.

[0048] In this embodiment, preferably, the frequency of the device is reduced according to the channel current of each channel and the total input current, specifically:

[0049] If there is only one channel with no channel current, the compressor frequency of the device equipped with the PFC circuit will be f 1 is reduced until the total input current I 1 is less than the sum of the current thresholds set for the two channels; if there is no channel current in two channels, the frequency of the device equipped with the PFC circuit will be f 1 is reduced until the total input current I 1 is less than the current threshold set for one channel.

[0050] After the frequency is reduced, the trigger integrated module corresponding to each channel without channel current in the PFC circuit is enabled. The trigger integrated module performs a logical operation on the PWM wave of the driver chip pin and the switch control pin of the corresponding channel, and determines the type of abnormality of the corresponding channel based on the logical operation result;

[0051] In this embodiment, preferably, the abnormality type of the corresponding channel is determined according to the logic operation result, specifically:

[0052] When the logic operation result of the trigger integrated module is high level, the abnormality type of the corresponding channel of the PFC circuit is the abnormality of the driver chip, otherwise the abnormality type is the abnormality of the switch tube.

[0053] When the abnormality type is that the driver chip is abnormal, the timing is used to determine whether the set temperature detection condition is reached. If it is reached, the DSP Send Enable EN1, EN2, EN3 The three temperature detection modules are respectively used to collect the temperature of each channel with channel current, compare it with the set temperature, determine whether these channels have overload temperature abnormalities, and control whether the equipment equipped with the PFC circuit continues to operate.

[0054] In this embodiment, the set temperature detection conditions are preferably:

[0055] The timing starts when an abnormality is detected in each channel of the PFC circuit. When the timing is greater than the set time threshold T 1, and no external command to terminate the operation of the device is received during this period, the set temperature detection condition is met.

[0056] In this embodiment, preferably, the temperature of each channel with channel current is collected, compared with the set temperature, and whether these channels have overload temperature abnormalities is determined, and whether the device equipped with the PFC circuit continues to operate is controlled. Specifically,

[0057] By comparing the voltage output by each temperature detection module corresponding to each channel with the reference voltage of the set temperature, the temperature of each channel is compared with the set temperature;

[0058] When the voltage output by the temperature detection module corresponding to a certain channel is greater than the reference voltage of the set temperature, it is considered that an overload temperature abnormality has occurred in that channel, and the main processor sends a shutdown command to the device, forcing it to shut down, thereby ensuring the safe operation of the equipment; if the voltage output by the temperature detection modules corresponding to all channels with channel current is less than or equal to the reference voltage of the set temperature, the device will continue to operate with the current current of each channel.

[0059] Embodiment 3 of the present invention provides a device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the steps of the method for fault detection and device protection of a PFC channel failure described in embodiment 2 of the present invention.

[0060] Embodiment 4 of the present invention provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the steps of the method for detecting a PFC channel failure and protecting a device are used as described in embodiment 2.

[0061] The present disclosure may be a system, method and / or computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A PFC channel failure fault detection and device protection circuit, comprising: The total current detection module, the channel current detection module, the processor, the PWM wave logic operation module, the comparator integration module and several temperature detection modules are characterized by: The channel current detection module is used to detect the three channel currents of the PFC circuit and compare them with the set current threshold, and output the three channel currents and the current comparison results to the processor; The PWM wave logic operation module consists of three trigger integrated modules. Each trigger integrated module has the same structure and contains two D flip-flops. The two D flip-flops are cascaded with inverted clocks. The two input ends of each trigger integrated module receive the PWM waves from the driver chip pin and the switch tube control pin of the corresponding channel of the PFC circuit respectively. The trigger integrated module performs logical operations on the PWM waves and outputs the logical operation results to the processor. Several temperature detection modules respectively detect the temperatures of the three channels of the PFC circuit. Their output ends are respectively connected to the three input ends of the comparator integrated module. The comparator integrated module compares the temperature detection values ​​of the three channels with the set temperature and outputs the temperature comparison results to the processor. The total current detection module is used to detect the total input current. The processor is used to control whether each trigger integrated module and the temperature detection module are enabled, and to determine the type of abnormality of each channel of the PFC circuit without channel current based on the logic operation results. After determining that each channel without channel current has an abnormality, the processor determines whether each channel with channel current has an overload temperature abnormality based on the temperature comparison results, and makes corresponding adjustments based on the total input current.

2. The PFC channel failure detection and device protection circuit according to claim 1, characterized in that: The trigger integrated module also includes three inverters, specifically: The PWM wave of the switch control pin of one channel of the PFC circuit is input into the data input of the first D flip-flop after passing through the second inverter. The PWM wave of the driver chip pin of the corresponding channel is input into the clock input of the first D flip-flop after passing through the first inverter. The clock input is connected to the clock input of the second D flip-flop through the third inverter. The main output of the first D flip-flop is connected to the data input of the second D flip-flop, and the main output of the second D flip-flop outputs the logic operation result to the processor.

3. The PFC channel failure detection and device protection circuit according to claim 1, characterized in that: The channel current detection module includes three current detection modules and three comparators, specifically: The voltages of the sampling resistors of the three channels of the PFC circuit are respectively input to the input ends of the three current detection modules. The output ends of the three current detection modules all output the detected currents to the processor. The output ends of the three current detection modules are also respectively connected to the first input ends of the three comparators. The second input ends of the three comparators all receive the product of the set current threshold and the sampling resistor of the corresponding channel. The output ends of the three comparators respectively output the current comparison results of the three channel currents.

4. A method for detecting a PFC channel failure and protecting a device based on the circuit according to any one of claims 2 to 3, characterized in that: include: The three-channel current of the PFC circuit is collected to determine whether current is flowing in each channel. If current is flowing in all channels, the device equipped with the PFC circuit is controlled to operate normally. Otherwise, it is considered that there is an abnormality in each channel of the PFC circuit, and the frequency of the device is reduced based on the channel current of each channel and the total input current. After the frequency is reduced, the trigger integrated module corresponding to each channel without channel current in the PFC circuit is enabled. The trigger integrated module performs a logical operation on the PWM wave of the driver chip pin and the switch control pin of the corresponding channel, and determines the type of abnormality of the corresponding channel based on the logical operation result; When the abnormality type is a driver chip abnormality, the system determines whether the set temperature detection conditions are met through timing. If so, the temperature of each channel with channel current is collected and compared with the set temperature to determine whether these channels have overload temperature abnormalities, and control whether the equipment equipped with the PFC circuit continues to operate.

5. The method for detecting and protecting a PFC channel failure according to claim 4, wherein: The frequency of the device is reduced according to the channel current of each channel and the total input current, specifically: If there is only one channel with no channel current, the compressor frequency of the device equipped with the PFC circuit will be f 1 is reduced until the total input current I 1 is less than the sum of the current thresholds set for the two channels; if there is no channel current in two channels, the frequency of the device equipped with the PFC circuit will be f 1 is reduced until the total input current I 1 is less than the current threshold set for one channel.

6. The method for detecting a PFC channel failure and protecting a device according to claim 4, wherein: The abnormality type of the corresponding channel is determined according to the result of the logical operation, specifically: When the logic operation result of the trigger integrated module is high level, the abnormality type of the corresponding channel of the PFC circuit is the abnormality of the driver chip, otherwise the abnormality type is the abnormality of the switch tube.

7. The method for detecting a PFC channel failure and protecting a device according to claim 4, wherein: The set temperature detection conditions are specifically: The timing starts when an abnormality is detected in each channel of the PFC circuit. When the timing is greater than the set time threshold T 1, and no external command to terminate the operation of the device is received during this period, the set temperature detection condition is met.

8. The method for detecting a PFC channel failure and protecting a device according to claim 4, wherein: The temperature of each channel with channel current is collected and compared with the set temperature to determine whether these channels have overload temperature abnormalities and control whether the equipment equipped with the PFC circuit continues to operate. Specifically: By comparing the voltage output by each temperature detection module corresponding to each channel with the reference voltage of the set temperature, the temperature of each channel is compared with the set temperature; When the voltage output by the temperature detection module corresponding to a certain channel is greater than the reference voltage of the set temperature, it is considered that an overload temperature abnormality has occurred in that channel, and the equipment equipped with this PFC circuit is controlled to stop operation. If the voltage output by the temperature detection modules corresponding to all channels with channel current is less than or equal to the reference voltage of the set temperature, the equipment continues to operate with the current of each channel.

9. A device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the steps of the method for detecting a PFC channel failure and protecting a device according to any one of claims 4 to 8.

10. A computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, the computer program uses the steps of the method for detecting a PFC channel failure and protecting a device according to any one of claims 4 to 8.

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