A flight control and anti-jamming satellite navigation system

Abstract

This invention relates to a flight control and anti-jamming satellite navigation system, comprising a first FPGA unit, a first signal processing unit, a second FPGA unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module. The first signal processing unit is communicatively connected to the first FPGA unit and the electrical connector; the second signal processing unit is communicatively connected to the second FPGA unit and the electrical connector; the first FPGA unit is communicatively connected to the second FPGA unit, the electrical connector, and the radio frequency conversion module; the second FPGA unit is communicatively connected to the electrical connector and the health management module; the radio frequency conversion module is communicatively connected to the electrical connector; and the health management module is communicatively connected to the electrical connector. This solves the problems of large size, heavy weight, and unreliable data interaction in existing flight control and anti-jamming satellite navigation systems.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and more specifically, to a flight control and anti-jamming satellite navigation system. Background Technology

[0002] With the rapid development of missile models, the demands for size, weight, cost, and performance are constantly increasing. There is a need to minimize the weight and size of missile equipment, reduce development costs through integration, and simultaneously create a standardized product portfolio. Conventional satellite navigation systems struggle to operate normally in complex electromagnetic environments, significantly impacting the high-precision guidance capabilities of missile equipment. Therefore, it is necessary to strengthen and enhance the anti-interference capabilities of satellite navigation systems. For multi-module integrated systems, health monitoring is particularly important. If one module malfunctions, the missile system can promptly detect the anomaly through the health management system, thereby mitigating damage and improving the missile's safety and reliability. As the heart of the missile, the flight control module is the foundation for the entire missile's reliable operation.

[0003] Common flight control and satellite navigation systems are large and heavy, have slow response times, and lack resistance to complex electromagnetic environments, typically employing a separate design. Separate flight control and satellite navigation systems connect the two modules via an external mounting plate, resulting in significant size and weight, which can be limiting for guided munitions with limited size and weight. Furthermore, separate flight control and satellite navigation systems connected via a mounting plate have drawbacks. Interaction between separate modules inevitably requires connectors, increasing production costs and introducing instability. Communication efficiency is also limited by the design of these connectors. Conventional satellite navigation systems struggle to perform navigation, positioning, and timing functions in complex electromagnetic environments, affecting their autonomy and preventing normal operation during munition use.

[0004] Flight control and satellite navigation systems are characterized by large size, poor integration, lack of anti-interference capabilities, and absence of health management capabilities. The communication efficiency between modules is difficult to improve. At the same time, the separate design increases the size and space occupied by the product. The lack of anti-interference capabilities makes it difficult for satellite navigation systems to perform effectively in complex environments. The absence of health management capabilities affects the safety performance of the entire missile system. Conventional flight control and satellite navigation systems can no longer meet the requirements, thus limiting their widespread application.

[0005] Commonly used separate flight control and satellite navigation systems have the following main disadvantages:

[0006] 1) Separate flight control and satellite navigation systems have poor connection stability, low working efficiency, large size and weight, and poor economic efficiency.

[0007] 2) Conventional satellite navigation systems have poor anti-interference capabilities and are difficult to maintain their performance in complex environments.

[0008] 3) Traditional flight control and satellite navigation systems have difficulty monitoring the health of each module, resulting in poor safety. Summary of the Invention

[0009] To address the problems of large size, heavy weight, and unreliable data interaction in existing flight control and anti-jamming satellite navigation systems, this invention provides a flight control and anti-jamming satellite navigation system for use with external devices.

[0010] In a first aspect, the present invention provides a flight control and anti-jamming satellite navigation system, comprising:

[0011] The system comprises a first FPGA unit, a first signal processing unit, a second FPGA unit, a second signal processing unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module.

[0012] Both the first signal processing unit and the second signal processing unit are electrically connected to an EMIF interface. The first signal processing unit communicates with the first FPGA unit through the EMIF interface, and the second signal processing unit communicates with the second FPGA unit through the EMIF interface.

[0013] The first FPGA unit and the second FPGA unit have a first communication connection, which supports the UART communication protocol; the first FPGA unit and the electrical connector have a second communication connection; the second FPGA unit and the electrical connector have a third communication connection; the first signal processing unit and the electrical connector have a fourth communication connection, which supports the JTAG communication protocol; the second signal processing unit and the electrical connector have a fifth communication connection, which supports the JTAG communication protocol; the first FPGA unit and the RF conversion module have a sixth communication connection; and the RF conversion module and the electrical connector have a seventh communication connection.

[0014] The health management module is electrically connected to an FMC interface, and the health management module communicates with the second FPGA unit through the FMC interface. The health management module and the electrical connector have an eighth communication connection, and the eighth communication connection supports the PMBUS communication protocol.

[0015] The second signal processing unit and the electrical connector also have a ninth communication connection, which supports the SRIO communication protocol;

[0016] The level conversion module is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, the second signal processing unit, the electrical connector, and the health management module.

[0017] In some embodiments, the electrical connector is also electrically connected to a power supply interface, a communication interface, an input / output switch interface, and a radio frequency interface, and the electrical connector communicates with an external system through the power supply interface, the communication interface, the input / output switch interface, and the radio frequency interface, respectively.

[0018] In some embodiments, the radio frequency conversion module includes a radio frequency channel board, an AD conversion unit, and an intermediate frequency processing unit. The radio frequency channel board is communicatively connected to the electrical connector through the radio frequency interface. The radio frequency channel board and the AD conversion unit have a tenth communication connection. The AD conversion unit is communicatively connected to the first FPGA unit. The intermediate frequency processing unit is communicatively connected to the electrical connector through the radio frequency interface. The intermediate frequency processing unit is communicatively connected to the first FPGA unit.

[0019] In some embodiments, the level conversion module includes a voltage and current acquisition unit and a power conversion unit. The voltage and current acquisition unit is electrically connected to the electrical connector through the power supply interface. The voltage and current acquisition unit is electrically connected to the health management module. The voltage and current acquisition unit is electrically connected to the power conversion unit. The power conversion unit is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, and the second signal processing unit, respectively.

[0020] In some embodiments, the system further includes a network port transformer module, which is electrically connected to an ETH network port. The network port transformer module is communicatively connected to the communication interface of the electrical connector through the ETH network port, and is electrically connected to the health management module.

[0021] To address the problems of large size, heavy weight, and unreliable data exchange in existing flight control and anti-jamming satellite navigation systems, this invention has the following advantages:

[0022] The technical solution of this invention utilizes an architecture of "first FPGA unit + first signal processing unit" for anti-interference processing and baseband processing. The processed data is then transmitted via serial port to an architecture of "second FPGA unit + second signal processing unit". The architecture of "second FPGA unit + second signal processing unit" is used to receive data from inertial navigation sensors and satellite navigation systems, and to manage flight status. This achieves the miniaturization, lightweighting, reliability, and safety design of the flight control and anti-interference satellite navigation system, and provides rich functional interfaces. Attached Figure Description

[0023] Figure 1 A schematic diagram of a flight control and anti-jamming satellite navigation system is shown. Detailed Implementation

[0024] The present disclosure will now be discussed with reference to several exemplary embodiments. It should be understood that these embodiments are discussed only to enable those skilled in the art to better understand and thus implement the present disclosure, and are not intended to imply any limitation on the scope of the disclosure.

[0025] As used herein, the term "comprising" and its variations are to be interpreted as open-ended terms meaning "including but not limited to". The term "based on" is to be interpreted as "at least partially based on". The terms "one embodiment" and "an embodiment" are to be interpreted as "at least one embodiment". The term "another embodiment" is to be interpreted as "at least one other embodiment". The terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments and are not intended to limit the indicated devices, elements, or components to having a specific orientation or being constructed and operated in a specific orientation. Furthermore, some of the above terms may be used to indicate other meanings besides orientations or positional relationships; for example, the term "upper" may in some cases indicate a dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application according to the specific circumstances. In addition, the terms "installed", "set up", "equipped with", "connected", and "linked" should be interpreted broadly. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, elements, or components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. Furthermore, the terms "first," "second," etc., are mainly used to distinguish different devices, elements, or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance or quantity of the indicated devices, elements, or components. Unless otherwise stated, "a plurality of" means two or more.

[0026] This embodiment discloses a flight control and anti-jamming satellite navigation system. For example... Figure 1As shown, the flight control and anti-jamming satellite navigation system includes a first FPGA unit, a first signal processing unit, a second FPGA unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module. In this application, the first FPGA unit preferably uses an XC7K325T chip, which is mainly a baseband and anti-jamming processing FPGA; the second FPGA unit preferably uses an XC7K325T chip, which is mainly an interface construction FPGA; the first signal processing unit preferably uses a TMS32C6672 processor, which is mainly a dual-core DSP, with core 0 for navigation calculation and core 1 for integrated navigation; the second signal processing unit preferably uses a TMS32C6672 processor, which is mainly for guidance control and ground testing.

[0027] Both the first signal processing unit and the second signal processing unit are electrically connected to an EMIF interface. The first signal processing unit communicates with the first FPGA unit through the EMIF interface, receives baseband raw observations transmitted by the FPGA and uses them for PVT calculation, configures the baseband operating mode of the FPGA and transmits communication data through the FPGA expansion interface. The second signal processing unit communicates with the second FPGA unit through the EMIF interface and is mainly used to process serial port data information extended by the FPGA and control switch logic, etc.

[0028] The first FPGA unit and the second FPGA unit have a first communication connection, which supports the UART communication protocol and is used to transmit inertial navigation observations, satellite navigation calculation results, and integrated navigation calculation results. The first FPGA unit and the electrical connector have a second communication connection for ephemeris injection. The second FPGA unit and the electrical connector have a third communication connection for outputting multiple types of inertial measurement data, receiving inertial observation interruptions, and four types of external RS422 communication interfaces. The first signal processing unit and the electrical connector have a fourth communication connection, which supports the JTAG communication protocol and is used for software upgrades of the first signal processing unit. This interface can be used to upgrade the first FPGA unit via software. The second signal processing unit and the electrical connector have a fifth communication connection, which also supports the JTAG communication protocol and is used for software upgrades of the second signal processing unit. This interface can be used to upgrade the second FPGA unit via software. The first FPGA unit and the RF conversion module have a sixth communication connection for calculating one BeiDou B1 frequency point. The RF conversion module and the electrical connector have a seventh communication connection for receiving one BeiDou B1 frequency point analog signal.

[0029] The health management module is electrically connected to an FMC interface. The health management module communicates with the second FPGA unit through the FMC interface to transmit health management signals to the second FPGA. The expansion interface is monitored in the second signal processing unit. The health management module has an eighth communication connection with the electrical connector. The eighth communication connection supports the PMBUS communication protocol and is used to report health monitoring results to the outside world in real time.

[0030] The second signal processing unit and the electrical connector also have a ninth communication connection, which supports the SRIO communication protocol and is used to output high-speed control signals in real time for flight control.

[0031] The level conversion module is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, the second signal processing unit, the electrical connector, and the health management module. In this application, the health management module preferably uses an STM32H743 processor.

[0032] Furthermore, the electrical connector is also electrically connected to a power supply interface, a communication interface, an input / output switch interface, and a radio frequency interface. The electrical connector communicates with external devices through the power supply interface, the communication interface, the input / output switch interface, and the radio frequency interface, respectively.

[0033] Furthermore, the RF conversion module includes an RF channel board, an AD conversion unit, and an intermediate frequency (IF) processing unit. The RF channel board is communicatively connected to the electrical connector via the RF interface. The RF channel board and the AD conversion unit have a tenth communication connection. The AD conversion unit is communicatively connected to the first FPGA unit. The first FPGA receives the four BeiDou B3 frequency digital signals converted by the AD converter and performs anti-interference calculations. The IF processing unit is communicatively connected to the electrical connector via the RF interface and is communicatively connected to the first FPGA unit. In this application, the AD conversion unit is preferably an AD converter, and the IF processing unit is preferably a 2769B1 IF processing chip.

[0034] Furthermore, the level conversion module includes a voltage and current acquisition unit and a power conversion unit. The voltage and current acquisition unit is electrically connected to the electrical connector through the power supply interface. The voltage and current acquisition unit is electrically connected to the health management module. The voltage and current acquisition unit is electrically connected to the power conversion unit. The power conversion unit is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, and the second signal processing unit respectively to provide current.

[0035] Furthermore, it also includes a network port transformer module, which is electrically connected to an ETH network port. The network port transformer module communicates with the communication interface of the electrical connector through the ETH network port, and is also electrically connected to the health management module. In this application, the network port transformer module includes a PHY chip and a network port transformer.

[0036] In this embodiment, this application provides a flight control and anti-jamming satellite navigation system, mainly composed of a channel board, a digital board, and structural components. The channel board is mounted on the front of the flight control and anti-jamming satellite navigation system, and the digital board is mounted on the back. The channel board houses a radio frequency conversion module, which mainly consists of a radio frequency channel board, an AD conversion unit, and an intermediate frequency processing unit. The digital board houses a navigation, positioning, and timing "first FPGA unit + first signal processing unit" architecture, and a flight management module "second FPGA unit + second signal processing unit" architecture, also fixed within the digital board.

[0037] Specifically, the flight control and anti-jamming satellite navigation system receives satellite signals at frequencies B1 and B3 via a channel board. The B3 frequency signal is converted to an intermediate frequency (IF) signal by an AD conversion unit, and the B1 frequency signal is converted to an IF signal by an IF processing unit. In the digital board, a first FPGA unit, in conjunction with a first signal processing unit, performs anti-jamming processing and baseband processing. The processed data is then transmitted via a serial port to a second FPGA unit belonging to the flight management module, where it is processed by a second signal processing unit. The flight management module primarily receives data from inertial navigation sensors and the satellite navigation system, and manages the flight status. In this application, the flight control and anti-jamming satellite navigation system also includes a health management module, which can monitor the status of other computing chips and their input power supplies.

[0038] The flight control and anti-jamming satellite navigation system is characterized by its compact structure, small size, light weight, anti-jamming capabilities, and health management capabilities. It reduces the installation space and weight of the system, improves integration, and facilitates miniaturization, lightweight design, reliability, and safety. This flight control and anti-jamming satellite navigation system is feature-rich, rationally designed, and possesses high practical and economic value.

[0039] Compared to separate flight control and satellite navigation systems, this flight control and anti-jamming satellite navigation system reduces the number, size, and weight of external connectors, thereby reducing manufacturing costs and demonstrating good economic efficiency. The total weight of a conventional separate flight control and satellite navigation system is approximately 1035g (438g for flight management + 497g for navigation and positioning + 100g for the connecting base plate). The integrated flight control and anti-jamming satellite navigation system weighs only 861g, representing a 16% reduction in weight and a nearly 10% reduction in size. This integrated design significantly reduces production and manufacturing costs, resulting in good economic efficiency.

[0040] Secondly, this flight control and anti-jamming satellite navigation system has anti-jamming capabilities. Compared with conventional satellite navigation systems, it can maintain operation in complex environments. With a suitable antenna array, it can achieve a single-jamming performance of 95dB and a three-jamming performance of 85dB, thereby improving the reliability of the flight control and anti-jamming satellite navigation system.

[0041] Finally, the flight control and anti-jamming satellite navigation system has a health management function, which can monitor the working status of the main control chip of each system and issue alarms in a timely manner, greatly improving the safety and reliability of the flight control and anti-jamming satellite navigation system during operation.

[0042] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within the present invention.

[0043] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style of the specification is merely for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A flight control and anti-jamming satellite navigation system, characterized in that, include: The system comprises a first FPGA unit, a first signal processing unit, a second FPGA unit, a second signal processing unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module; Both the first signal processing unit and the second signal processing unit are electrically connected to an EMIF interface. The first signal processing unit communicates with the first FPGA unit through the EMIF interface, receives baseband raw observations transmitted by the FPGA and uses them for PVT calculation, configures the baseband operating mode of the FPGA and transmits communication data through the FPGA expansion interface, and the second signal processing unit communicates with the second FPGA unit through the EMIF interface. The first FPGA unit and the second FPGA unit have a first communication connection, which supports the UART communication protocol; the first FPGA unit and the electrical connector have a second communication connection; the second FPGA unit and the electrical connector have a third communication connection; the first signal processing unit and the electrical connector have a fourth communication connection, which supports the JTAG communication protocol; the second signal processing unit and the electrical connector have a fifth communication connection, which supports the JTAG communication protocol; the first FPGA unit and the RF conversion module have a sixth communication connection; and the RF conversion module and the electrical connector have a seventh communication connection. The health management module is electrically connected to an FMC interface. The health management module communicates with the second FPGA unit through the FMC interface to transmit health management signals to the second FPGA unit. The expansion interface is monitored in the second signal processing unit. The health management module and the electrical connector have an eighth communication connection, which supports the PMBUS communication protocol. The second signal processing unit and the electrical connector also have a ninth communication connection, which supports the SRIO communication protocol and is used to output high-speed control signals in real time for flight control. The level conversion module is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, the second signal processing unit, the electrical connector, and the health management module, respectively. The radio frequency conversion module includes a radio frequency channel board, an AD conversion unit, and an intermediate frequency processing unit. The radio frequency channel board is communicatively connected to the electrical connector through a radio frequency interface. The radio frequency channel board and the AD conversion unit have a tenth communication connection. The AD conversion unit is communicatively connected to the first FPGA unit. The intermediate frequency processing unit is communicatively connected to the electrical connector through the radio frequency interface. The intermediate frequency processing unit is also communicatively connected to the first FPGA unit.

2. The flight control and anti-interference satellite navigation system as described in claim 1, characterized in that, The electrical connector is also electrically connected to a power supply interface, a communication interface, input / output switching signals, and a radio frequency interface. The electrical connector communicates with external systems through the power supply interface, communication interface, input / output switching signals, and radio frequency interface, respectively.

3. The flight control and anti-interference satellite navigation system as described in claim 2, characterized in that, The level conversion module includes a voltage and current acquisition unit and a power conversion unit. The voltage and current acquisition unit is electrically connected to the electrical connector through the power supply interface. The voltage and current acquisition unit is electrically connected to the health management module. The voltage and current acquisition unit is electrically connected to the power conversion unit. The power conversion unit is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, and the second signal processing unit, respectively.

4. The flight control and anti-interference satellite navigation system as described in claim 2, characterized in that, It also includes a network port transformer module, which is electrically connected to an ETH network port. The network port transformer module is connected to the communication interface of the electrical connector through the ETH network port, and is electrically connected to the health management module.

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