Step circuit board and manufacturing method thereof

Abstract

The invention provides a stepped circuit board and a manufacturing method thereof. When the inner layer board is manufactured, the open groove corresponding to the unetched layer is formed in the first bonding layer, so that after the part, corresponding to the open groove, on the second circuit board on the outer layer is removed, the unetched layer can be exposed and processed, the step pattern does not need to be manufactured in advance, the processes of rubberizing, depth setting and rubberizing are not needed, the process is simplified, the production efficiency is improved, and the production cost is reduced. And no residual glue stain is left on the unetched layer, so that the quality of the subsequently formed electric connection part is ensured. Besides, a second groove is formed when the unetched layer is processed, and the second groove is a copper-free area, so that the risk of copper wire burrs is avoided during subsequent cutting and forming, and the (plugging) quality of the electric connection part is improved.

Description

Technical Field

[0001] This application relates to the technical field of circuit boards, and particularly to a stepped circuit board and a manufacturing method thereof. Background Art

[0002] A gold finger (Gold Finger or Edge Connector) refers to a gold-plated conductive contact on a PCB board, which is mainly used to connect other electronic devices or other PCB boards and is the outlet of the external connection network of the PCB board. In order to ensure the transmission quality of high-speed signals, the requirements for the shape, dimensional accuracy, etc. of the gold finger are getting higher and higher, and the usage amount of stepped gold fingers will also increase.

[0003] Currently, the method for manufacturing stepped gold fingers is generally as follows: First, a gold finger pattern is made on the bottom surface of the stepped groove, then a high-temperature resistant tape is pasted on the surface of the gold finger pattern, and then multiple layers of plates are laminated on the surface of the high-temperature resistant tape. After pressing the multiple layers of plates, the plates above the high-temperature resistant tape are removed by a CNC (computer numerical control) milling cutter with a fixed depth, the high-temperature resistant tape is torn off, and finally the gold finger pattern is electroplated to obtain a stepped gold finger circuit board. This preparation method is very complicated, especially the pasting and tearing of the high-temperature resistant tape, which all need to be done manually, and the production efficiency is very low. Summary of the Invention

[0004] In view of this, this application proposes a manufacturing method for a stepped circuit board to simplify the production process and improve production efficiency.

[0005] In addition, it is also necessary to provide a stepped circuit board manufactured by the above manufacturing method.

[0006] A manufacturing method for a stepped circuit board includes the following steps:

[0007] Provide a substrate, where the substrate includes a first circuit board, a first adhesive layer, and a second circuit board stacked; the first circuit board includes a first base material layer, a first circuit layer, and a second circuit layer respectively disposed on opposite surfaces of the first base material layer, the substrate further includes a first conductive structure, and the first conductive structure electrically connects the first circuit layer and the second circuit layer; the first adhesive layer has a slot, and the slot corresponds to a part of the first circuit layer; the second circuit board includes a second base material layer, a third circuit layer, and a third copper foil layer respectively disposed on opposite surfaces of the second base material layer, and the first adhesive layer is located between the first circuit layer and the third circuit layer;

[0008] Remove the part of the second circuit board corresponding to the slot to form a first groove, and part of the first circuit layer is exposed from the first groove;

[0009] A second groove is formed on the first circuit board, and a partial surface of the first base material layer close to the first circuit layer is exposed from the second groove;

[0010] A first gold plating layer is disposed on the surface of a part of the first circuit layer to form an electrical connection portion;

[0011] Along the extending direction of the substrate, the substrate includes a first portion on one side of the second groove and a second portion on the other side of the second groove, and the electrical connection portion is located in the first portion; the second groove is cut along the extending direction of the second groove to remove the second portion, thereby obtaining the stepped circuit board, wherein the first groove, the electrical connection portion and the second groove form a stepped portion.

[0012] In one embodiment, the preparation method of the substrate includes the following steps: forming a first conductive structure on a first copper clad laminate, the first copper clad laminate including a first base material layer and a first copper foil layer and a second copper foil layer respectively located on opposite two surfaces of the first base material layer, and the first conductive structure electrically connecting the first copper foil layer and the second copper foil layer; manufacturing the first copper foil layer to form a first circuit layer, and manufacturing the second copper foil layer to form a second circuit layer to obtain a first circuit board, wherein the first circuit layer includes a circuit pattern and an unetched layer; laminating a first adhesive layer and a second circuit board on at least one side of the first circuit board to obtain the substrate.

[0013] In one embodiment, after the step of "manufacturing the first copper foil layer to form a first circuit layer", the preparation method of the substrate further includes: disposing a first solder mask layer on the surface of the circuit pattern facing away from the first base material layer, and the first conductive structure and the unetched layer are exposed from the first solder mask layer.

[0014] In one embodiment, the preparation method of the substrate further includes: forming a second conductive structure on the substrate to electrically connect the first circuit board and the second circuit board; manufacturing the third copper foil layer to form a fourth circuit layer; disposing a second solder mask layer on the surface of the fourth circuit layer, and disposing a third solder mask layer in the second conductive structure.

[0015] In one embodiment, the manufacturing method further includes: manufacturing a part of the unetched layer to form a pattern area, and removing the remaining unetched layer to form the second groove.

[0016] In one embodiment, the substrate further includes a second adhesive layer and a third circuit board. The third circuit board includes a third base material layer and a fifth circuit layer and a fourth copper foil layer respectively disposed on opposite two surfaces of the third base material layer, and the second adhesive layer is located between the second circuit layer and the fifth circuit layer.

[0017] In one embodiment, after the step of "pressing a first adhesive layer and a second circuit board on at least one side of the first circuit board", the method for preparing the substrate further includes: pressing a second adhesive layer and a third circuit board on a side of the second circuit layer facing away from the first base layer; forming a sixth circuit layer by fabricating the fourth copper foil layer, and electrically connecting the second conductive structure to the fourth circuit layer, the third circuit layer, the first circuit layer, the second circuit layer, the fifth circuit layer, and the sixth circuit layer; and providing a fourth solder mask layer on a surface of the sixth circuit layer.

[0018] In one embodiment, before the step of "cutting the substrate along an extending direction of the second groove to remove the second portion", the manufacturing method further includes: providing a second immersion gold layer on a surface of the fourth circuit layer exposed from the second solder mask layer, and providing a third immersion gold layer on a surface of the sixth circuit layer exposed from the fourth solder mask layer.

[0019] A stepped circuit board includes a first circuit board, a first adhesive layer, and a second circuit board which are stacked. The first circuit board includes a first base layer, a first circuit layer and a second circuit layer respectively disposed on opposite two surfaces of the first base layer, and a first conductive structure electrically connecting the first circuit layer and the second circuit layer. A first immersion gold layer is provided on surfaces of the first conductive structure and a part of the first circuit layer to form an electrical connection portion. The second circuit board includes a second base layer and a third circuit layer and a fourth circuit layer respectively disposed on opposite two surfaces of the second base layer, and the first adhesive layer is located between the first circuit layer and the third circuit layer.

[0020] At an edge in an extending direction of the second circuit board, the stepped circuit board has a first groove, and the electrical connection portion is exposed from the first groove. At an edge in an extending direction of the first circuit board, the stepped circuit board has a second groove, and a part of a surface of the first base layer is exposed from the second groove. The first groove, the electrical connection portion, and the second groove form a stepped portion.

[0021] In one embodiment, the stepped circuit board further includes a second adhesive layer and a third circuit board, and the second adhesive layer is located between the second circuit layer and the third circuit board.

[0022] When manufacturing the inner layer board in this application, a slotted groove is provided on the first adhesive layer. In this way, after removing the corresponding part on the second circuit board of the outer layer that corresponds to the slotted groove, the unetched layer can be exposed for processing. There is no need to pre-make the pattern at the step, and there is no need for processes such as pasting glue, determining depth, and tearing glue. The process is simplified, the production efficiency is improved, and there will be no residual glue stains on the unetched layer, ensuring the quality of the subsequent formed electrical connection part. In addition, a second groove is formed when processing the unetched layer. The second groove is a copper-free area, and there is no risk of copper wire burrs during subsequent cutting and forming, improving the (insertion and extraction) quality of the electrical connection part. Brief Description of the Drawings

[0023] Figure 1 It is a cross-sectional view of a first copper clad laminate provided by an embodiment of this application and with blind holes formed thereon.

[0024] Figure 2 For Figure 1 It is a cross-sectional view of forming a first conductive structure on the first copper clad laminate shown.

[0025] Figure 3 For Figure 2 It is a cross-sectional view of a first circuit board obtained after manufacturing the copper foil layer of the first copper clad laminate shown to form a circuit layer.

[0026] Figure 4 For Figure 3 It is a cross-sectional view of setting a solder mask layer on the surface of the first circuit board shown.

[0027] Figure 5 For Figure 4 It is a cross-sectional view of a substrate obtained after laminating a second circuit board and a third circuit board on both sides of the first circuit board shown respectively.

[0028] Figure 6 For Figure 5 It is a cross-sectional view of setting through holes on the substrate shown.

[0029] Figure 7 For Figure 6 It is a cross-sectional view of electroplating on the substrate shown.

[0030] Figure 8 For Figure 7 It is a cross-sectional view after manufacturing the copper foil layer outside the substrate shown to form a circuit layer.

[0031] Figure 9 For Figure 8 It is a cross-sectional view of setting a solder mask layer on the substrate shown.

[0032] Figure 10 For Figure 9 It is a cross-sectional view of forming a first groove on the substrate shown.

[0033] Figure 11To form a cross-sectional view of a pattern area and a second trench from the unetched layer in the first trench shown in Figure 10 .

[0034] Figure 12 To form a cross-sectional view of an electroless gold layer on the structure shown in Figure 11 .

[0035] Figure 13 To form a cross-sectional view of a stepped circuit board after removing the second part of the structure shown in Figure 12 .

[0036] Description of main component symbols

[0037] Stepped circuit board 100

[0038] Substrate 10

[0039] First copper clad laminate 11

[0040] First conductive structure 12

[0041] Second conductive structure 13

[0042] First base material layer 111

[0043] First copper foil layer 112

[0044] Second copper foil layer 113

[0045] Blind hole 110

[0046] Through hole 101

[0047] Thin copper layers 114, 118, 119

[0048] First circuit layer 115

[0049] Circuit pattern 1151

[0050] Unetched layer 1152

[0051] Second circuit layer 116

[0052] First solder mask layer 117

[0053] First circuit board 20

[0054] First adhesive layer 30

[0055] Slot 301

[0056] Second circuit board 40

[0057] Second base material layer 41

[0058] Third circuit layer 42

[0059] The third copper foil layer 43

[0060] The fourth circuit layer 44

[0061] The second solder mask layer 45

[0062] The third solder mask layer 46

[0063] The second adhesive layer 50

[0064] The third circuit board 60

[0065] The third base material layer 61

[0066] The fifth circuit layer 62

[0067] The fourth copper foil layer 63

[0068] The sixth circuit layer 64

[0069] The fourth solder mask layer 65

[0070] The first groove 401

[0071] The pattern area 1153

[0072] The second groove 1154

[0073] The first immersion gold layer 1155

[0074] The second immersion gold layer 47

[0075] The third immersion gold layer 66

[0076] The electrical connection part 201

[0077] The first part 102

[0078] The second part 103

[0079] The step part 104

[0080] The following specific embodiments will further illustrate the embodiments of the present application in conjunction with the above drawings. Specific embodiments

[0081] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the embodiments of the present application belong. The terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of the present application.

[0082] It should be noted that all the directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative positional relationship, movement conditions, etc. between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly.

[0083] It will be understood that when a layer is referred to as being "on" another layer, it can be directly on the other layer or there can be an intermediate layer therebetween. In contrast, when a layer is referred to as being "directly on" another layer, there is no intermediate layer.

[0084] Embodiments of the present application are described herein with reference to cross-sectional views, which are schematic views of idealized embodiments (and intermediate configurations) of the present application. Thus, differences in the shapes shown due to manufacturing processes and / or tolerances are foreseeable. Therefore, the embodiments of the present application should not be construed as limited to the specific shapes of the regions shown herein, but should include, for example, deviations in shape due to manufacturing. The regions shown in the figures are themselves merely schematic, their shapes are not intended to illustrate the actual shape of the device, and are not intended to limit the scope of the present application.

[0085] The following will describe in detail some embodiments of the present application with reference to the drawings. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0086] Please refer to Figures 1 to 13 , a method for manufacturing a stepped circuit board 100 according to a first aspect of the present application includes steps S10 to S50. It can be understood that numbering the steps is intended to clearly describe the specific preparation method and does not limit the order of the steps.

[0087] Step S10, please refer to Figures 1 to 9 , provide a substrate 10. The preparation method of the substrate 10 may include steps S11 to S17.

[0088] As Figure 1 and Figure 2 shown, in step S11, a first conductive structure 12 is formed on a first copper clad laminate 11. The first copper clad laminate 11 includes a first base material layer 111 and a first copper foil layer 112 and a second copper foil layer 113 respectively located on opposite surfaces of the first base material layer 111. The manufacturing method of the first conductive structure 12 may be: first, blind holes 110 are formed on the first copper clad laminate 11, and then the blind holes 110 are filled to form the first conductive structure 12. The first conductive structure 12 may be, but is not limited to, a conductive hole.

[0089] As Figure 1As shown, the blind via 110 can be formed by means not limited to laser, and the number thereof can be one or more, which is not limited in this application. The blind via 110 penetrates through the first copper foil layer 112 and the first substrate layer 111 in the thickness direction, and a part of the surface of the second copper foil layer 113 close to the first substrate layer 111 can be exposed from the blind via 110.

[0090] As Figure 2 shown, a conductive metal (such as copper) can be disposed in the blind via 110 by means of but not limited to electroplating to form the first conductive structure 12. The first conductive structure 12 electrically connects the first copper foil layer 112 and the second copper foil layer 113. It can be understood that when electroplating, a thin copper layer 114 will be formed on the surface of the first copper foil layer 112 facing away from the first substrate layer 111 and the surface of the second copper foil layer 113 facing away from the first substrate layer 111.

[0091] In some embodiments, the first substrate layer 111 can be but not limited to Polyimide (PI), Polyethylene terephthalate (PET), Polyethylenenaphthalate two formic acid glycol ester (PEN), Polydimethylsiloxane (PDMS), Liquid crystal polymer (LCP), Modified polyimide (MPI), etc.

[0092] As Figure 3 shown, in step S12, the first copper foil layer 112 (and the thin copper layer 114 on its surface) is fabricated to form the first circuit layer 115, and the second copper foil layer 113 (and the thin copper layer 114 on its surface) is fabricated to form the second circuit layer 116, obtaining the first circuit board 20. The first circuit layer 115 and the second circuit layer 116 can be formed respectively through steps such as laminating, exposure, development, etching, and stripping. The above steps are common technical means in the art and will not be elaborated here. The first conductive structure 12 electrically connects the first circuit layer 115 and the second circuit layer 116.

[0093] As Figure 3As shown, the first circuit layer 115 includes a circuit pattern 1151 and an unetched layer 1152. In the etching step, a part of the first copper foil layer 112 (and the thin copper layer 114 on its surface) is etched to form the circuit pattern 1151, and another part of the first copper foil layer 112 (and the thin copper layer 114 on its surface) is not etched and is retained, that is, the unetched layer 1152 is formed. The unetched layer 1152 is disposed substantially adjacent to the surface of the first conductive structure 12, and the unetched layer 1152 can be connected to the first conductive structure 12.

[0094] As Figure 4 shown, in step S13, a first solder mask layer 117 can also be disposed on the surface of the circuit pattern 1151 facing away from the first base layer 111. The first solder mask layer 117 can cover a part of the surface of the circuit pattern 1151 without covering the first conductive structure 12 and the unetched layer 1152, and the first conductive structure 12 and the unetched layer 1152 are exposed from the first solder mask layer 117.

[0095] As Figure 5 shown, in step S14, the first adhesive layer 30 and the second circuit board 40 are laminated on at least one side of the first circuit board 20 to obtain the substrate 10.

[0096] In some embodiments, the substrate 10 includes a first circuit board 20, a first adhesive layer 30, and a second circuit board 40 which are stacked. The first circuit board 20 includes a first base layer 111, and a first circuit layer 115 and a second circuit layer 116 respectively disposed on opposite surfaces of the first base layer 111. The substrate 10 further includes a first conductive structure 12, and the first conductive structure 12 electrically connects the first circuit layer 115 and the second circuit layer 116. The first circuit layer 115 is located between the first adhesive layer 30 and the first base layer 111, and the first circuit layer 115 includes a circuit pattern 1151 and an unetched layer 1152.

[0097] The first adhesive layer 30 has a slot 301, and the slot 301 penetrates through the first adhesive layer 30 in the thickness direction. The slot 301 can be disposed corresponding to the first conductive structure 12 and the unetched layer 1152 (that is, corresponding to a part of the first circuit layer 115), the slot 301 can cover the first conductive structure 12 and the unetched layer 1152, and a part of the first solder mask layer 117 can also be located in the slot 301. The first adhesive layer 30 can be, but is not limited to, a prepreg (PP), and the prepreg is a non-flowing PP or a low-flowing PP.

[0098] The second circuit board 40 includes a second base layer 41, and a third circuit layer 42 and a third copper foil layer 43 respectively disposed on opposite surfaces of the second base layer 41. The first adhesive layer 30 is located between the third circuit layer 42 and the first circuit layer 115.

[0099] As Figure 5As shown, in some embodiments, a second adhesive layer 50 and a third circuit board 60 may also be laminated on the other side of the first circuit board 20 (i.e., on the side of the second circuit layer 116 away from the first base layer 111). The third circuit board 60 includes a third base layer 61 and a fifth circuit layer 62 and a fourth copper foil layer 63 disposed on opposite surfaces of the third base layer 61, and the second adhesive layer 50 is located between the second circuit layer 116 and the fifth circuit layer 62. The second adhesive layer 50 may be, but is not limited to, a prepreg, and the prepreg is non-flowing PP or low-flowing PP. In other embodiments, according to product requirements, an adhesive layer and a circuit board may also be laminated on the surface of the second circuit board 40 away from the first circuit board 20, and / or an adhesive layer and a circuit board may be laminated on the surface of the third circuit board 60 away from the first circuit board 20 to obtain a stepped circuit board 100 with more layers.

[0100] As Figure 6 and Figure 7 shown, in step S15, a second conductive structure 13 is formed on the substrate 10 to electrically connect the first circuit board 20 and the second circuit board 40.

[0101] Specifically, as Figure 6 shown, a via hole 101 may be first formed on the substrate 10, and the via hole 101 penetrates the entire substrate 10 along the thickness direction of the substrate 10. The via hole 101 may be formed by, but is not limited to, mechanical drilling and laser, etc., and the number thereof may be one or more. When the substrate 10 only includes the first circuit board 20 and the second circuit board 40, the via hole 101 penetrates the first circuit board 20 and the second circuit board 40. When the substrate 10 further includes the third circuit board 60, the via hole 101 also penetrates the third circuit board 60. Then, as Figure 7 shown, a layer of conductive metal (for example, copper) may be provided on the inner wall of the via hole 101 by, but is not limited to, electroplating to form the second conductive structure 13. The second conductive structure 13 electrically connects the third copper foil layer 43, the third circuit layer 42, the first circuit layer 115, and the second circuit layer 116. If the substrate 10 further includes the third circuit board 60, the second conductive structure 13 also electrically connects the third circuit board 60 to the first circuit board 20 and the second circuit board 40.

[0102] It can be understood that, as Figure 7 shown, during electroplating, a thin copper layer 118 will be formed on the surface of the third copper foil layer 43 away from the second base layer 41. When the substrate 10 further includes the third circuit board 60, a thin copper layer 119 will also be formed on the surface of the fourth copper foil layer 63 away from the third base layer 61 during electroplating.

[0103] As Figure 8As shown, in step S16, the third copper foil layer 43 (and the thin copper layer 118 on its surface) of the second circuit board 40 is fabricated to form the fourth circuit layer 44. The second conductive structure 13 is electrically connected to the fourth circuit layer 44, the third circuit layer 42, the first circuit layer 115, and the second circuit layer 116.

[0104] Further, the fourth copper foil layer 63 (and the thin copper layer 119 on its surface) of the third circuit board 60 is fabricated to form the sixth circuit layer 64. The second conductive structure 13 is electrically connected to the fourth circuit layer 44, the third circuit layer 42, the first circuit layer 115, the second circuit layer 116, the fifth circuit layer 62, and the sixth circuit layer 64.

[0105] As Figure 9 shown, in step S17, a second solder mask layer 45 may further be provided on the surface of the fourth circuit layer 44 facing away from the second base layer 41, and a third solder mask layer 46 may be provided within the second conductive structure 13. The second solder mask layer 45 can cover the surface of the second base layer 41 exposed from the gaps in the fourth circuit layer 44.

[0106] Further, a fourth solder mask layer 65 may be provided on a partial surface of the sixth circuit layer 64 facing away from the third base layer 61. The fourth solder mask layer 65 can cover the surface of the third base layer 61 exposed from the gaps in the sixth circuit layer 64.

[0107] In step S20, please refer to Figure 10 , a portion of the second circuit board 40 corresponding to the slot 301 is removed to form a first groove 401.

[0108] In some embodiments, with the assistance of a suitable fixture, a portion of the second circuit board 40 corresponding to the slot 301 (i.e., Figure 9 the structure above the slot 301 in

[0109] is removed by means of laser cutting or the like. The hollowed-out area formed by the removed portion of the second circuit board 40 communicates with the slot 301, and the two together form the first groove 401. The first groove 401 penetrates through the second circuit board 40 and the first adhesive layer 30 in the thickness direction. A part of the first solder mask layer 117 may be located within the first groove 401, and the first conductive structure 12 and the unetched layer 1152 are exposed from the first groove 401. That is, the sidewall of the first groove 401 can be the second circuit board 40 (including the second solder mask layer 45) and the first adhesive layer 30, and the bottom wall can be the first solder mask layer 117, the first conductive structure 12, and the unetched layer 1152. The first solder mask layer 117 located within the first groove 401 serves as a buffer zone, which can prevent the first adhesive layer 30 from flowing into the first groove 401, thereby preventing the first adhesive layer 30 from covering the first conductive structure 12 or the unetched layer 1152. Figure 11, a second groove 1154 is formed on the first circuit board 20, and a partial surface of the first base layer 111 close to the first circuit layer 115 is exposed from the second groove 1154.

[0110] In some embodiments, a partial unetched layer 1152 is fabricated to form a pattern area 1153, and the remaining unetched layer 1152 is removed to form the second groove 1154.

[0111] In some embodiments, a dry film can be laminated and exposed outside the second solder mask layer 45 and outside the fourth solder mask layer 65 to protect the circuit patterns in the substrate 10 from the influence of subsequent processing. Then, a wet film can be screen-printed on the bottom wall of the second groove 1154, and the wet film can cover the first conductive structure 12 and the unetched layer 1152. Then, a developing and etching step is performed to form the pattern area 1153 and the second groove 1154. Along the extending direction of the first circuit board 20 ( Figure 11 the horizontal direction in), the pattern area 1153 is closer to the first conductive structure 12 than the second groove 1154. The pattern area 1153 can be electrically connected to the first conductive structure 12, and the pattern area 1153 can be a row of equally spaced rectangular coppers. A partial surface of the first base layer 111 can be exposed from the second groove 1154, and the bottom wall of the second groove 1154 is the first base layer 111.

[0112] Step S40, please refer to Figure 12 , a first gold plating layer 1155 is disposed on the surfaces of the pattern area 1153 and the first conductive structure 12 (i.e., the surface of a partial first circuit layer 115) to form an electrical connection portion 201. In some embodiments, the electrical connection portion 201 is also referred to as a gold finger.

[0113] As Figure 12 shown, along the extending direction of the substrate 10 (i.e., the extending direction of the first circuit board 20, which can be the length direction or the width direction of the first circuit board 20, i.e., Figure 12 the horizontal direction in), the substrate 10 includes a first portion 102 on one side of the second groove 1154 and a second portion 103 on the other side of the second groove 1154, and the electrical connection portion 201 is located on the first portion 102.

[0114] Step S50, please refer to Figure 13 , the second groove 1154 is cut along the extending direction of the second groove 1154 (i.e., the arrangement direction of the rectangular coppers in the pattern area 1153) to remove the second portion 103, and a stepped circuit board 100 is obtained. Among them, the first groove 401, the electrical connection portion 201, and the second groove 1154 (the remaining second groove after cutting) are located at the edge of the circuit board and form a stepped step portion 104, and the cross-sectional shape thereof can be an "L" shape.

[0115] Please refer toFigure 13 , in the second aspect of the present application, a stepped circuit board 100 is provided, which includes a first circuit board 20, a first adhesive layer 30, and a second circuit board 40 stacked. The first circuit board 20 includes a first substrate layer 111, a first circuit layer 115 and a second circuit layer 116 respectively disposed on opposite surfaces of the first substrate layer 111, and a first conductive structure 12 electrically connecting the first circuit layer 115 and the second circuit layer 116. A first gold plating layer 1155 (see Figure 12 ) is provided on the surfaces of the first conductive structure 12 and a part of the first circuit layer 115 to form an electrical connection portion 201. The second circuit board 40 includes a second substrate layer 41, a third circuit layer 42 and a fourth circuit layer 44 respectively disposed on opposite surfaces of the second substrate layer 41, and the first adhesive layer 30 is located between the first circuit layer 115 and the third circuit layer 42.

[0116] At the edge in the extending direction of the second circuit board 40 (which can be the length direction or the width direction of the second circuit board 40, that is, the Figure 13 horizontal direction in the figure), the stepped circuit board 100 has a first groove 401, and the electrical connection portion 201 is exposed from the first groove 401. As shown in Figure 13 , the ends of the second circuit board 40 and the first adhesive layer 30 are not flush with the ends of the first circuit board 20. The second circuit board 40 and the first adhesive layer 30 are missing a part compared with the first circuit board 20, and the missing part forms the first groove 401.

[0117] At the edge in the extending direction of the first circuit board 20 (which can be the length direction or the width direction of the first circuit board 20, that is, the Figure 13 horizontal direction in the figure), the stepped circuit board 100 has a second groove 1154, and a part of the surface of the first substrate layer 111 close to the first circuit layer 115 is exposed from the second groove 1154. The second groove 1154 is close to the electrical connection portion 201, the side wall of the second groove 1154 is the electrical connection portion 201, and the bottom wall is the first substrate layer 111. The first groove 401, the electrical connection portion 201 and the second groove 1154 form a stepped portion 104, and the cross-sectional shape of the stepped portion 104 can be an "L" shape.

[0118] As shown in Figure 13 , in some embodiments, the stepped circuit board 100 further includes a second adhesive layer 50 and a third circuit board 60, and the second adhesive layer 50 is located between the first circuit board 20 and the third circuit board 60. The third circuit board 60 includes a third substrate layer 61, a fifth circuit layer 62 and a sixth circuit layer 64 respectively disposed on opposite surfaces of the third substrate layer 61, and the second adhesive layer 50 is located between the second circuit layer 116 and the fifth circuit layer 62.

[0119] Further, the stepped circuit board 100 further includes a second conductive structure 13, and the second conductive structure 13 is electrically connected to the second circuit board 40, the first circuit board 20, and the third circuit board 60.

[0120] In the present application, an unetched layer 1152 is reserved when manufacturing the first circuit layer 115 of the inner layer board to avoid affecting the circuit pattern in subsequent wet processes, and a slot 301 corresponding to the unetched layer 1152 is provided on the first adhesive layer 30. In this way, after removing the part corresponding to the slot 301 on the second circuit board 40 of the outer layer, the unetched layer 1152 can be exposed for processing. There is no need to pre-make the pattern at the stepped part, and there is no need for processes such as pasting glue, determining depth, and tearing glue, which simplifies the process, improves production efficiency, and there will be no residual glue stains on the unetched layer 1152, ensuring the quality of the subsequent formed electrical connection part 201. In addition, a second groove 1154 is formed when processing the unetched layer 1152. The second groove 1154 is a copper-free area, and there is no risk of copper wire burrs during subsequent cutting and forming, improving the (plugging and unplugging) quality of the electrical connection part 201.

[0121] The above description is some specific embodiments of the present application, but in the actual application process, it cannot be limited to these embodiments only. For those of ordinary skill in the art, other deformations and changes made according to the technical concept of the present application should fall within the protection scope of the present application.

Claims

1. A method for manufacturing a stepped circuit board, characterized in that: The method includes the following steps: Providing a substrate, the substrate includes a first circuit board, a first adhesive layer, and a second circuit board which are stacked; the first circuit board includes a first base material layer, a first circuit layer, and a second circuit layer which are respectively disposed on opposite surfaces of the first base material layer, the substrate further includes a first conductive structure, the first conductive structure electrically connects the first circuit layer and the second circuit layer; the first adhesive layer has a slot, and the slot corresponds to a part of the first circuit layer; the second circuit board includes a second base material layer, a third circuit layer, and a third copper foil layer which are respectively disposed on opposite surfaces of the second base material layer, and the first adhesive layer is located between the first circuit layer and the third circuit layer; Removing a part of the second circuit board corresponding to the slot to form a first groove, and a part of the first circuit layer is exposed from the first groove; Forming a second groove on the first circuit board, and a part of the surface of the first base material layer close to the first circuit layer is exposed from the second groove; Providing a first gold plating layer on the surface of a part of the first circuit layer to form an electrical connection portion; Along the extending direction of the substrate, the substrate includes a first part on one side of the second groove and a second part on the other side of the second groove, and the electrical connection portion is located in the first part; Cutting along the extending direction of the second groove to remove the second part, thereby obtaining the stepped circuit board, wherein the first groove, the electrical connection portion, and the second groove form a stepped portion.

2. The method for manufacturing a stepped circuit board according to claim 1, wherein: The preparation method of the substrate includes the following steps: Forming a first conductive structure on a first copper clad laminate, the first copper clad laminate includes a first base material layer, a first copper foil layer, and a second copper foil layer which are respectively located on opposite surfaces of the first base material layer, and the first conductive structure electrically connects the first copper foil layer and the second copper foil layer; Fabricating the first copper foil layer into a first circuit layer, and fabricating the second copper foil layer into a second circuit layer to obtain a first circuit board, wherein the first circuit layer includes a circuit pattern and an unetched layer; Pressing a first adhesive layer and a second circuit board on at least one side of the first circuit board to obtain the substrate.

3. The manufacturing method of the stepped circuit board according to claim 2, wherein, After the step of "fabricating the first copper foil layer into a first circuit layer", the preparation method of the substrate further includes: providing a first solder mask layer on the surface of the circuit pattern facing away from the first base material layer, and the first conductive structure and the unetched layer are exposed from the first solder mask layer.

4. The manufacturing method of the stepped circuit board according to claim 2, characterized in that, The preparation method of the substrate further includes: Forming a second conductive structure on the substrate to electrically connect the first circuit board and the second circuit board; Fabricating the third copper foil layer into a fourth circuit layer; Providing a second solder mask layer on the surface of the fourth circuit layer, and providing a third solder mask layer in the second conductive structure.

5. The manufacturing method of the stepped circuit board according to claim 2, characterized in that, The fabrication method further includes: fabricating a part of the unetched layer into a pattern area, and removing the remaining unetched layer to form the second groove.

6. The manufacturing method of the stepped circuit board according to claim 4, characterized in that, The substrate further includes a second adhesive layer and a third circuit board. The third circuit board includes a third base material layer, a fifth circuit layer, and a fourth copper foil layer respectively disposed on opposite surfaces of the third base material layer. The second adhesive layer is located between the second circuit layer and the fifth circuit layer.

7. The method for manufacturing a stepped circuit board according to claim 6, wherein: After the step of "pressing a first adhesive layer and a second circuit board on at least one side of the first circuit board", the method for preparing the substrate further includes: Pressing a second adhesive layer and a third circuit board on the side of the second circuit layer facing away from the first base material layer; Manufacturing the fourth copper foil layer to form a sixth circuit layer, and the second conductive structure electrically connecting the fourth circuit layer, the third circuit layer, the first circuit layer, the second circuit layer, the fifth circuit layer, and the sixth circuit layer; Providing a fourth solder resist layer on the surface of the sixth circuit layer.

8. The manufacturing method of the stepped circuit board according to claim 7, characterized in that, Before the step of "cutting the substrate along the extension direction of the second groove to remove the second part", the manufacturing method further includes: providing a second gold plating layer on the surface of the fourth circuit layer exposed from the second solder resist layer, and providing a third gold plating layer on the surface of the sixth circuit layer exposed from the fourth solder resist layer.

9. A stepped circuit board, characterized in that, Including a first circuit board, a first adhesive layer, and a second circuit board stacked; the first circuit board includes a first base material layer, a first circuit layer and a second circuit layer respectively disposed on opposite surfaces of the first base material layer, and a first conductive structure electrically connecting the first circuit layer and the second circuit layer. A first gold plating layer is provided on the surface of the first conductive structure and a part of the first circuit layer to form an electrical connection portion; the second circuit board includes a second base material layer, a third circuit layer and a fourth circuit layer respectively disposed on opposite surfaces of the second base material layer, and the first adhesive layer is located between the first circuit layer and the third circuit layer; At the edge of the stepped circuit board in the extension direction of the second circuit board, the stepped circuit board has a first groove, and the electrical connection portion is exposed from the first groove; at the edge of the stepped circuit board in the extension direction of the first circuit board, the stepped circuit board has a second groove, and a part of the surface of the first base material layer is exposed from the second groove; the first groove, the electrical connection portion, and the second groove form a stepped portion.

10. The stepped circuit board according to claim 9, characterized in that, The stepped circuit board further includes a second adhesive layer and a third circuit board, and the second adhesive layer is located between the second circuit layer and the third circuit board.

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