Micro-LED epitaxial wafer and preparation method thereof

Abstract

The invention discloses a Micro-LED epitaxial wafer and a preparation method thereof, a multi-quantum well light-emitting layer of the Micro-LED epitaxial wafer comprises a first sub-layer, a second sub-layer and a third sub-layer which are stacked in sequence, and each of the first sub-layer, the second sub-layer and the third sub-layer comprises a pre-well protection layer, an InGaN quantum well layer, a post-well protection layer and a quantum barrier layer which are periodically and alternately stacked; the In component proportion of the InGaN quantum well layer in the first sub-layer and the third sub-layer is smaller than the In component proportion of the InGaN quantum well layer in the second sub-layer; the well front protection layer comprises a first InGaN well front protection layer, an AlGaN well front protection layer and a second InGaN well front protection layer which are stacked in sequence, and the well rear protection layer comprises an InGaN well rear protection layer, an AlGaN well rear protection layer and a GaN well rear protection layer which are stacked in sequence. According to the invention, the light-emitting brightness of the Micro-LED can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular, to a Micro-LED epitaxial wafer and a method for preparing the same. Background Art

[0002] The working current of a Micro-LED is generally 0.01 A / cm 2 ~0.5 A / cm 2 . At low current density, the carrier concentration in the quantum well is relatively low, and the proportion of Auger recombination is small. At the same time, electron leakage has not occurred or the proportion is very low at low current density. The electron blocking layer structure not only does not block electrons, but instead blocks the injection of holes, reducing the quantum efficiency of the device. The LED with the traditional epitaxial structure design can no longer meet the application requirements of Micro-LED. Therefore, it is necessary to redesign the Micro-LED epitaxial structure suitable for small size, low current, and low power to improve its electro-optical conversion efficiency. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a Micro-LED epitaxial wafer and a method for preparing the same, which can improve the light-emitting efficiency of the Micro-LED.

[0004] To solve the above problems, the present invention discloses a Micro-LED epitaxial wafer, which includes a substrate, and a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, and a P-type semiconductor layer that are sequentially stacked on the substrate; the multi-quantum well light-emitting layer includes a first sub-layer, a second sub-layer, and a third sub-layer that are sequentially stacked, and the first sub-layer, the second sub-layer, and the third sub-layer all include a pre-well protection layer, an InGaN quantum well layer, a post-well protection layer, and a quantum barrier layer that are periodically and alternately stacked;

[0005] The proportion of In component in the InGaN quantum well layer of the first sub-layer and the proportion of In component in the InGaN quantum well layer of the third sub-layer are both less than the proportion of In component in the InGaN quantum well layer of the second sub-layer; the pre-well protection layer includes a first InGaN pre-well protection layer, an AlGaN pre-well protection layer, and a second InGaN pre-well protection layer that are sequentially stacked, and the post-well protection layer includes an InGaN post-well protection layer, an AlGaN post-well protection layer, and a GaN post-well protection layer that are sequentially stacked.

[0006] As an improvement of the above technical solution, the proportion of In component in the first InGaN pre-well protection layer is 0.01~0.03, and the thickness is 0.05 nm~0.3 nm;

[0007] The proportion of Al component in the AlGaN pre-well protection layer is 0.01~0.15, and the thickness is 0.1 nm~0.5 nm;

[0008] The In composition ratio of the protective layer in front of the second InGaN well is 0.01 to 0.39, the thickness is 0.1 nm to 0.8 nm, and in each period, the In composition ratio of the protective layer in front of the second InGaN well increases along the epitaxial direction;

[0009] The In composition ratio of the protective layer behind the InGaN well is 0.01 to 0.39, the thickness is 0.1 nm to 0.6 nm, and in each period, the In composition ratio of the protective layer behind the InGaN well decreases along the epitaxial direction;

[0010] The Al composition ratio of the protective layer behind the AlGaN well is 0.01 to 0.1, and the thickness is 0.1 nm to 0.5 nm;

[0011] The thickness of the protective layer behind the GaN well is 0.05 nm to 0.3 nm.

[0012] As an improvement of the above technical solution, in the first sublayer, the first protective layer in front of the InGaN well and the second protective layer in front of the InGaN well are Si-doped InGaN layers, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 ; the protective layer behind the InGaN well in the first sublayer is a Si-doped InGaN layer, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 ;

[0013] In the second sublayer, the first protective layer in front of the InGaN well and the second protective layer in front of the InGaN well are Si-doped InGaN layers, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 ;

[0014] In the third sublayer, the protective layer behind the InGaN well is a Mg-doped InGaN layer, and the Mg doping concentration is 2.15×10 18 cm -3 ~6.28×10 19 cm -3 。

[0015] As an improvement of the above technical solution, in each period, the Al composition ratio of the protective layer in front of the AlGaN well is greater than or equal to the Al composition ratio of the protective layer behind the AlGaN well;

[0016] In each period, the Al component proportion of the AlGaN well front protective layer in the first sub-layer and the Al component proportion of the AlGaN well front protective layer in the third sub-layer are both greater than or equal to the Al component proportion of the AlGaN well front protective layer in the second sub-layer.

[0017] As an improvement of the above technical solution, in each period, the Al component proportion of the AlGaN well front protective layer in the first sub-layer, the Al component proportion of the AlGaN well rear protective layer in the first sub-layer, the Al component proportion of the AlGaN well front protective layer in the third sub-layer, the Al component proportion of the AlGaN well rear protective layer in the third sub-layer, the Al component proportion of the AlGaN well front protective layer in the second sub-layer, and the Al component proportion of the AlGaN well rear protective layer in the second sub-layer decrease successively;

[0018] In the first sub-layer, the Al component proportion of the AlGaN well front protective layer is 0.03 - 0.15, and the Al component proportion of the AlGaN well rear protective layer is 0.02 - 0.1;

[0019] In the second sub-layer, the Al component proportion of the AlGaN well front protective layer is 0.01 - 0.08, and the Al component proportion of the AlGaN well rear protective layer is 0.01 - 0.06;

[0020] In the third sub-layer, the Al component proportion of the AlGaN well front protective layer is 0.02 - 0.1, and the Al component proportion of the AlGaN well rear protective layer is 0.01 - 0.08.

[0021] As an improvement of the above technical solution, in each period of the first sub-layer, the In component proportion of the second InGaN well front protective layer increases from 0.01 - 0.06 to 0.08 - 0.3, and the In component proportion of the second InGaN well rear protective layer decreases from 0.08 - 0.3 to 0.01 - 0.06;

[0022] In each period of the second sub-layer, the In component proportion of the second InGaN well front protective layer increases from 0.01 - 0.08 to 0.1 - 0.39, and the In component proportion of the second InGaN well rear protective layer decreases from 0.1 - 0.39 to 0.01 - 0.08;

[0023] In each period of the third sub-layer, the In component proportion of the second InGaN well front protective layer increases from 0.01 - 0.03 to 0.06 - 0.27, and the In component proportion of the second InGaN well rear protective layer decreases from 0.06 - 0.27 to 0.01 - 0.03.

[0024] As an improvement of the above technical solution, the number of periods of the alternately stacked first sub-layer is 2 to 5; in the first sub-layer, the In composition ratio of the InGaN quantum well layer is 0.08 to 0.3, and the thickness is 2.15 nm to 4.5 nm. The quantum barrier layer is a Si-doped GaN quantum barrier layer, and the Si doping concentration is 2.15×10 17 cm -3 ~8.76×10 17 cm -3 , and the thickness is 6 nm to 15 nm;

[0025] The number of periods of the alternately stacked second sub-layer is 2 to 8; in the second sub-layer, the In composition ratio of the InGaN quantum well layer is 0.1 to 0.39, and the thickness is 2.15 nm to 4.5 nm. The quantum barrier layer is an unintentionally doped GaN quantum barrier layer, and the thickness is 6 nm to 15 nm;

[0026] The number of periods of the alternately stacked third sub-layer is 1 to 3; in the third sub-layer, the In composition ratio of the InGaN quantum well layer is 0.06 to 0.27, and the thickness is 2.15 nm to 4.5 nm. The quantum barrier layer is a Mg-doped GaN quantum barrier layer, and the Mg doping concentration is 2.15×10 18 cm -3 ~6.28×10 19 cm -3 , and the thickness is 6 nm to 15 nm.

[0027] Correspondingly, the present invention also discloses a method for preparing a Micro-LED epitaxial wafer for preparing the above-mentioned Micro-LED epitaxial wafer, including the following steps:

[0028] Provide a substrate, and sequentially grow a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, and a P-type semiconductor layer on the substrate; the multi-quantum well light-emitting layer includes a first sub-layer, a second sub-layer, and a third sub-layer that are sequentially stacked. The first sub-layer, the second sub-layer, and the third sub-layer all include a pre-well protection layer, an InGaN quantum well layer, a post-well protection layer, and a quantum barrier layer that are periodically and alternately stacked;

[0029] The In composition ratio of the InGaN quantum well layer in the first sub-layer and the In composition ratio of the InGaN quantum well layer in the third sub-layer are both less than the In composition ratio of the InGaN quantum well layer in the second sub-layer; the pre-well protection layer includes a first InGaN pre-well protection layer, an AlGaN pre-well protection layer, and a second InGaN pre-well protection layer that are sequentially stacked, and the post-well protection layer includes an InGaN post-well protection layer, an AlGaN post-well protection layer, and a GaN post-well protection layer that are sequentially stacked.

[0030] As an improvement of the above technical solution, after the growth of the InGaN quantum well layer of the first sub-layer and the InGaN quantum well layer of the third sub-layer is completed, annealing treatment is carried out. The temperature of the annealing treatment is 720 °C to 980 °C, the pressure is 50 torr to 360 torr, the atmosphere is N2 and H2, and the volume ratio of N2 to H2 is 1:(0.2 to 5).

[0031] As an improvement of the above technical solution, the growth temperature of the first InGaN well front protection layer is 750 °C to 920 °C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the AlGaN well front protection layer is 780 °C to 920 °C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the second InGaN well front protection layer is 680 °C to 890 °C, and the pressure is 30 torr to 360 torr;

[0032] The growth temperature of the InGaN well rear protection layer is 680 °C to 890 °C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the AlGaN well rear protection layer is 780 °C to 920 °C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the GaN well rear protection layer is 800 °C to 920 °C, and the pressure is 30 torr to 360 torr.

[0033] Implementing the present invention has the following beneficial effects:

[0034] 1. The multi-quantum well light-emitting layer of the present invention includes a first sub-layer, a second sub-layer and a third sub-layer stacked in sequence. The second sub-layer is the light-emitting unit of the Micro-LED of the present invention at a low operating current density. The In component ratio of the InGaN quantum well layer of the second sub-layer is higher, and the emission wavelength is longer. Correspondingly, the growth temperature of the InGaN quantum well materials of the first sub-layer and the second sub-layer is higher, more inclined to two-dimensional material growth, and the defects are significantly reduced. In addition, the In component of the InGaN quantum well materials in the multi-quantum well light-emitting layer first increases and then decreases, which can effectively reduce the lattice mismatch stress between the InGaN quantum well materials and the quantum barrier materials of the second sub-layer, improve the quality of the second quantum well layer at a low operating current density, thereby improving the radiative recombination efficiency of the multi-quantum well light-emitting layer, and finally improving the optical efficiency and yield of the Micro-LED at a low operating current density and other performances.

[0035] 2. The first sub-layer, the second sub-layer, and the third sub-layer of the present invention each include a periodically alternating stack of a pre-well protective layer, an InGaN quantum well layer, a post-well protective layer, and a quantum barrier layer. The InGaN material in the pre-well protective layer is used to reduce the lattice mismatch stress between the InGaN quantum well material and the quantum barrier material, and the AlGaN material is used to reduce the electron overflow phenomenon and improve the light emission efficiency. The design of the pre-well protective layer and the post-well protective layer can significantly improve the current spreading performance, thereby improving the light emission uniformity, reliability, yield, and other performance of the Micro-LED.

[0036] 3. In each period of the present invention, the Al component ratio of the AlGaN pre-well protective layer is greater than or equal to the Al component ratio of the AlGaN post-well protective layer. Correspondingly, the barrier height of the AlGaN pre-well protective layer is greater than or equal to the barrier height of the AlGaN post-well protective layer, which improves the hole injection efficiency of the P-type semiconductor layer while weakening the electron injection efficiency of the N-type semiconductor layer to improve the matching degree of the electron-hole concentration in the light-emitting quantum well region.

[0037] 4. In each period of the present invention, the Al component ratio of the AlGaN pre-well protective layer in the first sub-layer and the Al component ratio of the AlGaN pre-well protective layer in the third sub-layer are both greater than or equal to the Al component ratio of the AlGaN pre-well protective layer in the second sub-layer. Correspondingly, the barrier height of the second sub-layer is the lowest, so that electrons and holes are effectively confined in the second sub-layer for radiative recombination light emission, ultimately improving the light emission efficiency. Description of the Drawings

[0038] Figure 1 is a schematic structural diagram of a Micro-LED epitaxial wafer provided by an embodiment of the present invention;

[0039] Figure 2 is a schematic structural diagram of the first sub-layer of the multi-quantum well light-emitting layer of a Micro-LED epitaxial wafer provided by an embodiment of the present invention;

[0040] Figure 3 is a schematic structural diagram of the second sub-layer of the multi-quantum well light-emitting layer of a Micro-LED epitaxial wafer provided by an embodiment of the present invention;

[0041] Figure 4 is a schematic structural diagram of the third sub-layer of the multi-quantum well light-emitting layer of a Micro-LED epitaxial wafer provided by an embodiment of the present invention;

[0042] Figure 5 is a flow chart of a method for manufacturing a Micro-LED epitaxial wafer provided by an embodiment of the present invention. Detailed Embodiments

[0043] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below.

[0044] As Figures 1 to 4 shown, the present invention provides a Micro-LED epitaxial wafer, including a substrate 100, and a buffer layer 200, an N-type semiconductor layer 300, a low-temperature stress release layer 400, a multi-quantum well light-emitting layer 500, and a P-type semiconductor layer 600 that are sequentially stacked on the substrate 100. The multi-quantum well light-emitting layer 500 includes a first sub-layer 510, a second sub-layer 520, and a third sub-layer 530 that are sequentially stacked. The first sub-layer 510, the second sub-layer 520, and the third sub-layer 530 all include a pre-well protection layer 10, an InGaN quantum well layer 20, a post-well protection layer 30, and a quantum barrier layer 40 that are periodically and alternately stacked.

[0045] The In composition ratio of the InGaN quantum well layer 20 in the first sub-layer 510 and the In composition ratio of the InGaN quantum well layer 20 in the third sub-layer 530 are both less than the In composition ratio of the InGaN quantum well layer 20 in the second sub-layer 520. In the multi-quantum well light-emitting layer 500 of the Micro-LED epitaxial wafer provided by the present invention, the second sub-layer 520 is the light-emitting unit of the Micro-LED at a low operating current density. The InGaN quantum well layer 20 of the second sub-layer 520 has a higher In composition ratio and a longer emission wavelength. Correspondingly, the growth temperature of the InGaN quantum well material in the first sub-layer 510 and the third sub-layer 530 is higher, more inclined to two-dimensional material growth, and the defects are significantly reduced. In addition, the In composition of the InGaN quantum well material in the multi-quantum well light-emitting layer 500 increases first and then decreases, which can effectively reduce the lattice mismatch stress between the InGaN quantum well material and the quantum barrier material in the second sub-layer 520, improve the quality of the second quantum well layer at a low operating current density, thereby improving the radiative recombination efficiency of the multi-quantum well light-emitting layer 500, and finally improving the optical efficiency and yield of the Micro-LED at a low operating current density and other performances.

[0046] The pre-well protection layer 10 includes a first InGaN pre-well protection layer 10a, an AlGaN pre-well protection layer 10b, and a second InGaN pre-well protection layer 10c that are sequentially stacked. The post-well protection layer 30 includes an InGaN post-well protection layer 30a, an AlGaN post-well protection layer 30b, and a GaN post-well protection layer 30c that are sequentially stacked. The InGaN material in the pre-well protection layer 10 is used to reduce the lattice mismatch stress between the InGaN quantum well material and the quantum barrier material, and the AlGaN material is used to reduce the electron overflow phenomenon and improve the light-emitting efficiency. The design of the pre-well protection layer 10 and the post-well protection layer 30 can significantly improve the current spreading performance, thereby improving the light-emitting uniformity, reliability, yield, and other performances of the Micro-LED.

[0047] In one embodiment, the number of alternating stacking periods of the first sublayer 510 is 2 to 5; in the first sublayer 510, the In component ratio of the InGaN quantum well layer 20 is 0.08 to 0.3, and is exemplarily 0.1, 0.15, 0.2, 0.25, or 0.28, but not limited thereto; the thickness is 2.15 nm to 4.5 nm, and is exemplarily 2.5 nm, 2.8 nm, 3 nm, 3.5 nm, or 4 nm, but not limited thereto; the quantum barrier layer 40 is a Si-doped GaN quantum barrier layer, and the Si doping concentration is 2.15×10 17 cm -3 ~8.76×10 17 cm -3 , an exemplary value is 3×10 17 cm -3 , 4×10 17 cm -3 , 5×10 17 cm -3 , 6×10 17 cm -3 or 7×10 17 cm -3 The thickness is, but is not limited to, 6 nm to 15 nm, exemplified by, but not limited to, 8 nm, 9 nm, 10 nm, 12 nm, or 14 nm. The low proportion of In in the first sublayer 510 improves the lattice matching between the InGaN quantum well layer 20 and the quantum barrier layer 40, as well as the growth quality of the first sublayer 510. The Si-doped GaN quantum barrier layer, serving as the quantum barrier layer 40 of the first sublayer 510, can provide a certain amount of electrons, improving electron-hole matching in the second sublayer 520.

[0048] The second sublayer 520 has an alternating stacking period of 2 to 8. In the second sublayer 520, the InGaN quantum well layer 20 has an In composition ratio of 0.1 to 0.39, typically 0.15, 0.2, 0.25, 0.3, or 0.35, but not limited thereto, and a thickness of 2.15 nm to 4.5 nm, typically 2.5 nm, 2.8 nm, 3 nm, 3.5 nm, or 4 nm, but not limited thereto. The quantum barrier layer 40 is an unintentionally doped GaN quantum barrier layer with a thickness of 6 nm to 15 nm, typically 8 nm, 9 nm, 10 nm, 12 nm, or 14 nm, but not limited thereto. The second sublayer 520 is the light-emitting unit of the Micro-LED at low operating current density. The higher In composition of the second sublayer 520, combined with the lower In composition of the first and third sublayers 510 and 530, ensures that the second sublayer 520 has superior lattice quality.

[0049] The number of alternating stacking cycles of the third sublayer 530 is 1 to 3; in the third sublayer 530, the In component ratio of the InGaN quantum well layer 20 is 0.06 to 0.27, exemplarily 0.08, 0.1, 0.15, 0.2 or 0.25, but not limited thereto, and the thickness is 2.15 nm to 4.5 nm, exemplarily 2.5 nm, 2.8 nm, 3 nm, 3.5 nm or 4 nm, but not limited thereto; the quantum barrier layer 40 is a Mg-doped GaN quantum barrier layer, and the Mg doping concentration is 2.15×10 18 cm -3 ~6.28×10 19 cm -3 , exemplarily 5×10 18 cm -3 , 8×10 18 cm -3 , 1×10 19 cm -3 , 2.5×10 19 cm -3 or 5×10 19 cm -3 The thickness is, but is not limited to, 6 nm to 15 nm, exemplified by, but not limited to, 8 nm, 9 nm, 10 nm, 12 nm, or 14 nm. The third sublayer 530 has a relatively low In component ratio, which can improve the lattice matching between the InGaN quantum well layer 20 and the quantum barrier layer 40, as well as the growth quality of the third sublayer 530. The Mg-doped GaN quantum barrier layer, serving as the quantum barrier layer 40 of the third sublayer 530, can provide a certain amount of holes, improving the electron-hole matching in the second sublayer 520.

[0050] In one embodiment, in the pre-well protective layer 10, the In composition ratio of the first InGaN pre-well protective layer 10a is 0.01 to 0.03, exemplary values being 0.014, 0.016, 0.02, 0.024 or 0.028, but not limited thereto, and the thickness is 0.05 nm to 0.3 nm, exemplary values being 0.08 nm, 0.1 nm, 0.15 nm, 0.2 nm or 0.25 nm, but not limited thereto. The Al composition ratio of the AlGaN pre-well protective layer 10b is 0.01 to 0.15, exemplary values being 0.05, 0.08, 0.1, 0.12 or 0.14, but not limited thereto, and the thickness is 0.1 nm to 0.5 nm, exemplary values being 0.15 nm, 0.2 nm, 0.25 nm, 0.3 nm or 0.4 nm, but not limited thereto. The In composition ratio of the second InGaN pre-well protective layer 10c is 0.01 to 0.39, exemplary values being 0.1, 0.2, 0.25, 0.3 or 0.35, but not limited thereto, and the thickness is 0.1 nm to 0.8 nm, exemplary values being 0.2 nm, 0.4 nm, 0.5 nm, 0.6 nm or 0.7 nm, but not limited thereto.

[0051] Preferably, in each period, the In composition ratio of the second InGaN pre-well protective layer 10c increases along the epitaxial direction. Specifically, in each period of the first sub-layer 510, the In composition ratio of the second InGaN pre-well protective layer 10c increases from 0.01 to 0.06 to 0.08 to 0.3; in each period of the second sub-layer 520, the In composition ratio of the second InGaN pre-well protective layer 10c increases from 0.01 to 0.08 to 0.1 to 0.39; in each period of the third sub-layer 530, the In composition ratio of the second InGaN pre-well protective layer 10c increases from 0.01 to 0.03 to 0.06 to 0.27.

[0052] In one embodiment, in the post-well protection layer 30, the In composition ratio of the InGaN post-well protection layer 30a is 0.01 to 0.39, exemplarily 0.15, 0.2, 0.25, 0.3 or 0.35, but not limited thereto, and the thickness is 0.1 nm to 0.6 nm, exemplarily 0.15 nm, 0.2 nm, 0.3 nm, 0.4 nm or 0.5 nm, but not limited thereto. The Al composition ratio of the AlGaN post-well protection layer 30b is 0.01 to 0.1, exemplarily 0.02, 0.04, 0.05, 0.06 or 0.08, but not limited thereto, and the thickness is 0.1 nm to 0.5 nm, exemplarily 0.15 nm, 0.2 nm, 0.25 nm, 0.3 nm or 0.4 nm, but not limited thereto. The thickness of the GaN post-well protection layer 30c is 0.05 nm to 0.3 nm, exemplarily 0.08 nm, 0.1 nm, 0.15 nm, 0.2 nm or 0.25 nm, but not limited thereto.

[0053] Preferably, in each period, the In composition ratio of the InGaN post-well protection layer 30a decreases along the epitaxial direction. Specifically, in each period of the first sub-layer 510, the In composition ratio of the InGaN post-well protection layer 30a decreases from 0.08 to 0.3 to 0.01 to 0.06; in each period of the second sub-layer 520, the In composition ratio of the InGaN post-well protection layer 30a decreases from 0.1 to 0.39 to 0.01 to 0.08; in each period of the third sub-layer 530, the In composition ratio of the InGaN post-well protection layer 30a decreases from 0.06 to 0.27 to 0.01 to 0.03.

[0054] On both sides of the InGaN quantum well layer 20, a first InGaN pre-well protection layer 10a with an increasing In composition and an InGaN post-well protection layer 30a with a decreasing In composition are respectively provided, which can effectively reduce the lattice mismatch between the InGaN quantum well layer 20 and the quantum barrier layer 40, weaken the compressive strain, improve the radiative recombination efficiency, and improve the light emission efficiency.

[0055] In order to further improve the hole-electron recombination efficiency in the second sub-layer 520, in a preferred embodiment, in the first sub-layer 510, the first InGaN pre-well protection layer 10a and the second InGaN pre-well protection layer 10c are Si-doped InGaN layers, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 , exemplarily 1.5×10 17 cm -3 、2×10 17 cm -3 、3×10 17cm -3 , 4×10 17 cm -3 or 5×10 17 cm -3 , but not limited thereto, the InGaN well back protection layer 30a is a Si-doped InGaN layer, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 , an exemplary value is 1.5×10 17 cm -3 , 2×10 17 cm -3 , 3×10 17 cm -3 , 4×10 17 cm -3 or 5×10 17 cm -3 , but not limited to this;

[0056] In the second sublayer 520, the first InGaN pre-well protection layer 10a and the second InGaN pre-well protection layer 10c are Si-doped InGaN layers, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 , an exemplary value is 1.5×10 17 cm -3 , 2×10 17 cm -3 , 3×10 17 cm -3 , 4×10 17 cm -3 or 5×10 17 cm -3 , but not limited to this;

[0057] In the third sublayer 530, the InGaN well back protection layer 30a is a Mg-doped InGaN layer with a Mg doping concentration of 2.15×10 18 cm -3 ~6.28×10 19 cm -3 , exemplarily 5×10 18 cm -3 , 8×10 18 cm -3 , 1×10 19 cm -3 , 2.5×10 19 cm -3 or 5×10 19cm -3 , but not limited thereto.

[0058] By means of different doping in different sub-layers, the current spreading performance of the material can be significantly improved, and the performance of the product such as light emission uniformity, reliability, and yield can be enhanced. In addition, through the above-mentioned doping, partial electrons and holes can be provided to the light-emitting quantum well region, i.e., the second sub-layer 520, to participate in radiative recombination and luminescence, so as to improve the matching degree of the electron-hole concentration in the light-emitting quantum well region and enhance the optical efficiency of the Micro-LED at a low operating current density.

[0059] In a preferred embodiment, in each period, the Al component ratio of the AlGaN well front protective layer 10b is greater than or equal to the Al component ratio of the AlGaN well rear protective layer 30b, and the barrier height of the AlGaN well front protective layer 10b is greater than or equal to the barrier height of the AlGaN well rear protective layer 30b, which weakens the electron injection efficiency of the N-type semiconductor layer 300 while improving the hole injection efficiency of the P-type semiconductor layer 600, so as to improve the matching degree of the electron-hole concentration in the light-emitting quantum well region.

[0060] In each period, the Al component ratio of the AlGaN well front protective layer 10b in the first sub-layer 510 and the Al component ratio of the AlGaN well front protective layer 10b in the third sub-layer 530 are both greater than or equal to the Al component ratio of the AlGaN well front protective layer 10b in the second sub-layer 520, and the barrier height of the second sub-layer 520 is the lowest, so that electrons and holes can be effectively confined in the second sub-layer 520 for radiative recombination and luminescence, ultimately improving the luminescence efficiency.

[0061] Preferably, in each period, the Al composition ratio of the protective layer 10b in front of the AlGaN well in the first sub-layer 510, the Al composition ratio of the protective layer 30b behind the AlGaN well in the first sub-layer 510, the Al composition ratio of the protective layer 10b in front of the AlGaN well in the third sub-layer 530, the Al composition ratio of the protective layer 30b behind the AlGaN well in the third sub-layer 530, the Al composition ratio of the protective layer 10b in front of the AlGaN well in the second sub-layer 520, and the Al composition ratio of the protective layer 30b behind the AlGaN well in the second sub-layer 520 decrease. Specifically, in the first sub-layer 510, the Al composition ratio of the protective layer 10b in front of the AlGaN well is 0.03 to 0.15, exemplarily 0.05, 0.08, 0.1, 0.12 or 0.14, but not limited thereto, and the Al composition ratio of the protective layer 30b behind the AlGaN well is 0.02 to 0.1, exemplarily 0.03, 0.05, 0.06, 0.07 or 0.08, but not limited thereto; in the second sub-layer 520, the Al composition ratio of the protective layer 10b in front of the AlGaN well is 0.01 to 0.08, exemplarily 0.02, 0.04, 0.05, 0.06 or 0.07, but not limited thereto, and the Al composition ratio of the protective layer 30b behind the AlGaN well is 0.01 to 0.06, exemplarily 0.02, 0.03, 0.035, 0.04 or 0.05, but not limited thereto; in the third sub-layer 530, the Al composition ratio of the protective layer 10b in front of the AlGaN well is 0.02 to 0.1, exemplarily 0.04, 0.05, 0.06, 0.07 or 0.08, but not limited thereto, and the Al composition ratio of the protective layer 30b behind the AlGaN well is 0.01 to 0.08, exemplarily 0.02, 0.04, 0.05, 0.06 or 0.07, but not limited thereto.

[0062] In addition to the above structure, the characteristics of other layered structures of the present invention are as follows:

[0063] The substrate 100 can be one of a sapphire substrate, a SiO2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate.

[0064] The buffer layer 200 can be one or more of an AlN buffer layer, an AlGaN buffer layer, and a GaN buffer layer, and the thickness is 10 nm to 30 nm.

[0065] The N-type semiconductor layer 300 can be an N-type GaN layer, the thickness of the N-type GaN layer is 2 μm to 3 μm, and the Si doping concentration is 1×10 19 cm -3 ~5×10 19 cm -3 .

[0066] The low-temperature stress release layer 400 may include periodically alternating stacked InGaN stress release layers and GaN stress release layers, with the number of alternating growth cycles being 2 to 10. The thickness of the InGaN stress release layer is 1 nm to 3 nm, and the thickness of the GaN stress release layer is 15 nm to 30 nm.

[0067] The P-type semiconductor layer 600 may be a P-type GaN layer with a thickness of 50 nm to 200 nm and a Mg doping concentration of 1×10 19 cm -3 ~5×10 20 cm -3 .

[0068] At low operating current densities in Micro-LEDs, where electron leakage has not yet occurred or is at a very low rate, the electron-blocking layer structure not only fails to block electrons but actually blocks hole injection, reducing the device's radiative recombination efficiency. In the Micro-LED epitaxial wafer of the present invention, the absence of an electron-blocking layer above the multi-quantum well light-emitting layer 500 eliminates the electron-blocking layer's barrier effect on hole injection, significantly improving the hole injection efficiency of the P-type semiconductor layer 600 and the matching of the electron-hole concentrations within the multi-quantum well light-emitting layer 500.

[0069] like Figure 5 As shown, the present invention also discloses a method for preparing a Micro-LED epitaxial wafer, which is used to prepare the above-mentioned Micro-LED epitaxial wafer, comprising the following steps:

[0070] S1. Provide a substrate. In one embodiment, the substrate is a sapphire substrate.

[0071] S2. A buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, and a P-type semiconductor layer are sequentially grown on the substrate. The epitaxial structure may be grown by, but is not limited to, MOCVD, MBE, PVD, or VPE. Specifically, S2 includes the following steps:

[0072] S21. Grow a buffer layer.

[0073] In one embodiment, an AlN buffer layer is grown using PVD. The sapphire substrate, already coated with the AlN buffer layer, is placed in an MOCVD process and pretreated in an H2 atmosphere for 1 to 10 minutes at a temperature of 1000°C to 1200°C. This improves the crystal quality of the AlN buffer layer and the subsequent GaN epitaxial layer.

[0074] S22 , growing an N-type semiconductor layer.

[0075] In one embodiment, an N-type GaN layer is grown by MOCVD. The growth temperature is 1000°C to 1200°C, the growth pressure is 100 Torr to 600 Torr, and an N source, a Ga source, and an N-type doping source are introduced.

[0076] S23. Grow a low-temperature stress release layer.

[0077] In one embodiment, an InGaN stress release layer and a GaN stress release layer are grown by MOCVD in a periodic and alternating manner. The growth temperature is 800°C to 900°C, the growth pressure is 100 Torr to 600 Torr. An N source, a Ga source, and an In source are introduced to grow the InGaN stress release layer, and then an N source and a Ga source are introduced to grow the GaN stress release layer. The growth of the InGaN stress release layer and the GaN stress release layer is repeated in a periodic and laminated manner.

[0078] S24. Grow a multi-quantum well light-emitting layer. Specifically, S24 includes the following steps:

[0079] S241. Grow the first sub-layer.

[0080] In one embodiment, a pre-well protective layer, an InGaN quantum well layer, a post-well protective layer, and a quantum barrier layer are grown by MOCVD in a periodic and alternating manner. The growth temperature is 750°C to 920°C, the growth pressure is 30 Torr to 360 Torr. An N source, a Ga source, and an In source are introduced to grow the first InGaN pre-well protective layer; the growth temperature is 780°C to 920°C, the growth pressure is 30 Torr to 360 Torr, and an N source, a Ga source, and an Al source are introduced to grow the AlGaN pre-well protective layer; the growth temperature is 680°C to 890°C, the growth pressure is 30 Torr to 360 Torr, and an N source, a Ga source, and an In source are introduced to grow the second InGaN pre-well protective layer; the growth temperature is 675°C to 918°C, the growth pressure is 30 Torr to 360 Torr, and an N source, a Ga source, and an In source are introduced to grow the InGaN quantum well layer; the growth temperature is 680°C to 890°C, the growth pressure is 30 Torr to 360 Torr, and an N source, a Ga source, and an In source are introduced to grow the InGaN post-well protective layer; the growth temperature is 780°C to 920°C, the growth pressure is 30 Torr to 360 Torr, and an N source, a Ga source, and an Al source are introduced to grow the AlGaN post-well protective layer; the growth temperature is 800°C to 920°C, the pressure is 30 Torr to 360 Torr, and an N source and a Ga source are introduced to grow the GaN post-well protective layer; the growth temperature is 816°C to 935°C, the growth pressure is 30 Torr to 360 Torr, and an N source and a Ga source are introduced to grow the quantum barrier layer.

[0081] In a preferred embodiment, an N source, a Ga source, an In source, and an N-type doping source are introduced to grow a first protective layer in front of the InGaN well.

[0082] In a preferred embodiment, an N source, a Ga source, an In source, and an N-type doping source are introduced to grow a second protective layer in front of the InGaN well.

[0083] In a preferred embodiment, an N source, a Ga source, an In source, and an N-type doping source are introduced to grow a protective layer behind the InGaN well.

[0084] In a preferred embodiment, an N source, a Ga source, and an N-type doping source are introduced to grow a quantum barrier layer.

[0085] In a preferred embodiment, after the growth of the InGaN quantum well layer, an annealing treatment is performed. The temperature of the annealing treatment is 720 °C to 980 °C, the pressure is 50 torr to 360 torr, the atmosphere is N2 and H2, and the volume ratio of N2 to H2 is 1:(0.2 - 5).

[0086] S242. Grow the second sublayer.

[0087] In an embodiment, the protective layer in front of the well, the InGaN quantum well layer, the protective layer behind the well, and the quantum barrier layer are grown periodically and alternately by MOCVD. The growth temperature is 750 °C to 920 °C, the growth pressure is 30 torr - 360 torr. An N source, a Ga source, and an In source are introduced to grow a first protective layer in front of the InGaN well; the growth temperature is 780 °C to 920 °C, the growth pressure is 30 torr - 360 torr. An N source, a Ga source, and an Al source are introduced to grow an AlGaN protective layer in front of the well; the growth temperature is 680 °C to 890 °C, the growth pressure is 30 torr - 360 torr. An N source, a Ga source, and an In source are introduced to grow a second protective layer in front of the InGaN well; the growth temperature is 675 °C to 918 °C, the growth pressure is 30 torr - 360 torr. An N source, a Ga source, and an In source are introduced to grow the InGaN quantum well layer; the growth temperature is 680 °C to 890 °C, the growth pressure is 30 torr - 360 torr. An N source, a Ga source, and an In source are introduced to grow a protective layer behind the InGaN well; the growth temperature is 780 °C to 920 °C, the growth pressure is 30 torr - 360 torr. An N source, a Ga source, and an Al source are introduced to grow an AlGaN protective layer behind the well; the growth temperature is 800 °C to 920 °C, the pressure is 30 torr - 360 torr. An N source and a Ga source are introduced to grow a GaN protective layer behind the well; the growth temperature is 816 °C to 935 °C, the growth pressure is 30 torr - 360 torr. An N source and a Ga source are introduced to grow the quantum barrier layer.

[0088] In a preferred embodiment, an N source, a Ga source, an In source, and an N-type doping source are introduced to grow a first InGaN well front protection layer.

[0089] In a preferred embodiment, an N source, a Ga source, an In source, and an N-type doping source are introduced to grow a second InGaN well front protection layer.

[0090] S243. Grow the third sub-layer.

[0091] In one embodiment, the well front protection layer, the InGaN quantum well layer, the well rear protection layer, and the quantum barrier layer are grown by MOCVD in a periodic and alternating manner. The growth temperature is 750 °C to 920 °C, the growth pressure is 30 torr to 360 torr. An N source, a Ga source, and an In source are introduced to grow a first InGaN well front protection layer; the growth temperature is 780 °C to 920 °C, the growth pressure is 30 torr to 360 torr. An N source, a Ga source, and an Al source are introduced to grow an AlGaN well front protection layer; the growth temperature is 680 °C to 890 °C, the growth pressure is 30 torr to 360 torr. An N source, a Ga source, and an In source are introduced to grow a second InGaN well front protection layer; the growth temperature is 675 °C to 918 °C, the growth pressure is 30 torr to 360 torr. An N source, a Ga source, and an In source are introduced to grow an InGaN quantum well layer; the growth temperature is 680 °C to 890 °C, the growth pressure is 30 torr to 360 torr. An N source, a Ga source, and an In source are introduced to grow an InGaN well rear protection layer; the growth temperature is 780 °C to 920 °C, the growth pressure is 30 torr to 360 torr. An N source, a Ga source, and an Al source are introduced to grow an AlGaN well rear protection layer; the growth temperature is 800 °C to 920 °C, the pressure is 30 torr to 360 torr. An N source and a Ga source are introduced to grow a GaN well rear protection layer; the growth temperature is 816 °C to 935 °C, the growth pressure is 30 torr to 360 torr. An N source and a Ga source are introduced to grow a quantum barrier layer.

[0092] In a preferred embodiment, an N source, a Ga source, an In source, and a P-type doping source are introduced to grow an InGaN well rear protection layer.

[0093] In a preferred embodiment, an N source, a Ga source, and a P-type doping source are introduced to grow a quantum barrier layer.

[0094] In a preferred embodiment, after the growth of the InGaN quantum well layer is completed, an annealing treatment is performed. The temperature of the annealing treatment is 720 °C to 980 °C, the pressure is 50 torr to 360 torr, the atmosphere is N2 and H2, and the volume ratio of N2 to H2 is 1:(0.2 to 5).

[0095] S25. Grow a P-type semiconductor layer.

[0096] In one embodiment, a P-type GaN layer is grown by MOCVD, with a growth temperature of 800 °C to 980 °C, a growth pressure of 100 Torr to 600 Torr, and an N source, a Ga source, and a P-type doping source are introduced.

[0097] During the MOCVD growth process, the N source can be NH3, the Ga source can be TMGa and / or TEGa, the Al source can be TMAl, the In source can be TMIn, the N-type doping source can be SiH4, and the P-type doping source can be CP2Mg, but not limited thereto.

[0098] The present invention will be further described below with specific examples:

[0099] Example 1

[0100] This example provides a Micro-LED epitaxial wafer, including a substrate, and a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, and a P-type semiconductor layer that are sequentially stacked on the substrate.

[0101] The substrate is a sapphire substrate.

[0102] The buffer layer is an AlN buffer layer with a thickness of 30 nm.

[0103] The N-type semiconductor layer is an N-type GaN layer with a Si doping concentration of 6×10 18 cm -3 , and a thickness of 2.5 μm.

[0104] The low-temperature stress release layer includes periodically alternating InGaN stress release layers and GaN stress release layers, and the number of alternating growth cycles is 6. Among them, the thickness of the InGaN stress release layer is 2 nm, and the thickness of the GaN stress release layer is 16 nm.

[0105] The multi-quantum well light-emitting layer includes a first sub-layer, a second sub-layer, and a third sub-layer that are sequentially stacked.

[0106] The first sub-layer includes periodically alternating pre-well protection layers, InGaN quantum well layers, post-well protection layers, and quantum barrier layers, and the number of alternating stacks is 3.

[0107] The pre-well protection layer includes a first InGaN pre-well protection layer, an AlGaN pre-well protection layer, and a second InGaN pre-well protection layer that are sequentially stacked. The In component ratio of the first InGaN pre-well protection layer is 0.02, the thickness is 0.2 nm, the Al component ratio of the AlGaN pre-well protection layer is 0.1, the thickness is 0.5 nm, and the In component ratio of the second InGaN pre-well protection layer is 0.25, the thickness is 0.5 nm.

[0108] The In composition ratio of the InGaN quantum well layer is 0.15, and the thickness is 3 nm.

[0109] The post-well protective layer includes an InGaN post-well protective layer, an AlGaN post-well protective layer, and a GaN post-well protective layer stacked in sequence. The In composition ratio of the InGaN post-well protective layer is 0.25, the thickness is 0.5 nm, the Al composition ratio of the AlGaN post-well protective layer is 0.05, the thickness is 0.2 nm, and the thickness of the GaN post-well protective layer is 0.2 nm.

[0110] The quantum barrier layer is an Si-doped GaN quantum barrier layer, and the Si doping concentration is 5×10 17 cm -3 , and the thickness is 10 nm.

[0111] The second sub-layer includes a pre-well protective layer, an InGaN quantum well layer, a post-well protective layer, and a quantum barrier layer stacked periodically and alternately, and the number of alternating stacking periods is 6.

[0112] The pre-well protective layer includes a first InGaN pre-well protective layer, an AlGaN pre-well protective layer, and a second InGaN pre-well protective layer stacked in sequence. The In composition ratio of the first InGaN pre-well protective layer is 0.02, the thickness is 0.2 nm, the Al composition ratio of the AlGaN pre-well protective layer is 0.08, the thickness is 0.5 nm, and the In composition ratio of the second InGaN pre-well protective layer is 0.25, and the thickness is 0.5 nm.

[0113] The In composition ratio of the InGaN quantum well layer is 0.3, and the thickness is 3 nm.

[0114] The post-well protective layer includes an InGaN post-well protective layer, an AlGaN post-well protective layer, and a GaN post-well protective layer stacked in sequence. The In composition ratio of the InGaN post-well protective layer is 0.25, the thickness is 0.5 nm, the Al composition ratio of the AlGaN post-well protective layer is 0.03, the thickness is 0.2 nm, and the thickness of the GaN post-well protective layer is 0.2 nm.

[0115] The quantum barrier layer is an unintentionally doped GaN quantum barrier layer, and the thickness is 10 nm.

[0116] The third sub-layer includes a pre-well protective layer, an InGaN quantum well layer, a post-well protective layer, and a quantum barrier layer stacked periodically and alternately, and the number of alternating stacking periods is 2.

[0117] The pre-well protective layer includes a first InGaN pre-well protective layer, an AlGaN pre-well protective layer, and a second InGaN pre-well protective layer that are stacked in sequence. The In composition ratio of the first InGaN pre-well protective layer is 0.02, and its thickness is 0.2 nm. The Al composition ratio of the AlGaN pre-well protective layer is 0.1, and its thickness is 0.5 nm. The In composition ratio of the second InGaN pre-well protective layer is 0.25, and its thickness is 0.5 nm.

[0118] The In composition ratio of the InGaN quantum well layer is 0.12, and its thickness is 3 nm.

[0119] The post-well protective layer includes an InGaN post-well protective layer, an AlGaN post-well protective layer, and a GaN post-well protective layer that are stacked in sequence. The In composition ratio of the InGaN post-well protective layer is 0.25, and its thickness is 0.5 nm. The Al composition ratio of the AlGaN post-well protective layer is 0.05, and its thickness is 0.2 nm. The thickness of the GaN post-well protective layer is 0.2 nm.

[0120] The quantum barrier layer is a Mg-doped GaN quantum barrier layer, and the Mg doping concentration is 5×10 18 cm -3 , and its thickness is 10 nm.

[0121] The P-type semiconductor layer is a P-type GaN layer, and the Mg doping concentration is 3×10 20 cm -3 , and its thickness is 180 nm.

[0122] Example 2

[0123] This example provides a Micro-LED epitaxial wafer, and the difference from Example 1 is that

[0124] In the first sub-layer, the Al composition ratio of the AlGaN pre-well protective layer is 0.15, and the Al composition ratio of the AlGaN post-well protective layer is 0.1.

[0125] In the second sub-layer, the Al composition ratio of the AlGaN pre-well protective layer is 0.08, and the Al composition ratio of the AlGaN post-well protective layer is 0.06.

[0126] In the third sub-layer, the Al composition ratio of the AlGaN pre-well protective layer is 0.1, and the Al composition ratio of the AlGaN post-well protective layer is 0.08.

[0127] The rest are the same as those in Example 1.

[0128] Example 3

[0129] This example provides a Micro-LED epitaxial wafer, and the difference from Example 2 is that

[0130] In each period of the first sub-layer, the In composition ratio of the protective layer in front of the second InGaN well increases from 0.06 to 0.3, and the In composition ratio of the protective layer behind the InGaN well decreases from 0.3 to 0.06.

[0131] In each period of the second sub-layer, the In composition ratio of the protective layer in front of the second InGaN well increases from 0.08 to 0.39, and the In composition ratio of the protective layer behind the InGaN well decreases from 0.39 to 0.08.

[0132] In each period of the third sub-layer, the In composition ratio of the protective layer in front of the second InGaN well increases from 0.03 to 0.27, and the In composition ratio of the protective layer behind the InGaN well decreases from 0.27 to 0.03.

[0133] The rest are the same as those in Example 2.

[0134] Example 4

[0135] This example provides a Micro-LED epitaxial wafer, which is different from that in Example 3 in that

[0136] In the first sub-layer, the protective layer in front of the first InGaN well and the protective layer in front of the second InGaN well are Si-doped InGaN layers with a Si doping concentration of 2×10 17 cm -3 , and the protective layer behind the InGaN well is a Si-doped InGaN layer with a Si doping concentration of 3×10 17 cm -3 .

[0137] In the second sub-layer, the protective layer in front of the first InGaN well and the protective layer in front of the second InGaN well are Si-doped InGaN layers with a Si doping concentration of 5×10 17 cm -3 .

[0138] In the third sub-layer, the protective layer behind the InGaN well is a Mg-doped InGaN layer with a Mg doping concentration of 8×10 18 cm -3 .

[0139] The rest are the same as those in Example 3.

[0140] Example 5

[0141] This embodiment provides a Micro-LED epitaxial wafer, which is different from that of Embodiment 4 in that after the growth of the InGaN quantum well layers in the first sub-layer and the third sub-layer is completed, an annealing treatment is carried out. The temperature of the annealing treatment is 850 °C, the pressure is 120 torr, the atmosphere is N2 and H2, and the volume ratio of N2 to H2 is 1:0.3. The rest are the same as those in Embodiment 4.

[0142] Comparative Example 1

[0143] This comparative example provides a Micro-LED epitaxial wafer, which is different from that of Embodiment 1 in that the multiple quantum well light-emitting layer includes periodically alternating InGaN quantum well layers and GaN quantum barrier layers, and the number of alternating growth cycles is 11. Among them, the In component ratio in the InGaN quantum well layer is 0.3, the thickness is 3 nm, and the thickness of the GaN quantum barrier layer is 10 nm. Correspondingly, the preparation method only includes the preparation of the InGaN quantum well layer and the GaN quantum barrier layer. The rest are the same as those in Embodiment 1.

[0144] Comparative Example 2

[0145] This comparative example provides a Micro-LED epitaxial wafer, which is different from that of Embodiment 1 in that it does not include the first sub-layer and the third sub-layer. Correspondingly, the preparation method also does not include the preparation of the first sub-layer and the third sub-layer. The rest are the same as those in Embodiment 1.

[0146] Comparative Example 3

[0147] This comparative example provides a Micro-LED epitaxial wafer, which is different from that of Embodiment 1 in that it does not include the first sub-layer. Correspondingly, the preparation method also does not include the preparation of the first sub-layer. The rest are the same as those in Embodiment 1.

[0148] Comparative Example 4

[0149] This comparative example provides a Micro-LED epitaxial wafer, which is different from that of Embodiment 1 in that it does not include the third sub-layer. Correspondingly, the preparation method also does not include the preparation of the third sub-layer. The rest are the same as those in Embodiment 1.

[0150] Comparative Example 5

[0151] This comparative example provides a Micro-LED epitaxial wafer, which is different from that of Embodiment 1 in that the first sub-layer, the second sub-layer, and the third sub-layer do not include a pre-well protective layer. Correspondingly, the preparation method also does not include the preparation of the pre-well protective layer. The rest are the same as those in Embodiment 1.

[0152] Comparative Example 6

[0153] This comparative example provides a Micro-LED epitaxial wafer, which is different from that of Example 1 in that the first sub-layer, the second sub-layer, and the third sub-layer do not include a post-well protective layer. Correspondingly, the preparation method also does not include the preparation of the post-well protective layer. The rest are the same as those in Example 1.

[0154] The Micro-LED epitaxial wafers prepared in Examples 1 to 5 and Comparative Examples 1 to 6 were made into 20μm×20μm Micro-LED chips. On the same LED tester, at a current density of 0.1A / cm 2 , the test was carried out, and the luminous intensity improvement of Examples 1 to 5 and Comparative Examples 2 to 6 compared with Comparative Example 1 was calculated. The detection results are shown in the following table.

[0155]

[0156] As can be seen from the above table, the Micro-LED epitaxial wafer provided by the embodiment of the present invention can effectively improve the luminous efficiency of the chip.

[0157] The above are the preferred embodiments of the invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements are also regarded as the protection scope of the present invention.

Claims

1. A Micro-LED epitaxial wafer, characterized in that, It includes a substrate, and a buffer layer, an N-type semiconductor layer, a low-temperature stress relief layer, a multi-quantum well light-emitting layer, and a P-type semiconductor layer that are sequentially stacked on the substrate; the multi-quantum well light-emitting layer includes a first sub-layer, a second sub-layer, and a third sub-layer that are sequentially stacked, and the first sub-layer, the second sub-layer, and the third sub-layer all include a pre-well protection layer, an InGaN quantum well layer, a post-well protection layer, and a quantum barrier layer that are periodically and alternately stacked; The In composition ratio of the InGaN quantum well layer in the first sub-layer and the In composition ratio of the InGaN quantum well layer in the third sub-layer are both less than the In composition ratio of the InGaN quantum well layer in the second sub-layer; the pre-well protection layer includes a first InGaN pre-well protection layer, an AlGaN pre-well protection layer, and a second InGaN pre-well protection layer that are sequentially stacked, and the post-well protection layer includes an InGaN post-well protection layer, an AlGaN post-well protection layer, and a GaN post-well protection layer that are sequentially stacked.

2. The Micro-LED epitaxial wafer according to claim 1, wherein The In composition ratio of the first InGaN pre-well protection layer is 0.01 to 0.03, and the thickness is 0.05 nm to 0.3 nm; The Al composition ratio of the AlGaN pre-well protection layer is 0.01 to 0.15, and the thickness is 0.1 nm to 0.5 nm; The In composition ratio of the second InGaN pre-well protection layer is 0.01 to 0.39, and the thickness is 0.1 nm to 0.8 nm, and in each period, the In composition ratio of the second InGaN pre-well protection layer increases along the epitaxial direction; The In composition ratio of the InGaN post-well protection layer is 0.01 to 0.39, and the thickness is 0.1 nm to 0.6 nm, and in each period, the In composition ratio of the InGaN post-well protection layer decreases along the epitaxial direction; The Al composition ratio of the AlGaN post-well protection layer is 0.01 to 0.1, and the thickness is 0.1 nm to 0.5 nm; The thickness of the GaN post-well protection layer is 0.05 nm to 0.3 nm.

3. The Micro-LED epitaxial wafer according to claim 1, characterized in that, In the first sub-layer, the first InGaN well front protective layer and the second InGaN well front protective layer are Si-doped InGaN layers, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 , the InGaN well back protective layer in the first sub-layer is a Si-doped InGaN layer, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 ; In the second sublayer, the first InGaN well front protection layer and the second InGaN well front protection layer are Si-doped InGaN layers, and the Si doping concentration is 1.18×10 17 cm -3 ~6.75×10 17 cm -3 ; In the third sublayer, the protective layer behind the InGaN well is a Mg-doped InGaN layer, and the Mg doping concentration is 2.15×10 18 cm -3 ~6.28×10 19 cm -3 .

4. The Micro-LED epitaxial wafer according to claim 1, wherein In each period, the Al composition ratio of the AlGaN pre-well protection layer is greater than or equal to the Al composition ratio of the AlGaN post-well protection layer; In each period, the Al composition ratio of the AlGaN pre-well protection layer in the first sub-layer and the Al composition ratio of the AlGaN pre-well protection layer in the third sub-layer are both greater than or equal to the Al composition ratio of the AlGaN pre-well protection layer in the second sub-layer.

5. The Micro-LED epitaxial wafer according to claim 4, wherein In each period, the Al composition ratio of the AlGaN pre-well protection layer in the first sub-layer, the Al composition ratio of the AlGaN post-well protection layer in the first sub-layer, the Al composition ratio of the AlGaN pre-well protection layer in the third sub-layer, the Al composition ratio of the AlGaN post-well protection layer in the third sub-layer, the Al composition ratio of the AlGaN pre-well protection layer in the second sub-layer, and the Al composition ratio of the AlGaN post-well protection layer in the second sub-layer decrease; In the first sub-layer, the Al composition ratio of the AlGaN pre-well protection layer is 0.03 to 0.15, and the Al composition ratio of the AlGaN post-well protection layer is 0.02 to 0.1; In the second sub-layer, the Al composition ratio of the protective layer in front of the AlGaN well is 0.01 to 0.08, and the Al composition ratio of the protective layer behind the AlGaN well is 0.01 to 0.06; In the third sub-layer, the Al composition ratio of the protective layer in front of the AlGaN well is 0.02 to 0.1, and the Al composition ratio of the protective layer behind the AlGaN well is 0.01 to 0.

08.

6. The Micro-LED epitaxial wafer according to claim 2, wherein, In each period of the first sub-layer, the In composition ratio of the protective layer in front of the second InGaN well increases from 0.01 to 0.06 to 0.08 to 0.3, and the In composition ratio of the protective layer behind the InGaN well decreases from 0.08 to 0.3 to 0.01 to 0.06; In each period of the second sub-layer, the In composition ratio of the protective layer in front of the second InGaN well increases from 0.01 to 0.08 to 0.1 to 0.39, and the In composition ratio of the protective layer behind the InGaN well decreases from 0.1 to 0.39 to 0.01 to 0.08; In each period of the third sub-layer, the In composition ratio of the protective layer in front of the second InGaN well increases from 0.01 to 0.03 to 0.06 to 0.27, and the In composition ratio of the protective layer behind the InGaN well decreases from 0.06 to 0.27 to 0.01 to 0.

03.

7. The Micro-LED epitaxial wafer according to claim 1, wherein The number of periods of the alternately stacked first sub-layer is 2 to 5; in the first sub-layer, the In component ratio of the InGaN quantum well layer is 0.08 to 0.3, the thickness is 2.15 nm to 4.5 nm, and the quantum barrier layer is a Si-doped GaN quantum barrier layer with a Si doping concentration of 2.15×10 17 cm -3 ~8.76×10 17 cm -3 , and the thickness is 6 nm to 15 nm; The number of periods of the alternating stacking of the second sub-layer is 2 to 8; in the second sub-layer, the In composition ratio of the InGaN quantum well layer is 0.1 to 0.39, the thickness is 2.15 nm to 4.5 nm, the quantum barrier layer is an unintentionally doped GaN quantum barrier layer, and the thickness is 6 nm to 15 nm; The number of periods of the alternately stacked third sub-layer is 1 to 3; in the third sub-layer, the In composition ratio of the InGaN quantum well layer is 0.06 to 0.27, the thickness is 2.15 nm to 4.5 nm, the quantum barrier layer is a Mg-doped GaN quantum barrier layer, and the Mg doping concentration is 2.15×10 18 cm -3 ~6.28×10 19 cm -3 , and the thickness is 6 nm to 15 nm.

8. A method for preparing a Micro-LED epitaxial wafer for preparing the Micro-LED epitaxial wafer according to any one of claims 1 to 7, characterized in that, Including the following steps: Providing a substrate, and sequentially growing a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, and a P-type semiconductor layer on the substrate; the multi-quantum well light-emitting layer includes a first sub-layer, a second sub-layer, and a third sub-layer that are sequentially stacked, and the first sub-layer, the second sub-layer, and the third sub-layer all include a protective layer in front of the well, an InGaN quantum well layer, a protective layer behind the well, and a quantum barrier layer that are periodically and alternately stacked; The In composition ratio of the InGaN quantum well layer in the first sub-layer and the In composition ratio of the InGaN quantum well layer in the third sub-layer are both less than the In composition ratio of the InGaN quantum well layer in the second sub-layer; the protective layer in front of the well includes a first InGaN protective layer in front of the well, an AlGaN protective layer in front of the well, and a second InGaN protective layer in front of the well, and the protective layer behind the well includes an InGaN protective layer behind the well, an AlGaN protective layer behind the well, and a GaN protective layer behind the well.

9. The method for preparing the Micro-LED epitaxial wafer according to claim 8, characterized in that, After the growth of the InGaN quantum well layer in the first sub-layer and the InGaN quantum well layer in the third sub-layer is completed, annealing treatment is performed. The temperature of the annealing treatment is 720 °C to 980 °C, the pressure is 50 torr to 360 torr, the atmosphere is N2 and H2, and the volume ratio of N2 and H2 is 1:(0.2 to 5).

10. The method for preparing a Micro-LED epitaxial wafer according to claim 8, characterized in that, The growth temperature of the first InGaN pre-well protective layer is 750°C to 920°C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the AlGaN pre-well protective layer is 780°C to 920°C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the second InGaN pre-well protective layer is 680°C to 890°C, and the pressure is 30 torr to 360 torr; The growth temperature of the InGaN post-well protective layer is 680°C to 890°C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the AlGaN post-well protective layer is 780°C to 920°C, and the growth pressure is 30 torr to 360 torr; the growth temperature of the GaN post-well protective layer is 800°C to 920°C, and the pressure is 30 torr to 360 torr.

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