CMOS temperature sensor
Through the temperature sensing front-end circuit and dual comparator technology designed by CMOS devices, the problem of insufficient accuracy of existing temperature sensors is solved, and high-precision temperature measurement and resolution are achieved, which is suitable for on-chip thermal management.
Patent Information
- Application Number
- CN202510506732.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-22
- Publication Date
- 2025-08-01
AI Technical Summary
The existing BJT and resistors are insufficient in terms of accuracy as temperature sensors for temperature sensing devices.
The temperature sensing front-end circuit is designed using CMOS devices, including a reference bias unit and a bootstrap unit. Through the temperature proportional and inverse conversion unit, combined with dual comparator technology and control logic readout circuit, high-precision conversion of temperature signals is achieved.
Improves the accuracy and resolution of temperature measurements, suitable for on-chip thermal management and low-power environments.
Smart Images
Figure CN120403887A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of electronic circuits, and particularly to a CMOS temperature sensor. Background Art
[0002] Temperature sensors play an important role in on-chip thermal management, environmental temperature monitoring, biomedical devices, etc. In recent years, with the development of artificial intelligence, the role of temperature sensors in thermal management of processors or memories has become increasingly important.
[0003] In related technologies, BJTs and resistors are usually used as temperature-sensing devices of temperature sensors, but temperature sensors based on these temperature-sensing devices have certain problems in terms of accuracy. Therefore, there are still technical problems to be solved in related technologies. Summary of the Invention
[0004] An object of the present application is to solve at least to some extent one of the technical problems existing in the prior art.
[0005] To this end, an object of an embodiment of the present application is to provide a CMOS temperature sensor, and this solution can improve the temperature measurement accuracy.
[0006] To achieve the above technical purpose, the technical solution adopted in the embodiment of the present application includes: a temperature sensor, including: a temperature-sensing front-end circuit, a first conversion circuit, and a second conversion circuit; the temperature-sensing front-end circuit is connected to the first conversion circuit; the first conversion circuit is connected to the second conversion circuit; the temperature-sensing front-end circuit is configured to generate a bias voltage based on a temperature signal; the first conversion circuit is configured to convert the bias voltage into a clock signal, and the second conversion circuit is configured to convert the clock signal into a digital signal; the digital signal is used to characterize the temperature measured by the temperature-sensing front-end circuit; wherein the temperature-sensing front-end circuit includes a temperature-sensing element and a plurality of field-effect transistors; the temperature-sensing element and the plurality of field-effect transistors are all CMOS devices.
[0007] In addition, for a temperature sensor according to the above embodiment of the present invention, the following additional technical features may further be included:
[0008] Further, in the embodiment of the present application, the temperature-sensing front-end circuit includes a reference bias unit and a bootstrap unit; the reference bias unit and the bootstrap unit are connected to the first conversion circuit.
[0009] Further, in the embodiment of the present application, the bootstrap unit includes:
[0010] A constant current source, a first transistor, a second transistor, a first capacitor, a first switching device, a seventh inverter, and a second switching device; both the first transistor and the second transistor are CMOS transistors;
[0011] One end of the constant current source is grounded; the drain of the first transistor, the gate of the first transistor, and the gate of the second transistor are connected to the other end of the constant current source; the source of the first transistor and the source of the second transistor are both connected to a first power supply; one end of the first capacitor, the first end of the first switching device, and the first end of the second switching device are connected to the drain of the second transistor; the second end of the first switching device, the second end of the second switching device, and the other end of the first capacitor are all grounded; the drain of the second transistor is connected to the first input terminal of the first conversion circuit; one end of the seventh inverter is connected to the first conversion circuit; the other end of the seventh inverter is connected to the third end of the first switching device; the third end of the first switching device is used to control whether the second end and the first end of the first switching device are conductively connected to each other according to the second output signal of the first conversion circuit.
[0012] Further, in the embodiment of the present application, the reference bias unit includes a temperature proportional conversion unit and a temperature inverse conversion unit:
[0013] The temperature proportional conversion unit and the temperature inverse conversion unit are connected to the first conversion circuit; both the temperature proportional conversion unit and the temperature inverse conversion unit include a bootstrap reference unit; the bootstrap reference unit includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a fifth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, and a twelfth MOS transistor;
[0014] The gate of the tenth MOS transistor, the gate of the eleventh MOS transistor, the gate of the twelfth MOS transistor, and the drain of the eleventh MOS transistor are connected to the drain of the fourth MOS transistor;
[0015] The source of the tenth MOS transistor, the source of the eleventh MOS transistor, and the source of the twelfth MOS transistor are connected to a first power supply;
[0016] The gate of the fourth MOS transistor, the gate of the fifth MOS transistor, and the drain of the fifth MOS transistor are connected to the drain of the twelfth MOS transistor;
[0017] The source of the first MOS transistor and the source of the fourth MOS transistor are connected to the drain of the second MOS transistor;
[0018] The source of the second MOS transistor, the source of the fifth MOS transistor are connected to the drain of the third MOS transistor; the source of the third MOS transistor is grounded;
[0019] The gate of the first MOS transistor, the gate of the second MOS transistor, the gate of the third MOS transistor, and the drain of the first MOS transistor are connected to the drain of the tenth MOS transistor.
[0020] Further, in the embodiment of the present application, the temperature proportional conversion unit further includes:
[0021] A seventh MOS transistor, an eighth MOS transistor, a ninth MOS transistor, and a thirteenth MOS transistor;
[0022] The source of the thirteenth MOS transistor and the source of the seventh MOS transistor are connected to the first power supply; the gate of the thirteenth MOS transistor is connected to the gate of the twelfth MOS transistor;
[0023] The drain of the seventh MOS transistor, the gate of the seventh MOS transistor are connected to the drain of the seventh MOS transistor; the drain of the seventh MOS transistor serves as the output terminal of the temperature proportional conversion unit;
[0024] The drain of the thirteenth MOS transistor, the drain of the eighth MOS transistor, the gate of the eighth MOS transistor, and the gate of the ninth MOS transistor are connected to the drain of the ninth MOS transistor;
[0025] The source of the eighth MOS transistor and the source of the ninth MOS transistor are both grounded; wherein the seventh MOS transistor is the temperature sensing element.
[0026] Further, in the embodiment of the present application, the temperature inverse conversion unit further includes:
[0027] A sixth MOS transistor and a fourteenth MOS transistor; the source of the fourteenth MOS transistor is connected to the first power supply; the gate of the fourteenth MOS transistor is connected to the gate of the twelfth MOS transistor; the gate and the drain of the sixth MOS transistor are connected to the drain of the fourteenth MOS transistor; the drain of the sixth MOS transistor serves as the output terminal of the temperature inverse conversion unit; the source of the sixth MOS transistor is grounded; wherein the sixth MOS transistor is the temperature sensing element.
[0028] Further, in the embodiment of the present application, the first conversion circuit includes:
[0029] A first comparator, a second comparator, and an exclusive-OR gate. The output terminal of the first comparator is connected to the first input terminal of the exclusive-OR gate; the output terminal of the second comparator is connected to the second input terminal of the exclusive-OR gate; the first input terminal of the first comparator is connected to a bootstrap unit; the second input terminal of the first comparator is connected to a temperature proportional conversion unit; the first input terminal of the second comparator is connected to the bootstrap unit; the second input terminal of the second comparator is connected to a temperature inverse conversion unit.
[0030] Further, in the embodiment of the present application, the second conversion circuit includes:
[0031] A first AND gate, a second AND gate, a third AND gate, a fourth AND gate, a fifth AND gate, a sixth AND gate, a first inverter, a first counter, and a second counter;
[0032] The first input terminal of the first AND gate is connected to the output terminal of the first conversion circuit; the second input terminal of the first AND gate is connected to the output terminal of the first inverter; the output terminal of the first AND gate is connected to the first input terminal of the first counter; the second input terminal of the first counter is connected to a first reset signal; the first input terminal of the second AND gate is connected to the first output terminal of the first counter, the second input terminal of the second AND gate is connected to the second output terminal of the first counter, and the third input terminal of the second AND gate is connected to the third output terminal of the first counter; the first input terminal of the third AND gate is connected to the fourth output terminal of the first counter, the second input terminal of the third AND gate is connected to the fifth output terminal of the first counter, and the third input terminal of the third AND gate is connected to the sixth output terminal of the first counter; the first input terminal of the fourth AND gate is connected to the seventh output terminal of the first counter, the second input terminal of the fourth AND gate is connected to the eighth output terminal of the first counter, and the third input terminal of the fourth AND gate is connected to the ninth output terminal of the first counter; the output terminal of the second AND gate is connected to the first input terminal of the fifth AND gate, the output terminal of the third AND gate is connected to the second input terminal of the fifth AND gate, and the output terminal of the fourth AND gate is connected to the third input terminal of the fifth AND gate; the output terminal of the fifth AND gate is connected to the input terminal of the first inverter;
[0033] The first input terminal of the sixth AND gate is connected to the output terminal of the first conversion circuit; the second input terminal of the sixth AND gate is connected to the input terminal of the first inverter, and the third input terminal of the sixth AND gate is connected to an oscillator circuit; the output terminal of the sixth AND gate is connected to the first input terminal of the second counter; the second terminal of the second counter is connected to the first reset signal; the output terminal of the second counter serves as the output terminal of the second conversion circuit.
[0034] Further, in the embodiment of the present application, the oscillator circuit includes:
[0035] a second inverter, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a second capacitor, a third capacitor, a fourteenth MOS transistor, a fifteenth MOS transistor, a sixteenth MOS transistor, a seventeenth MOS transistor, a first constant current source, and a second constant current source;
[0036] One end of the second constant current source, the source of the fourteenth MOS transistor, and the source of the sixteenth MOS transistor are connected to a first power supply; the gates of the fourteenth MOS transistor and the fifteenth MOS transistor serve as the output terminals of the oscillator circuit; the source of the fifteenth MOS transistor, the source of the seventeenth MOS transistor, the first end of the second capacitor, and the first end of the third capacitor are all grounded; the drain of the fourteenth MOS transistor, the other end of the first constant current source, and the second end of the second capacitor are connected to the input terminal of the second inverter; the drain of the fifteenth MOS transistor, the other end of the second constant current source, and the second end of the third capacitor are connected to the input terminal of the fourth inverter; the output terminal of the second inverter is connected to the input terminal of the third inverter; the output terminal of the fourth inverter is connected to the input terminal of the fifth inverter; the output terminal of the third inverter is connected to the gate of the sixteenth MOS transistor; the output terminal of the fifth inverter is connected to the gate of the seventeenth MOS transistor; the input terminal of the sixth inverter, the drain of the sixteenth MOS transistor, and the drain of the seventeenth MOS transistor are connected; the output terminal of the sixth inverter serves as the output terminal of the oscillator circuit.
[0037] Further, in the embodiment of the present application, the fourteenth MOS transistor, the fifteenth MOS transistor, the sixteenth MOS transistor, and the seventeenth MOS transistor are all CMOS transistors. [[ID=?]] [[ID=?]]
[0038] The advantages and beneficial effects of the present application will be partially given in the following description, partially will become apparent from the following description, or will be understood through the practice of the present application:
[0039] The present application can set the temperature sensing element of the temperature sensing front-end circuit and several field effect transistors as CMOS devices, thereby overall reducing the use of BJTs and resistors, and CMOS has better temperature response efficiency than BJTs and resistors, so as to improve the overall test accuracy of the temperature sensor. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 is a schematic structural diagram of a temperature sensor in a specific embodiment of the present invention;
[0041] Figure 2 It should be noted that there seem to be some incorrect or incomplete tag numbers in your original text (such as the "?" in [[ID=?]]), which may need to be further checked and corrected in the original source.Schematic diagram of the temperature proportional conversion unit in a specific embodiment of the present invention;
[0042] Figure 3 Schematic diagram of the oscillator circuit in a specific embodiment of the present invention;
[0043] Figure 4 Schematic diagram of the temperature inverse conversion unit in a specific embodiment of the present invention. Detailed implementation manners
[0044] The following describes in detail the embodiments of the present invention with reference to the accompanying drawings. The principles and processes of the CMOS temperature sensor in the embodiments of the present invention are described as follows.
[0045] This application provides a temperature sensor, which may include: a temperature sensing front-end circuit, a first conversion circuit, and a second conversion circuit;
[0046] The temperature sensing front-end circuit may be connected to the first conversion circuit; the first conversion circuit may be connected to the second conversion circuit; the temperature sensing front-end circuit is configured to generate a bias voltage based on a temperature signal; the first conversion circuit is configured to convert the bias voltage into a clock signal, and the second conversion circuit is configured to convert the clock signal into a digital signal; the digital signal is used to represent the temperature measured by the temperature sensing front-end circuit; wherein the temperature sensing front-end circuit may include a temperature sensing element and several field effect transistors; the temperature sensing element and several field effect transistors are all CMOS devices.
[0047] Refer to Figure 1 The temperature sensing front-end circuit may include a reference bias unit and a bootstrap unit; the reference bias unit and the bootstrap unit may be connected to the first conversion circuit. The bootstrap unit may include: a constant current source CU1, a first transistor T1, a second transistor T2, a first capacitor CL, a first switching device Reset Switch, a seventh inverter IN7, and a second switching device Start Switch; both the first transistor T1 and the second transistor T2 are CMOS transistors.
[0048] Refer to Figure 1, one end of the constant current source CU1 is grounded; the drain of the first transistor T1, the gate of the first transistor T1, and the gate of the second transistor T2 can be connected to the other end of the constant current source CU1; the source of the first transistor T1 and the source of the second transistor T2 can both be connected to the first power supply VDD; one end of the first capacitor CL, the first end of the first switching device ResetSwitch, and the first end of the second switching device StartSwitch can be connected to the drain of the second transistor T2; the second end of the first switching device ResetSwitch, the second end of the second switching device StartSwitch, and the other end of the first capacitor CL are all grounded; the drain of the second transistor T2 can be connected to the first input terminal of the first conversion circuit; one end of the seventh inverter IN7 can be connected to the first conversion circuit; the other end of the seventh inverter IN7 can be connected to the third end of the first switching device ResetSwitch; the third end of the first switching device ResetSwitch is used to control whether the second end and the first end of the first switching device ResetSwitch are electrically connected according to the second output signal of the first conversion circuit.
[0049] Referring to Figure 2 and Figure 4 , the reference bias unit may include a temperature-proportional conversion unit and a temperature-inverse conversion unit; the temperature-proportional conversion unit and the temperature-inverse conversion unit can be connected to the first conversion circuit; the temperature-proportional conversion unit and the temperature-inverse conversion unit can both include a bootstrap reference unit; the bootstrap reference unit may include a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a tenth MOS transistor M 10 , an eleventh MOS transistor M 11 and a twelfth MOS transistor M 12 .
[0050] The gate of the tenth MOS transistor M 10 , the gate of the eleventh MOS transistor M 11 , the gate of the twelfth MOS transistor M 12 and the drain of the eleventh MOS transistor M 11 can be connected to the drain of the fourth MOS transistor M4;
[0051] The source of the tenth MOS transistor M 10 , the source of the eleventh MOS transistor M 11 , the source of the twelfth MOS transistor M 12 can be connected to the first power supply VDD;
[0052] The gates of the fourth MOS transistor M4, the gates of the fifth MOS transistor M5, and the drain of the fifth MOS transistor M5 can be connected to the drain of the twelfth MOS transistor M 12 ;
[0053] The source of the first MOS transistor M1 and the source of the fourth MOS transistor M4 can be connected to the drain of the second MOS transistor M2;
[0054] The source of the second MOS transistor M2 and the source of the fifth MOS transistor M5 can be connected to the drain of the third MOS transistor M3; the source of the third MOS transistor M3 is grounded;
[0055] The gates of the first MOS transistor M1, the gates of the second MOS transistor M2, the gates of the third MOS transistor M3, and the drain of the first MOS transistor M1 can be connected to the drain of the tenth MOS transistor M 10 ;
[0056] In some feasible embodiments of the present application, referring to Figure 2 , the temperature proportional conversion unit may further include:
[0057] The seventh MOS transistor M7, the eighth MOS transistor M8, the ninth MOS transistor M9, and the thirteenth MOS transistor M 13 ;
[0058] The source of the thirteenth MOS transistor M 13 and the source of the seventh MOS transistor M7 can be connected to the first power supply VDD; the gate of the thirteenth MOS transistor M 13 can be connected to the gate of the twelfth MOS transistor M 12 ;
[0059] The drain of the seventh MOS transistor M7, the gate of the seventh MOS transistor M7 can be connected to the drain of the seventh MOS transistor M7; the drain of the seventh MOS transistor M7 serves as the output terminal of the temperature proportional conversion unit;
[0060] The drain of the thirteenth MOS transistor M 13 , the drain of the eighth MOS transistor M8, the gate of the eighth MOS transistor M8, and the gate of the ninth MOS transistor M9 are connected to the drain of the ninth MOS transistor M9;
[0061] The source of the eighth MOS transistor M8 and the source of the ninth MOS transistor M9 are both grounded; wherein the seventh MOS transistor M7 is a temperature sensing element.
[0062] In some feasible embodiments of the present application, referring to Figure 4 , the temperature inverse conversion unit may further include:
[0063] The sixth MOS transistor M6 and the fourteenth MOS transistor M 14 ; the source of the fourteenth MOS transistor M14 The source of 14 can be connected to the gate of the twelfth MOS transistor M 12 ; the gate of the sixth MOS transistor M6 and the drain of the sixth MOS transistor M6 can be connected to the drain of the fourteenth MOS transistor M 14 ; the drain of the sixth MOS transistor M6 serves as the output terminal of the temperature inversely proportional conversion unit; the source of the sixth MOS transistor M6 is grounded; wherein the sixth MOS transistor M6 is a temperature sensing element.
[0064] Refer to Figure 1 , in some possible embodiments of the present application, the first conversion circuit may include:
[0065] [[ID=(15)]]A first comparator COMP1, a second comparator COMP2, and an exclusive - OR gate OX1. The output terminal of the first comparator COMP1 can be connected to the first input terminal of the exclusive - OR gate OX1; the output terminal of the second comparator COMP2 can be connected to the second input terminal of the exclusive - OR gate OX1; the first input terminal of the first comparator COMP1 can be connected to a bootstrap unit; the second input terminal of the first comparator COMP1 can be connected to a temperature directly proportional conversion unit; the first input terminal of the second comparator COMP2 can be connected to the bootstrap unit; the second input terminal of the second comparator COMP2 can be connected to a temperature inversely proportional conversion unit.
[0066] Refer to Figure 1 , in some possible embodiments of the present application, the second conversion circuit may include:
[0067] A first AND gate AND1, a second AND gate AND2, a third AND gate AND3, a fourth AND gate AND4, a fifth AND gate AND5, a sixth AND gate AND6, a first inverter IN1, a first counter Counter1, and a second counter Counter2;
[0068] Note: There is a numbering error in the original text, the number in should be 15 instead of (15). This is corrected in the translation for better understanding of the text structure.The first input terminal of the first AND gate AND1 can be connected to the output terminal of the first conversion circuit; the second input terminal of the first AND gate AND1 can be connected to the output terminal of the first inverter IN1; the output terminal of the first AND gate AND1 can be connected to the first input terminal of the first counter Counter1; the second input terminal of the first counter Counter1 can be connected to the first reset signal; the first input terminal of the second AND gate AND2 can be connected to the first output terminal of the first counter Counter1, the second input terminal of the second AND gate AND2 can be connected to the second output terminal of the first counter Counter1, and the third input terminal of the second AND gate AND2 can be connected to the third output terminal of the first counter Counter1; the first input terminal of the third AND gate AND3 can be connected to the fourth output terminal of the first counter Counter1, the second input terminal of the third AND gate AND3 can be connected to the fifth output terminal of the first counter Counter1, and the third input terminal of the third AND gate AND3 can be connected to the sixth output terminal of the first counter Counter1; the first input terminal of the fourth AND gate AND4 can be connected to the seventh output terminal of the first counter Counter1, the second input terminal of the fourth AND gate AND4 can be connected to the eighth output terminal of the first counter Counter1, and the third input terminal of the fourth AND gate AND4 can be connected to the ninth output terminal of the first counter Counter1; the output terminal of the second AND gate AND2 can be connected to the first input terminal of the fifth AND gate AND5, the output terminal of the third AND gate AND3 can be connected to the second input terminal of the fifth AND gate AND5, and the output terminal of the fourth AND gate AND4 can be connected to the third input terminal of the fifth AND gate AND5; the output terminal of the fifth AND gate AND5 can be connected to the input terminal of the first inverter IN1;
[0069] The first input terminal of the sixth AND gate AND6 can be connected to the output terminal of the first conversion circuit; the second input terminal of the sixth AND gate AND6 can be connected to the input terminal of the first inverter IN1, and the third input terminal of the sixth AND gate AND6 can be connected to the oscillator circuit; the output terminal of the sixth AND gate AND6 can be connected to the first input terminal of the second counter Counter2; the second terminal of the second counter Counter2 can be connected to the first reset signal; the output terminal of the second counter Counter2 serves as the output terminal of the second conversion circuit.
[0070] In some feasible embodiments of the present application, referring to Figure 3 , the oscillator circuit may include:
[0071] The second inverter IN2, the third inverter IN3, the fourth inverter IN4, the fifth inverter IN5, the sixth inverter IN6, the second capacitor C1, the third capacitor C2, the fourteenth MOS transistor M 14 , the fifteenth MOS transistor M15 and the sixteenth MOS transistor M 16 and the seventeenth MOS transistor M 17 , a first constant current source CU2, and a second constant current source CU3;
[0072] One end of the second constant current source CU3, the source electrode of the fourteenth MOS transistor M 14 and the source electrode of the sixteenth MOS transistor M 16 can be connected to the first power supply VDD; the source electrode of the fourteenth MOS transistor M 14 and the fifteenth MOS transistor M 15 serve as the output terminal of the oscillator circuit; the source electrode of the fifteenth MOS transistor M 15 , the source electrode of the seventeenth MOS transistor M 17 , the first end of the second capacitor C1, and the first end of the third capacitor C2 are all grounded; the drain electrode of the fourteenth MOS transistor M 14 , the other end of the first constant current source CU2, and the second end of the second capacitor C1 can be connected to the input terminal of the first inverter IN1; the drain electrode of the fifteenth MOS transistor M 15 , the other end of the second constant current source CU3, and the second end of the third capacitor C2 can be connected to the input terminal of the fourth inverter IN4; the output terminal of the second inverter IN2 can be connected to the input terminal of the third inverter IN3; the output terminal of the fourth inverter IN4 can be connected to the input terminal of the fifth inverter IN5; the output terminal of the third inverter IN3 can be connected to the gate of the sixteenth MOS transistor M 16 ; the output terminal of the fifth inverter IN5 can be connected to the gate of the seventeenth MOS transistor M 17 ; the input terminal of the sixth inverter IN6, the drain electrode of the sixteenth MOS transistor M 16 can be connected to the drain electrode of the seventeenth MOS transistor M 17 ; the output terminal of the sixth inverter IN6 serves as the output terminal of the oscillator circuit. Among them, the fifteenth MOS transistor M 15 , the sixteenth MOS transistor M 16 , and the seventeenth MOS transistor M 17 are all CMOS transistors.
[0073] The principle of the temperature sensor is described below:
[0074] Referring to Figures 1 - 4 , under the same bias current, the relationship between the base-emitter voltage and the collector current of a PNP BJT is:
[0075]
[0076] When the MOS transistor is biased in the subthreshold region, the relationship between the corresponding gate-source voltage and the drain current is:
[0077]
[0078] Observing the formula, it can be seen that when using NMOS as the temperature-sensing element, V GS contains two negative-slope terms and has good negative temperature characteristics. Comparing the two, it can be seen that changing the bias current will affect their linearity and sensitivity. By reasonably designing the bias circuit, the linearity and sensitivity of V GS can be enhanced to achieve a negative-slope characteristic similar to that of the BJT type.
[0079] As Figure 4 shown in the voltage generation circuit inversely proportional to temperature, the gate-source voltage of M6 is
[0080]
[0081] where,
[0082]
[0083] Due to the current replication effect of the current mirror, the drain-source current of M1 biased in the saturation region is:
[0084]
[0085] Substituting into the gate-source voltage formula of M6, we get
[0086]
[0087] where,
[0088]
[0089] According to the gates of M4 and M5 being connected and combining their subthreshold current formulas, we obtain
[0090]
[0091] where From the circuit diagram, it can be seen that I M2 = 2I M1 , V S5 = V S4 - V DS2 . Combining the current formulas of M1 and M4, we can obtain
[0092]
[0093] where
[0094] Assuming V G - V S4 - V TH = y, V DS2 = x, The above formula can be simplified to:
[0095]
[0096] According to the quadratic formula, we can get:
[0097]
[0098] Since A > 0, so
[0099]
[0100] Therefore, the introduced temperature-related term is:
[0101]
[0102] Because in the formula, V DS6 is a linear function of V T , the quadratic term related to temperature in the formula can be canceled out.
[0103] Assume V DS6 = BV T ,
[0104] So it can be simplified to
[0105]
[0106] where
[0107]
[0108] After proof, the designed voltage inversely proportional to temperature has good linearity.
[0109] The generation of the voltage proportional to temperature uses the same bias circuit, but the temperature-sensitive element is a PMOS transistor. The PMOS transistor is biased in the subthreshold region, and the corresponding voltage-current relationship is:
[0110]
[0111] And
[0112] V SG = V DD - V P
[0113] So we get
[0114]
[0115] According to the previous proof, we know that One item has a characteristic inversely proportional to temperature, and the threshold voltage of the PMOS transistor also has the characteristic of decreasing with the increase of temperature. Therefore, the designed voltage proportional to temperature also has good linearity.
[0116] In the voltage-time conversion circuit, this circuit is used to convert voltage into a time interval, and the expression of the time interval is:
[0117]
[0118] The working principle of the circuit is as follows. When starting to work, the start switch is closed to set V ramp to zero. V PTAT and V CTAT are respectively connected to the positive poles of two comparators. When the voltage V ramp across the capacitor is greater than V CTAT , the output signal V COMP2 of comparator 2 is inverted. When the voltage V ramp exceeds V PTAT , the output signal V COMP1 of comparator 1 is inverted. At the same time, the signal V COMP1 controls the reset switch through a NOT gate to discharge the capacitor and enter a new cycle.
[0119] Under the action of the dual-comparator structure, V PTAT and V CTAT are subtracted to obtain the highly sensitive V PTAT -V CTAT item, achieving better resolution. As the temperature rises, V PTAT increases, V CTAT decreases, and the increase in the time interval is more obvious.
[0120] In the time-digital conversion circuit, the control logic unit is composed of an AND gate and a NOT gate. The AND gate is connected to the output terminal of counter 1. When counter 1 is full, the DONE signal changes from high level to low level to control counter 2 to stop counting. The count value of counter 1 is the number of recorded time intervals. Δt inherits the temperature characteristic, and the low-level time period between adjacent Δts has a non-linear characteristic. The introduced control logic unit can extract the linear Δt and only count within Δt, ignoring the non-linear interference of the low-level time period between adjacent time intervals to improve the accuracy. At the same time, the temperature sensor can balance the overall resolution and accuracy by adjusting the number of bits of counter 1. Increasing the number of bits of counter 1 can amplify the difference between the lowest temperature point and the highest temperature point to obtain a greater resolution, but it will also amplify the error and damage the accuracy. Therefore, adjusting the number of bits of counter 1 can balance the resolution and accuracy. The oscillator has two branches, and each branch controls a half-oscillation period by charging and discharging a pair of capacitors through a reference current respectively.
[0121] Therefore, in summary, for the proposed temperature sensor circuit, which includes a voltage generation circuit proportional to temperature, a voltage generation circuit inversely proportional to temperature, a voltage-time conversion circuit, and a time-digital conversion circuit. The voltage generation circuit uses a bootstrap reference circuit to provide a bias current, and uses MOS transistors as temperature-sensing elements to obtain a high-sensitivity voltage under the requirement of low power consumption. The voltage-time conversion circuit adopts a dual-comparator technique to improve the overall resolution. The time-digital conversion circuit uses control logic to read out to improve the overall accuracy. Therefore, a high-precision all-CMOS temperature sensor based on the dual-comparator technique and control logic readout circuit can achieve high-precision monitoring under the requirement of low power consumption and is applicable to on-chip thermal management.
[0122] Compared with Figure 1 the temperature sensor described above, an integrated circuit is further provided in an embodiment of the present application, which includes the temperature sensor described in any one of the foregoing and an external power supply.
[0123] The content in the above temperature sensor embodiments is applicable to the integrated circuit embodiments of the present application. The functions specifically implemented in the integrated circuit embodiments of the present application are the same as those in the above temperature sensor embodiments, and the beneficial effects achieved are also the same as those in the above temperature sensor embodiments.
[0124] In addition, although the present application has been described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the functions and / or features may be integrated in a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It can also be understood that a detailed discussion of the actual implementation of each module is not necessary for understanding the present application. More precisely, considering the attributes, functions, and internal relationships of the various functional modules in the devices disclosed herein, the actual implementation of the modules will be understood within the ordinary skills of an engineer. Therefore, those skilled in the art can implement the present application set forth in the claims without undue experimentation using ordinary skills. It can also be understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present application, which is determined by the full scope of the appended claims and their equivalents.
[0125] In the foregoing description of this specification, the descriptions with reference to the terms "one embodiment / example", "another embodiment / example", or "certain embodiments / examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.
[0126] Although the embodiments of the present application have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present application, and the scope of the present application is defined by the claims and their equivalents.
[0127] The above has specifically described the preferred embodiments of the present application, but the present application is not limited to the described embodiments. Those skilled in the art can also make various equivalent deformations or substitutions without departing from the spirit of the present application, and these equivalent deformations or substitutions are all included within the scope defined by the claims of the present application.
Claims
1. A CMOS temperature sensor, characterized in that, Including: A temperature-sensing front-end circuit, a first conversion circuit, and a second conversion circuit; The temperature-sensing front-end circuit is connected to the first conversion circuit; the first conversion circuit is connected to the second conversion circuit; the temperature-sensing front-end circuit is used to generate a bias voltage based on a temperature signal; the first conversion circuit is used to convert the bias voltage into a clock signal, and the second conversion circuit is used to convert the clock signal into a digital signal; the digital signal is used to represent the temperature measured by the temperature-sensing front-end circuit; wherein the temperature-sensing front-end circuit includes a temperature-sensing element and a plurality of field-effect transistors; the temperature-sensing element and the plurality of field-effect transistors are all CMOS devices.
2. The CMOS temperature sensor according to claim 1, characterized in that, The temperature-sensing front-end circuit includes a reference bias unit and a bootstrap unit; the reference bias unit and the bootstrap unit are connected to the first conversion circuit.
3. The CMOS temperature sensor according to claim 2, characterized in that, The bootstrap unit includes: A constant current source, a first transistor, a second transistor, a first capacitor, a first switching device, a seventh inverter, and a second switching device; the first transistor and the second transistor are both CMOS transistors; One end of the constant current source is grounded; the drain, the gate of the first transistor, and the gate of the second transistor are connected to the other end of the constant current source; the source of the first transistor and the source of the second transistor are both connected to a first power supply; one end of the first capacitor, the first end of the first switching device, and the first end of the second switching device are connected to the drain of the second transistor; the second end of the first switching device, the second end of the second switching device, and the other end of the first capacitor are all grounded; the drain of the second transistor is connected to the first input terminal of the first conversion circuit; one end of the seventh inverter is connected to the first conversion circuit; the other end of the seventh inverter is connected to the third end of the first switching device; the third end of the first switching device is used to control whether the second end and the first end of the first switching device are electrically connected to each other according to the second output signal of the first conversion circuit.
4. The CMOS temperature sensor according to claim 2, wherein The reference bias unit includes a temperature-proportional conversion unit and a temperature-inverse conversion unit; The temperature-proportional conversion unit and the temperature-inverse conversion unit are connected to the first conversion circuit; both the temperature-proportional conversion unit and the temperature-inverse conversion unit include a bootstrap reference unit; the bootstrap reference unit includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a fifth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, and a twelfth MOS transistor; The gate of the tenth MOS transistor, the gate of the eleventh MOS transistor, the gate of the twelfth MOS transistor, and the drain of the eleventh MOS transistor are connected to the drain of the fourth MOS transistor; The source of the tenth MOS transistor, the source of the eleventh MOS transistor, and the source of the twelfth MOS transistor are connected to a first power supply; The gate of the fourth MOS transistor, the gate of the fifth MOS transistor, and the drain of the fifth MOS transistor are connected to the drain of the twelfth MOS transistor; The source of the first MOS transistor, the source of the fourth MOS transistor are connected to the drain of the second MOS transistor; The source of the second MOS transistor, the source of the fifth MOS transistor are connected to the drain of the third MOS transistor; the source of the third MOS transistor is grounded; The gate of the first MOS transistor, the gate of the second MOS transistor, the gate of the third MOS transistor, and the drain of the first MOS transistor are connected to the drain of the tenth MOS transistor.
5. The CMOS temperature sensor according to claim 4, characterized in that, The temperature proportional conversion unit further includes: A seventh MOS transistor, an eighth MOS transistor, a ninth MOS transistor, and a thirteenth MOS transistor; The source of the thirteenth MOS transistor and the source of the seventh MOS transistor are connected to a first power supply; the gate of the thirteenth MOS transistor is connected to the gate of the twelfth MOS transistor; The drain of the seventh MOS transistor, the gate of the seventh MOS transistor are connected to the drain of the seventh MOS transistor; the drain of the seventh MOS transistor serves as the output terminal of the temperature proportional conversion unit; The drain of the thirteenth MOS transistor, the drain of the eighth MOS transistor, the gate of the eighth MOS transistor, and the gate of the ninth MOS transistor are connected to the drain of the ninth MOS transistor; The source of the eighth MOS transistor and the source of the ninth MOS transistor are both grounded; wherein the seventh MOS transistor is the temperature sensing element.
6. The CMOS temperature sensor according to claim 4, characterized in that, The temperature inverse conversion unit further includes: A sixth MOS transistor and a fourteenth MOS transistor; the source of the fourteenth MOS transistor is connected to the first power supply; the gate of the fourteenth MOS transistor is connected to the gate of the twelfth MOS transistor; the gate and the drain of the sixth MOS transistor are connected to the drain of the fourteenth MOS transistor; the drain of the sixth MOS transistor serves as the output terminal of the temperature inverse conversion unit; the source of the sixth MOS transistor is grounded; wherein the sixth MOS transistor is the temperature sensing element.
7. The CMOS temperature sensor according to claim 1, characterized in that, The first conversion circuit includes: A first comparator, a second comparator, and an exclusive-OR gate. The output terminal of the first comparator is connected to the first input terminal of the exclusive-OR gate; the output terminal of the second comparator is connected to the second input terminal of the exclusive-OR gate; the first input terminal of the first comparator is connected to a bootstrap unit; the second input terminal of the first comparator is connected to the temperature proportional conversion unit; the first input terminal of the second comparator is connected to the bootstrap unit; the second input terminal of the second comparator is connected to the temperature inverse conversion unit.
8. The CMOS temperature sensor according to claim 1, characterized in that, The second conversion circuit includes: A first AND gate, a second AND gate, a third AND gate, a fourth AND gate, a fifth AND gate, a sixth AND gate, a first inverter, a first counter, and a second counter; The first input terminal of the first AND gate is connected to the output terminal of the first conversion circuit; the second input terminal of the first AND gate is connected to the output terminal of the first inverter; the output terminal of the first AND gate is connected to the first input terminal of the first counter; the second input terminal of the first counter is connected to a first reset signal; the first input terminal of the second AND gate is connected to the first output terminal of the first counter, the second input terminal of the second AND gate is connected to the second output terminal of the first counter, and the third input terminal of the second AND gate is connected to the third output terminal of the first counter; the first input terminal of the third AND gate is connected to the fourth output terminal of the first counter, the second input terminal of the third AND gate is connected to the fifth output terminal of the first counter, and the third input terminal of the third AND gate is connected to the sixth output terminal of the first counter; the first input terminal of the fourth AND gate is connected to the seventh output terminal of the first counter, the second input terminal of the fourth AND gate is connected to the eighth output terminal of the first counter, and the third input terminal of the fourth AND gate is connected to the ninth output terminal of the first counter; the output terminal of the second AND gate is connected to the first input terminal of the fifth AND gate, the output terminal of the third AND gate is connected to the second input terminal of the fifth AND gate, and the output terminal of the fourth AND gate is connected to the third input terminal of the fifth AND gate; the output terminal of the fifth AND gate is connected to the input terminal of the first inverter; The first input terminal of the sixth AND gate is connected to the output terminal of the first conversion circuit; the second input terminal of the sixth AND gate is connected to the input terminal of the first inverter, and the third input terminal of the sixth AND gate is connected to an oscillator circuit; the output terminal of the sixth AND gate is connected to the first input terminal of the second counter; the second terminal of the second counter is connected to the first reset signal; the output terminal of the second counter serves as the output terminal of the second conversion circuit.
9. The CMOS temperature sensor according to claim 8, wherein, The oscillator circuit includes: A second inverter, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a second capacitor, a third capacitor, a fourteenth MOS transistor, a fifteenth MOS transistor, a sixteenth MOS transistor, a seventeenth MOS transistor, a first constant current source, and a second constant current source; One end of the second constant current source, the source of the fourteenth MOS transistor, and the source of the sixteenth MOS transistor are connected to the first power supply; the gates of the fourteenth MOS transistor and the fifteenth MOS transistor serve as the output terminals of the oscillator circuit; the source of the fifteenth MOS transistor, the source of the seventeenth MOS transistor, the first end of the second capacitor, and the first end of the third capacitor are all grounded; the drain of the fourteenth MOS transistor, the other end of the first constant current source, and the second end of the second capacitor are connected to the input terminal of the second inverter; the drain of the fifteenth MOS transistor, the other end of the second constant current source, and the second end of the third capacitor are connected to the input terminal of the fourth inverter; the output terminal of the second inverter is connected to the input terminal of the third inverter; the output terminal of the fourth inverter is connected to the input terminal of the fifth inverter; the output terminal of the third inverter is connected to the gate of the sixteenth MOS transistor; the output terminal of the fifth inverter is connected to the gate of the seventeenth MOS transistor; the input terminal of the sixth inverter, the drain of the sixteenth MOS transistor, and the drain of the seventeenth MOS transistor are connected; the output terminal of the sixth inverter serves as the output terminal of the oscillator circuit.
10. The CMOS temperature sensor according to claim 9, characterized in that, The fourteenth MOS transistor, the fifteenth MOS transistor, the sixteenth MOS transistor, and the seventeenth MOS transistor are all CMOS transistors.