Common electrode voltage generating circuit, power supply device and electronic equipment

Abstract

The present application is applicable to the field of electronic circuit technology, and provides a common electrode voltage generating circuit, a power supply device and an electronic device. The common electrode voltage generating circuit includes a bias current generating module, a resistance module, a first operational amplifier module, a voltage divider module, a second operational amplifier module and a voltage output module. The first operational amplifier module is electrically connected to the bias current generating module, the resistance module and the voltage divider module respectively, and the voltage output module is electrically connected to the voltage divider module and the second operational amplifier module respectively. The bias current generating module generates a bias current, the resistance module generates a bias voltage, and the first operational amplifier module outputs a second node voltage. The voltage divider module outputs a first voltage, the second operational amplifier module outputs a second voltage, and the voltage output module outputs a common electrode voltage. The common electrode voltage generating circuit provided in the embodiment of the present application reduces the interference of the common electrode voltage with the negative voltage of AVEE, and effectively improves the noise suppression capability of the common electrode voltage to the negative voltage of AVEE.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic circuits, and in particular relates to a common electrode voltage generating circuit, a power supply device, and an electronic device. Background Art

[0002] In electronic devices such as LCDs (Liquid Crystal Displays), VCOM (Common Voltage) is a key electrical parameter. Its polarity selection is closely related to the driving method, power consumption optimization, and display performance, and directly affects display quality and stability. To dynamically adjust VCOM to improve the smearing effect on high-refresh-rate images, it must be set to two sets of parameters, VCOMMIN and OFFSET, with independent configuration outputs. VCOMMIN and OFFSET can be adjusted by changing internal register parameters. Existing techniques typically use multiple op amps to generate positive and negative voltages through internal reference voltage calculations. However, in this solution, the multiple op amps all use the negative AVEE voltage as the reference ground. Since the negative AVEE voltage is typically generated by a switching power supply and is noisy, it results in significant noise on VCOM. Summary of the Invention

[0003] The embodiments of the present application provide a common electrode voltage generating circuit, a power supply device, and an electronic device, which can solve the problem that multiple operational amplifiers in the existing common electrode voltage generating circuit all use the negative voltage of AVEE as the reference ground, resulting in large noise in VCOM.

[0004] In a first aspect, an embodiment of the present application provides a common electrode voltage generating circuit, comprising a bias current generating module, a resistor module, a first operational amplifier module, a voltage divider module, a second operational amplifier module, and a voltage output module, wherein the first operational amplifier module is electrically connected to the bias current generating module, the resistor module, and the voltage divider module, respectively, and the voltage output module is electrically connected to the voltage divider module and the second operational amplifier module, respectively;

[0005] The bias current generating module is used to generate a bias current; the resistance module is used to generate a bias voltage according to the bias current; the first operational amplifier module is used to output a second node voltage according to a reference voltage and a first node voltage, wherein the first node voltage is the voltage at the common end of the first operational amplifier module and the bias current generating module, the second node voltage is the voltage at the common end of the first operational amplifier module and the voltage divider module, and the second node voltage is the sum of the reference voltage and the bias voltage; the voltage divider module is used to output a first voltage to the voltage output module according to the second node voltage; the second operational amplifier module is used to output a second voltage to the voltage output module according to a configuration voltage; and the voltage output module is used to output a common electrode voltage according to the first voltage and the second voltage.

[0006] In a possible implementation of the first aspect, the bias current generating module includes a current source, a first end of the current source is electrically connected to the first operational amplifier module and the resistance module, respectively, and a second end of the current source is grounded.

[0007] In a possible implementation of the first aspect, the first operational amplifier module includes a first operational amplifier, a first input terminal of the first operational amplifier is used to receive the reference voltage, a second input terminal of the first operational amplifier is electrically connected to the bias current generating module and the resistance module, respectively, and an output terminal of the first operational amplifier is electrically connected to the resistance module and the voltage divider module, respectively.

[0008] In a possible implementation of the first aspect, the voltage divider module includes a first resistor and a second resistor, the first end of the first resistor is electrically connected to the first op amp module and the resistor module, respectively, the second end of the first resistor is electrically connected to the first end of the second resistor and the voltage output module, and the second end of the second resistor is grounded.

[0009] In a possible implementation of the first aspect, the second operational amplifier module includes a second operational amplifier, a first input terminal of the second operational amplifier is used to receive the configuration voltage, and a second input terminal of the second operational amplifier is electrically connected to an output terminal of the second operational amplifier and the voltage output module, respectively.

[0010] In a possible implementation of the first aspect, the resistance module includes a third resistor, a first end of the third resistor is electrically connected to the first operational amplifier module and the bias current generating module, respectively, and a second end of the third resistor is electrically connected to the first operational amplifier module and the voltage divider module, respectively.

[0011] In a possible implementation of the first aspect, the output module includes a fourth resistor, a fifth resistor and a third op amp, the first end of the fourth resistor is electrically connected to the second op amp module, the second end of the fourth resistor is electrically connected to the first end of the fifth resistor and the second input end of the third op amp, respectively, the first input end of the third op amp is electrically connected to the voltage divider module, and the output end of the third op amp is electrically connected to the second end of the fifth resistor.

[0012] In a possible implementation of the first aspect, the output module further includes a fourth op amp, a first input terminal of the fourth op amp being electrically connected to the output terminal of the third op amp and the second terminal of the fifth resistor, respectively, and a second input terminal of the fourth op amp being electrically connected to the output terminal of the fourth op amp.

[0013] In a second aspect, an embodiment of the present application provides a power supply device, comprising the common electrode voltage generating circuit described in any one of the first aspects.

[0014] In a third aspect, an embodiment of the present application provides an electronic device comprising the power supply device described in the second aspect.

[0015] Compared with the prior art, the embodiments of the present application have the following beneficial effects:

[0016] The common electrode voltage generating circuit provided in an embodiment of the present application includes a bias current generating module, a resistor module, a first operational amplifier module, a voltage divider module, a second operational amplifier module and a voltage output module. Among them, the bias current generating module can generate a bias current, and the bias current flowing through the resistor module can generate a voltage drop, that is, a bias voltage. Therefore, the bias voltage is equal to the product of the bias current and the resistance value of the resistor module. The first operational amplifier module outputs a second node voltage based on a reference voltage and a first node voltage, and the second node voltage is the sum of the reference voltage and the bias voltage. The voltage divider module divides the received second node voltage and outputs the first voltage to the voltage output module. The second operational amplifier module outputs a second voltage to the voltage output module based on the configuration voltage, and the voltage output module outputs a common electrode voltage based on the first voltage and the second voltage. It can be seen from this that in the process of outputting the common electrode voltage of the common electrode voltage generating circuit provided in the embodiment of the present application, since the second node voltage output by the first operational amplifier module is equal to the sum of the reference voltage and the bias voltage, wherein the reference voltage and the bias voltage are both positive voltages, the second node voltage is a positive voltage, which enables the devices in the first operational amplifier module to use GND as a reference ground without the need to use the AVEE negative voltage as a reference ground, thereby reducing the interference of the common electrode voltage with the AVEE negative voltage and effectively improving the noise suppression capability of the common electrode voltage to the AVEE negative voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0018] Figure 1 It is a connection diagram of an existing common electrode voltage generating circuit;

[0019] Figure 2 This is a principle block diagram of a common electrode voltage generating circuit provided in one embodiment of the present application;

[0020] Figure 3 1 is a circuit connection diagram of a common electrode voltage generating circuit provided in one embodiment of the present application.

[0021] In the figure, 10 is a common electrode voltage generating circuit; 101 is a bias current generating module; 102 is a resistance module; 103 is a first operational amplifier module; 104 is a voltage divider module; 105 is a second operational amplifier module; and 106 is a voltage output module. DETAILED DESCRIPTION

[0022] In the following description, specific details such as specific system structures and techniques are provided for purposes of illustration rather than limitation to facilitate a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid obscuring the description of the present application with unnecessary detail.

[0023] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0024] It will also be understood that the term "and / or" used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0025] As used in this specification and the appended claims, the term "if" can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0026] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0027] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0028] In electronic devices such as LCDs, VCOM is a key electrical parameter. Its polarity selection is closely related to the driving mode, power consumption optimization, and display performance, and directly affects the display quality and stability. In order to dynamically adjust VCOM to improve the high refresh rate screen tailing effect, it needs to be set to two sets of parameters, VCOMMIN and OFFSET, which can be independently configured in the output form. Among them, VCOMMIN and OFFSET can achieve output voltage adjustment by changing the internal register parameters. In the existing technology, such as Figure 1 As shown in the figure, multiple op amps are usually used to generate positive and negative voltages through internal reference voltage calculation. However, multiple op amps in this solution (such as OP1, OP3 and VCOM_OP) all use the negative voltage of AVEE as the reference ground. Since the negative voltage of AVEE is usually generated by a switching power supply and has large noise, VCOM has large noise.

[0029] Where GND represents the chip ground potential, AVEE represents a negative voltage potential, VDD represents an internal low positive voltage power supply, AVDD represents an internal high voltage power supply, VB represents an internal reference voltage, DAC_vcom_min represents a voltage that can be configured by a DAC (Digital-to-Analog Converter), and DAC_vcomoffset represents an offset voltage that can be configured by a DAC.

[0030] It should be noted that when the voltage output by the op amp is positive or negative, the AVEE negative voltage needs to be used as the reference ground.

[0031] For example, Figure 1 For example, the voltage vcom_min output by OP1 = R1*(1 / R1+1 / R2)*VB-DAC_vcom_min*R1 / R2. It can be seen that the voltage output by OP1 is positive and negative. Therefore, OP1 needs to use the negative voltage of AVEE as the reference ground.

[0032] Based on the above problems, the common electrode voltage generating circuit provided by the embodiment of the present application includes a bias current generating module, a resistor module, a first operational amplifier module, a voltage divider module, a second operational amplifier module and a voltage output module. Among them, the bias current generating module can generate a bias current, and the bias current flowing through the resistor module can generate a voltage drop, that is, a bias voltage. Therefore, the bias voltage is equal to the product of the bias current and the resistance value of the resistor module. The first operational amplifier module outputs a second node voltage according to the reference voltage and the first node voltage, and the second node voltage is the sum of the reference voltage and the bias voltage. The voltage divider module divides the received second node voltage and outputs the first voltage to the voltage output module. The second operational amplifier module outputs a second voltage to the voltage output module according to the configuration voltage, and the voltage output module outputs the common electrode voltage according to the first voltage and the second voltage. It can be seen from this that in the process of outputting the common electrode voltage of the common electrode voltage generating circuit provided in the embodiment of the present application, since the second node voltage output by the first operational amplifier module is equal to the sum of the reference voltage and the bias voltage, wherein the reference voltage and the bias voltage are both positive voltages, the second node voltage is a positive voltage, which enables the devices in the first operational amplifier module to use GND as a reference ground without the need to use the AVEE negative voltage as a reference ground, thereby reducing the interference of the common electrode voltage with the AVEE negative voltage and effectively improving the noise suppression capability of the common electrode voltage to the AVEE negative voltage.

[0033] In order to illustrate the technical solution described in this application, specific embodiments are provided below.

[0034] Figure 2 FIG1 shows a block diagram of a common electrode voltage generating circuit 10 provided in an embodiment of the present application. Figure 2As shown, the common electrode voltage generating circuit 10 includes a bias current generating module 101, a resistor module 102, a first operational amplifier module 103, a voltage divider module 104, a second operational amplifier module 105 and a voltage output module 106. The first operational amplifier module 103 is electrically connected to the bias current generating module 101, the resistor module 102 and the voltage divider module 104, respectively. The voltage output module 106 is electrically connected to the voltage divider module 104 and the second operational amplifier module 105, respectively.

[0035] Specifically, the bias current generating module 101 can generate a bias current IDAC_OFFSET, and the bias current IDAC_OFFSET flowing through the resistor module 102 can generate a voltage drop, that is, a bias voltage offset. Therefore, the bias voltage offset is equal to the product of the bias current IDAC_OFFSET and the resistance value of the resistor module 102. The first operational amplifier module 103 outputs a second node voltage based on the reference voltage VB and the first node voltage, and the second node voltage is the sum of the reference voltage VB and the bias voltage offset. The voltage divider module 104 divides the received second node voltage and outputs the first voltage to the voltage output module 106. The second operational amplifier module 105 outputs a second voltage to the voltage output module 106 based on the configuration voltage DAC_vcom_min, and the voltage output module 106 outputs a common electrode voltage VCOM based on the first voltage and the second voltage. It can be seen from this that in the process of outputting the common electrode voltage VCOM by the common electrode voltage generating circuit 10 provided in the embodiment of the present application, since the second node voltage output by the first operational amplifier module 103 is equal to the sum of the reference voltage VB and the bias voltage offset, wherein the reference voltage VB and the bias voltage offset are both positive voltages, the second node voltage is a positive voltage, which enables the devices in the first operational amplifier module 103 to use GND as a reference ground without the need to use the negative voltage AVEE as a reference ground, thereby reducing the interference of the negative voltage AVEE on the common electrode voltage VCOM, and effectively improving the noise suppression capability of the common electrode voltage VCOM to the negative voltage AVEE.

[0036] It should be noted that the bias current generating module 101 is also connected to ground, and the current of the bias current IDAC_OFFSET flows from the first node to the ground, where the first node is the common terminal of the first op amp module 103 and the resistor module 102. The configuration voltage DAC_vcom_min can be a voltage configured by the DAC, and the bias voltage offset is the product of the bias current IDAC_OFFSET and the resistance value of the resistor module 102, that is, offset = IDAC_OFFSET*R 电阻 Among them, R 电阻 is the resistance value of the resistance module 102.

[0037] In one embodiment of the present application, Figure 3As shown, the bias current generating module 101 includes a current source, a first end of the current source is electrically connected to the first operational amplifier module 103 and the resistor module 102 respectively, and a second end of the current source is grounded.

[0038] Specifically, the current source is primarily used to generate a stable bias current IDAC_OFFSET, providing a basic current signal for the resistor module 102. Specifically, the current source employs multiple current mirror structures. By flexibly configuring the switching states of the current mirrors, different bias currents IDAC_OFFSET can be output. Since the bias voltage offset is equal to the product of the bias current IDAC_OFFSET and the resistance value of the resistor module 102, adjusting the bias current IDAC_OFFSET generates a voltage drop across the resistor module 102 that meets the circuit requirements, thereby achieving an OFFSET voltage. This in turn provides the required bias voltage offset for the first op amp module 103, ensuring stable operation of the entire common electrode voltage generation circuit 10.

[0039] It should be noted that the embodiments provided herein only illustrate one circuit structure as the bias current generating module 101, and do not mean that this is the only circuit structure that can implement the function of the bias current generating module 101. Other circuit structures that can implement this function may also be substituted, and the present invention is not limited thereto.

[0040] In one embodiment of the present application, Figure 3 As shown, the first operational amplifier module 103 includes a first operational amplifier OP1, a first input terminal of the first operational amplifier OP1 is used to receive a reference voltage VB, a second input terminal of the first operational amplifier OP1 is electrically connected to the bias current generating module 101 and the resistance module 102, respectively, and an output terminal of the first operational amplifier OP1 is electrically connected to the resistance module 102 and the voltage divider module 104, respectively.

[0041] Specifically, the positive input of the first op amp OP1 serves as the first input of the first op amp OP1, and the negative input of the first op amp OP1 serves as the second input of the first op amp OP1. Through differential input and negative feedback, the first op amp OP1 accurately superimposes the reference voltage VB and the bias voltage offset to generate a stable second node voltage. Its positive input receives a constant reference voltage VB, and its negative input introduces the voltage drop generated by the bias current IDAC_OFFSET through a resistor network. The op amp's "virtual short" characteristic forces the voltages at both ends to be equal, thereby forming a second node voltage equal to "reference voltage VB + bias voltage offset" at the output. This design isolates the mutual influence between the reference voltage VB source and the bias circuit, while also improving the voltage superposition accuracy through high-gain amplification and deep negative feedback. This provides a low-impedance, highly stable voltage reference for the subsequent voltage divider module 104, ensuring that the accuracy of the common electrode voltage VCOM is unaffected by load variations. In addition, since the second node voltage output by the first operational amplifier OP1 is a positive voltage, the first operational amplifier OP1 can use GND as a reference ground without using the negative voltage AVEE as a reference ground, thereby reducing the number of operational amplifiers using the negative voltage AVEE as a reference ground, thereby improving the anti-interference ability of the common electrode voltage VCOM to the negative voltage AVEE.

[0042] It should be noted that the embodiments provided in this application only show one circuit structure as the first operational amplifier module 103, which does not mean that only this circuit structure can realize the function of the first operational amplifier module 103. Other circuit structures that can realize this function can also be replaced, and the present invention is not limited to this.

[0043] In one embodiment of the present application, Figure 3 As shown, the voltage divider module 104 includes a first resistor R1 and a second resistor R2, the first end of the first resistor R1 is electrically connected to the first operational amplifier module 103 and the resistor module 102 respectively, the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2 and the voltage output module 106 respectively, and the second end of the second resistor R2 is grounded.

[0044] Specifically, first resistor R1 and second resistor R2 form a stable voltage divider network through series voltage division, which is used to divide the second node voltage output by first operational amplifier OP1. Based on the voltage distribution principle of a series circuit, the second node voltage is distributed between the two resistors according to the resistance ratio, ultimately generating a stable first voltage at the connection node between first resistor R1 and second resistor R2. This first voltage serves as the voltage reference for voltage output module 106, providing a stable reference for the final output of common electrode voltage VCOM, ensuring the accuracy and stability of the output voltage.

[0045] For example, the resistance values ​​of the first resistor R1 and the second resistor R2 are not limited here. For example, the resistance values ​​of the first resistor R1 and the second resistor R2 can be fixed or variable. In addition, in addition to using one first resistor R1 and one second resistor R2, designers can also use other numbers of first resistors R1 and second resistors R2. For example, the first resistors R1 can be connected in series or parallel with 2 or 3, and the second resistors R2 can be connected in series or parallel with 2 or 3, etc. Figure 3 Only a circuit structure is shown in which the voltage divider module 104 includes a first resistor R1 with a fixed resistance and a second resistor R2 with a fixed resistance connected in series. The first resistor R1 and the second resistor R2 can be replaced by resistors of different numbers, types or different connection relationships. The basic working principles are similar and will not be elaborated on here.

[0046] It should be noted that the embodiments provided herein only illustrate one circuit structure as the voltage divider module 104, which does not mean that only this circuit structure can realize the function of the voltage divider module 104. Other circuit structures that can realize this function can also be replaced, and the present invention is not limited thereto.

[0047] In one embodiment of the present application, Figure 3 As shown, the second operational amplifier module 105 includes a second operational amplifier OP2, a first input terminal of the second operational amplifier OP2 is used to receive the configuration voltage DAC_vcom_min, and a second input terminal of the second operational amplifier OP2 is electrically connected to the output terminal of the second operational amplifier OP2 and the voltage output module 106 respectively.

[0048] Specifically, the positive input of the second op amp OP2 serves as the first input of the second op amp OP2, and the negative input of the second op amp OP2 serves as the second input of the second op amp OP2. Since the negative input and output of the second op amp OP2 are connected, this indicates that the second op amp OP2 employs a voltage follower structure. Its core function is to stabilize the output configuration voltage DAC_vcom_min and provide a high-input-impedance, low-output-impedance buffer drive for the voltage output module 106. Specifically, the second op amp OP2 connects the configuration voltage DAC_vcom_min to its positive input and utilizes its "virtual short" characteristic to equalize the voltage at its negative input. Furthermore, the direct connection between the output and negative input forms a closed-loop feedback loop, ensuring that the output voltage (the second voltage) accurately follows changes in the configuration voltage DAC_vcom_min. This design effectively isolates the mutual influence between the voltage output module 106 and the front-end configuration voltage DAC_vcom_min source, avoids voltage fluctuations caused by load changes, and provides a stable and reliable reference signal for the final generation of the common electrode voltage VCOM. At the same time, it reduces the loss and interference during the signal transmission process, and improves the driving capability and stability of the entire circuit.

[0049] It should be noted that, since the common electrode voltage VCOM output by the second operational amplifier OP2 is a positive voltage, the second operational amplifier OP2 uses GND as a reference ground.

[0050] It should be noted that the embodiments provided in this application only show one circuit structure as the second operational amplifier module 105, which does not mean that only this circuit structure can realize the function of the second operational amplifier module 105. Other circuit structures that can realize this function can also be replaced, and the present invention is not limited to this.

[0051] In one embodiment of the present application, Figure 3 As shown, the resistance module 102 includes a third resistor R3, a first end of the third resistor R3 is electrically connected to the first operational amplifier module 103 and the bias current generating module 101, and a second end of the third resistor R3 is electrically connected to the first operational amplifier module 103 and the voltage divider module 104.

[0052] Specifically, the third resistor R3 acts as a key current-to-voltage conversion element in the circuit, converting the bias current IDAC_OFFSET to the bias voltage offset based on Ohm's law. One end of the third resistor R3 is connected to the stable bias current IDAC_OFFSET output by the bias current generation module 101, and the other end is connected to the output of the first operational amplifier OP1 and the voltage divider module 104, forming a complete current loop. When the bias current IDAC_OFFSET flows through the third resistor R3, a voltage drop proportional to the bias current IDAC_OFFSET is generated across the third resistor R3, based on the quantitative relationship between voltage, current, and resistance (i.e., voltage = current * resistance). This voltage drop is the bias voltage offset. (The bias voltage offset can be varied by changing the magnitude of the bias current IDAC_OFFSET, thereby obtaining the desired bias voltage offset for the circuit.) The generated bias voltage offset is fed as a feedback signal to the negative input of the first operational amplifier OP1, participating in the superposition operation of the reference voltage VB and the bias voltage offset. On the other hand, it provides a basic voltage signal to the voltage divider module 104, directly affecting the generation of the final common electrode voltage VCOM, and ensuring that the entire circuit achieves precise voltage control.

[0053] It should be noted that the embodiments provided in this application only show one circuit structure as the resistor module 102, which does not mean that only this circuit structure can realize the function of the resistor module 102. Other circuit structures that can realize this function can also be replaced, and the present invention is not limited to this.

[0054] In one embodiment of the present application, Figure 3As shown, the output module includes a fourth resistor R4, a fifth resistor R5 and a third operational amplifier OP3, the first end of the fourth resistor R4 is electrically connected to the second operational amplifier module 105, the second end of the fourth resistor R4 is electrically connected to the first end of the fifth resistor R5 and the second input end of the third operational amplifier OP3, respectively, the first input end of the third operational amplifier OP3 is electrically connected to the voltage divider module 104, and the output end of the third operational amplifier OP3 is electrically connected to the second end of the fifth resistor R5.

[0055] Specifically, the positive input of the third op amp OP3 serves as the first input of the third op amp OP3, and the negative input of the third op amp OP3 serves as the second input of the third op amp OP3. The fourth resistor R4, the fifth resistor R5, and the third op amp OP3 together form a differential amplifier circuit, which functions to weightedly combine the first voltage output by the voltage divider module 104 and the second voltage output by the second op amp module 105 to generate a precise common electrode voltage VCOM. Specifically, the positive input of the third op amp OP3 receives the first voltage from the voltage divider module 104 as a reference signal, while the negative input is connected to the second voltage output by the second op amp OP2 via the fourth resistor R4. This circuit forms a feedback loop with the output via the fifth resistor R5. Utilizing the differential amplification characteristics of the op amp, the output voltage satisfies a weighted superposition relationship based on the resistor ratio, thereby combining the two voltage signals according to a preset ratio to form the final common electrode voltage VCOM. Furthermore, the high input impedance of the third op amp OP3 isolates the load effect of the preceding circuit, while the low output impedance provides stable driving capability for the common electrode voltage VCOM, ensuring the accuracy and stability of the output voltage.

[0056] It should be noted that the fourth resistor R4 has the same resistance as the first resistor R1, and the fifth resistor R5 has the same resistance as the second resistor R2. By constructing a symmetrical resistor network, a precise match between the voltage divider ratio and the feedback coefficient is achieved, thereby significantly improving the accuracy and stability of the common electrode voltage VCOM. Specifically, the first resistor R1 and the second resistor R2 in the voltage divider module 104 divide the second node voltage according to the ratio of R2 / (R1+R2), while the fourth resistor R4 and the fifth resistor R5 in the output module form a feedback network with the same ratio (R4 / (R4+R5)). This ensures that the proportional relationship between the input voltage and the feedback voltage during the differential amplification process is strictly consistent, fundamentally eliminating voltage errors caused by resistor mismatch. In addition, this symmetrical design can effectively suppress the impact of common-mode interference (such as power supply fluctuations and temperature drift) on the output voltage. When environmental factors cause all resistors to change synchronously, the consistency of the voltage divider ratio and the feedback coefficient can still be maintained, significantly improving the circuit's anti-interference capability. At the same time, standardized resistance matching simplifies the circuit debugging process, reduces dependence on high-precision resistors, and significantly improves production efficiency and cost controllability while ensuring voltage accuracy. It is especially suitable for application scenarios such as display driver circuits that have strict requirements on voltage stability.

[0057] It should be noted that, since the common electrode voltage VCOM output by the third operational amplifier OP3 is a positive or negative voltage, the third operational amplifier OP3 uses the negative voltage AVEE as a reference ground.

[0058] In one embodiment of the present application, Figure 3 As shown, the output module also includes a fourth operational amplifier VCOM_OP, a first input terminal of the fourth operational amplifier VCOM_OP is electrically connected to the output terminal of the third operational amplifier OP3 and the second terminal of the fifth resistor R5, and a second input terminal of the fourth operational amplifier VCOM_OP is electrically connected to the output terminal of the fourth operational amplifier VCOM_OP.

[0059] Specifically, the positive input of the fourth op amp VCOM_OP serves as the first input of the fourth op amp VCOM_OP, and the negative input of the fourth op amp VCOM_OP serves as the second input of the fourth op amp VCOM_OP. Since the negative input of the fourth op amp VCOM_OP is connected to the output, this indicates that the fourth op amp VCOM_OP employs a voltage follower structure. Its positive input is connected to the output of the third op amp OP3, and its negative input is directly shorted to the output, forming a deep negative feedback loop. Its primary function is to buffer and isolate the signal. Specifically, the fourth op amp VCOM_OP utilizes its high input impedance to avoid a loading effect on the preceding differential amplifier circuit, ensuring that the voltage signal output by the third op amp OP3 is unaffected by subsequent circuitry. Simultaneously, its low output impedance enhances the driving capability of the common electrode voltage VCOM, enabling it to stably drive various loads (such as capacitive and inductive loads). Furthermore, the isolation provided by the voltage follower effectively suppresses the effects of external interference on the output voltage, ensuring the stability and reliability of the common electrode voltage VCOM. This makes it particularly suitable for driving large loads or requiring high voltage accuracy.

[0060] It should be noted that, since the common electrode voltage VCOM output by the fourth operational amplifier VCOM_OP is a positive or negative voltage, the fourth operational amplifier VCOM_OP uses the negative voltage AVEE as a reference ground.

[0061] It should be noted that the embodiments provided herein only illustrate one circuit structure as the voltage output module 106, which does not mean that only this circuit structure can implement the function of the voltage output module 106. Other circuit structures that can implement this function can also be replaced, and are not limited to this.

[0062] It should be noted that in the prior art, all positive and negative voltages are realized by calculation using the internal reference voltage VB. Figure 1 The circuit shown, after calculation, VCOM = By changing the values ​​of the two DACs, different VCOM voltage outputs can be obtained, and vcom_min and vcomoffset can be independently configured. Among them, k1, k2, and k3 are all determined by the ratio between the resistors. This implementation requires precise matching between multiple resistors (such as R1, R2, R3~R7), resulting in extremely complex circuit design. However, this application uses the combination of reference voltage VB and reference current. The VCOM obtained after calculation is = , it can be seen that by changing the values ​​of IDAC_OFFSET and DAC_vcom_min, different VCOM voltage outputs can be obtained, and independent configuration of vcom_min and vcomoffset can also be achieved. That is, the present application realizes the independently configurable output of VCOM and its bias voltage offset by combining a variable current source, a variable voltage reference, and multiple op amp characteristics. In addition, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 in the common electrode voltage generating circuit 10 of the present application do not need to be precisely matched, which reduces the requirement for the number of resistors to be matched, thereby greatly reducing the difficulty of circuit design and saving chip area.

[0063] This application also discloses a power supply device. This power supply device utilizes the common electrode voltage generating circuit 10 described above. This device exhibits the advantages of low ripple, high interference immunity, and strong load driving capability when driving a common electrode voltage VCOM (such as the VCOM of a display screen). This power supply device also combines the advantages of high performance and low cost, making it particularly suitable for applications such as displays and industrial control, which require high voltage accuracy and stability.

[0064] This application also discloses an electronic device (such as an LCD or other display device) comprising the aforementioned power supply device. Electronic devices employing the aforementioned power supply device can significantly improve the uniformity and color reproduction of displayed images thanks to the high-precision and high-stability design of the common electrode voltage generating circuit 10. Specifically, the power supply device generates a stable common electrode voltage VCOM by combining a reference voltage VB with a reference current, effectively eliminating common LCD screen issues such as flicker, color difference, and uneven brightness. Furthermore, the common electrode voltage generating circuit 10's ability to suppress negative voltage interference from AVEE reduces the impact of power supply noise on the display drive signal, maintaining image stability even in complex electromagnetic environments. Furthermore, the power supply device's strong load-driving capability adapts to the capacitive load characteristics of LCD screens, preventing VCOM voltage drift caused by load variations and further improving the reliability of display image quality. This design enables electronic devices to achieve higher display performance while balancing low power consumption and low cost, making it particularly suitable for demanding applications such as high-end LCD TVs and professional monitors, where image quality requirements are stringent.

[0065] Since the processing and functions implemented by the power supply device and the electronic device in this embodiment basically correspond to the embodiments, principles and examples of the aforementioned common electrode voltage generating circuit, for any details not fully described in this embodiment, please refer to the relevant descriptions in the aforementioned embodiments and will not be repeated here.

[0066] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A common electrode voltage generating circuit, characterized in that: The device comprises a bias current generating module, a resistance module, a first operational amplifier module, a voltage dividing module, a second operational amplifier module and a voltage output module, wherein the first operational amplifier module is electrically connected to the bias current generating module, the resistance module and the voltage dividing module respectively, and the voltage output module is electrically connected to the voltage dividing module and the second operational amplifier module respectively; The bias current generating module is used to generate a bias current; the resistance module is used to generate a bias voltage according to the bias current; the first operational amplifier module is used to output a second node voltage according to a reference voltage and a first node voltage, wherein the first node voltage is the voltage at the common end of the first operational amplifier module and the bias current generating module, the second node voltage is the voltage at the common end of the first operational amplifier module and the voltage divider module, and the second node voltage is the sum of the reference voltage and the bias voltage; the voltage divider module is used to output a first voltage to the voltage output module according to the second node voltage; the second operational amplifier module is used to output a second voltage to the voltage output module according to a configuration voltage; and the voltage output module is used to output a common electrode voltage according to the first voltage and the second voltage.

2. The common electrode voltage generating circuit according to claim 1, wherein: The bias current generating module includes a current source, a first end of the current source is electrically connected to the first operational amplifier module and the resistor module respectively, and a second end of the current source is grounded.

3. The common electrode voltage generating circuit according to claim 1, wherein: The first operational amplifier module includes a first operational amplifier, a first input terminal of the first operational amplifier is used to receive the reference voltage, a second input terminal of the first operational amplifier is electrically connected to the bias current generating module and the resistance module respectively, and an output terminal of the first operational amplifier is electrically connected to the resistance module and the voltage divider module respectively.

4. The common electrode voltage generating circuit according to claim 1, wherein: The voltage divider module includes a first resistor and a second resistor, the first end of the first resistor is electrically connected to the first operational amplifier module and the resistor module respectively, the second end of the first resistor is electrically connected to the first end of the second resistor and the voltage output module respectively, and the second end of the second resistor is grounded.

5. The common electrode voltage generating circuit according to claim 1, wherein: The second operational amplifier module includes a second operational amplifier, a first input terminal of the second operational amplifier is used to receive the configuration voltage, and a second input terminal of the second operational amplifier is electrically connected to an output terminal of the second operational amplifier and the voltage output module respectively.

6. The common electrode voltage generating circuit according to claim 1, wherein: The resistance module includes a third resistor, a first end of the third resistor is electrically connected to the first operational amplifier module and the bias current generating module respectively, and a second end of the third resistor is electrically connected to the first operational amplifier module and the voltage divider module respectively.

7. The common electrode voltage generating circuit according to claim 1, wherein: The output module includes a fourth resistor, a fifth resistor and a third operational amplifier, the first end of the fourth resistor is electrically connected to the second operational amplifier module, the second end of the fourth resistor is electrically connected to the first end of the fifth resistor and the second input end of the third operational amplifier respectively, the first input end of the third operational amplifier is electrically connected to the voltage divider module, and the output end of the third operational amplifier is electrically connected to the second end of the fifth resistor.

8. The common electrode voltage generating circuit according to claim 7, wherein: The output module also includes a fourth operational amplifier, a first input terminal of the fourth operational amplifier is electrically connected to the output terminal of the third operational amplifier and the second terminal of the fifth resistor respectively, and a second input terminal of the fourth operational amplifier is electrically connected to the output terminal of the fourth operational amplifier.

9. A power supply device, characterized in that: The common electrode voltage generating circuit comprises the common electrode voltage generating circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that: Includes the power supply device according to claim 9.

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