Device and method for improving data recovery capability of persistent storage area of dual-port SSD (Solid State Disk)

Abstract

The invention relates to the field of storage, in particular to a device and a method for improving the data recovery capability of a persistent storage area of a dual-port SSD (Solid State Disk). The device comprises a two-way access monitoring unit, a data transfer unit, a concurrent access control unit and a power supply monitoring unit, and the two-way access monitoring unit is used for monitoring write access requests, issued by two PCIe interfaces, of a persistent storage area in real time and recording related information; the concurrent access control unit solves the problem of cache atomicity through a hardware lock mode; the data migration unit is used for realizing data migration, and the power supply monitoring unit is matched with the standby power circuit to realize data storage of a persistent storage area in a power supply abnormal scene. According to the method, the two aspects of data access management of the storage area and data storage under the condition of power failure are optimized, the data management and recovery capability under the condition of high capacity of the PMR is realized, and the application prospect of the PMR function is expanded.

Description

Technical Field

[0001] The present invention relates to the storage field, and specifically to a device and method for improving the data recovery ability of the persistent storage area of a dual-port SSD. Background Art

[0002] PMR (Persistent Memory Region) is a persistent storage area feature of NVMe SSDs. There will be a memory space inside the SSD that supports this feature, providing the host with the ability to access bytes. The content of this storage area is responsible for power-down storage and power-up recovery by the SSD, laying the foundation for the future application of the CXL technology. When designing a dual-port system, in order to ensure the atomicity of persistent storage area access, two independent memory space addresses are often created and associated with the persistent storage area, which brings pressure to data recovery in the case of power failure. Summary of the Invention

[0003] Aiming at the defects of the prior art, the present invention provides a device and method for improving the data recovery ability of the persistent storage area of a dual-port SSD, which are optimized in two aspects: data access management in the storage area and data preservation in the case of power failure, realizing data management and recovery capabilities in the case of large-capacity PMR, and expanding the application prospects of PMR functions.

[0004] To solve the above technical problems, the technical solution adopted by the present invention is: a device for improving the data recovery ability of the persistent storage area of a dual-port SSD, including a dual-channel access monitoring unit, a concurrent access control unit, a data migration unit, and a power monitoring unit; The dual-channel access monitoring unit is connected to the PCIe interface, used to monitor in real time the access requests to the persistent storage area issued from the two PCIe interfaces, and record the start address and length of the access requests in the form of an address mapping queue, and notify the software that an access has occurred; The concurrent access control unit is connected to the dual-channel access monitoring unit, used to perform locking control on the logical address range recorded in the address mapping queue. When an access request is issued, record the locked logical address range. When subsequent access requests come in, check whether the logical address of the subsequent access request overlaps with the locked logical address range. If there is an overlap, data storage is not triggered; otherwise, data storage is triggered; The data migration unit is connected to the concurrent access control unit, used to parse the data address, convert the entry information in the address mapping queue into physical address information of the non-volatile medium, and migrate the data in the persistent storage area to the non-volatile medium; The power supply monitoring unit is used to detect whether the power supply signal of the SSD is stable. When the power supply signal fails, it notifies the dual-path access monitoring unit to trigger an interruption and notifies the software to save the data in the address mapping queue.

[0005] Further, when the host issues an access request to the persistent storage area, the dual-path access monitoring unit records the start address and length of the access request in a fixed format. The fixed format is that the high 32 bits represent the data logical address, and the data logical address reflects the port information and the address offset of the access request in the persistent storage area. The low 32 bits represent the length and lock handle of the data request. The high 32 bits and the low 32 bits are combined as an entry and added to the address mapping queue.

[0006] Further, when the address ranges of two adjacent access requests are continuous, they are merged and recorded as one access request.

[0007] Further, the dual-path access monitoring unit includes a bus monitoring module, an address mapping queue, and an interruption triggering module. The bus monitoring module is used to monitor the access requests to the persistent storage area issued from two PCIe interfaces. The address mapping queue is used to record the start address and length of the access request to access the memory. The interruption triggering module is used to generate an interruption to notify the software that an access has occurred.

[0008] Further, the address management granularity in the address mapping queue is configured through a register, and the minimum address management granularity is 512B.

[0009] Further, the interruption triggering module notifies the software that an access has occurred in the form of a hardware interruption. After receiving the interruption, the software fetches the corresponding entry from the address mapping queue, parses it, and triggers the saving of the Nand Flash.

[0010] Further, the concurrent access control unit includes an address mapping queue, a suspension queue, and a lock handle management module. When an access request is issued, the lock handle management module records the range of the locked logical address. When a subsequent access request comes in, the lock handle management module checks whether the logical address of the subsequent access request overlaps with the range of the locked logical address. If there is an overlap, the data storage is not triggered and the entry is fetched from the address mapping queue of the dual-path access monitoring unit and placed in the suspension queue. Otherwise, the entry is fetched from the address mapping queue of the dual-path access monitoring unit and placed in the address mapping queue of the concurrent access control unit, and an interruption is triggered to notify the software to fetch the corresponding entry from the address mapping queue of the concurrent access control unit, parse it, and trigger the saving of the Nand Flash. After the Nand Flash storage is completed, the lock handle is released. After it is determined that a lock is released, the concurrent access control unit fetches the entry from the suspension queue, relocks it, and then puts it into the address mapping queue.

[0011] The present invention also discloses a method for improving the data recovery ability of the persistent storage area of a dual-port SSD. This method is implemented based on the above-mentioned device and includes the following steps: S01. The dual-path access monitoring unit continuously monitors the access requests to the persistent storage area sent from two PCIe interfaces, records the start address and length of the access requests in the form of an address mapping queue, and triggers an interruption to notify the software that an access has occurred; S02. After receiving the interruption, the software retrieves the entry from the address mapping queue, performs locking / unlocking processing based on the address. If the unlocking is successful, the data transfer unit is configured. The data transfer unit includes the target Nand Flash strip address and the content of the entry in the address mapping queue, and writes the data of the corresponding persistent storage area into the Nand Flash; S03. If, during the process of the software updating the data of the persistent storage area to the Nand Flash, the host simultaneously updates the content of the corresponding address range, concurrent access control is triggered to prevent the transfer of the host data to the memory at this time. Only after the data migration module completes one migration can the non-volatile storage operation of subsequent access requests continue; S04. The power supply monitoring module continuously monitors the power supply signal of the SSD. When the power supply signal fails, it notifies the dual-path access monitoring unit to trigger an interruption and notify the software to save the data in the address mapping queue.

[0012] Further, in step S02, after writing the data of the persistent storage area into the Nand Flash, the completion status is written to the address specified by the software as the completion message returned to the software, and the software updates the corresponding mapping table according to the completion status.

[0013] Further, step S03 is implemented by a concurrent access control unit. The implementation process is as follows: when an access request is sent down, the lock handle management module records the range of the locked logical address. When subsequent access requests come in, the lock handle management module checks whether the logical address of the subsequent access request overlaps with the range of the locked logical address. If there is an overlap, the data storage is not triggered and the entry is retrieved from the address mapping queue of the dual-path access monitoring unit and placed in the pending queue; otherwise, the entry is retrieved from the address mapping queue of the dual-path access monitoring unit and placed in the address mapping queue of the concurrent access control unit, and an interruption is triggered to notify the software to retrieve the corresponding entry from the address mapping queue of the concurrent access control unit for parsing, and trigger the saving of the Nand Flash; after the Nand Flash storage is completed, the lock handle is released; after it is determined that a lock is released, the concurrent access control unit retrieves the entry from the pending queue, relocks it, and then puts it back into the address mapping queue.

[0014] Advantages of the present invention: The present invention provides a device and method for improving the data recovery ability of the persistent storage area controller of a dual-port SSD. Through the present invention, the dependence on supercapacitors in the case of abnormal power supply can be effectively reduced when the persistent storage area is large-capacity. By innovatively designing the monitoring module, the updates of the storage area can be sensed in a timely manner, and persistent storage can be performed in a timely manner, expanding the application scenarios of the persistent storage area. Description of the Drawings

[0015] Figure 1 It is a schematic block diagram of the device described in Embodiment 1; Figure 2 It is a flowchart when the system is powered on; Figure 3 It is a flowchart when the system is powered off. Detailed Embodiments

[0016] The present invention will be further described below with reference to the drawings and specific embodiments.

[0017] Embodiment 1 This embodiment discloses a device for improving the data recovery ability of the persistent storage area of a dual-port SSD. As Figure 1 shown, on the basis of the existing SSD storage system, a dual-path access monitoring unit, a concurrent access control unit, a data migration unit, and a power supply monitoring unit are added, realizing the distribution of PMR storage, greatly reducing the pressure of centralized data storage in the case of abnormal power supply, and realizing the support for caching of large-capacity persistent storage areas.

[0018] The dual-path access monitoring unit is connected to the PCIe module. Both PCIe interfaces are integrated in the PCIe module. The dual-path access monitoring unit monitors in real time the access requests for the persistent storage area issued from the PCIe module (two PCIe interfaces), and records the starting address and length of the access requests in the form of an address mapping queue, and notifies the software of the occurrence of an access through an interrupt. Through this design, the centralized storage of large segments of memory is avoided, providing effective support for data storage in the case of large-capacity PMR (such as 32M, 64M).

[0019] In this embodiment, the address management granularity of the address mapping queue in the dual-channel access monitoring unit can be configured through registers, and the minimum granularity is 512B. When the host issues a write access request, the dual-channel access monitoring unit will record the start address and length of the write request in a specific format. Among them, the high 32 bits represent the data logical address, and the low 32 bits contain the length of the data request and the lock handle. The high 32 bits and the low 32 bits are combined as an entry and added to the address mapping queue. The data logical address addressing rule should reflect two aspects. One is the port information, which is used to distinguish from which PCIe port the write request comes, so as to facilitate physical separation during later expansion. The other is the address offset in the PMR area, which is used to form a mapping relationship. In this embodiment, the address information recording function supports cumulative calculation of the address range. When the address ranges of two adjacent accesses are continuous, they can be combined and recorded as one. The depth of the address mapping queue needs to be designed according to the supported bandwidth.

[0020] Specifically, it is set that the dual-channel access monitoring unit includes a bus monitoring module, an address mapping queue, and an interrupt trigger module. The bus monitoring module is used to monitor the access requests to the persistent storage area issued from two PCIe interfaces. The address mapping queue is used to record the start address and length of the host's access to the memory. The interrupt trigger module is used to generate an interrupt to notify the software that an access has occurred. In this embodiment, the interrupt trigger module notifies the software in the form of a hardware interrupt. The software fetches the corresponding entry from the address mapping queue, parses it, and triggers the saving of the Nand Flash. The interrupt module supports masking and is processed in a polling manner.

[0021] The concurrent access control unit solves the problem of cache atomicity through the method of hardware locks. The concurrent access control unit designs an address mapping queue, a suspension queue, and a lock handle management module to lock and control the logical address range recorded in the address mapping queue. When an access is issued, the lock handle management module records the range of the locked logical address. When subsequent accesses come in, the lock handle management module checks whether the immediate address of the subsequent access overlaps with the locked range. If there is an overlap, the software storage will not be triggered and the entry will be removed from the address mapping queue and placed in the suspension queue; otherwise, the entry will be removed from the mapping queue of the dual-path access monitoring unit and placed in the address mapping queue of the concurrent access control unit, triggering an interrupt to notify the software to retrieve the corresponding entry from the address mapping queue of the concurrent access control unit for parsing, and triggering the saving of the Nand Flash. After the nand storage is completed, the software configures the release of the lock handle. When it is judged that a lock is released, the concurrent access control unit will retrieve the entry from the suspension queue, relock it, and then put it back into the address mapping queue. In this way, the atomicity problem of the host write and the data migration module simultaneously accessing a certain persistent storage area in memory is ensured, and the atomicity problem during a single entry storage process is guaranteed. Only after the data migration module has completed reading can the storage continue.

[0022] The data migration unit has two functions. One function is to parse the data address, convert the entry information in the address mapping queue into the physical address information of the non-volatile medium; the other is the data migration engine, which migrates the data in the persistent storage area to the non-volatile medium and returns a completion message to the software. The software relies on this module to automatically calculate the specific location to be stored in the Nand Flash chip, start the internal data migration engine, realize the preservation of the persistent area memory, and realize the wear leveling processing of the user data on the NVMe command path. The input variables for address parsing are the entry information in the address mapping queue and the superblock information filled in by the software when triggering the save, and the output is the physical address information such as the physical path number, chip select number, physical block number, and the number of word lines to be operated on the Nand Flash chip. The data migration engine will write the data in the persistent memory into the Nand Flash.

[0023] The power supply monitoring unit cooperates with the backup power supply circuit to realize the data preservation of the persistent storage area in the case of power supply anomalies. By detecting the stability of the 12V power supply signal of the SSD gold finger, it judges whether the external power supply fails. When the power supply fails, it promptly notifies the dual-path monitoring unit to trigger an interrupt to inform the software to save the data in the address mapping queue.

[0024] Embodiment 2 This embodiment discloses a method for improving the data recovery ability of the persistent storage area of a dual-port SSD. This method is implemented based on the device described in Embodiment 1 and includes the following steps: S01. The dual - path access monitoring unit monitors in real - time the access requests to the persistent storage area sent from two PCIe interfaces. Using the address mapping queue method, it records the start address and length of the access requests and triggers an interrupt to notify the software that an access has occurred.

[0025] In this embodiment, the address management granularity of the address mapping queue can be configured through registers, and the minimum granularity is 512B. When the host sends a write access request, the dual - path access monitoring unit records the start address and length of this write request in a specific format. Among them, the high 32 bits represent the data logical address, and the low 32 bits represent the length of the request. After combination, they are added as an entry to the address mapping queue. The addressing rule of the data logical address should reflect two aspects. One is the port information, which is used to distinguish from which PCIe port the write request comes, so as to facilitate physical separation during later expansion; the other is the address offset in the PMR area, which is used to form a mapping relationship. In this embodiment, the address information recording function supports the cumulative calculation of the address range. When the address ranges of two adjacent accesses are continuous, they can be combined and recorded as one entry. The depth of the address mapping queue needs to be designed according to the supported bandwidth.

[0026] S02. After receiving the interrupt, the software retrieves the entry from the address mapping queue and performs a locking process based on the address. If the unlocking is successful, it configures the data transfer unit. The data transfer unit includes the target Nand Flash stripe address and the content of the entry in the address mapping queue, and writes the data of the corresponding persistent storage area into the Nand Flash. After the data migration, that is, after writing the data of the persistent storage area into the Nand Flash, the completion status is written to the address specified by the software as the completion message returned to the software. The software updates the corresponding mapping table according to the completion status to facilitate the data recovery of the next PMR.

[0027] S03. If, during the process of the software updating the data of the persistent storage area to the Nand Flash, the host simultaneously updates the content of the corresponding address range, concurrent access control is triggered to prevent the transfer of the host data to the memory at this time. Only after the data migration module completes one migration can the non - volatile storage operation of subsequent access requests continue, ensuring data atomicity. The atomicity size can be determined according to the data implementation scheme and can be a multiple of 16k.

[0028] In this embodiment, step S03 is implemented by the concurrent access control unit. The implementation process is as follows: when an access request is issued, the lock handle management module records the range of the locked logical addresses. When subsequent access requests come in, the lock handle management module checks whether the logical addresses of the subsequent access requests overlap with the range of the locked logical addresses. If there is an overlap, data storage is not triggered and the entry is removed from the address mapping queue of the dual-path access monitoring unit and placed in the pending queue; otherwise, the entry is removed from the address mapping queue of the dual-path access monitoring unit and placed in the address mapping queue of the concurrent access control unit, and an interrupt is triggered to notify the software to retrieve the corresponding entry from the address mapping queue of the concurrent access control unit for parsing, triggering the saving of the Nand Flash; after the Nand Flash storage is completed, the lock handle is released; after it is determined that a lock is released, the concurrent access control unit retrieves the entry from the pending queue, relocks it, and then puts it back into the address mapping queue.

[0029] S04. The power supply monitoring module continuously monitors the power supply signal of the SSD. When it detects that the power supply signal fails (such as an abnormal drop), it notifies the dual-path access monitoring unit to trigger an interrupt, notifying the software to save the cached data recorded in the address mapping queue in a timely manner within the backup capacitor time.

[0030] The method described in this embodiment is embodied in two processes: power-on and abnormal power-off. As Figure 2 shown, during power-on, the software initializes the address management granularity to 512 B, enables the persistent storage area controller and sets the size of the persistent storage area to 32M, completes the power-on recovery of the persistent storage area memory and the persistent storage area is enabled by the host. The host updates the persistent storage area memory (the dual-path access monitoring unit monitors the access request to the persistent storage area), triggering the function of the dual-path access monitoring unit, adding a new entry to the address mapping queue. The software receives the interrupt and determines whether the linked list of the concurrent access control unit allows the nand operation to be flushed. If so, it obtains the current superblock information, triggers the data migration module to work. After the data migration is completed, the FTL mapping is updated, and the data is stored in the NAND FLASH. The software releases the lock handle of the concurrent access control.

[0031] During the power-on process, the data is written into the NAND FLASH in multiple batches. Since most of the data has been written into the NAND FLASH, the data recovery pressure during abnormal power-off can be reduced. And during the data writing process, the problem of cache atomicity is solved by means of a hardware lock.

[0032] As Figure 3As shown in the figure, the abnormal power-down process is as follows: The abnormal power-down detects abnormal power loss and outputs a control signal. It judges whether there are still un-stored entries in the address mapping queue. If there are, it switches to the backup power mode to complete the data saving of the un-stored entries, that is, stores the un-stored entries in the address mapping queue of the persistent storage area into the NAND FLASH.

[0033] In this embodiment, the software is solidified in the CPU core. In terms of the connection relationship of the modules, the dual-path access monitoring unit, the concurrent access control unit, the data transfer unit, and the power supply monitoring unit are all connected to the CPU core.

[0034] The above description only presents the basic principles and preferred embodiments of the present invention. The improvements and replacements made by those skilled in the art based on the present invention fall within the protection scope of the present invention.

Claims

1. A device for improving the data recovery ability of the persistent storage area of a dual-port SSD, characterized in that: It includes a dual - path access monitoring unit, a concurrent access control unit, a data migration unit, and a power supply monitoring unit; The dual - path access monitoring unit is connected to the PCIe interface and is used to monitor in real time the access requests to the persistent storage area issued from the two PCIe interfaces. It uses the address mapping queue method to record the start address and length of the access requests and notify the software that an access has occurred; The concurrent access control unit is connected to the dual - path access monitoring unit and is used to perform locking control on the logical address range recorded in the address mapping queue. When an access request is issued, it records the locked logical address range. When subsequent access requests come in, it checks whether the logical address of the subsequent access request overlaps with the locked logical address range. If there is an overlap, it does not trigger data storage; otherwise, it triggers data storage; The data migration unit is connected to the concurrent access control unit and is used to resolve the data address, convert the entry information in the address mapping queue into the physical address information of the non - volatile medium, and migrate the data in the persistent storage area to the non - volatile medium; The power supply monitoring unit is used to detect whether the power supply signal of the SSD is stable. When the power supply signal fails, it notifies the dual - path access monitoring unit to trigger an interruption and notify the software to save the data in the address mapping queue.

2. The device for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 1, characterized in that: When the host issues an access request to the persistent storage area, the dual - path access monitoring unit records the start address and length of the access request in a fixed format. The fixed format is that the high 32 bits represent the data logical address, and the data logical address reflects the port information and the address offset of the access request in the persistent storage area. The low 32 bits represent the length of the data request and the lock handle. The high 32 bits and the low 32 bits are combined as an entry and added to the address mapping queue.

3. The device for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 2, wherein: When the address ranges of two adjacent access requests are continuous, they are merged and recorded as one access request.

4. The device for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 1, characterized in that: The dual - path access monitoring unit includes a bus monitoring module, an address mapping queue, and an interruption triggering module; The bus monitoring module is used to monitor the access requests to the persistent storage area issued from the two PCIe interfaces. The address mapping queue is used to record the start address and length of the access requests accessing the memory. The interruption triggering module is used to generate an interruption to notify the software that an access has occurred.

5. The apparatus for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 4, wherein: The address management granularity in the address mapping queue is configured through registers, and the minimum address management granularity is 512B.

6. The device for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 4, characterized in that: The interruption triggering module notifies the software that an access has occurred in the form of a hardware interruption. After receiving the interruption, the software retrieves the corresponding entry from the address mapping queue, parses it, and triggers the saving of the Nand Flash.

7. The device for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 1, wherein: The concurrent access control unit includes an address mapping queue, a pending queue, and a lock handle management module. When an access request is issued, the lock handle management module records the range of the locked logical address. When subsequent access requests come in, the lock handle management module checks whether the logical address of the subsequent access request overlaps with the range of the locked logical address. If there is an overlap, data storage is not triggered, and the entry is removed from the address mapping queue of the dual-path access monitoring unit and placed in the pending queue; otherwise, the entry is removed from the address mapping queue of the dual-path access monitoring unit and placed in the address mapping queue of the concurrent access control unit, triggering an interrupt to notify the software to remove the corresponding entry from the address mapping queue of the concurrent access control unit, perform parsing, and trigger the saving of the Nand Flash. After the Nand Flash storage is completed, the lock handle is released; after it is determined that a lock is released, the concurrent access control unit removes the entry from the pending queue, relocks it, and then puts it back into the address mapping queue.

8. A method for improving data recovery capability of a dual-port SSD persistent storage area, characterized by: This method is implemented based on the device described in any one of claims 1-7, and includes the following steps: S01. The dual-path access monitoring unit continuously monitors the access requests to the persistent storage area issued from two PCIe interfaces, records the starting address and length of the access requests in the form of an address mapping queue, and triggers an interrupt to notify the software that an access has occurred. S02. After receiving the interrupt, the software removes the entry from the address mapping queue and performs lock / unlock processing based on the address. If the unlock is successful, the data transfer unit is configured. The data transfer unit includes the target Nand Flash stripe address and the content of the entry in the address mapping queue, and writes the data of the corresponding persistent storage area into the Nand Flash. S03. If, during the process of the software updating the data of the persistent storage area to the Nand Flash, the host simultaneously updates the content of the corresponding address range, concurrent access control is triggered to prevent the transfer of the host data to the memory at this time. Only after the data migration module completes one migration can the non-volatile storage operation of subsequent access requests continue. S04. The power monitoring module continuously monitors the power signal of the SSD. When the power signal fails, it notifies the dual-path access monitoring unit to trigger an interrupt to notify the software to save the data in the address mapping queue.

9. The method for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 8, wherein: In step S02, after writing the data of the persistent storage area into the Nand Flash is completed, the completion status is written to the address specified by the software as the completion message returned to the software, and the software updates the corresponding mapping table according to the completion status.

10. The method for improving the data recovery ability of the persistent storage area of a dual-port SSD according to claim 8, wherein: Step S03 is implemented by the concurrent access control unit. The implementation process is as follows: when an access request is issued, the lock handle management module records the range of the locked logical addresses. When subsequent access requests come in, the lock handle management module checks whether the logical addresses of the subsequent access requests overlap with the range of the locked logical addresses. If there is an overlap, data storage is not triggered and the entry is removed from the address mapping queue of the dual-path access monitoring unit and placed in the pending queue; otherwise, the entry is removed from the address mapping queue of the dual-path access monitoring unit and placed in the address mapping queue of the concurrent access control unit, triggering an interrupt to notify the software to retrieve the corresponding entry from the address mapping queue of the concurrent access control unit for parsing, and triggering the saving of the Nand Flash. After the Nand Flash storage is completed, the lock handle is released. After it is determined that a lock is released, the concurrent access control unit retrieves the entry from the pending queue, relocks it, and then puts it back into the address mapping queue.

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