Agile design method and device for adaptive crosstalk cancellation circuit

Abstract

The invention relates to an adaptive crosstalk cancellation circuit agile design method and device, and the method comprises the steps: obtaining a circuit design index of a target circuit schematic diagram inputted by a target user; sending the circuit design indexes to a preset generator, so that the generator calculates a plurality of parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; and substituting the plurality of parameters into the target circuit schematic diagram to convert the plurality of parameters into a netlist file, a layout file and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and constructing the target circuit schematic diagram according to the netlist file, the layout file and the tester. Therefore, the problems that in the prior art, crosstalk exists in a Chiplet chip parallel interface circuit, and the design efficiency, flexibility and expandability are poor are solved.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design technology, and particularly relates to an agile design method and device for an adaptive crosstalk cancellation circuit. Background Art

[0002] With the continuous development of integrated circuit technology and the continuous improvement of the interconnection density of Chiplet chips, crosstalk has become an important factor affecting signal integrity in high-speed parallel interfaces, seriously affecting the transmission quality of signals and the performance of the system. Traditional crosstalk cancellation technologies are oriented to channels at the printed circuit board level outside the package, while the channels in the parallel interface circuit of Chiplet chips include those outside and inside the package, with smaller spacing, shorter transmission distances, and the influence of multi-channel coupling. Traditional technologies are difficult to meet the requirements.

[0003] In addition, existing circuit design methods also have deficiencies in terms of design efficiency, flexibility, and scalability, and there are limitations in verification and optimization, making it impossible to achieve rapid iteration of circuit design, process migration, and design space exploration.

[0004] The existing technologies mainly have the following defects when solving the crosstalk problem in the parallel interface of Chiplet chips:

[0005] 1. Existing crosstalk cancellation technologies are mainly oriented to channels at the printed circuit board level outside the package and cannot effectively handle crosstalk problems in the high-density interconnection scenario inside Chiplet chips.

[0006] 2. Existing circuit design methods lack automated and standardized processes, resulting in a long design cycle and poor reusability, and it is difficult to quickly adapt to different data rates, channel conditions, and process requirements.

[0007] 3. There are limitations in the verification and optimization processes, making it impossible to achieve rapid iteration of circuit design and design space exploration.

[0008] In summary, there is crosstalk in the parallel interface circuit of Chiplet chips in the existing technology, and the design efficiency, flexibility, and scalability are poor, which urgently need to be solved. Summary of the Invention

[0009] This application provides an agile design method and device for an adaptive crosstalk cancellation circuit to solve the problems such as crosstalk existing in the parallel interface circuit of Chiplet chips in the existing technology, and poor design efficiency, flexibility, and scalability.

[0010] An embodiment of the first aspect of the present application provides an agile design method for an adaptive crosstalk cancellation circuit, including the following steps: obtaining circuit design specifications of a target circuit schematic diagram input by a target user; sending the circuit design specifications to a preset generator, so that the generator calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; substituting the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and constructing the target circuit schematic diagram according to the netlist file, the layout file, and the tester.

[0011] Optionally, in an embodiment of the present application, the substituting the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and constructing the target circuit schematic diagram according to the netlist file, the layout file, and the tester includes: converting the multiple parameters into circuit layout routing information corresponding to the target circuit schematic diagram through the TED built-in engine, and determining the layout file by using the circuit layout routing information; based on the TED built-in engine, obtaining the excitation, load, and simulation commands in the test circuit of the target circuit schematic diagram, and constructing the tester according to the excitation, the load, and the simulation commands.

[0012] Optionally, in an embodiment of the present application, after constructing the target circuit schematic diagram according to the netlist file, the layout file, and the tester, it further includes: automatically adjusting and optimizing multiple parameters in the target circuit schematic diagram based on a preset optimizer and a machine learning strategy, and combining the netlist file, the layout file, and the tester, so as to optimize the target circuit schematic diagram by using the TED built-in engine and the automatically adjusted and optimized multiple parameters.

[0013] Optionally, in an embodiment of the present application, the sending the circuit design specifications to a preset generator, so that the generator calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm includes: constructing a dual-channel adaptive crosstalk cancellation system architecture according to the target scenario requirements, so as to receive crosstalk signals of adjacent channels by using the dual-channel adaptive crosstalk cancellation system architecture, and generating corresponding compensation signals through the crosstalk signals, so as to cancel the crosstalk signals by using the compensation signals; constructing the generator based on the preset dual-channel adaptive crosstalk cancellation system architecture and the TED agile design strategy.

[0014] The second aspect of the present application provides an agile design device for an adaptive crosstalk cancellation circuit, including: an acquisition module, configured to acquire circuit design metrics of a target circuit schematic diagram input by a target user; a calculation module, configured to send the circuit design metrics to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; a conversion module, configured to substitute the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file, and the tester.

[0015] Optionally, in an embodiment of the present application, the conversion module includes: a determination unit, configured to convert the multiple parameters into circuit layout routing information corresponding to the target circuit schematic diagram through the TED built-in engine, and use the circuit layout routing information to determine the layout file; a first construction unit, configured to obtain an excitation, a load, and a simulation command in a test circuit in the target circuit schematic diagram based on the TED built-in engine, and construct the tester according to the excitation, the load, and the simulation command.

[0016] Optionally, in an embodiment of the present application, it further includes: an optimization module, configured to automatically adjust and optimize multiple parameters in the target circuit schematic diagram based on a preset optimizer and a machine learning strategy, and in combination with the netlist file, the layout file, and the tester after constructing the target circuit schematic diagram according to the netlist file, the layout file, and the tester, so as to optimize the target circuit schematic diagram by using the TED built-in engine and the automatically adjusted and optimized multiple parameters.

[0017] Optionally, in an embodiment of the present application, the calculation module includes: a cancellation unit, configured to construct a dual-channel adaptive crosstalk cancellation system architecture according to target scenario requirements, so as to use the dual-channel adaptive crosstalk cancellation system architecture to receive crosstalk signals from adjacent channels, and generate corresponding compensation signals through the crosstalk signals, so as to cancel the crosstalk signals by using the compensation signals; a second construction unit, configured to construct the generator based on a preset dual-channel adaptive crosstalk cancellation system architecture and a TED agile design strategy.

[0018] The third aspect of the present application provides an electronic device, including: a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor executes the program to implement the adaptive crosstalk cancellation circuit agile design method as described in the above embodiments.

[0019] In a fourth aspect embodiment of the present application, a computer-readable storage medium is provided. The computer-readable storage medium stores a computer program, which when executed by a processor, implements the above-mentioned agile design method for an adaptive crosstalk cancellation circuit.

[0020] In a fifth aspect embodiment of the present application, a computer program product is provided, including a computer program, which is executed to implement the above-mentioned agile design method for an adaptive crosstalk cancellation circuit.

[0021] Thus, the embodiments of the present application have the following beneficial effects:

[0022] The embodiments of the present application can obtain the circuit design indicators of the target circuit schematic diagram input by the target user; send the circuit design indicators to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; substitute the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file, and the tester, thereby realizing the full-process automation from circuit design indicator definition to circuit layout design, and realizing the rapid generation and performance optimization of the circuit through parametric design and an optimizer. Thus, the problems in the prior art that there is crosstalk in the parallel interface circuit of Chiplet chips, and the design efficiency, flexibility, and scalability are poor are solved.

[0023] The additional aspects and advantages of the present application will be partially given in the following description, partially become obvious from the following description, or be understood through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and / or additional aspects and advantages of the present application will become obvious and easy to understand from the following description of the embodiments in conjunction with the drawings, where:

[0025] Figure 1 It is a flowchart of an agile design method for an adaptive crosstalk cancellation circuit provided according to an embodiment of the present application;

[0026] Figure 2 It is an architecture diagram of an adaptive crosstalk cancellation circuit generator provided by an embodiment of the present application;

[0027] Figure 3 It is a block diagram of a dual-channel adaptive crosstalk cancellation system architecture provided by an embodiment of the present application;

[0028] Figure 4 It is a flowchart of an agile design based on TED provided by an embodiment of the present application;

[0029] Figure 5An automatically generated circuit layout example diagram provided for an embodiment of the present application;

[0030] Figure 6 A simulation result diagram of an automatically generated circuit provided for an embodiment of the present application;

[0031] Figure 7 An example diagram of an adaptive crosstalk cancellation circuit agile design device according to an embodiment of the present application;

[0032] Figure 8 A schematic structural diagram of an electronic device provided for an embodiment of the present application.

[0033] Wherein, 10 - adaptive crosstalk cancellation circuit agile design device; 100 - acquisition module, 200 - calculation module, 300 - conversion module; 801 - memory, 802 - processor, 803 - communication interface. Detailed implementation manners

[0034] The embodiments of the present application will be described in detail below. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present application, but should not be construed as limiting the present application.

[0035] The adaptive crosstalk cancellation circuit agile design method and device according to an embodiment of the present application will be described below with reference to the accompanying drawings. In view of the problems mentioned in the above background art, the present application provides an adaptive crosstalk cancellation circuit agile design method. In this method, by obtaining the circuit design indexes of the target circuit schematic diagram input by the target user; sending the circuit design indexes to a preset generator, so that the generator automatically calculates a plurality of parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; substituting the plurality of parameters into the target circuit schematic diagram, so as to convert the plurality of parameters into a netlist file, a layout file and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and constructing the target circuit schematic diagram according to the netlist file, the layout file and the tester, thereby realizing the full-process automation from circuit design index definition to circuit layout design, and realizing the rapid generation and performance optimization of the circuit through parameterized design and an optimizer. Thus, the problems in the prior art that the parallel interface circuit of the Chiplet chip has crosstalk, and the design efficiency, flexibility and scalability are poor are solved.

[0036] Specifically, Figure 1 A flowchart of an adaptive crosstalk cancellation circuit agile design method provided for an embodiment of the present application.

[0037] As Figure 1 shown, the adaptive crosstalk cancellation circuit agile design method includes the following steps:

[0038] In step S101, obtain the circuit design specifications of the target circuit schematic diagram input by the target user.

[0039] In step S102, send the circuit design specifications to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm.

[0040] An embodiment of the present application can first construct an adaptive crosstalk cancellation generator, and its architecture is as Figure 2 shown. This generator is essentially a Python class, in which several methods are defined, and the main functions include automatic calculation of circuit parameters, schematic design, layout design, tester, optimizer, etc.

[0041] In the actual execution process, the user only needs to input the design specifications of the target circuit schematic diagram, such as data rate, power supply voltage, channel conditions, process requirements, etc., and the generator will automatically generate multiple optimal circuit parameters of the circuit schematic diagram, such as transistor size, passive device size, bias voltage, etc. through the parameter automatic calculation algorithm.

[0042] Optionally, in an embodiment of the present application, sending the circuit design specifications to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm includes: constructing a dual-channel adaptive crosstalk cancellation system architecture according to the target scenario requirements, so as to use the dual-channel adaptive crosstalk cancellation system architecture to receive the crosstalk signals of adjacent channels, and generate corresponding compensation signals through the crosstalk signals, so as to use the compensation signals to cancel the crosstalk signals; constructing a generator based on the preset dual-channel adaptive crosstalk cancellation system architecture and TED agile design strategy.

[0043] It should be noted that the adaptive crosstalk cancellation generator of the embodiment of the present application is mainly composed of a dual-channel adaptive crosstalk cancellation system architecture and a TED-based agile design process, which are specifically described as follows:

[0044] 1. Dual-channel adaptive crosstalk cancellation system architecture

[0045] In the specific implementation process, the dual-channel adaptive crosstalk cancellation system architecture of the embodiment of the present application can handle the crosstalk problem in multiple parallel channels. As Figure 3 shown, it shows the layout of a multi-channel XTC circuit and its relationship with adjacent channels. This architecture can cancel crosstalk by receiving signals from adjacent channels to construct compensation signals, and has an adaptive adjustment ability, and can adjust the cancellation parameters in real time according to the change of channel conditions.

[0046] 2. TED-based agile design process

[0047] AsFigure 4 As shown in Figure 4 , the agile design process based on TED in the embodiments of the present application can achieve full-process automation from circuit design index definition to circuit layout design, including complete processes such as circuit design index definition, architecture selection, schematic design, pre-simulation, layout design, post-simulation, and automatic parameter optimization. Among them, processes other than architecture selection are automatically implemented by the program without human intervention.

[0048] It can be understood that the innovative dual-channel adaptive crosstalk cancellation system architecture in the embodiments of the present application can handle crosstalk problems in multi-channel parallel channels, breaking through the limitations of traditional architectures and being applicable to high-density interconnection scenarios of actual Chiplet chips. In addition, the automated design process based on TED in the embodiments of the present application significantly shortens the development cycle, reduces design risks, and at the same time supports rapid transplantation of multiple process nodes, promoting the coordinated development of domestic EDA toolchains and the Chiplet ecosystem.

[0049] In step S103, multiple parameters are substituted into the target circuit schematic diagram, and through a preset TED built-in engine, the multiple parameters are converted into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram, and the target circuit schematic diagram is constructed based on the netlist file, the layout file, and the tester.

[0050] After that, the embodiments of the present application also need to substitute multiple parameters into the target circuit schematic diagram, and through the TED built-in engine, convert the multiple parameters into a netlist file, a layout file, and a tester corresponding to the circuit schematic diagram, so as to realize the rapid generation and performance optimization of the circuit through parametric design and an optimizer.

[0051] Optionally, in an embodiment of the present application, substituting multiple parameters into the target circuit schematic diagram, and through a preset TED built-in engine, converting the multiple parameters into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram, and constructing the target circuit schematic diagram based on the netlist file, the layout file, and the tester includes: converting multiple parameters into circuit layout routing information corresponding to the target circuit schematic diagram through the TED built-in engine to determine the layout file using the circuit layout routing information; based on the TED built-in engine, obtaining the excitation, load, and simulation commands in the test circuit in the target circuit schematic diagram, and constructing a tester according to the excitation, load, and simulation commands.

[0052] It should be noted that after obtaining multiple optimal circuit parameters of the circuit schematic diagram, the embodiments of the present application can substitute the above multiple parameters into the schematic diagram. This schematic design describes the types and electrical topological connections of each device in the circuit. After obtaining the results of automatic parameter calculation, it is converted into a general netlist file through the TED built-in engine; the layout design describes the layout routing information of the circuit layout and is converted into a general layout file through the TED built-in engine, such asFigure 5 As shown; the tester describes the excitation, load, and simulation commands in the test circuit.

[0053] Optionally, in an embodiment of the present application, after constructing the target circuit schematic diagram according to the netlist file, layout file, and tester, it further includes: based on a preset optimizer and machine learning strategy, and in combination with the netlist file, layout file, and tester, automatically adjusting and optimizing multiple parameters in the target circuit schematic diagram, so as to optimize the target circuit schematic diagram by using the TED built-in engine and the automatically adjusted and optimized multiple parameters.

[0054] In the specific implementation process, the optimizer in the embodiment of the present application can be based on the principle of machine learning and automatically adjust and optimize multiple parameters of the schematic diagram through the circuit pre-simulation results, so that the circuit designer can obtain the designed circuit schematic diagram and layout by inputting the design specifications, as Figure 6 shown, which not only significantly improves the design efficiency, but also supports the parameterization of the circuit and process migration; in addition, the embodiment of the present application can achieve multi-objective optimization of circuit parameters and exploration of the design space through the optimizer, further enhancing the competitiveness of the design.

[0055] Therefore, the embodiment of the present application can be designed through an optimizer and based on the principle of machine learning to automatically adjust and optimize circuit parameters by using the circuit pre-simulation results. Thus, through adaptive adjustment and parameter optimization, the crosstalk cancellation circuit can achieve effective crosstalk suppression under different data rates and channel conditions, greatly improving the signal integrity and system reliability, and effectively exploring the design space.

[0056] According to the agile design method of the adaptive crosstalk cancellation circuit proposed by the embodiment of the present application, by obtaining the circuit design specifications of the target circuit schematic diagram input by the target user; sending the circuit design specifications to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to the preset parameter calculation algorithm; substituting the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into the netlist file, layout file, and tester corresponding to the target circuit schematic diagram through the preset TED built-in engine, and constructing the target circuit schematic diagram according to the netlist file, layout file, and tester, thereby realizing the full-process automation from circuit design specification definition to circuit layout design, and achieving the rapid generation and performance optimization of the circuit through parametric design and optimizer.

[0057] Secondly, an agile design device for an adaptive crosstalk cancellation circuit proposed according to an embodiment of the present application is described with reference to the accompanying drawings.

[0058] Figure 7 It is a block diagram of the agile design device for the adaptive crosstalk cancellation circuit according to the embodiment of the present application.

[0059] AsFigure 7 As shown in Figure 7 , the adaptive crosstalk cancellation circuit agile design device 10 includes: an acquisition module 100, a calculation module 200, and a conversion module 300.

[0060] Among them, the acquisition module 100 is used to acquire the circuit design indexes of the target circuit schematic diagram input by the target user.

[0061] The calculation module 200 is used to send the circuit design indexes to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm.

[0062] The conversion module 300 is used to substitute multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file, and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file, and the tester.

[0063] Optionally, in an embodiment of the present application, the conversion module 300 includes: a determination unit and a first construction unit.

[0064] Among them, the determination unit is used to convert multiple parameters into circuit layout routing information corresponding to the target circuit schematic diagram through the TED built-in engine, so as to determine the layout file by using the circuit layout routing information.

[0065] The first construction unit is used to obtain the excitation, load, and simulation commands in the test circuit in the target circuit schematic diagram based on the TED built-in engine, and construct a tester according to the excitation, load, and simulation commands.

[0066] Optionally, in an embodiment of the present application, the adaptive crosstalk cancellation circuit agile design device 10 of the embodiment of the present application further includes: an optimization module, which is used to automatically adjust and optimize multiple parameters in the target circuit schematic diagram based on a preset optimizer and a machine learning strategy, and in combination with the netlist file, the layout file, and the tester after constructing the target circuit schematic diagram according to the netlist file, the layout file, and the tester, so as to optimize the target circuit schematic diagram by using the TED built-in engine and the automatically adjusted and optimized multiple parameters.

[0067] Optionally, in an embodiment of the present application, the calculation module 200 includes: a cancellation unit and a second construction unit.

[0068] Among them, the cancellation unit is used to construct a dual-channel adaptive crosstalk cancellation system architecture according to the target scenario requirements, so as to receive the crosstalk signals of adjacent channels by using the dual-channel adaptive crosstalk cancellation system architecture, generate corresponding compensation signals through the crosstalk signals, and cancel the crosstalk signals by using the compensation signals.

[0069] A second building unit for constructing a generator based on a preset dual-path adaptive crosstalk cancellation system architecture and a TED agile design strategy.

[0070] It should be noted that the foregoing explanation of the embodiments of the agile design method for the adaptive crosstalk cancellation circuit also applies to the agile design device for the adaptive crosstalk cancellation circuit of this embodiment, and will not be elaborated here.

[0071] The agile design device for the adaptive crosstalk cancellation circuit according to the embodiments of the present application includes an acquisition module 100 for acquiring the circuit design indexes of the target circuit schematic diagram input by the target user; a calculation module 200 for sending the circuit design indexes to a preset generator, so that the generator automatically calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; a conversion module 300 for substituting the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file and the tester, thereby realizing the full-process automation from circuit design index definition to circuit layout design, and realizing the rapid generation and performance optimization of the circuit through parametric design and an optimizer.

[0072] Figure 8 The structural schematic diagram of the electronic device provided by the embodiments of the present application. The electronic device may include:

[0073] A memory 801, a processor 802, and a computer program stored on the memory 801 and executable on the processor 802.

[0074] When the processor 802 executes the program, it implements the agile design method for the adaptive crosstalk cancellation circuit provided in the foregoing embodiments.

[0075] Further, the electronic device further includes:

[0076] A communication interface 803 for communication between the memory 801 and the processor 802.

[0077] The memory 801 is used for storing a computer program executable on the processor 802.

[0078] The memory 801 may include a high-speed RAM memory, and may also include a non-volatile memory, such as at least one disk memory.

[0079] If the memory 801, the processor 802, and the communication interface 803 are implemented independently, the communication interface 803, the memory 801, and the processor 802 can be interconnected via a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 only a thick line is used in Figure 8 , but it does not mean that there is only one bus or one type of bus.

[0080] Optionally, in a specific implementation, if the memory 801, the processor 802, and the communication interface 803 are integrated on a single chip, the memory 801, the processor 802, and the communication interface 803 can communicate with each other through an internal interface.

[0081] The processor 802 may be a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0082] The embodiments of the present application further provide a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the above-mentioned agile design method for an adaptive crosstalk cancellation circuit is implemented.

[0083] The embodiments of the present application further provide a computer program product, including a computer program, and when the computer program is executed, it is used to implement the above-mentioned agile design method for an adaptive crosstalk cancellation circuit.

[0084] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of this application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or N embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0085] In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of this application, the meaning of "N" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0086] Any process or method description shown in the flowchart or described in other ways herein can be understood as representing a module, segment, or part of code including one or N executable instructions for implementing a customized logical function or process, and the scope of the preferred embodiments of this application includes additional implementations, where the functions can be executed in a substantially simultaneous manner or in the reverse order according to the functions involved, rather than in the order shown or discussed, which should be understood by those skilled in the art to which the embodiments of this application pertain.

[0087] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definite sequence list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device), or used in conjunction with these instruction execution systems, apparatuses, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection part (electronic device) having one or N wirings, a portable computer disk cartridge (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically by optically scanning the paper or other media, followed by editing, interpretation, or otherwise processing as appropriate, and then stored in a computer memory.

[0088] It should be understood that various parts of the present application can be implemented by hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application specific integrated circuits having appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.

[0089] Those of ordinary skill in the art of this technology can understand that all or part of the steps carried by the methods of the above embodiments can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.

[0090] In addition, each functional unit in various embodiments of the present application may be integrated into one processing module, or each unit may exist physically alone, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0091] The above-mentioned storage medium may be a read-only memory, a magnetic disk, an optical disc, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present application. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present application.

Claims

1. An agile design method for an adaptive crosstalk cancellation circuit, characterized in that Including the following steps: Obtain the circuit design specifications of the target circuit schematic diagram input by the target user; Send the circuit design specifications to a preset generator, so that the generator calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; Substitute the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file and the tester.

2. The method according to claim 1, wherein The step of substituting the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file and the tester includes: Convert the multiple parameters into circuit layout routing information corresponding to the target circuit schematic diagram through the TED built-in engine, and use the circuit layout routing information to determine the layout file; Based on the TED built-in engine, obtain the excitation, load and simulation commands in the test circuit of the target circuit schematic diagram, and construct the tester according to the excitation, the load and the simulation commands.

3. The method according to claim 1, wherein After constructing the target circuit schematic diagram according to the netlist file, the layout file and the tester, it further includes: Based on a preset optimizer and machine learning strategy, and combined with the netlist file, the layout file and the tester, automatically adjust and optimize multiple parameters in the target circuit schematic diagram, so as to optimize the target circuit schematic diagram by using the TED built-in engine and the automatically adjusted and optimized multiple parameters.

4. The method according to claim 1, characterized in that The step of sending the circuit design specifications to a preset generator, so that the generator calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm includes: Construct a dual-channel adaptive crosstalk cancellation system architecture according to the target scenario requirements, so as to use the dual-channel adaptive crosstalk cancellation system architecture to receive the crosstalk signals of adjacent channels, generate corresponding compensation signals through the crosstalk signals, and use the compensation signals to cancel the crosstalk signals; Construct the generator based on a preset dual-channel adaptive crosstalk cancellation system architecture and a TED agile design strategy.

5. An agile design device for an adaptive crosstalk cancellation circuit, characterized in that Including: An acquisition module, configured to obtain the circuit design specifications of the target circuit schematic diagram input by the target user; A calculation module, configured to send the circuit design specifications to a preset generator, so that the generator calculates multiple parameters in the target circuit schematic diagram according to a preset parameter automatic calculation algorithm; A conversion module, configured to substitute the multiple parameters into the target circuit schematic diagram, so as to convert the multiple parameters into a netlist file, a layout file and a tester corresponding to the target circuit schematic diagram through a preset TED built-in engine, and construct the target circuit schematic diagram according to the netlist file, the layout file and the tester.

6. The device according to claim 5, characterized in that The conversion module includes: A determination unit, configured to convert the multiple parameters into circuit layout wiring information corresponding to the target circuit schematic diagram through the built-in TED engine, so as to determine the layout file by using the circuit layout wiring information; A first construction unit, configured to obtain an excitation, a load, and a simulation command in a test circuit in the target circuit schematic diagram based on the built-in TED engine, and construct the tester according to the excitation, the load, and the simulation command.

7. The device according to claim 5, characterized in that, It further includes: An optimization module, configured to, after constructing the target circuit schematic diagram according to the netlist file, the layout file, and the tester, automatically adjust and optimize multiple parameters in the target circuit schematic diagram based on a preset optimizer and a machine learning strategy, and combine the netlist file, the layout file, and the tester to optimize the target circuit schematic diagram by using the built-in TED engine and the automatically adjusted and optimized multiple parameters.

8. An electronic device, characterized in that, It includes: A memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor executes the program to implement the adaptive crosstalk cancellation circuit agile design method according to any one of claims 1-4.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to be used to implement the adaptive crosstalk cancellation circuit agile design method according to any one of claims 1-4.

10. A computer program product comprising a computer program, characterized in that, The computer program is executed to be used to implement the adaptive crosstalk cancellation circuit agile design method according to any one of claims 1-4.

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