Communication interface driving device and communication equipment

By connecting auxiliary pull-up and pull-down circuits in the communication interface driving circuit, and generating a driving signal with a smaller pulse width, the technical challenge of high-speed data transmission is solved and the signal output rate is improved.

CN120415416APending Publication Date: 2025-08-01SPREADTRUM COMMUNICATION (SHANGHAI) CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510543804.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-27
Publication Date
2025-08-01

AI Technical Summary

Technical Problem

The prior art is difficult to meet the needs of high-speed data transmission, and the traditional method improves the switching tube driving signal slope with limited slope.

Method used

The auxiliary pull-up circuit and the auxiliary pull-down circuit are connected in the communication interface driving circuit, and a driving signal with a smaller pulse width is generated through the signal processing circuit, controlling the working time of the auxiliary circuit, thereby increasing the rising and falling edge slope of the signal.

Benefits of technology

It effectively improves the signal output rate, meets the needs of high-speed data transmission, and simplifies the implementation process.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120415416A_ABST
    Figure CN120415416A_ABST
Patent Text Reader

Abstract

The invention discloses a communication interface driving device and communication equipment. The device comprises a pull-up circuit, a pull-down circuit, an auxiliary pull-up circuit, an auxiliary pull-down circuit and a signal processing circuit, the pull-up circuit is controlled by a first driving signal; the pull-down circuit is controlled by a second driving signal, and the second driving signal and the first driving signal are opposite in phase; the signal processing circuit comprises a first processing unit which is used for generating a third driving signal according to a falling edge of a first driving signal, and the pulse width of the third driving signal is smaller than that of the first driving signal; the second processing unit is used for generating a fourth driving signal according to the rising edge of the second driving signal, and the pulse width of the fourth driving signal is smaller than that of the second driving signal; the auxiliary pull-up circuit is controlled by a third driving signal; the auxiliary pull-down circuit is controlled by the fourth driving signal. By means of the scheme, the change slope of the output signal can be increased, and the transmission requirement of high-speed data is met.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of circuit technologies, and more particularly to a communication interface driving device and a communication device. Background Art

[0002] The connection between chips is completed by an interface driving circuit. As Figure 1 shown, when chips SOC1 and SOC2 interact, data transmission needs to be achieved through interface driving circuit 101 and interface driving circuit 201. Referring to Figure 2 and Figure 3 , Figure 2 the schematic structural diagram of the interface driving circuit in the chip, Figure 3 is Figure 2 the schematic diagram of the output signal of the interface driving circuit shown. The interface driving circuit includes a pull-up circuit 111 and a pull-down circuit 112. When sending data, low and high levels are sent through the pull-up circuit 111 and the pull-down circuit 112. Figure 3 In

[0003] 0 and 1 are used to represent low and high levels.

[0004] With the development of technologies, more and more data needs to be sent per unit time, and the rise time tr from 0 to 1 and the fall time tf from 1 to 0 need to be shorter and shorter, that is, the rise edge slope Slew rate = dv1 / tr and the fall edge slope Slew rate = dv2 / tf need to be faster and faster.

[0005] Currently, the data rate that the chip interface needs to send is getting faster and faster. The traditional method of increasing the slope of the switch tube driving signal has been very limited in increasing the data transmission speed and cannot meet the requirements of high-speed data transmission. Summary of the Invention

[0006] Embodiments of this application provide a communication interface driving device and a communication device to increase the slope of the output signal change and meet the requirements of high-speed data transmission.

[0007] To this end, the embodiments of this application provide the following technical solutions:

[0008] On the one hand, an embodiment of the present application provides a communication interface driving device, and the device includes: a pull-up circuit and a pull-down circuit connected to an output port, an auxiliary pull-up circuit connected in parallel with the pull-up circuit, an auxiliary pull-down circuit connected in parallel with the pull-down circuit, and a signal processing circuit;

[0009] The pull-up circuit is controlled by a first driving signal;

[0010] The pull-down circuit is controlled by a second driving signal, and the second driving signal and the first driving signal are inverse signals of each other;

[0011] The signal processing circuit includes: a first processing unit and a second processing unit;

[0012] The first processing unit is configured to generate a third driving signal according to a falling edge of the first driving signal, and a pulse width of the third driving signal is smaller than a pulse width of the first driving signal;

[0013] The second processing unit is configured to generate a fourth driving signal according to a rising edge of the second driving signal, and a pulse width of the fourth driving signal is smaller than a pulse width of the second driving signal;

[0014] The auxiliary pull-up circuit is controlled by the third driving signal;

[0015] The auxiliary pull-down circuit is controlled by the fourth driving signal.

[0016] Optionally, the first driving signal and the second driving signal are generated according to data to be sent by the communication interface.

[0017] Optionally, the first processing unit includes: a first delay unit and an OR gate;

[0018] The first delay unit is configured to perform delay and inversion processing on the first driving signal and output a first delay signal;

[0019] The OR gate is configured to perform a logical OR operation on the first driving signal and the first delay signal and output the third driving signal.

[0020] Optionally, the second processing unit includes: a second delay unit and an AND gate;

[0021] The second delay unit is configured to perform delay and inversion processing on the second driving signal and output a second delay signal;

[0022] The AND gate is configured to perform a logical AND operation on the second driving signal and the second delay signal and output the fourth driving signal.

[0023] Optionally, the delay time of the first driving signal by the first delay unit is the same as or different from the delay time of the second driving signal by the second delay unit.

[0024] Optionally, the structure of the auxiliary pull-up circuit is the same as or different from that of the pull-up circuit.

[0025] Optionally, the auxiliary pull-up circuit includes: a first switching transistor and a pull-up resistor.

[0026] Optionally, the structure of the auxiliary pull-down circuit is the same as or different from that of the pull-down circuit.

[0027] Optionally, the auxiliary pull-down circuit includes: a second switching transistor and a pull-down resistor.

[0028] Optionally, the first switching transistor and the second switching transistor are MOS transistors.

[0029] On the other hand, an embodiment of the present application further provides a communication device, including the communication interface driving device described above.

[0030] For the communication interface driving device and the communication device provided by the embodiments of the present application, an auxiliary pull-up circuit is added in parallel with the pull-up circuit, and an auxiliary pull-down circuit is added in parallel with the pull-down circuit. According to the falling edge of the first driving signal for controlling the pull-up circuit, a third driving signal with a pulse width smaller than that of the first driving signal is generated. Compared with the first driving signal, the change of the falling edge of the third driving signal is faster. By controlling the switching transistor in the auxiliary pull-up circuit with the third driving signal, the signal output node can start to switch from the low level to the high level earlier, reducing the time for the output signal to rise to the high level and improving the signal output speed. Similarly, according to the rising edge of the second driving signal for controlling the pull-down circuit, a fourth driving signal with a pulse width smaller than that of the second driving signal is generated. Compared with the second driving signal, the change of the rising edge of the fourth driving signal is faster. By controlling the switching transistor in the auxiliary pull-down circuit with the fourth driving signal, the signal output node can start to switch from the high level to the low level earlier, reducing the time for the output signal to rise to the low level and improving the signal output rate.

[0031] By using the communication interface driving device and the communication device provided by the embodiments of the present application, it is not affected by the limited slope improvement of the driving signals of the switching transistors in the pull-up circuit and the pull-down circuit, and can simply and conveniently meet the transmission requirements of high-rate data. Description of the Drawings

[0032] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will give an exemplary introduction to the drawings used in the description of the embodiments. The drawings in the following description are only those of the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings. The drawings are used to provide a further understanding of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation to the present application.

[0033] Figure 1 It is a schematic diagram of the inter-chip interface interaction;

[0034] Figure 2 is Figure 1 a schematic diagram of the structure of the interface driving circuit in the shown chip;

[0035] Figure 3 is Figure 2 a schematic diagram of the output signal of the shown interface driving circuit;

[0036] Figure 4 It is a schematic diagram of a structure of the communication interface driving device provided by the embodiment of the present application;

[0037] Figure 5 It is a schematic diagram of a structure of the first processing unit in the communication interface driving device provided by the embodiment of the present application;

[0038] Figure 6 It is a schematic diagram of a structure of the second processing unit in the communication interface driving device provided by the embodiment of the present application;

[0039] Figure 7 It is a specific schematic diagram of the pull-up circuit and the pull-down circuit in the communication interface driving device provided by the embodiment of the present application;

[0040] Figure 8 It is a waveform schematic diagram of the driving signal in the communication interface driving device provided by the embodiment of the present application. Detailed implementation manners

[0041] To make the above objects, features, and beneficial effects of the present application more obvious and understandable, the following will give a detailed description of the specific embodiments of the present application with reference to the drawings.

[0042] In view of the problem that the existing interface circuit has limited ability to improve the data transmission rate by simply relying on increasing the driving signals of the switching transistors in the pull-up circuit and the pull-down circuit to meet the high-speed data transmission requirements, the embodiments of the present application provide a communication interface driving device and a communication device. For the existing interface driving circuit, an auxiliary pull-up circuit connected in parallel with the pull-up circuit and an auxiliary pull-down circuit connected in parallel with the pull-down circuit are respectively added, and corresponding driving signals are generated, so that the pulse widths of the driving signals of the auxiliary pull-up circuit and the auxiliary pull-down circuit are smaller than the pulse widths of the driving signals of the pull-up circuit and the pull-down circuit, thereby reducing the high and low level switching time of the interface output signal, increasing the slope of the output signal, and further improving the signal output rate.

[0043] As Figure 4 shown, it is a schematic structural diagram of a communication interface driving device provided by an embodiment of the present application.

[0044] The communication interface driving device includes: a pull-up circuit 401 and a pull-down circuit 402 connected to an output port PAD, an auxiliary pull-up circuit 403 connected in parallel with the pull-up circuit 401, an auxiliary pull-down circuit 404 connected in parallel with the pull-down circuit 402, and a signal processing circuit.

[0045] In this embodiment, the pull-up circuit 401 is controlled by a first driving signal PG; the pull-down circuit 402 is controlled by a second driving signal NG; the auxiliary pull-up circuit 403 is controlled by a third driving signal PG_SR; the auxiliary pull-down circuit 404 is controlled by a fourth driving signal NG_SR.

[0046] Among them, the second driving signal NG and the first driving signal PG are inverse signals to each other. The third driving signal PG_SR and the fourth driving signal NG_SR are generated by the signal processing circuit according to the first driving signal PG and the second driving signal NG, and are pulse signals with smaller pulse widths compared to the first driving signal PG and the second driving signal NG.

[0047] As Figure 4 shown, the signal processing circuit includes a first processing unit 501 and a second processing unit 502. Among them:

[0048] The first processing unit 501 generates a third driving signal PG_SN according to the falling edge of the first driving signal PG, and the pulse width of the third driving signal PG_SN is smaller than the pulse width of the first driving signal PG.

[0049] The second processing unit 502 generates a fourth driving signal NG_SN according to the rising edge of the second driving signal NG, and the pulse width of the fourth driving signal NG_SN is smaller than the pulse width of the second driving signal NG.

[0050] As Figure 5As shown, it is a schematic structural diagram of a first processing unit in the communication interface driving device provided by an embodiment of the present application.

[0051] In this embodiment, the first processing unit includes a first delay unit 511 and an OR gate 512. Among them, the first delay unit 511 is used to delay and invert the first driving signal PG, and output a first delayed signal PGB; the OR gate 512 is used to perform a logical OR operation on the first driving signal PB and the first delayed signal PBG, and output a third driving signal PG_SR.

[0052] As Figure 6 shown, it is a schematic structural diagram of a second processing unit in the communication interface driving device provided by an embodiment of the present application.

[0053] In this embodiment, the second processing unit includes a second delay unit 521 and an AND gate 522. Among them, the second delay unit 521 is used to delay and invert the second driving signal NG, and output a second delayed signal NGB; the AND gate 522 is used to perform a logical AND operation on the second driving signal NG and the second delayed signal NGB, and output a fourth driving signal NG_SR.

[0054] It should be noted that in some embodiments, the delay time of the first delay unit 511 for the first driving signal PG and the delay time of the second delay unit 521 for the second driving signal NG may be the same or different, and the embodiments of the present application do not make any limitations in this regard. Moreover, the first delay unit 511 and the second delay unit 521 can delay and then invert the input driving signal, or invert and then delay the input driving signal, and the embodiments of the present application do not make any limitations in this regard.

[0055] In specific implementation, Figure 4 the structure of the auxiliary pull-up circuit 403 and the pull-up circuit 401 may be the same or different. Similarly, the structure of the auxiliary pull-down circuit 404 and the pull-down circuit 402 may be the same or different, and the embodiments of the present application do not make any limitations in this regard.

[0056] As Figure 7 shown, it is a specific schematic structural diagram of the pull-up circuit and the pull-down circuit in the communication interface driving device provided by an embodiment of the present application.

[0057] Among them, the auxiliary pull-up circuit 403 includes a first switching tube Q1 and a pull-up resistor R1. The switching tube Q1 can be a MOS tube, for example Figure 7 the first switching tube Q1 in the auxiliary pull-up circuit 403 in

[0058] Among them, the auxiliary pull-down circuit 404 includes a second switching transistor Q2 and a pull-down resistor R2. The second switching transistor Q2 can be a MOS transistor, such as Figure 7 the second switching transistor Q2 in the auxiliary pull-down circuit 404 can be a PMOS transistor. In this embodiment, the auxiliary pull-down circuit 404 has the same structure as the pull-down circuit 402. The switching transistors in the two pull-down circuits can be of the same or different types, and the resistance values of the pull-down resistors in the two pull-down circuits can be the same or different.

[0059] In this embodiment, the pull-up resistor R1 and the pull-down resistor R2 are connected, and the connection point is connected to the output port PAD. The first switching transistor Q1 in the auxiliary pull-up circuit 403 is respectively connected to the power supply and the pull-up resistor R1; the second switching transistor Q2 in the auxiliary pull-down circuit 404 is respectively connected to the pull-down resistor R2 and the ground.

[0060] Referring to Figure 8 Figure 8 shows the waveform schematic diagrams of the driving signals in the communication interface driving device provided by the embodiment of the present application.

[0061] When data is sent, a first driving signal PG and a second driving signal NG are generated according to the data to be sent. The first driving signal PG and the second driving signal NG are inverse signals to each other.

[0062] At the same time, a delayed inverse signal PGB is generated according to the first driving signal PG. The first driving signal PG and the delayed inverse signal PGB are subjected to a logical OR operation to generate a third driving signal PG_SR. It can be seen from Figure 8 that the third driving signal PG_SR is a negative pulse signal triggered by the falling edge of the first driving signal PG. Using the third driving signal PG_SR to drive Figure 7 the first switching transistor Q1 in can control the auxiliary pull-up circuit 403, so that it can pull up during the main path pull-up process, thereby enhancing the rising edge slope of the first driving signal PG and effectively improving the data output rate.

[0063] Similarly, a delayed inverse signal NGB is generated according to the second driving signal NG. The second driving signal NG and the delayed inverse signal NGB are subjected to a logical AND operation to generate a fourth driving signal NG_SR. It can be seen from Figure 8 that the fourth driving signal NG_SR is a positive pulse signal triggered by the rising edge of the second driving signal NG. Using the fourth driving signal NG_SR to drive Figure 7 the second switching transistor Q2 in can control the auxiliary pull-down circuit 404, so that it can pull down during the main path pull-down process, thereby enhancing the falling edge slope of the second driving signal NG and effectively improving the data output rate.

[0064] The communication interface driving device provided by the embodiment of the present application can be applied to a double data rate memory controller component, such as an FPGA (Field Programmable Gate Array), an SOC (System-On-a-Chip), etc., or a double data rate memory, and can also be applied to devices such as a high-speed Serdes (serial) interface.

[0065] Correspondingly, an embodiment of the present application also provides a communication device including the above communication interface driving device.

[0066] For other related descriptions of the above communication device, reference can be made to the relevant descriptions in the corresponding previous embodiments, which will not be elaborated here.

[0067] In specific implementation, the above device can correspond to a chip with corresponding functions in a network device and / or a user device, such as an SOC (System-On-a-Chip), a baseband chip, a chip module, etc.

[0068] In specific implementation, for each module / unit included in each device and product described in the above embodiments, it can be a software module / unit, a hardware module / unit, or can also be partially a software module / unit and partially a hardware module / unit. For example, for each device and product applied to or integrated into a chip, each module / unit included therein can be implemented in a hardware manner such as a circuit, or at least some modules / units can be implemented in a software program manner, and the software program runs on a processor integrated inside the chip, and the remaining (if any) part of the modules / units can be implemented in a hardware manner such as a circuit; for each device and product applied to or integrated into a chip module, each module / unit included therein can be implemented in a hardware manner such as a circuit, and different modules / units can be located in the same component (such as a chip, a circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented in a software program manner, and the software program runs on a processor integrated inside the chip module, and the remaining (if any) part of the modules / units can be implemented in a hardware manner such as a circuit; for each device and product applied to or integrated into a terminal, each module / unit included therein can be implemented in a hardware manner such as a circuit, and different modules / units can be located in the same component (such as a chip, a circuit module, etc.) or different components inside the terminal, or at least some modules / units can be implemented in a software program manner, and the software program runs on a processor integrated inside the terminal, and the remaining (if any) part of the modules / units can be implemented in a hardware manner such as a circuit.

[0069] It should be understood that the term "and / or" in this text is merely a correlative relationship describing related objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. Additionally, the character " / " in this text indicates that the related objects before and after are in an "or" relationship.

[0070] In the embodiments of the present application, "a plurality of" means two or more.

[0071] The first, second, etc. descriptions that appear in the embodiments of the present application are only for schematic and differentiating the described objects, without an order, and do not represent a special limitation on the number of devices in the embodiments of the present application, and cannot constitute any limitation to the embodiments of the present application.

[0072] The "connection" that appears in the embodiments of the present application refers to various connection methods such as direct connection or indirect connection to achieve communication between devices, and the embodiments of the present application do not make any limitation on this.

[0073] In several embodiments provided by the present application, it should be understood that the disclosed devices and equipment can be implemented in other ways. For example, the device embodiments described above are only illustrative; for example, the division of the units is only a logical function division, and there can be other division methods in actual implementation; for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point, the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces, and the indirect coupling or communication connection of the device or unit can be in electrical, mechanical or other forms.

[0074] The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they can be located in one place, or can be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0075] In addition, the functional units in each embodiment of the present application can be integrated in a processing unit, or each unit can be physically arranged separately, or two or more units can be integrated in one unit. The above-mentioned integrated units can be implemented in the form of hardware, or in the form of hardware plus software functional units.

[0076] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. A communication interface driving device, characterized in that, The device includes: a pull-up circuit and a pull-down circuit connected to the output port, an auxiliary pull-up circuit connected in parallel with the pull-up circuit, an auxiliary pull-down circuit connected in parallel with the pull-down circuit, and a signal processing circuit; The pull-up circuit is controlled by a first driving signal; The pull-down circuit is controlled by a second driving signal, and the second driving signal is an inverted signal of the first driving signal; The signal processing circuit includes: a first processing unit and a second processing unit; The first processing unit is configured to generate a third driving signal according to the falling edge of the first driving signal, and the pulse width of the third driving signal is less than the pulse width of the first driving signal; The second processing unit is configured to generate a fourth driving signal according to the rising edge of the second driving signal, and the pulse width of the fourth driving signal is less than the pulse width of the second driving signal; The auxiliary pull-up circuit is controlled by the third driving signal; The auxiliary pull-down circuit is controlled by the fourth driving signal.

2. The device according to claim 1, characterized in that The first driving signal and the second driving signal are generated according to the data to be transmitted by the communication interface.

3. The device according to claim 1, characterized in that, The first processing unit includes: a first delay unit and an OR gate; The first delay unit is configured to delay and invert the first driving signal and output a first delayed signal; The OR gate is configured to perform a logical OR operation on the first driving signal and the first delayed signal and output the third driving signal.

4. The device according to claim 3, wherein The second processing unit includes: a second delay unit and an AND gate; The second delay unit is configured to delay and invert the second driving signal and output a second delayed signal; The AND gate is configured to perform a logical AND operation on the second driving signal and the second delayed signal and output the fourth driving signal.

5. The device according to claim 4, characterized in that The delay time of the first driving signal by the first delay unit is the same as or different from the delay time of the second driving signal by the second delay unit.

6. The device according to any one of claims 1 to 5, characterized in that, The structure of the auxiliary pull-up circuit is the same as or different from that of the pull-up circuit.

7. The device according to claim 6, characterized in that, The auxiliary pull-up circuit includes: a first switching transistor and a pull-up resistor.

8. The device according to claim 7, characterized in that, The structure of the auxiliary pull-down circuit is the same as or different from that of the pull-down circuit.

9. The device according to claim 8, wherein The auxiliary pull-down circuit includes: a second switching transistor and a pull-down resistor.

10. The device according to claim 9, characterized in that, The first switching transistor and the second switching transistor are MOS transistors.

11. A communication device, characterized in that, A communication interface driving device according to any one of claims 1 to 10 is included.