Tunnel junction high electron mobility transistor based on P-type gallium nitride gate structure

Abstract

The invention discloses a tunneling junction HEMT based on a P-GaN gate structure. The tunneling junction HEMT comprises a substrate, a nucleating layer, a buffer layer, a nitride-based channel layer, a nitride-based barrier layer, a P-type GaN layer, a gate, a source, a drain and a surface passivation layer. The nucleating layer and the buffer layer are disposed on the substrate with the nitride-based channel layer thereover. A nitride-based barrier layer is on the nitride-based channel layer to form a 2DEG channel between the channel layer and the barrier layer. The P-type GaN layer is located on the nitride-based barrier layer. The grid electrode is located on the P-type GaN layer. The source electrode and the 2DEG channel form a tunnel junction, and the drain electrode is located on the nitride-based barrier layer. The surface passivation layer covers the nitride-based barrier layer, and the surface passivation layer is provided with two parts which are located between the gate-source electrode and the gate-drain electrode respectively.

Description

Technical Field

[0001] The present invention relates to nitride-based semiconductor devices; specifically, to tunnel junction high-electron-mobility transistors (TJ-HEMTs) based on a P-GaN gate structure. Background Art

[0002] Gallium nitride power devices were initially mainly depletion-mode (D-mode) high-electron-mobility transistors (HEMTs). Due to the two-dimensional electron gas (2DEG) channel generated by the unique polarization effect of group III-V nitrides, they remain in an always-on state without applying a gate voltage. At the same time, the high-concentration and high-mobility 2DEG channel makes the depletion-mode gallium nitride HEMT have a low on-resistance. However, compared with normally-off or enhancement-mode (E-mode) devices, depletion-mode devices do not have the fail-safe characteristic and are thus not suitable for power systems. Currently, the mainstream normally-off gallium nitride power devices are mainly HEMTs with a P-type gallium nitride gate structure. It depletes the 2DEG channel by introducing a P-type gallium nitride layer in the gate region to achieve an enhancement-mode operation. However, in this structure, to ensure that the P-type gallium nitride gate HEMT has a positive threshold voltage (threshold voltage; V TH ), the thickness and aluminum composition of the aluminum gallium nitride barrier layer need to be reduced within a certain range, which will lead to a decrease in the 2DEG density in the drift region of the device, thereby increasing the on-resistance of the device. In addition, when the gate length is small, the P-type gallium nitride gate HEMT will exhibit a more serious short-channel effect, such as the drain induced barrier lowering effect (DIBL).

[0003] The P-type gallium nitride gate structure HEMT is the mainstream device structure of enhancement-mode (normally-off) gallium nitride power devices. By introducing a P-type gallium nitride layer, it completely depletes the 2DEG in the gate region under zero gate bias, thus achieving an enhancement-mode operation. However, while achieving a positive threshold voltage, this method limits the 2DEG density in the drift region of the device, resulting in a certain trade-off relationship between the threshold voltage and the on-resistance of the device. To solve this problem, researchers have developed the regrowth technology of aluminum gallium nitride. By selectively etching and regrowing the aluminum gallium nitride barrier layer, the aluminum gallium nitride layer in the drift region of the device is made thicker than that in the gate region, obtaining a lower on-resistance while achieving a positive threshold voltage. Nevertheless, the introduction of the regrowth technology makes the device fabrication process more complex and brings additional costs.

[0004] The short-channel effect of the low-voltage P-type gallium nitride gate structure HEMT is another important factor restricting device performance, especially the DIBL effect and the resulting high off-state current. For P-type gallium nitride HEMTs with a short gate length, the planar gate structure is difficult to effectively suppress the DIBL effect, and it is difficult to completely turn off the device under zero gate voltage. Adopting a more complex fin-type three-dimensional gate architecture can effectively suppress the DIBL effect, but this method increases the process difficulty, and the reliability and stability of its gate structure still need to be evaluated and are not yet suitable for large-scale production.

[0005] Therefore, there is an urgent need to develop a nitride-based semiconductor device that can effectively reduce the on-resistance, suppress the short-channel effect (such as the DIBL effect and the resulting high off-state current), and allow further miniaturization of the device size while achieving an enhancement-mode operation, ultimately realizing low-cost and high-benefit large-scale production. Summary of the Invention

[0006] The object of the present invention is to provide a nitride-based semiconductor device structure to solve the above problems and overcome the deficiencies in the prior art.

[0007] The present invention provides a nitride-based device structure, characterized by having a source tunneling junction and a P-GaN gate structure to achieve a low on-resistance and suppress the short-channel effect. According to the embodiments provided by the present invention, the nitride-based device is a tunneling junction high electron mobility transistor (TJ-HEMT) based on a P-GaN gate structure. The device sequentially includes a substrate from bottom to top, a buffer layer disposed above the substrate, a channel layer disposed above the buffer layer, a barrier layer disposed above the channel layer, and a P-type gallium nitride layer disposed above the barrier layer.

[0008] According to a first aspect of the present invention, a tunneling junction HEMT having a source tunneling junction and a P-GaN gate structure is provided. The tunneling junction HEMT with the P-GaN gate structure includes a substrate, a nucleation layer, a buffer layer, a nitride-based channel layer, a nitride-based barrier layer, a P-type GaN layer, a gate, a source, a drain, and a surface passivation layer. Among them, the nucleation layer is disposed on the substrate; the buffer layer is disposed on the nucleation layer; the nitride-based channel layer is disposed on the buffer layer; the nitride-based barrier layer is disposed on the nitride-based channel layer; a 2DEG channel is formed between the nitride-based channel layer and the nitride-based barrier layer; the P-type GaN layer is disposed on the nitride-based barrier layer; the gate is disposed on the P-type GaN layer; the source is disposed on the nitride-based channel layer, extends upward from the nitride-based channel layer, contacts at least the side surface of the nitride-based channel layer to form an interface, and forms a source tunneling junction with the 2DEG channel; the drain is disposed on the nitride-based barrier layer; the surface passivation layer is disposed on the nitride-based barrier layer, and a part of it is located between the gate and the source, and another part is located between the gate and the drain.

[0009] According to the above structure, the proposed TJ-HEMT based on the P-GaN gate structure has a source tunneling junction, and the gate-source spacing is zero, so the on-resistance of the device will be further reduced. At the same time, the source tunneling junction is completely controlled by the gate and is less affected by the drain bias state, which can effectively suppress the DIBL effect. Therefore, the device can achieve further miniaturization of the gate size and maintain a low off-state current. In addition, compared with the traditional P-GaN gate structure HEMT, the TJ-HEMT device can achieve a higher 2DEG density and a lower device on-resistance, and has better device on-conduction performance while realizing the enhancement mode of operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Embodiments of the present invention are described in more detail in conjunction with the accompanying drawings, where:

[0011] Figure 1 is a vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention;

[0012] Figure 2A is a schematic cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention;

[0013] Figure 2B is Figure 2A the energy band diagram along the tangent of the tunneling junction HEMT based on the P-GaN gate structure in GS under different V GS1 conditions, where V GS2 <V GS3 ;

[0014] Figure 3ASchematic cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention;

[0015] Figure 3B is Figure 3A The energy band diagram along the tangent of the tunneling junction HEMT based on the P-GaN gate structure in GS under high V conditions;

[0016] Figure 4 Vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention;

[0017] Figure 5 Vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention;

[0018] Figure 6 Vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention;

[0019] Figure 7 Vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention; and

[0020] Figure 8 Vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention. Detailed implementation manners

[0021] In the following description, analogs such as tunneling junction HEMTs (TJ-HEMTs) based on P-GaN gate structures are presented as preferred examples. Those skilled in the art will understand that modifications can be made without departing from the scope and spirit of the present invention, including adding and / or replacing features. Specific details may be omitted so as not to obscure the features of the present invention; however, this disclosure is written to enable those skilled in the art to practice the teachings herein without undue experimentation.

[0022] Figure 1 is a vertical cross-sectional view of a tunneling junction HEMT based on a P-GaN gate structure according to an embodiment of the present invention. The tunneling junction HEMT 100A based on a P-GaN gate structure includes a substrate 102, a nucleation layer 104, a buffer layer 106, a nitride-based channel layer 110, a nitride-based barrier layer 130, a P-type GaN layer 140, a gate 150, a source 160, a drain 170, and a dielectric layer (surface passivation layer) 180.

[0023] The substrate 102 is a semiconductor substrate. For example, the substrate 102 can be made of semiconductor materials such as silicon, silicon germanium, silicon carbide, gallium arsenide, P-type doped silicon, N-type doped silicon, sapphire, diamond, or semiconductors-on-insulator materials like silicon-on-insulator (SOI), or other suitable substrate materials. In some embodiments, the substrate 102 can include group III elements, group IV elements, group V elements, or a combination thereof (e.g., III-V compounds), such as aluminum nitride and gallium nitride. In other embodiments, the substrate 102 can include feature structures formed by one or more semiconductor materials, such as doped regions, buried layers, epitaxial (epi) layers, or a combination thereof.

[0024] The nucleation layer 104 is disposed on the substrate 102, and the buffer layer 106 is disposed on the nucleation layer 104. The nucleation layer 104 is formed between the substrate 102 and the buffer layer 106. The nucleation layer 102 can provide a transition to accommodate the mismatch / difference between the substrate 102 and the buffer layer 106 including group III nitride materials. Exemplary materials for the nucleation layer 104 can include any alloy of aluminum nitride, gallium nitride, indium nitride, or a combination thereof. The buffer layer 106 is formed to reduce the lattice mismatch and thermal mismatch between the substrate 102 and the nitride-based channel layer 110, thereby eliminating defects caused by the mismatch / difference. The buffer layer 106 can include III-V compounds, including aluminum, gallium, indium, nitrogen, or a combination thereof. In some embodiments, the material of the buffer layer 106 can also include aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride, indium aluminum gallium nitride, or a combination thereof.

[0025] The nitride-based channel layer 110 is disposed on the buffer layer 106. The nitride-based barrier layer 130 is disposed on the nitride-based channel layer 110. The nitride-based material of the nitride-based channel layer 110 can include nitrides or III-V compounds, such as alloys of aluminum nitride, gallium nitride, indium nitride, or a combination thereof. For example, the nitride-based material of the nitride-based channel layer 110 can also include In x AlyGa (1-x-y) N, where x + y ≤ 1, Al y Ga (1-y) N, where y ≤ 1. The nitride-based material of the nitride-based barrier layer 130 can include binary group III nitride compounds, ternary group III nitrides, quaternary group III nitrides, aluminum nitride, aluminum gallium nitride, indium aluminum nitride, indium aluminum gallium nitride, or a combination thereof, such as In x Al y Ga (1-x-y) N, where x + y ≤ 1, Al y Ga (1-y)N, where y ≤ 1. The nitride-based barrier layer 130 can be formed using a single layer or a multi-layer stack. For example, the nitride-based barrier layer 130 can be an alloy of aluminum nitride, gallium nitride, indium nitride, or a combination thereof. Similarly, the nitride-based material of the nitride-based barrier layer 130 can also include In x AlyGa (1–x–y) N (where x + y ≤ 1), Al y Ga (1–y) N (where y ≤ 1). The nitride-based material of the nitride-based barrier layer 130 can also include a III-V mobility enhancement layer (MEL). The III-V MEL can enhance the electron mobility by reducing the scattering effect at the interface. In addition, the III-V MEL can optimize the energy band structure at the channel-barrier layer interface, which helps to increase the 2DEG density and improve the conductivity. In some embodiments, the III-V MEL is a binary group III nitride compound layer including aluminum nitride, indium nitride, or a combination thereof.

[0026] As a HEMT device, by selecting the materials of the nitride-based semiconductor layers, the bandgap of the nitride-based barrier layer 130 can be made greater than the bandgap of the nitride-based channel layer 110. The difference in bandgap and electron affinity between the barrier layer and the channel layer will result in the formation of a heterojunction with a unique energy band alignment structure between the layers, forming a triangular potential well at the interface. Due to the unique polarization effect of III-V nitrides, electrons will accumulate in the potential well, forming a two-dimensional electron gas (2DEG) channel 112 at the heterojunction interface. In summary, the tunneling junction HEMT 100A based on the P-GaN gate structure can include at least one gallium nitride-based HEMT structure.

[0027] The P-type GaN layer 140 is disposed on top of the nitride-based barrier layer 130, and the gate 150 is disposed on top of the P-type GaN layer 140. The gate 150 can form a Schottky or Ohmic contact with the P-type GaN layer 140. The tunneling junction HEMT 100A based on the P-GaN gate structure can operate in the enhancement mode and can maintain an off state when the gate 150 is at approximately zero bias. The P-type GaN layer 140 and the nitride-based barrier layer 130 can form at least one heterojunction or p-n junction. The 2DEG channel 112 in the region below the gate 150 can also remain conductive. However, the device provided by the present invention is not limited to this operating mode, and the threshold voltage can be adjusted according to specific application scenarios to meet the requirements.

[0028] The P-type GaN layer 140 is a P-type doped III-V semiconductor layer. In some embodiments, P-type doping is achieved by using P-type impurities such as beryllium, magnesium, zinc, cadmium, and magnesium. In some embodiments, the P-type GaN layer 140 can be replaced with other P-type materials, including P-type gallium nitride, P-type aluminum gallium nitride, P-type indium nitride, P-type indium aluminum nitride, P-type indium gallium nitride, P-type indium aluminum gallium nitride, or combinations thereof. The gate 150 can be made of metal, metal alloy, metal nitride, or heavily doped semiconductor. The conductive material of the gate 150 can include nickel, titanium, gold, molybdenum, tungsten, aluminum, copper, silver, chromium, titanium nitride, titanium tungsten alloy, ITO (indium tin oxide), or combinations thereof.

[0029] The source 160 and the drain 170 are formed above the nitride-based channel layer 110 and the nitride-based barrier layer 130. The P-type GaN layer 140 and the gate 150 are located between the source 160 and the drain 170. The bottom surface of the source 160 contacts the nitride-based channel layer 110, and the bottom surface of the drain 170 contacts the nitride-based barrier layer 130.

[0030] The source 160 is located on the nitride-based channel layer 110 and extends upward from the nitride-based channel layer 110 to contact at least the side surface of the nitride-based channel layer 110, so that the source 160 can form a contact interface with at least one heterojunction channel between the nitride-based channel layer 110 and the nitride-based barrier layer 130. In this regard, the nitride-based channel layer 110 has a groove, and the bottom surface of the groove can accommodate the bottom of the source 160. In addition, the source 160 can contact the nitride-based barrier layer 130. In some embodiments, the source 160 is made of metal, metal alloy, or silicide. In this case, the source 160 and the 2DEG channel 112 can form a Schottky contact. The source-side tunneling junction can be a metal-2DEG Schottky junction. In some embodiments, the source 160 can be made of heavily doped P-type binary III-V nitrides, ternary III-V nitrides, quaternary III-V nitrides, polysilicon, metal oxide semiconductors, or other heavily doped P-type semiconductor materials. Therefore, the source 160 can form a p-n junction with the 2DEG channel. The height of the source 160 is adjustable. For example, the source 160 can extend to a position above or below the bottom surface of the P-type GaN layer 140. The source 160 can be a single-layer structure composed of a single material or a multi-layer structure composed of the same or different materials.

[0031] In some embodiments, the drain 170 may include metal, alloy, doped semiconductor material (such as doped crystalline silicon), compound (such as silicide and nitride), other conductor materials, or a combination thereof. In some embodiments, the conductive material of the drain 170 may include nickel, titanium, gold, molybdenum, tungsten, aluminum, copper, silver, chromium, titanium nitride, titanium tungsten alloy, ITO, or a combination thereof. In some embodiments, the drain 170 can be formed to have an ohmic contact, including titanium / aluminum / titanium nitride, titanium / aluminum / nickel / gold, titanium / aluminum / titanium / gold, titanium / gold, or a combination thereof. The drain 170 may be a single-layer structure composed of a single material, or a multi-layer structure composed of the same or different materials.

[0032] The dielectric layer 180 includes a first portion 182 and a second portion 184, and the first portion 182 and the second portion 184 are separated by the P-type GaN layer 140 and the gate 150. The first portion 182 is located on the source 160 and extends upward to contact the sidewalls of the nitride-based barrier layer 130, the P-type GaN layer 140, and the gate 150. The left sidewall of the nitride-based channel layer 110 is completely covered by the first portion 182 and the source 160. At the same time, the left sidewall of the P-type GaN layer 140 is completely covered by the first portion 182. The second portion 184 is located between the gate 150 and the drain electrode 170 and covers the nitride-based barrier layer 130. The material of the dielectric layer 180 may be a single-layer structure composed of a single material, including silicon dioxide, aluminum oxide, aluminum nitride, aluminum oxynitride, silicon nitride (SiNx), oxide, nitride, or a combination thereof. In some embodiments, the dielectric layer 180 is a multi-layer structure composed of different materials, such as a composite dielectric layer having aluminum oxide / silicon nitride, aluminum oxide / silicon dioxide, aluminum nitride / silicon nitride, aluminum nitride / silicon dioxide, or a combination thereof.

[0033] Based on the TJ-HEMT structure with a P-GaN gate structure, in addition to optimizing the on-resistance, it also solves the short-channel effect in traditional P-GaN gate structure HEMT devices. The TJ-HEMT structure has a tunneling junction (e.g., a metal-2DEG tunneling junction) on the source side, which is near / at the interface between the 2DEG channel 112 of the nitride-based channel layer 110 and the source 160. Since the tunneling junction can be completely controlled by the gate 150 and is almost not affected by the bias state of the drain (e.g., the bias voltage directly applied to the drain 170), the problem of the drain-induced barrier lowering effect (DIBL) can be effectively alleviated. In the off state, that is, when a zero or negative bias voltage (e.g., the bias voltage applied to the gate 150) is applied to the device gate, the tunneling junction provides reverse blocking ability to achieve a lower off-state current.

[0034] The working principle of the TJ-HEMT device is based on the modulation of the gate voltage (VGS) on the barrier thickness of the source tunneling junction. When VGS exceeds the threshold voltage (VTH) of the device, electrons have a high enough probability to tunnel from the source to the 2DEG channel, thus turning on the device. Different from the traditional P-GaN gate structure HEMT, the threshold voltage of the tunneling junction HEMT 100A with the P-GaN gate structure is determined by the tunneling probability of electrons and is less affected by the 2DEG concentration in the gate region. Therefore, a thicker aluminum gallium nitride (e.g., a thicker nitride-based barrier layer 130) can be used to achieve a higher 2DEG concentration, thereby reducing the on-resistance while maintaining the enhancement-mode device operation. For example, in some embodiments, the nitride-based barrier layer 130 can be a 20-nanometer-thick Al 0.25 Ga 0.75 N layer. In addition, the zero gate-source spacing in the TJ-HEMT structure will further reduce the on-resistance of the device.

[0035] Figure 2A FIG. is a cross-sectional schematic diagram of a TJ-HEMT based on a P-GaN gate structure according to an embodiment of the present invention; Figure 2B is Figure 2A the energy band diagram along the tangent of the TJ-HEMT based on the P-GaN gate structure in GS under different V GS1 conditions, where V GS2 <V GS3 . The TJ-HEMT based on the P-GaN gate structure is arranged in the foregoing structure. E c1 、E c1 、E c3 correspond to V GS1 <0V, V GS2 = 0V, V GS3 > 0V. Figure 3A FIG. is a cross-sectional schematic diagram of a TJ-HEMT based on a P-GaN gate structure according to an embodiment of the present invention; Figure 3B is Figure 3A the energy band diagram along the tangent of the TJ-HEMT based on the P-GaN gate structure in GS under high V conditions. These schematic diagrams detail the working principle and advantages of the TJ-HEMT.

[0036] As shown, the TJ-HEMT conducts current based on source electron tunneling. As the gate-source voltage (V GS ) increases, the barrier width gradually narrows and promotes electron tunneling from the source to the channel. In addition, the schematic diagram also shows the energy band changes of the P-type GaN layer, the barrier layer, and the channel layer under high gate bias conditions.

[0037] Figure 4FIG. 0 is a vertical cross-sectional view of a tunneling junction HEMT 100B based on a P-GaN gate structure according to an embodiment of the present invention. The tunneling junction HEMT 100B based on a P-GaN gate structure has a structure similar to that of the tunneling junction HEMT 100A based on a P-GaN gate structure, except that the source electrode 160 of the tunneling junction HEMT 100B based on a P-GaN gate structure is shorter. Specifically, the upper surface of the source electrode 160 is located below the upper surface of the nitride-based barrier layer 130.

[0038] A first portion 192 of the surface passivation layer 190 extends from the upper surface of the source electrode 160 to the gate electrode 150, and the first portion 192 covers the side surfaces of the nitride-based barrier layer 130 and the P-type GaN layer 140. Accordingly, the source electrode 160 is buried below the first portion 192 of the surface passivation layer 190. The tunneling junction HEMT 100B based on a P-GaN gate structure further includes a source via 196, which is located within the first portion 192 of the surface passivation layer 190 and is in contact with the source electrode 160. The source via 196 can extend upward to a position higher than the P-type GaN layer 140.

[0039] In some embodiments, the source via 196 and the source electrode 160 have different conductive materials. For example, since the source electrode 160 is used to form a tunneling junction, characteristics such as work function, chemical stability, and the ability to establish an effective tunneling effect with the 2DEG layer need to be considered to ensure that it can form an effective tunneling junction (such as a Schottky junction) with the 2DEG channel. The source via 196 needs to have good conductivity, form good contact with the source electrode 160, and be compatible with other process steps at the same time.

[0040] The structures of the gate electrode and the source electrode in the TJ-HEMT device can vary as follows according to process conditions and device performance requirements, etc.

[0041] Figure 5 FIG. 13 is a vertical cross-sectional view of a tunneling junction HEMT 100C based on a P-GaN gate structure according to an embodiment of the present invention. The tunneling junction HEMT 100C based on a P-GaN gate structure has a structure similar to that of the tunneling junction HEMT 100A based on a P-GaN gate structure, except that the gate electrode 150 of the tunneling junction HEMT 100C based on a P-GaN gate structure is non-self-aligned. A second portion 184 of the dielectric layer 180 also extends to the upper surface of the P-type GaN layer 140 and covers the sidewalls of the gate electrode 150. In addition, the first portion 182 and the second portion 184 of the dielectric layer 180 can be interconnected with each other.

[0042] Figure 6FIG. 0 is a vertical cross-sectional view of a tunneling junction HEMT 100D based on a P-GaN gate structure according to an embodiment of the present invention. The tunneling junction HEMT 100D based on a P-GaN gate structure has a structure similar to that of the tunneling junction HEMT 100A based on a P-GaN gate structure, except that the sidewalls at the source-side tunneling junction have an inclination angle θ (where the inclination angle θ < 90 degrees). Specifically, the sidewalls of the nitride-based channel layer 110, the nitride-based barrier layer 130, and the P-type GaN layer 140 on the source side have an inclination angle θ (where 0 < inclination angle θ < 90 degrees). The source 160 is in contact with the heterojunction channel and forms an inclined interface. In addition, the gate 150 can be self-aligned.

[0043] Figure 7 FIG. 4 is a vertical cross-sectional view of a tunneling junction HEMT 100E based on a P-GaN gate structure according to an embodiment of the present invention. The tunneling junction HEMT 100E based on a P-GaN gate structure has a structure similar to that of the tunneling junction HEMT 100A based on a P-GaN gate structure, except that the tunneling junction HEMT 100E based on a P-GaN gate structure has a double-channel structure. The tunneling junction HEMT 100E based on a P-GaN gate structure includes nitride-based channel layers 110A, 110B and nitride-based barrier layers 130A, 130B.

[0044] Starting from the nitride-based channel layer 110A, the nitride-based barrier layer 130A, the nitride-based channel layer 110B, and the nitride-based barrier layer 130B are arranged in sequence upward, thus forming a double-channel structure. In the double-channel structure, the barrier layer and the channel layer in each heterojunction channel can have different thicknesses; for example, the nitride-based channel layer 110B and the nitride-based barrier layer 130B can have different thicknesses, and the nitride-based barrier layers 130A and 130B can have different thicknesses.

[0045] The source 160 can simultaneously contact two heterojunction channels, including the lower heterojunction channel formed between the nitride-based channel layer 110A and the nitride-based barrier layer 130A and the upper heterojunction channel formed between the nitride-based channel layer 110B and the nitride-based barrier layer 130B. The position of the upper surface of the source 160 is higher than the lower surface of the nitride-based barrier layer 130B and lower than the upper surface of the nitride-based barrier layer 130B. In addition, the gate 150 can be self-aligned.

[0046] Figure 8FIG. 0 is a vertical cross-sectional view of a tunneling junction HEMT 100F based on a P-GaN gate structure according to an embodiment of the present invention. The tunneling junction HEMT 100F based on a P-GaN gate structure has a structure similar to that of the tunneling junction HEMT 100E based on a P-GaN gate structure, except that the tunneling junction HEMT 100F based on a P-GaN gate structure has a multi-channel structure. The tunneling junction HEMT 100F based on a P-GaN gate structure includes nitride-based channel layers 110A, 110B and nitride-based barrier layers 130A, 130B. A stacked structure composed of one or more channel layers and barrier layers is included between the nitride-based barrier layer 130A and the nitride-based channel layer 110B, where each stacked structure includes a nitride-based channel layer and a nitride-based barrier layer, and a heterojunction channel is formed therebetween, thus forming a multi-channel structure. In each stacked structure, the thickness of the barrier layer and the channel layer may be different from that of the layers of other stacked structures. For example, in the multi-channel structure, the two barrier layers (or channel layers) may have different thicknesses.

[0047] The source electrode 160 is in contact with multiple heterojunction channels. In various embodiments, the number of heterojunction channels in a single tunneling junction HEMT 100F based on a P-GaN gate structure may be greater than or equal to three. The upper surface of the source electrode 160 is higher than the lower surface of the nitride-based barrier layer 130B and lower than the upper surface of the nitride-based barrier layer 130B (where the nitride-based barrier layer 130B is the uppermost barrier layer). In addition, the gate electrode 150 may be self-aligned.

[0048] It can be seen from these variants that the structures of the gate and the source electrode of the present invention can have various implementation manners to meet different requirements or scenarios.

[0049] In the present invention, the TJ-HEMT has a source tunneling junction controlled by a P-GaN gate structure and a zero gate-source spacing. Since the turn-on and turn-off of the tunneling junction have little relation with the drain bias, this structure can solve the DIBL problem of the traditional P-type GaN gate structure HEMT under the gate size scaling. In addition, relying on the inherent reverse blocking ability of the tunneling junction, the gate length can be further scaled while maintaining a low off-state current. Compared with the traditional P-type GaN gate structure HEMT, the TJ-HEMT in the present invention can also achieve a higher 2DEG density and a lower on-resistance.

[0050] In summary, the TJ-HEMT controls the source tunneling junction through a P-GaN gate structure and has a zero gate-source spacing. Since the state of the tunneling junction is not affected by the drain bias, the DIBL problem can be effectively solved. Even with a small gate length, the reverse blocking ability of the tunneling junction can still effectively suppress the leakage current in the off state. Compared with the traditional design, the present invention can achieve a higher 2DEG density and a lower on-resistance.

[0051] Spatial reference terms, such as "upper", "above", "below" and similar terms, are defined relative to the components or planes shown in the figures. These terms are for illustrative purposes only and do not limit the actual arrangement, as long as the embodiments retain their intended advantages.

[0052] It should be noted that although various structures are depicted as approximately rectangular in the figures, due to manufacturing conditions, the actual shapes may vary in practice. These shapes can include curves, rounded edges or thickness variations. The use of straight lines and right angles in the figures is merely for convenience in depicting layers and features.

[0053] In the present disclosure, unless the context clearly dictates otherwise, the terms "the" and "said" shall be construed to include both singular and plural forms. Further, when describing an embodiment, a component that is "on" or "above" another component may refer to a situation where the two components are in direct contact, or where one or more intermediate components are located therebetween.

[0054] The foregoing description of the invention has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art.

[0055] The selected and described embodiments are intended to best explain the principles of the invention and its practical application, thereby enabling others of ordinary skill in the art to understand the invention in various embodiments and various modifications suitable for a particular purpose.

Claims

1. A tunneling junction HEMT based on a P-GaN gate structure, characterized in that, Comprising: A substrate; A nucleation layer disposed on the substrate; A buffer layer disposed on the nucleation layer; At least one nitride-based channel layer disposed on the buffer layer; At least one nitride-based barrier layer disposed on the nitride-based channel layer, and forming a two-dimensional electron gas (2DEG) channel between the nitride-based channel layer and the nitride-based barrier layer; A P-type GaN layer disposed on the nitride-based barrier layer; A gate disposed on the P-type GaN layer; A source electrode disposed on the nitride-based channel layer, extending upward from the nitride-based channel layer to form an interface with at least the side surface of the nitride-based channel layer, and forming a source tunneling junction with the 2DEG channel; A drain electrode disposed on the nitride-based barrier layer; And A surface passivation layer disposed on the nitride-based barrier layer, having a first portion located between the gate and the source electrode and a second portion located between the gate and the drain electrode.

2. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, characterized in that, The source electrode forms a Schottky contact with the 2DEG channel, and the source electrode and the 2DEG channel also form a metal / 2DEG tunneling junction.

3. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, wherein The source electrode further extends to form a contact interface with the nitride-based barrier layer.

4. The tunneling junction HEMT based on a P-GaN gate structure according to claim 3, wherein, The gate and the source electrode cover the first portion of the surface passivation layer.

5. The tunneling junction HEMT based on the P-GaN gate structure according to claim 4, wherein The nitride-based channel layer has a groove, and the bottom surface of the groove accommodates the bottom of the source electrode.

6. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, characterized in that, The upper surface of the source electrode is located below the upper surface of the nitride-based barrier layer.

7. The tunneling junction HEMT based on the P-GaN gate structure according to claim 6, wherein, The first portion of the surface passivation layer extends from the upper surface of the source electrode to the gate and covers the side surfaces of the nitride-based barrier layer and the P-type GaN layer.

8. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, wherein, The nitride-based barrier layer includes at least one binary group III nitride compound, ternary group III nitride, quaternary group III nitride, aluminum nitride, aluminum gallium nitride, indium aluminum nitride, indium aluminum gallium nitride, or a combination thereof.

9. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, wherein, The nitride-based barrier layer further includes a mobility enhancement layer (MEL).

10. The tunneling junction HEMT based on the P-GaN gate structure according to claim 9, wherein The mobility enhancement layer is a binary group III nitride compound layer including aluminum nitride, indium nitride, or a combination thereof.

11. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, characterized in that, At least one of the surface passivation layers includes silicon dioxide, aluminum oxide, aluminum nitride, gallium oxynitride, silicon nitride (SiNx), or a combination thereof.

12. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, characterized in that, The source electrode and the drain electrode have different metal materials.

13. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, wherein The source electrode is made of metal, metal alloy, metal nitride, binary group III nitride compound, ternary group III nitride, quaternary group III nitride, polysilicon, metal oxide semiconductor, or a combination thereof.

14. The tunneling junction HEMT based on the P-GaN gate structure according to claim 13, wherein The source electrode is buried in the first portion of the surface passivation layer, and the tunneling junction HEMT of the P-GaN gate structure further includes a source via hole disposed within the first portion of the surface passivation layer and in contact with the source electrode.

15. The tunneling junction HEMT based on a P-GaN gate structure according to claim 14, wherein The source via hole and the source electrode have different conductive materials, and a contact interface is formed therebetween.

16. The tunneling junction HEMT based on the P-GaN gate structure according to claim 14, wherein, The source via hole extends upward to a position higher than the P-type GaN layer.

17. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, wherein The side walls of the nitride-based channel layer and the nitride-based barrier layer at the source tunneling junction have an inclination angle greater than 0 degrees and less than 90 degrees.

18. The tunneling junction HEMT based on the P-GaN gate structure according to claim 17, wherein The contact interface formed by the source electrode and the side surfaces of the nitride-based channel layer and the nitride-based barrier layer is inclined.

19. The tunneling junction HEMT based on a P-GaN gate structure according to claim 1, characterized in that, The number of the nitride-based channel layer and the nitride-based barrier layer is each more than one, so that more than one of the 2DEG channels can be formed above the buffer layer, thereby establishing a double-channel or multi-channel structure, and the source electrode is in contact with more than one of the 2DEG channels.

20. The tunneling junction HEMT based on the P-GaN gate structure according to claim 19, wherein, Two adjacent nitride-based channel layers and nitride-based barrier layers have different thicknesses.

21. The tunneling junction HEMT based on the P-GaN gate structure according to claim 1, characterized in that, The left sidewall of the nitride-based barrier layer is completely covered by the first part of the surface passivation layer and the source electrode, and the left sidewall of the P-type GaN layer is completely covered by the first part of the surface passivation layer.

22. The tunneling junction HEMT based on a P-GaN gate structure according to claim 21, wherein, The lower surface of the first part of the surface passivation layer is in contact with the upper surface of the source electrode.

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