Power supply protection chip and method

Abstract

The invention discloses a power supply protection chip and method, a power supply supplies power to a post-stage system, and the chip comprises a power supply protection circuit and a function safety supervision circuit; the power supply protection circuit is configured to determine whether the power supply is abnormal or not based on the working state of the power supply; the function safety supervision circuit is configured to determine whether the power supply protection circuit is abnormal or not based on the working state of the power supply protection circuit and the voltage of the power supply, and determine whether the post-stage system is abnormal or not based on the working state of the post-stage system. By utilizing the scheme of the invention, the function safety of the power supply system can be comprehensively and effectively guaranteed.

Description

Technical Field

[0001] The present disclosure relates to the field of circuit technology, and in particular to a power protection chip and method. Background Art

[0002] Power systems used in automotive electronic systems often need to cope with many extreme operating conditions, such as cold start, load dump, input short circuit, and reverse battery connection. To this end, the industry generally adds an input power protection chip to the system's front end to help the system withstand the impact of these extreme conditions. According to ISO 26262 and AEC-Q100 standards, when an unknown fault occurs in an electronic system, it should respond in a predictable manner. The industry generally adopts the following two solutions:

[0003] One approach is to use a system basis chip (SBC) as the secondary power supply for electronic systems while also ensuring functional safety. However, this approach is unable to detect failures in the preceding inlet power protection chip, lacking control over the primary power supply, resulting in a narrow coverage range and slow response. Furthermore, inlet power protection chips are typically designed for high-voltage operation and therefore utilize high-voltage processes, while SBCs typically require a higher level of integration and are digital chips, utilizing low-voltage processes. Consequently, the two integration processes are somewhat incompatible. For example, a high-voltage process may impact the high-voltage power supply, which in turn may affect the functionality of the digital chip.

[0004] The other is to add support for functional safety in the first-level power supply, but it itself does not serve as a functional safety master chip and often requires an additional master chip (for example, an automotive-grade MCU) for management; and because the first-level power supply itself bears most of the exception handling functions of the power supply system, the master chip needs to interact with it frequently, and the design complexity is relatively high. Summary of the Invention

[0005] The present disclosure provides a power protection chip and method to comprehensively and effectively ensure the safety of power system functions.

[0006] In one aspect, the present disclosure provides a power protection chip, wherein the power supply supplies power to a subsequent system, and the chip includes: a power protection circuit and a functional safety supervision circuit;

[0007] The power protection circuit is configured to determine whether an abnormality occurs in the power supply based on the working state of the power supply;

[0008] The functional safety supervision circuit is configured to determine whether an abnormality occurs in the power protection circuit based on the working state of the power protection circuit and the voltage of the power supply, or determine whether an abnormality occurs in the subsequent system based on the working state of the subsequent system.

[0009] Optionally, the power supply supplies power to the power supply protection circuit through a first branch and supplies power to the functional safety supervision circuit through a second branch.

[0010] Optionally, the functional safety supervision circuit is further configured to store the determined abnormal state.

[0011] Optionally, the power supply includes a first switch and a second switch;

[0012] The power supply protection circuit is configured to determine whether the power supply is abnormal based on the voltage across the first switch.

[0013] Optionally, the first switch includes a first MOS transistor, and the second switch includes a second MOS transistor;

[0014] The power supply protection circuit controls the gates of the first MOS transistor and the second MOS transistor.

[0015] Optionally, the functional safety supervision circuit is further configured to generate an enable signal or a reset signal for the subsequent-stage system based on the state of the power supply protection circuit.

[0016] Optionally, the functional safety supervision circuit is further configured to monitor the abnormal state of its own power supply and store the monitored abnormal state.

[0017] Optionally, the functional safety supervision circuit includes a communication interface, and the functional safety supervision circuit communicates with the subsequent-stage system through the communication interface.

[0018] Optionally, the subsequent-stage system determines whether the functional safety supervision circuit is abnormal based on the communication interface.

[0019] Optionally, the chip further includes an isolation structure, and the isolation structure is configured to isolate the power supply protection circuit and the functional safety supervision circuit.

[0020] Optionally, the isolation structure includes an isolation ring, and the functional safety supervision circuit is disposed inside the isolation ring.

[0021] Optionally, the chip includes a substrate having a first conduction type, and the isolation ring has a second conduction type.

[0022] Optionally, the power supply protection circuit includes a high-voltage part and a low-voltage part, and the high-voltage part and the low-voltage part are located inside different isolation rings.

[0023] Optionally, the distance between the functional safety circuit and the high-voltage part of the power supply protection circuit is greater than a preset value.

[0024] The present disclosure also provides a power protection method based on the aforementioned power protection chip, and the method includes:

[0025] During the power-on process, the power protection circuit performs self-check, and the functional safety supervision circuit determines whether an abnormality occurs in the power protection circuit based on the working state of the power protection circuit and the voltage of the power supply.

[0026] If both the self-check and the working state are normal, the functional safety supervision circuit sends an enable signal to the subsequent system.

[0027] After the power-on is completed, the power protection circuit determines whether an abnormality occurs in the power supply based on the working state of the power supply; the functional safety supervision circuit determines whether an abnormality occurs in the power protection circuit based on the working state of the power protection circuit and the voltage of the power supply, or determines whether an abnormality occurs in the subsequent system based on the working state of the subsequent system.

[0028] Optionally, the method further includes:

[0029] If the self-check or the working state is abnormal, determine the level of the abnormal state.

[0030] If the level of the abnormal state is the first level, control the power protection circuit and the functional safety supervision circuit to enter the self-check state in sequence.

[0031] If the abnormality is eliminated within the set time, control the power protection circuit and the functional safety supervision circuit to stop self-checking.

[0032] Optionally, the method further includes: if the abnormality is not eliminated within the set time, control the power protection circuit and the functional safety supervision circuit to enter the off state.

[0033] Optionally, the method further includes:

[0034] If the self-check or the working state is abnormal, determine the level of the abnormal state.

[0035] If the level of the abnormal state is the second level, control the power protection circuit and the functional safety supervision circuit to enter the off state.

[0036] Optionally, determining the level of the abnormal state includes: determining the level of the abnormal state based on the time for abnormal recovery or the threshold for occurrence of an abnormality.

[0037] The power protection chip and method of the present disclosure set a power protection circuit and a functional safety supervision circuit in the power protection chip. The power protection circuit monitors the abnormal states that occur in the power system, and the functional safety supervision circuit monitors the abnormalities that occur in the power protection circuit and the subsequent system, so that the entire power system can be comprehensively protected, and then a safe and reliable power supply can be provided for the subsequent system. <> <>

[0038] Optionally, the power protection circuit and the functional safety supervision circuit are powered by two independent power supply branches. The monitoring of the subsequent system by the functional safety supervision circuit is not affected or less affected by whether the power protection circuit is abnormal, and can respond promptly to the abnormalities of the subsequent system. Moreover, when an abnormality occurs in the functional safety supervision circuit, it will not affect or have little impact on the power supply of the subsequent system. <> <>

[0039] Optionally, the functional safety supervision circuit can output an enable signal or a reset signal for the subsequent system based on the state of the power protection circuit, which not only ensures that the enabling of the subsequent system is in an orderly and controllable state during the power-on and power-off processes of the power system, but also enables the enabling and resetting of the subsequent system to be controlled orderly when the power protection circuit or the subsequent system is abnormal. <> <>

[0040] Optionally, the functional safety supervision circuit stores the determined abnormal states (for example, including the abnormal state of the power protection circuit, the abnormal state of the functional safety supervision circuit itself, or the abnormal state of the subsequent system), and provides a query function through the communication interface, which can provide effective information support for the traceability and analysis of abnormal situations. Correspondingly, since the abnormality of the functional safety supervision circuit will not affect or have little impact on the power supply of the subsequent system, the subsequent system can also detect the abnormality of the functional safety supervision circuit through the communication interface and respond. <> <>

[0041] Optionally, the power protection circuit and the functional safety supervision circuit are designed in one chip and isolated by an effective isolation method, so that the power protection chip can control the power-on and power-off processes of the entire system from the source and effectively respond to various abnormal conditions. <> Description of the Drawings <> <>

[0042] The drawings are used to provide a clearer understanding of the present disclosure and constitute a part of the specification. They are used together with the embodiments of the present disclosure to explain the present disclosure and do not constitute a limitation to the present disclosure. In the drawings: <> <>

[0043] <> Figure 1 Shows a schematic structural diagram of an example of the power protection chip provided by some embodiments of the present disclosure; <> <>

[0044] <> Figure 2 Shows a schematic example structure diagram of the power protection chip provided by some embodiments of the present disclosure; <>

[0045] Figure 3 A schematic diagram of a state machine of an example power protection chip provided by some embodiments of the present disclosure is shown;

[0046] Figure 4 A schematic diagram showing an application example of a power protection chip provided by some embodiments of the present disclosure is shown;

[0047] Figure 5 A schematic diagram showing an example of an isolation structure in a power protection chip provided by some embodiments of the present disclosure is shown;

[0048] Figure 6 A flowchart illustrating an example of a power protection method provided by some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0049] In order to make the above-mentioned objectives, features and beneficial effects of the present disclosure more understandable, embodiments of the present disclosure are described below with reference to the accompanying drawings.

[0050] In response to the defects of existing power supply systems, the embodiments of the present disclosure provide a power protection chip and method, which integrate the power protection function and functional safety supervision function into one chip, realize comprehensive monitoring of the power supply to the downstream system, control the power-on and power-off process of the entire electronic system, and can cope with various abnormal conditions.

[0051] Figure 1 A structural schematic diagram of an example of a power protection chip provided by some embodiments of the present disclosure is shown.

[0052] In some embodiments, the power protection chip 100 is used to monitor the power supply link from the power supply to the downstream system. The power protection chip 100 includes: a power protection circuit 101 and a functional safety supervision circuit 102.

[0053] The power protection circuit 101 can determine whether an abnormality occurs in the power supply based on the working status of the power supply;

[0054] The functional safety supervisory circuit 102 can determine whether an abnormality occurs in the power protection circuit 101 based on the working state of the power protection circuit 101 and the voltage of the power supply, or determine whether an abnormality occurs in the subsequent system based on the working state of the subsequent system.

[0055] The power protection chip disclosed in the present disclosure is provided with a power protection circuit and a functional safety supervision circuit. The power protection circuit realizes the abnormal monitoring and processing of the power supply link functionally and is not affected by the functional safety supervision circuit. In addition to monitoring the abnormalities of the power protection circuit, the functional safety supervision circuit can also monitor various abnormalities of the subsequent system and respond to the abnormalities. Through the cooperation of the power protection circuit and the functional safety supervision circuit, the entire power supply system can be provided with more comprehensive safety protection, providing a safe and reliable power supply for the subsequent system.

[0056] Figure 2 FIG. shows a schematic structural diagram of an example of a power protection chip provided by some embodiments of the present disclosure. As Figure 2 shown, in a non-limiting structural example of a power protection chip provided by some embodiments of the present disclosure, the power supply supplies power to the power protection circuit 101 through the first branch A and supplies power to the functional safety supervision circuit 102 through the second branch B. The first branch A and the second branch B are two independent branches from the same power supply.

[0057] The power protection circuit 101 is powered through the first branch A to generate the reference voltage and reference clock of the power protection circuit 101, realizing the function of the power protection circuit 101; the functional safety supervision circuit 102 is powered through the second branch B to generate the reference voltage and reference clock of the functional safety supervision circuit 102, realizing the function of the functional safety supervision circuit 102. The two do not affect each other, so decoupling can be achieved. The functional safety supervision circuit 102 powered by the second branch B can monitor the abnormalities of the power protection circuit 101 powered by the first branch A.

[0058] In some embodiments, the power supply includes a first switch and a second switch. The two switches can be implemented by transistors (for example, MOS transistors), as Figure 2 shown in the figure, the first switch includes a first MOS transistor Q1, and the second switch includes a second MOS transistor Q2. Diode D1 is the body diode of the first MOS transistor Q1, and diode D2 is the body diode of the second MOS transistor Q2. Diode D1 can play a role in preventing reverse voltage and reverse current; diode D2 can play a role in preventing forward overcurrent.

[0059] The power protection circuit 101 can determine whether the power supply is abnormal based on the voltage across the first switch. As Figure 2 shown in the figure, when using MOS transistors, the power protection circuit 101 can detect the source voltage Vanode and drain voltage Vaon of the first MOS transistor Q1 to determine whether the power supply is abnormal. If the power supply is normal, the voltage difference between the source voltage Vanode and the drain voltage Vaon should be within a certain preset range; otherwise, it is determined that the power supply is abnormal.

[0060] The power protection circuit 101 can control the gate of the first MOS transistor Q1 by outputting a first control signal Vdgate to turn Q1 on or off. For example, when the power protection circuit 101 detects that the power supply is normal, it turns on the first MOS transistor Q1; when it detects that the power supply is abnormal, it turns off the first MOS transistor Q1.

[0061] When the first MOS transistor Q1 is turned on, the power supply supplies power to the power protection circuit 101 through the first branch A and supplies power to the functional safety monitoring circuit 102 through the second branch B. When the first MOS transistor Q1 is turned off, the power supply to the power protection circuit 101 and the functional safety monitoring circuit 102 can be disconnected.

[0062] The second MOS transistor Q2 described above can be used for the judgment and control of some other abnormalities (such as overvoltage, undervoltage, overheating or overcurrent at the input end), and can also play a role in preventing forward overcurrent. The second MOS transistor Q2 can be controlled by a first monitoring signal or a second monitoring signal. The first monitoring signal can be, for example, a signal such as temperature, current flowing through Q2, or voltage applied to Q2. When the monitored temperature, current or voltage exceeds the corresponding set threshold, the second MOS transistor Q2 is controlled to turn off. The second monitoring signal can come from the source voltage Vanode or the drain voltage Vaon of the first MOS transistor Q1. When the source voltage Vanode or the drain voltage Vaon exceeds the corresponding set threshold, the second MOS transistor Q2 is controlled to turn off. In some embodiments, the temperature signal can be monitored by a temperature voltage sensor. In some embodiments, the current signal can be monitored by a current amplifier and a comparator.

[0063] Controlling the conduction or cutoff of the second MOS transistor based on the first monitoring signal or the second monitoring signal can identify abnormalities such as overvoltage, undervoltage, overheating or overcurrent at the input end. The body diode D2 of the second MOS transistor can also play a role in preventing forward overcurrent, ensuring the safety of the power protection circuit, the functional safety monitoring circuit, and the subsequent system.

[0064] In some embodiments, the functional safety monitoring circuit 102 can simultaneously monitor whether the power protection circuit 101 and the subsequent system have abnormalities.

[0065] Optionally, the functional safety monitoring circuit 102 can monitor the power signal or status signal of the subsequent system to determine whether the subsequent system has an abnormality.

[0066] Optionally, the functional safety monitoring circuit 102 can also generate an enable signal or a reset signal for the subsequent system based on the state of the power protection circuit 101. That is to say, the functional safety monitoring circuit 102 can enable or reset the subsequent system according to the state of the power protection circuit 101.

[0067] For example, after the power protection chip completes self-check during power-on and all voltages and status detections are normal, one or more enable signals for the corresponding subsequent system are sequentially output, enabling the subsequent system to enter the enabled state.

[0068] Optionally, the functional safety supervision circuit 102 can also store the monitored status of the power protection circuit 101 or the status of the subsequent system.

[0069] In some other embodiments, the functional safety supervision circuit 102 can also monitor the abnormal status of its own power supply. For example, the functional safety supervision circuit 102 can detect whether the input power voltage is within the set range. If so, it determines that the power supply is normal; otherwise, it determines that the power supply is abnormal.

[0070] Optionally, the functional safety supervision circuit 102 can also include a communication interface to communicate with the subsequent system through this communication interface. The subsequent system can detect whether an abnormality occurs in the functional safety supervision circuit 102 through this communication interface and make a response. Optionally, the subsequent system can also read the monitored status of the power protection circuit 101 or the status of the subsequent system stored in the functional safety supervision circuit through the communication interface.

[0071] The power protection chip provided by the embodiments of the present disclosure monitors power abnormalities through the power protection circuit 101, and monitors the power protection circuit 101 or the subsequent system through the functional safety supervision circuit 102. The power protection circuit 101 and the functional safety supervision circuit 102 are powered by two independent power supply branches; the monitoring of the subsequent system by the functional safety supervision circuit 102 is not affected by whether the power protection circuit is abnormal, and can react promptly to abnormalities in the subsequent system; moreover, when an abnormality occurs in the functional safety supervision circuit 102, it will not affect the power supply of the subsequent system. Assuming that any sub-circuit of the power protection circuit 101 has an abnormality, the functional safety supervision circuit 102 will detect this abnormality and respond by controlling the enable signal of the subsequent system. Assuming that an abnormality occurs in the functional safety supervision circuit 102, when the power protection circuit 101 is working normally, it can ensure the normal power supply of the subsequent system. In addition, the subsequent system can monitor the status of the functional safety supervision circuit 102 through the communication interface. Using the power protection chip provided by the embodiments of the present disclosure can improve the coverage range of functional safety and reduce the difficulty of designing the functional safety system.

[0072] In some applications, the operating state of the power protection chip can be controlled by a state machine. The following Figure 3 illustrates the working process of the state machine.

[0073] Refer to Figure 3 , Figure 3 which shows a schematic diagram of the state machine of the power protection chip example provided by some embodiments of the present disclosure.

[0074] During the power-on process of the power protection chip, self-check and voltage check are performed, and the functional safety supervision circuit controls the enable signal of the subsequent system. After the self-check and voltage check are normal, the power protection chip enters the normal working state, and the functional safety supervision circuit outputs the enable signal to the subsequent system in a preset order. If the result of the self-check or voltage check is abnormal, an attempt is made to power on again.

[0075] During the normal working process, the power protection chip monitors its own working state and the value of the external voltage in real time. The level of the abnormal state can be determined according to the severity of the abnormal state. In some embodiments, the levels of the abnormal state can include ordinary abnormality and severe abnormality:

[0076] (1) In the case of ordinary abnormality, the power protection chip will enter a continuous self-check and recheck state (for example, each circuit in the chip performs self-check in turn), and trigger a timer. If the abnormality is restored within the set time, the power-on is restored and it enters the normal working state; otherwise, the timeout is reset and it enters the abnormal power-off (or abnormal shutdown) state.

[0077] (2) In the case of severe abnormality, the power protection chip directly enters the abnormal power-off (or abnormal shutdown) state.

[0078] In the abnormal power-off state, the power protection chip needs to wait for the abnormality to be restored before it can enter the power-on process again.

[0079] When it is necessary to exit the normal working state, such as shutdown or system power-off, the power protection chip directly enters the normal power-off (or normal shutdown) state until the power is reconnected and powered on.

[0080] In some embodiments, the level of the abnormal state can be judged by thresholds and time. For example, ordinary abnormality can include abnormalities that can be restored within a specified time. For example, overvoltage abnormality can be restored through periodic recheck within the specified time and then return to the normal working state. If the number of periodic rechecks is greater than the preset number or the recheck time exceeds the preset time and still cannot be restored, the level of the abnormality is judged as severe abnormality, and the power protection chip enters the abnormal power-off state.

[0081] In some embodiments, the above-mentioned severe abnormality can also include some preset severe abnormal states. For example, if it is stipulated that the chip shows a short-circuit situation, the level of the abnormal state is considered as severe abnormality, and the power protection chip directly enters the abnormal power-off state. In some embodiments, for example, it can be judged by sampling the corresponding monitoring parameters and comparing them with the set thresholds.

[0082] After an abnormal power outage, the power protection chip enters a deep reboot state. The functional safety supervision circuit can disable all enable signals of the downstream system, and then the power protection chip enters a power-on self-test state.

[0083] Figure 4 A schematic diagram showing an application example of a power protection chip provided by some embodiments of the present disclosure is shown.

[0084] like Figure 4 As shown, in some embodiments, the post-stage system may include a DC-DC converter 21, a subsystem 22, and a controller 23. The power protection chip can serve as a primary power supply, providing power output to the DC-DC converter 21, and the DC-DC converter 21 generates multiple power supplies, such as VDD <1> and VDD <2> , where VDD <1> is supplied to the subsystem 22, VDD <2> is provided to the controller 23.

[0085] The DC-DC converter 21 plays the role of voltage conversion. The output voltage of the primary power supply is high voltage (for example, about 15V). After being stepped down by the DC-DC converter 21, a low voltage (such as 5V, 3.3V, 1.8V, etc.) secondary power supply is formed to power each subsystem.

[0086] Subsystem 22 can be configured based on required functionality. Compared to subsystem 22, controller 23 also includes a communication interface (e.g., a COMM interface) that communicates with the communication interface of functional safety supervisory circuit 102 (e.g., one-way or two-way communication) through this COMM interface. In some embodiments, controller 23 can access exception information stored in registers of functional safety supervisory circuit 102 through the COMM interface and monitor functional safety supervisory circuit 102. For example, if an exception occurs in functional safety supervisory circuit 102, a soft reset of functional safety supervisory circuit 102 can be performed.

[0087] In some embodiments, the communication interface may include a serial peripheral interface (Serial Peripheral Interface Bus, SPI), an I 2 One or more communication interface types such as C interface (Inter-Integrated Circuit), Universal Asynchronous Receiver / Transmitter (UART), Universal Serial Bus (USB), and Controller Area Network (CAN).

[0088] In this embodiment, the DC-DC converter 21, the subsystem 22, and the controller 23 are controlled by an enable signal, are started in a preset order during the power-on process, and return status signals in real time during normal operation.

[0089] The power protection chip monitors its own power supply voltage and the externally provided power supply voltage and status signals, and writes them into the internal register. In some embodiments, the controller 23 can read the status information from the internal register through the COMM interface. When a general exception occurs, the power protection chip enters a recheck state. If the exception is recovered within a specified time, no action is taken; otherwise, the exception is treated as a serious exception. When a serious exception occurs, the power protection chip shuts down the subsystem 22, the controller 23, and the DC-DC converter 21 in a preset order through the enable signal.

[0090] During the occurrence of an exception, the power protection circuit 101 of the power protection chip is responsible for protecting the output voltage from being affected within a short period of time (for example, on the order of about a hundred microseconds), so as to leave enough time for itself and the subsequent system to respond. That is, after the first MOS transistor Q1 is turned off, the power of the subsequent system will slowly leak away, causing the subsequent system to stop working. In some embodiments, as Figure 4 shown in, a capacitor C can be provided between the power protection chip and the subsequent system to store a certain amount of charge, so as to leave enough time for the subsequent system to respond.

[0091] Optionally, considering that the power protection circuit usually involves a relatively high voltage and is usually implemented by a high-voltage process, while the functional safety circuit belongs to a digital function and is usually implemented by logic devices and uses a low-voltage process. There will be a certain interference between the two, which will in turn affect the reliability of the chip.

[0092] In some embodiments, the isolation between the power protection circuit and the functional safety supervision circuit in the chip can be achieved by setting a corresponding isolation structure in the power protection chip. For example, an isolation ring structure can be used. The chip may include a substrate having a first conduction type, and the isolation ring has a second conduction type.

[0093] In some non - restrictive embodiments, the power protection circuit may include a high - voltage part and a low - voltage part. The functional safety supervision circuit is arranged inside the N - type isolation ring, and the isolation ring and the P - type well of the functional safety supervision circuit form a reverse - biased diode, so that the functional safety supervision circuit is separated from the high - voltage part of the power protection circuit, thereby obtaining better isolation and meeting the compatibility requirements of the power protection circuit and the functional safety supervision circuit. In some embodiments, the high - voltage part of the power protection circuit and the functional safety supervision circuit can also be placed as far apart as possible, for example, the distance between the functional safety circuit and the high - voltage part of the power protection circuit on the chip is greater than a preset value, reducing the crosstalk from the high - voltage part of the power protection circuit to the functional safety supervision circuit.

[0094] In some other embodiments, the high - voltage part and the low - voltage part of the power protection circuit can be located inside different isolation rings.

[0095] Figure 5 The figure shows a schematic diagram of an isolation structure example in a power protection chip provided by some embodiments of the present disclosure.

[0096] As Figure 5 shown, in some embodiments, the high - voltage part of the power protection circuit, the low - voltage part of the power protection circuit, and the functional safety supervision circuit are respectively located in different N - type isolation rings.

[0097] Using the above - mentioned isolation structure, the power protection circuit and the functional safety supervision circuit can be arranged in the same chip, enabling the corresponding power protection chip to more comprehensively and effectively ensure the safety of the power system function, while reducing the crosstalk between the high - voltage part and the low - voltage part and lowering the process difficulty.

[0098] The power protection chip provided by the present disclosure integrates the power protection circuit and the functional safety supervision circuit on a single chip. The power protection circuit can monitor abnormal conditions of the power supply, the functional safety supervision circuit can monitor abnormalities in the power protection circuit and the subsequent system, and through the communication interface, the subsequent system can determine whether the functional safety supervision circuit has an abnormality. The solution of the present disclosure makes full use of the functional characteristics of the power protection chip itself, provides an available power supply; at the same time, it expands the coverage of functional safety, advances the response time of functional safety, and reduces or avoids the generation of unforeseen abnormalities or detection failures from the source. Compared with other solutions, it reduces the complexity of system design and improves reliability.

[0099] Based on the above - mentioned power protection chip, some embodiments of the present disclosure also provide a power protection method, Figure 6 The figure shows a flowchart of an example of the power protection method provided by some embodiments of the present disclosure.

[0100] AsFigure 6 As shown, the method includes the following steps:

[0101] Step 601, during the power-on process, the power protection circuit performs self-check, and the functional safety supervision circuit determines whether an abnormality occurs in the power protection circuit based on the operating state of the power protection circuit and the voltage of the power supply;

[0102] Step 602, if both the self-check and the operating state are normal, the functional safety supervision circuit sends an enable signal to the subsequent system;

[0103] Step 603, after the power-on is completed, the power protection circuit determines whether an abnormality occurs in the power supply based on the operating state of the power supply; the functional safety supervision circuit determines whether an abnormality occurs in the power protection circuit based on the operating state of the power protection circuit and the voltage of the power supply, or determines whether an abnormality occurs in the subsequent system according to the operating state of the subsequent system.

[0104] Optionally, in order to achieve more refined management and control, in another embodiment of the power protection method of the present disclosure, the abnormality can also be classified. For example, when the self-check or the operating state is abnormal, the level of the abnormal state is determined; and different treatments are performed for different levels of abnormal conditions, such as:

[0105] If the level of the abnormal state is the first level (for example, ordinary abnormality), control the power protection circuit and the functional safety supervision circuit to enter the self-check state in sequence;

[0106] If the abnormality is eliminated within the set time, control the power protection circuit and the functional safety supervision circuit to stop self-checking; if the abnormality is not eliminated within the set time, control the power protection circuit and the functional safety supervision circuit to enter the off state.

[0107] If the level of the abnormal state is the second level (for example, serious abnormality), control the power protection circuit and the functional safety supervision circuit to enter the off state.

[0108] Among them, determining the level of the abnormal state may include but is not limited to: determining the level of the abnormal state based on the time of abnormal recovery or the threshold of abnormal occurrence.

[0109] It should be understood that in this article, the character " / " indicates that the associated objects before and after are in an "or" relationship.

[0110] In the embodiments of the present disclosure, "multiple" refers to two or more.

[0111] In the embodiments of the present disclosure, the descriptions such as the first and the second are only for schematic and distinguishing the described objects, without an order, and do not represent a special limitation on the number of devices in the embodiments of the present disclosure, and cannot constitute any limitation to the embodiments of the present disclosure.

[0112] In the embodiments of the present disclosure, the "connection" that appears refers to various connection methods such as direct connection or indirect connection to achieve communication between devices, and the embodiments of the present disclosure do not make any limitations thereto.

[0113] Although the present disclosure is disclosed as above, the present disclosure is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the scope defined by the claims.

Claims

1. A power protection chip, wherein the power supply supplies power to a subsequent system, characterized in that: The chip includes: a power protection circuit and a functional safety supervision circuit; The power protection circuit is configured to determine whether an abnormality occurs in the power supply based on the working state of the power supply; The functional safety supervision circuit is configured to determine whether an abnormality occurs in the power protection circuit based on the working state of the power protection circuit and the voltage of the power supply, or determine whether an abnormality occurs in the subsequent system based on the working state of the subsequent system.

2. The power protection chip according to claim 1, characterized in that: The power supply supplies power to the power protection circuit through a first branch, and supplies power to the functional safety supervision circuit through a second branch.

3. The power protection chip according to claim 1, characterized in that: The functional safety supervision circuit is further configured to store the determined abnormal state.

4. The power protection chip according to claim 1, characterized in that: The power supply includes a first switch and a second switch; The power supply protection circuit is configured to determine whether the power supply is abnormal based on a voltage across the first switch.

5. The power protection chip according to claim 4, characterized in that: The first switch includes a first MOS transistor, and the second switch includes a second MOS transistor; The power protection circuit controls the gate of the first MOS transistor and the gate of the second MOS transistor.

6. The power protection chip according to claim 1, characterized in that: The functional safety supervision circuit is further configured to generate an enable signal or a reset signal for the subsequent system based on a state of the power protection circuit.

7. The power protection chip according to claim 1, characterized in that: The functional safety supervision circuit is further configured to monitor abnormal conditions of its own power supply and store the monitored abnormal conditions.

8. The power protection chip according to claim 1, characterized in that: The functional safety supervision circuit includes a communication interface, and the functional safety supervision circuit communicates with the subsequent system through the communication interface.

9. The power protection chip according to claim 8, characterized in that: The subsequent system determines whether an abnormality occurs in the functional safety supervision circuit based on the communication interface.

10. The power protection chip according to any one of claims 1 to 9, characterized in that: The chip further includes an isolation structure configured to isolate the power protection circuit from the functional safety supervisory circuit.

11. The power protection chip according to claim 10, characterized in that: The isolation structure includes an isolation ring, and the functional safety supervision circuit is arranged inside the isolation ring.

12. The power protection chip according to claim 11, characterized in that: The chip includes a substrate having a first conductivity type, and the isolation ring has a second conductivity type.

13. The power protection chip according to claim 11, characterized in that: The power protection circuit includes a high-voltage part and a low-voltage part, and the high-voltage part and the low-voltage part are located in different isolation rings.

14. The power protection chip according to claim 13, characterized in that: The distance between the functional safety circuit and the high-voltage part of the power protection circuit is greater than a preset value.

15. A power protection method based on the power protection chip according to any one of claims 1 to 14, characterized in that: The method comprises: During the power-on process, the power protection circuit performs a self-test, and the functional safety supervision circuit determines whether an abnormality occurs in the power protection circuit based on the working state of the power protection circuit and the voltage of the power supply; If the self-test and working status are normal, the functional safety supervision circuit sends an enable signal to the subsequent system; After power-on is completed, the power protection circuit determines whether an abnormality occurs in the power supply based on the working status of the power supply; the functional safety supervision circuit determines whether an abnormality occurs in the power protection circuit based on the working status of the power protection circuit and the voltage of the power supply, or determines whether an abnormality occurs in the subsequent system based on the working status of the subsequent system.

16. The power protection method according to claim 15, characterized in that: The method further comprises: If the self-test or working state is abnormal, determine the level of the abnormal state; If the level of the abnormal state is the first level, controlling the power protection circuit and the functional safety supervision circuit to enter a self-test state in sequence; If the abnormality is resolved within the set time, the power protection circuit and the functional safety supervision circuit are controlled to stop self-test.

17. The power protection method according to claim 16, wherein: The method further comprises: If the abnormality is not resolved within the set time, the power protection circuit and the functional safety supervision circuit are controlled to enter the shutdown state.

18. The power protection method according to claim 15, wherein: The method further comprises: If the self-test or working state is abnormal, determining the level of the abnormal state; If the level of the abnormal state is the second level, the power protection circuit and the functional safety supervision circuit are controlled to enter a shutdown state.

19. The power supply protection method according to claim 16 or 18, characterized in that: Determining the level of the abnormal state includes: The level of the abnormal state is determined based on the time taken to recover from the abnormality or the threshold at which the abnormality occurs.

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