Deposition of film with concentration gradient in mold stack
By introducing transition film with oxygen concentration gradient and polysilicon layer with n-type dopant concentration gradient into the mold stack, the adhesion problem between the silicon oxide layer and the polysilicon layer is solved, and a more stable stack structure is achieved, avoiding layering and failures, and improving equipment performance.
Patent Information
- Application Number
- CN202380089356.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-12-26
- Filing Date
- 2023-12-13
- Publication Date
- 2025-08-05
AI Technical Summary
In the prior art, poor interface adhesion between the silicon oxide layer and the polysilicon layer in the mold stack leads to layering and equipment failures, and nitriding treatment may reduce equipment performance.
By depositing a transition film with an oxygen concentration gradient on the silicon oxide layer and introducing an n-type dopant concentration gradient into the polycrystalline silicon layer, a film layer containing an element concentration gradient is formed by controlling the treatment conditions using chemical vapor deposition to avoid interfacial nitriding treatment.
The adhesion between the silicon oxide layer and the polysilicon layer is improved, layering and equipment failure are avoided, while the electrical properties of the film are maintained, and the overall performance of the equipment is improved.
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Figure CN120435759A_ABST
Abstract
Description
Background Art
[0001] Alternating stacks of material layers, sometimes referred to as “mold stacks,” are commonly used to form 3-dimensional (3D) integrated circuits. Exemplary 3D integrated circuits include 3D NAND memory, 3D NOR memory, and 3D DRAM. Summary of the Invention
[0002] This Summary is provided to introduce a selection of concepts in a simplified form that are further described in the Detailed Description below. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all of the disadvantages noted in any part of this disclosure.
[0003] Disclosed examples relate to depositing a material layer comprising a concentration gradient of elemental components. One example provides a method for depositing a film stack on a substrate in a process chamber using chemical vapor deposition (CVD). The method includes depositing a silicon oxide layer on the substrate. The method also includes controlling process conditions to deposit a transition film onto the silicon oxide layer while flowing a polysilicon precursor into the process chamber. The transition film comprises silicon oxide having an oxygen concentration gradient. The method also includes depositing a silicon layer onto the transition film.
[0004] In some such examples, controlling process conditions to deposit the transition film includes flowing an oxidant into the process chamber, flowing a purge gas into the process chamber to remove a portion of the oxidant from the process chamber after flowing the oxidant into the process chamber, and flowing the polysilicon precursor into the process chamber.
[0005] In some such examples, flowing the purge gas into the process chamber additionally or alternatively includes flowing the purge gas into the process chamber for a duration of 0.75 seconds or less.
[0006] In some such examples, flowing the oxidant into the process chamber additionally or alternatively includes flowing at least one of oxygen, ozone, water vapor, hydrogen peroxide, or nitrous oxide into the process chamber.
[0007] In some such examples, controlling process conditions to deposit the transition film additionally or alternatively includes flowing an oxidizer with the polysilicon precursor into the process chamber and ramping down the flow rate of the oxidizer during deposition of the transition film.
[0008] In some such examples, the polysilicon precursor additionally or alternatively includes at least one of silane, disilane, trisilane, or a halosilane.
[0009] In some such examples, controlling the processing conditions to deposit the transition film additionally or alternatively comprises: depositing a or less thickness of the transition film.
[0010] In some such examples, the method additionally or alternatively includes ramping a flow rate of an n-type dopant precursor into the process chamber while flowing the polysilicon precursor into the process chamber to deposit the silicon layer.
[0011] Another example provides a method for depositing a stack of films on a substrate disposed in a process chamber using CVD. The method includes depositing a silicon layer comprising an n-type dopant concentration gradient on the substrate disposed in the process chamber. The silicon layer comprising the n-type dopant concentration gradient may be annealed to form a polysilicon layer. Depositing the silicon layer comprising the n-type dopant concentration gradient includes flowing a polysilicon precursor into the process chamber and ramping a flow rate of the n-type dopant-containing precursor flowing into the process chamber while flowing the polysilicon precursor into the process chamber. The method also includes depositing a silicon oxide layer on the silicon layer comprising the n-type dopant concentration gradient.
[0012] In some such examples, the silicon oxide layer is a second silicon oxide layer, and depositing the silicon layer additionally or alternatively includes forming the silicon layer on the first silicon oxide layer.
[0013] In some such examples, ramping the flow rate of the n-type dopant-containing precursor additionally or alternatively includes ramping the flow rate from a relatively lower flow rate to a relatively higher flow rate.
[0014] In some such examples, the relatively high flow rate is additionally or alternatively 100 standard cm per minute. 3 (sccm) to 1000sccm.
[0015] In some such examples, the method additionally or alternatively includes, when flowing the polysilicon precursor into the process chamber, flowing the n-type dopant-containing precursor into the process chamber at a fixed flow rate before or after ramping.
[0016] In some such examples, ramping the flow rate additionally or alternatively includes linearly ramping the flow rate.
[0017] In some such examples, the n-type dopant-containing precursor additionally or alternatively comprises a phosphine.
[0018] Another example provides a CVD tool. The CVD tool includes a process chamber. The CVD tool also includes a substrate support disposed within the process chamber. The CVD tool also includes a substrate heater configured to heat a substrate positioned on the substrate support. The CVD tool also includes a polysilicon precursor source. The CVD tool also includes an oxidant source. The CVD tool also includes flow control hardware fluidically connecting the polysilicon precursor source and the oxidant source to the process chamber. The CVD tool also includes an exhaust system. The CVD tool also includes a controller configured to operate the substrate heater to heat the substrate on the substrate support, the substrate including a silicon oxide layer. The controller is further configured to operate the flow control hardware to deposit a transition film on the silicon oxide layer while flowing the polysilicon precursor into the process chamber. The transition film includes silicon oxide having an oxygen concentration gradient. The controller is further configured to operate the flow control hardware to flow the polysilicon precursor into the process chamber, thereby depositing a silicon layer onto the transition film.
[0019] In some such examples, the controller is configured to operate the flow control hardware to deposit the transition film by operating the flow control hardware to: flow the oxidant into the process chamber, after flowing the oxidant, purge the process chamber to remove some of the oxidant from the process chamber, and flow the polysilicon precursor into the process chamber.
[0020] In some such examples, the controller is additionally or alternatively configured to operate the flow control hardware to deposit the transition film by operating the flow control hardware to flow the oxidant and the polysilicon precursor into the processing chamber and ramping down the flow rate of the oxidant.
[0021] In some such examples, the CVD tool additionally or alternatively includes an n-type dopant source having an n-type dopant, the flow control hardware fluidly connecting the n-type dopant source to the process chamber. The controller is further configured to, when flowing the polysilicon precursor into the process chamber, ramp a flow rate of the n-type dopant into the process chamber to deposit the silicon layer, the silicon layer comprising a concentration gradient of the n-type dopant.
[0022] In some such examples, the n-type dopant additionally or alternatively includes at least one of phosphorus, arsenic, or antimony. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 A flow chart of an exemplary method for forming a material layer having an n-type dopant concentration gradient is shown.
[0024] Figures 2A to 2E The structure formed in an exemplary process including depositing a silicon layer having a concentration gradient of an n-type dopant is schematically shown.
[0025] Figure 3 A flow chart of an exemplary method for forming a transition layer on a silicon oxide layer and depositing a silicon layer on the transition layer is shown.
[0026] Figures 4A to 4C The structure formed in an exemplary process is schematically shown, which includes depositing a transition layer onto a silicon oxide layer, followed by depositing a silicon layer onto the silicon oxide layer.
[0027] Figure 5 Schematic diagram showing an exemplary stack of alternating material layers comprising a concentration gradient.
[0028] Figure 6 An exemplary processing tool for performing chemical vapor deposition is shown schematically.
[0029] Figure 7 A block diagram of an exemplary computing system is shown. DETAILED DESCRIPTION
[0030] The term "chemical vapor deposition (CVD)" generally refers to a process in which a solid film is formed on a substrate by directing a flow of one or more precursor gases over the substrate under process conditions configured to cause chemical conversion of the precursor gases into a solid film.
[0031] The term "concentration gradient" generally refers to the variation in concentration of an elemental constituent of a film across the thickness of the film.
[0032] The term "flow control hardware" generally refers to components configured to place one or more chemical sources in fluid communication with a process chamber. Flow control hardware may include, for example, one or more mass flow controllers and / or valves. Exemplary chemical sources include a film precursor source, a sweep gas source, and a reactant gas source.
[0033] The term "n-type dopant" generally refers to an element that forms an n-type semiconductor material when added to a semiconductor. N-type dopants in silicon include phosphorus (P), arsenic (As), and antimony (Sb).
[0034] The term "n-type dopant precursor" generally refers to a chemical substance that contains an n-type dopant and that can be introduced into a processing chamber along with a polysilicon precursor to form a silicon layer containing the n-type dopant.
[0035] The term "oxidant" generally refers to an oxygen-containing chemical that can react with a silicon oxide precursor to form a silicon oxide film. Examples include oxygen (O2), ozone (O3), water vapor (H2O), hydrogen peroxide (H2O2), and nitrous oxide (N2O).
[0036] The term "plasma" generally refers to a gas-phase species containing positive ions and free electrons.
[0037] The term "point-of-use valve manifold" (PVM) generally refers to a process tool's flow control hardware used to control the flow of one or more gases into a process chamber. A PVM may include valves positioned near the gas inlets of a process chamber, allowing for relatively precise control of the respective flow rates of multiple gases flowing into the process chamber.
[0038] The term "polysilicon precursor" generally refers to a silicon-containing precursor that can react in a chemical vapor deposition process to form a silicon layer, wherein the silicon layer can be amorphous and can be annealed in a later processing step to form polycrystalline silicon (polysilicon). Exemplary polysilicon precursors include silane, disilane, trisilane, and halosilanes. Polysilicon precursors can also be used to deposit other films, such as silicon oxide layers or transition films.
[0039] The term "purge" and its variations generally refer to a process in which at least a portion of a reactive gas is removed from a process chamber. The term "purge gas" generally refers to any suitable inert gas that can be used to purge a process chamber. Examples include hydrogen, helium, neon, nitrogen, argon, krypton, and xenon.
[0040] The term "ramp" and its variations generally denote an increasing or decreasing change. To "ramp up" a flow rate means to increase the flow rate. To "ramp down" a flow rate means to decrease the flow rate. Similarly, the partial pressure of a gas can be ramped up or ramped down.
[0041] The term "silicon oxide precursor" generally refers to any material that can be introduced into a processing chamber in the vapor phase to form a silicon oxide film on a substrate. In some examples, the silicon oxide precursor may also be a polysilicon precursor. Exemplary film precursors for forming silicon oxide films using CVD may include materials having the following general structure: Wherein R1, R2 and R3 can be the same or different substituents. In many examples, R1, R2 and R3 can include silane, silanol, amine, halide, hydrogen, or an organic group, such as an alkylamine, alkoxy, alkyl, alkenyl, alkynyl and cyclic groups (such as aromatic groups).
[0042] In some examples, the silicon oxide precursor is an alkoxysilane. Useful alkoxysilanes include alkoxysilanes having the following composition: Hx -Si-(OR) y , wherein x=1 to 3, x+y=4, and each R is a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted alkynyl group, or a substituted or unsubstituted aromatic group; and H x (RO) y ,-Si-Si-(OR) y H x , wherein each R is a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted alkynyl group, or a substituted or unsubstituted aromatic group. Exemplary alkoxysilanes include tetramethoxysilane (TMOS), diethoxymethylsilane (DEMS), diethoxysilane (DES), dimethoxymethylsilane, dimethoxysilane (DMOS), methyldiethoxysilane (MDES), methyldimethoxysilane (MDMS), tert-butoxydisilane, triethoxysilane (TES), and trimethoxysilane (TMS or TriMOS).
[0043] In some examples, the silicon oxide precursor is siloxane. Siloxane includes materials having Si-O-Si bonds. Exemplary siloxanes include octamethylcyclotetrasiloxane (OMCTS), octamethoxydodecylsiloxane (OMODDS), and tetramethylcyclotetrasiloxane (TMCTS).
[0044] In some examples, the silicon oxide precursor is an aminosilane. Aminosilane includes compounds having the general formula H x -Si-(NR) y wherein x=1 to 3, x+y=4, and each R is a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted alkynyl group, a substituted or unsubstituted aromatic group, or a hydride group. Exemplary aminosilanes include bisdiethylaminosilane, diisopropylaminosilane, bis(tert-butylamino)silane (BTBAS), di-sec-butylaminosilane, and tris(dimethylamino)silane (3DMAS).
[0045] In some examples, the silicon oxide precursor may be a halosilane. In some examples, the halosilane may contain at least one hydrogen atom. Such a silane may have the chemical formula SiX a H y , wherein y = 1 to 3, a + y = 4. Examples of the halogenated silane may include dichlorosilane (H2SiCl2), hexachlorodisilane (Si2Cl6), and diiodosilane (H2SiI2).
[0046] More specific examples of silicon oxide precursors include polysilane (Si n H 2n+2, where n ≥ 1, such as silane, disilane, trisilane and tetrasilane), trimethylsilylamine, tetraethylorthosilicate (TEOS), monosilane, trimethylsilane (3MS), disilane, butasilane, pentasilane, octasilane, heptsilane, hexasilane, cyclotetrasilane, cycloheptasilane, cyclohexasilane, cyclooctylsilane, cyclopentasilane, 1,4-dioxa-2,3,5,6-tetrasilcyclohexane, triethoxysiloxane (TRIES) and tetraoxymethylcyclotetrasiloxane (TOMCTS).
[0047] The terms "stack" and "die stack" generally refer to a stack of alternating layers of different materials. An example may include an "OP stack" containing alternating silicon oxide layers and polysilicon layers. An OP stack can be formed by depositing alternating silicon oxide layers and amorphous silicon layers on a substrate, and then annealing the substrate to form a polysilicon layer from the silicon layer. The amorphous silicon layer may also be referred to herein as a silicon layer.
[0048] The term "transition film" generally refers to a silicon oxide layer that contains an oxygen concentration gradient.
[0049] The term "within the range of" from X to Y generally means a range that includes the values X and Y.
[0050] The term “3D NAND” is an abbreviation for three-dimensional NOT AND and generally refers to a memory architecture based on NOT AND logic gates.
[0051] The term “3D NOR” is an abbreviation for three-dimensional NOT OR and generally refers to a memory architecture based on NOT OR logic gates.
[0052] The term "3D DRAM" is an abbreviation for three-dimensional dynamic random access memory.
[0053] As described above, a die stack is an alternating stack of material layers that can be used to form 3-dimensional (3D) integrated circuits. Certain die stacks may include silicon oxide (SiO2) layers alternating with polycrystalline silicon (polysilicon) layers. Such stacks may be referred to as OP stacks, where "O" stands for "oxide" or SiO2 layers and "P" stands for "poly" or polycrystalline silicon layers. OP stacks may be used to form three-dimensional (3D) memory structures such as 3D NAND, 3D NOR, or 3D DRAM structures.
[0054] However, OP stacks may have weak adhesion issues at the interface between the silicon oxide layer and the polysilicon layer. Weak interface adhesion can lead to delamination, breakage, and device failure. Various interface treatments can be performed to increase interface adhesion. For example, one strategy is to nitride the interface layer between the oxide layer and the polysilicon layer. The nitridation process can include coating the surface with nitrogen before depositing the next layer. Such interface treatments can form chemical bridges (e.g., silicon nitride bridges) across the interface. Compared to examples where the interface treatment is omitted, this interface treatment can improve adhesion.
[0055] However, the presence of nitrogen may potentially degrade device performance. Therefore, the disclosed examples relate to forming an OP stack that avoids the use of an interfacial nitridation step. In short, the disclosed examples include concentration gradients of multiple elements in a material layer. The concentration gradient can help improve the adhesion between a silicon oxide layer and a polysilicon layer in an OP stack. In short, one example includes depositing a silicon layer containing an n-type dopant concentration gradient on a substrate using chemical vapor deposition (CVD). The silicon layer can be deposited by ramping the flow rate of an n-type dopant precursor while flowing a polysilicon precursor to form a silicon layer containing a concentration gradient. The flow rate of the n-type dopant precursor can be ramped up or down to produce a positive or negative concentration gradient, respectively. Then, a silicon oxide layer is deposited on the silicon layer. The substrate can be annealed later to convert the silicon layer from an amorphous state to polysilicon. Compared to examples lacking a concentration gradient, the n-type dopant concentration gradient helps improve the adhesion between the silicon layer and the overlying silicon oxide layer. Furthermore, the use of n-type dopants in the silicon layer can help avoid the use of nitridation of the silicon layer surface as an adhesion strategy. This can help improve device performance.
[0056] Also disclosed are examples involving forming a transition film between a silicon oxide layer and a silicon layer. The transition film comprises silicon oxide having an oxygen concentration gradient transitioning from silicon oxide to silicon. The transition film is deposited on the silicon oxide layer by flowing a polysilicon precursor while controlling process conditions to form the gradient. As described in more detail below, the process conditions can be controlled by ramping down the flow rate of an oxidant or by performing a relatively short purge to remove some of the oxidant from the process chamber. After forming the transition film, a polysilicon precursor is flowed into the chamber to deposit a silicon layer onto the transition film. Compared to examples lacking a transition film, the transition film helps improve adhesion between the underlying silicon oxide layer and the overlying silicon layer.
[0057] Thus, an OP stack can be fabricated to include a polysilicon layer having an n-type dopant concentration gradient, a transition film having an oxygen concentration gradient, or a combination of an n-type dopant gradient in the polysilicon layer and an oxygen concentration gradient in the transition layer. The examples disclosed herein can help maintain desired film properties while improving adhesion in an OP stack. For example, a polysilicon layer initially deposited with an n-type dopant concentration gradient can have a sheet resistance substantially similar to that of a polysilicon layer initially deposited with a uniform dopant concentration. Furthermore, as mentioned above, interfacial nitridation can be avoided, resulting in improved device performance.
[0058] Figure 1 A flow chart of an exemplary method 100 for forming a stack of films deposited on a substrate in a process chamber using chemical vapor deposition is shown. More particularly, Figure 1 Depicts the formation of a silicon film containing an n-type dopant concentration gradient. Figures 2A to 2E An exemplary substrate structure that can be formed in such a process is schematically shown. The method 100 can be used to process a substrate in a process chamber of a chemical vapor deposition tool. Figure 6 Exemplary processing tools are discussed.
[0059] Method 100 includes, at step 102, depositing a silicon layer having a concentration gradient of an n-type dopant on a substrate. The substrate may include a silicon oxide layer in an OP stack. Step 102 includes, at step 104, flowing a polysilicon precursor into a processing chamber to react the polysilicon precursor on the substrate. Heat and / or plasma may be used to promote the chemical conversion of the polysilicon precursor into the silicon layer. Any silicon oxide precursor suitable for forming amorphous silicon with an n-type dopant may be used to form the silicon layer. In some examples, at step 106, the polysilicon precursor includes one or more of silane, disilane, trisilane, or a halosilane. Suitable halosilanes may include dichlorosilane, hexachlorodisilane, and diiodosilane.
[0060] Step 102 further includes, at 108, ramping a flow rate of an n-type dopant precursor flowing into the process chamber while flowing the polysilicon precursor into the process chamber. Any suitable n-type dopant precursor may be used. In some examples, at 110, the n-type dopant precursor includes a phosphorus-containing dopant precursor. In some examples, at 112, the phosphorus-containing dopant precursor includes a phosphine. Further examples of phosphorus-containing dopant precursors may include substituted phosphines, such as phosphorus trichloride or other halogenated phosphines. Other examples of n-type dopant precursors may include arsenic-containing dopant precursors and antimony-containing dopant precursors. Examples include arsine (AsH3), arsenic halides such as AsX3 (X = F, Cl, Br, I), and antimony hydride (SbH3).
[0061] In various examples, the flow rate of the n-type dopant precursor can be ramped up (increased over time) or ramped down (decreased over time). Ramping up refers to a period in which the flow rate Q is increased such that ΔQ ≥ 0 over a period of time. Ramping up the flow rate of the gas entering the processing chamber can have the effect of ramping up the partial pressure of the gas in the processing chamber. Ramping down refers to a period in which the flow rate Q is reduced such that ΔQ ≤ 0 over a period of time. Ramping down the flow rate of the gas entering the processing chamber can have the effect of ramping down the partial pressure of the gas in the processing chamber. In some examples, a baseline flow rate of the n-type dopant precursor can be established before ramping up or ramping down the flow rate. The flow of the n-type dopant precursor can be turned off after the flow rate is ramped to deposit a silicon layer comprising a gradient of n-dopant concentration.
[0062] So continue Figure 1 In some examples, at 114 , method 100 includes ramping up a flow rate of an n-type dopant precursor. Figures 2A to 2C Schematically shows an exemplary structure that can be formed by ramping up the flow rate of an n-type dopant precursor. First, Figure 2A A silicon oxide substrate 200 is shown on which a silicon layer is to be deposited to form a polysilicon layer. The silicon oxide substrate 200 may be placed on Figures 2A to 2E Examples include a silicon wafer, or an underlying silicon layer of an OP stack. Silicon oxide substrate 200 represents an O layer in an OP stack.
[0063] Figure 2B The structure is shown after forming a silicon layer 202 on a silicon oxide substrate 200. Silicon layer 202 includes an n-type dopant concentration gradient formed by ramping the flow rate of an n-type dopant precursor. In this example, the n-type dopant concentration increases with increasing thickness of silicon layer 202. Thus, the concentration of n-type dopant at a first depth 204 is less than the concentration of n-type dopant at a second depth 206. Silicon layer 202 can have a sheet resistance substantially similar to that of uniformly n-doped polysilicon. In some examples, the sheet resistance of polysilicon deposited with the n-type dopant concentration gradient is within ±2.5% of the sheet resistance of polysilicon deposited with a relatively homogeneous concentration of n-type dopant.
[0064] Back to Figure 1 The flow rate of the n-type dopant can be ramped between any suitable initial and ending values. In some examples, the lower flow rate at the start of the ramp at 116 can be in the range of 0 standard cubic centimeters per minute (sccm) to 400 sccm. Furthermore, in more specific examples, the lower flow rate is in the range of 0 sccm to 100 sccm.
[0065] Furthermore, in some examples, the ramped flow rate may be within a range of 100 sccm to 2000 sccm. In a more specific example, the ramped flow rate may be within a range of 100 sccm to 1000 sccm. In other examples, flow rates outside of these ranges may be used.
[0066] In other examples, at 120 , method 100 includes ramping down the flow rate of the n-type dopant precursor. Figure 2A 、 2D 2E show exemplary structures formed by ramping down the flow rate of an n-type precursor when depositing a silicon layer using a polysilicon precursor. As mentioned above, Figure 2A A silicon oxide substrate 200 is shown, which may represent an O layer in an OP stack. Figure 2D Silicon layer 212 is shown formed on silicon oxide substrate 200. Silicon layer 212 includes an n-type dopant concentration gradient. Because the n-type dopant flow rate is ramped down at 120, the concentration decreases as the thickness of silicon layer 212 increases. Thus, the concentration of n-type dopant at a first depth 214 is greater than the concentration of n-type dopant at a second depth 216. The higher flow rate at the beginning of the n-type dopant precursor flow and the lower flow rate at the end of the n-type dopant precursor flow can be within the exemplary ranges described above at 116 and 118.
[0067] In some examples, at 122, ramping the flow rate includes linearly ramping the flow rate. Linearly ramping the flow rate includes increasing or decreasing the flow rate at a fixed rate. In other examples, the rate of change of the flow rate can be varied. In some examples, at 124, the method further includes flowing the n-type dopant precursor at a fixed flow rate. As described above, the fixed flow rate can be used before or after ramping the flow rate.
[0068] As discussed above, as part of the OP stack fabrication process, a silicon layer can be deposited on the silicon oxide. Thus, at 126 , method 100 includes depositing a silicon layer on the silicon oxide layer. In some such examples, at 128 , a silicon layer is deposited on the transition film. Transition films are discussed in more detail below.
[0069] At 130 , the method 100 further includes depositing a silicon oxide layer on the silicon layer having the n-type dopant concentration gradient. Figure 2C and 2E The deposited silicon oxide layer is shown. Figure 2C A silicon oxide layer 208 is shown deposited on a silicon layer 202 having an n-type dopant concentration that increases with thickness. Similarly, Figure 2EA silicon oxide layer 218 is shown deposited on a silicon layer 212 having an n-type dopant concentration that decreases with increasing thickness. As mentioned above, the n-type dopant concentration gradient can help improve adhesion between the polysilicon layer and the silicon oxide layer. This can provide sufficient adhesion to avoid delamination, cracking, and device failure while avoiding an interfacial nitridation step.
[0070] Back to Figure 1 At 130, any suitable silicon oxide precursor may be used to deposit the silicon oxide layer. In some examples, the silicon oxide precursor is an alkoxysilane. The alkoxysilanes that may be used include alkoxysilanes having the following composition: H x -Si-(OR) y , wherein x=1 to 3, x+y=4, and each R is a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted alkynyl group, or a substituted or unsubstituted aromatic group; and H x (RO) y ,-Si-Si-(OR) y H x , wherein each R is a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted alkynyl group, or a substituted or unsubstituted aromatic group. Exemplary alkoxysilanes include tetramethoxysilane (TMOS), diethoxymethylsilane (DEMS), diethoxysilane (DES), dimethoxymethylsilane, dimethoxysilane (DMOS), methyldiethoxysilane (MDES), methyldimethoxysilane (MDMS), tert-butoxydisilane, triethoxysilane (TES), and trimethoxysilane (TMS or TriMOS).
[0071] In some examples, the silicon oxide precursor is siloxane. Siloxane includes materials having Si-O-Si bonds. Exemplary siloxanes include octamethylcyclotetrasiloxane (OMCTS), octamethoxydodecylsiloxane (OMODDS), and tetramethylcyclotetrasiloxane (TMCTS).
[0072] In some examples, the silicon oxide precursor is an aminosilane. Aminosilane includes compounds having the general formula H x -Si-(NR) y wherein x=1 to 3, x+y=4, and each R is a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted alkynyl group, a substituted or unsubstituted aromatic group, or a hydride group. Exemplary aminosilanes include bisdiethylaminosilane, diisopropylaminosilane, bis(tert-butylamino)silane (BTBAS), di-sec-butylaminosilane, and tris(dimethylamino)silane (3DMAS).
[0073] In some examples, the silicon oxide precursor may be a halogenated silane. In some examples, the halogenated silane may contain at least one hydrogen atom. Such a silane may have SiX a H y wherein y=1 to 3, a+y=4. Examples of halogenated silanes may include dichlorosilane (H2SiCl2), hexachlorodisilane (Si2Cl6), and diiodosilane (H2SiI2).
[0074] Further examples of silicon oxide precursors include polysilane (Si n H 2n+2 , where n ≥ 1, such as silane, disilane, trisilane and tetrasilane), trimethylsilylamine, tetraethylorthosilicate (TEOS), monosilane, trimethylsilane (3MS), disilane, butasilane, pentasilane, octasilane, heptsilane, hexasilane, cyclotetrasilane, cycloheptasilane, cyclohexasilane, cyclooctylsilane, cyclopentasilane, 1,4-dioxa-2,3,5,6-tetrasilcyclohexane, triethoxysiloxane (TRIES) and tetraoxymethylcyclotetrasiloxane (TOMCTS).
[0075] An oxidizing agent is also introduced into the processing chamber to form the silicon oxide layer. The oxidizing agent may comprise any suitable oxygen-containing chemical that can react with the silicon oxide precursor to form the silicon oxide film. Examples of oxidizing agents may include oxygen, ozone, water vapor, hydrogen peroxide, and nitrous oxide.
[0076] As mentioned above, in some examples, a transition film can be used to improve adhesion between layers in an OP stack. The transition film comprises a region of silicon oxide having an oxygen concentration gradient. The transition film is formed on the silicon oxide layer. A silicon layer can then be deposited on the transition film. The transition film can be deposited to have a negative oxygen concentration gradient such that the oxygen concentration gradient decreases as the thickness of the transition film increases.
[0077] Figure 3 A flow chart is shown of an exemplary method 300 that includes forming a transition film comprising an oxygen concentration gradient. The method 300 can be used to deposit a stack of films on a substrate in a processing chamber of a CVD tool. Figures 4A to 4C The structures that can be formed in such a process are shown schematically. Figure 6 An example of a processing tool that may be used to perform method 300 is described in further detail.
[0078] The method 300 includes, at 302 , depositing a silicon oxide layer on a substrate. Figure 4AAn exemplary silicon oxide layer 400 is shown formed on a substrate 401. The substrate may represent the silicon layer in an OP stack, which will be converted to a polysilicon layer during a later annealing step. The silicon oxide layer is deposited using CVD. Examples of silicon oxide precursors and oxidants used to form silicon oxide films are described above. As mentioned above, heat and / or plasma can be used to promote the conversion of the precursor into a film.
[0079] Method 300 further includes, at 304, controlling process conditions to deposit a transition film onto the silicon oxide layer while a polysilicon precursor flows into the process chamber. In some examples, at 306, the polysilicon precursor comprises one or more of silane, disilane, trisilane, or a halosilane. Exemplary halosilanes include those listed above. The transition film formed at 304 comprises silicon oxide having an oxygen concentration gradient.
[0080] Figures 4A to 4B A transition film 410 is shown deposited on a silicon oxide layer 400. The transition film 410 comprises silicon oxide having an oxygen concentration gradient. As indicated by the gradient in the depicted shading, the oxygen concentration decreases as the thickness of the transition film 410 increases.
[0081] The processing conditions in the processing chamber may be controlled in any suitable manner to deposit the transition film 410. Figure 3 , in some examples, at 308, controlling the processing conditions includes flowing an oxidant into the processing chamber. In some examples, as indicated at 310, the oxidant may include one or more of oxygen, ozone, water vapor, hydrogen peroxide, or nitrous oxide. After the oxidant is flowed, step 308 further includes flowing a purge gas to remove a portion of the oxidant. Examples of suitable purge gases may include helium, neon, nitrogen, argon, krypton, and xenon. Step 308 further includes flowing a polysilicon precursor into the processing chamber. Thereby, the polysilicon precursor may react with the remaining oxidant in the processing chamber. As the remaining oxidant is consumed or exhausted, a transition film is deposited on the substrate as a silicon oxide layer including a gradient of oxygen concentration. After the oxidant is consumed, additional polysilicon precursor is deposited to form a silicon layer. The silicon layer may be annealed later to form a polysilicon layer. For brief reference Figure 4B As the oxygen concentration decreases, the transition film 410 transitions from silicon oxide to silicon.
[0082] In some examples, flowing the purge gas into the process chamber at 312 includes flowing the purge gas into the process chamber for a duration of 0.75 seconds or less. In some examples, the purge gas is flowed for a duration of 0.5 seconds or less. In some examples, the purge gas is flowed for a duration of 0.25 seconds or less. A shorter purge may allow more oxidant to remain in the process chamber to react with the polysilicon precursor. In other examples, the purge gas may be flowed for a longer duration.
[0083] In further examples, the flow rate of the oxidant may be ramped down to form the transition film. Thus, at 314, controlling the process conditions for depositing the transition film may optionally include flowing the oxidant into the process chamber along with the polysilicon precursor and ramping down the flow rate of the oxidant during deposition of the transition film. In some examples, the flow rate is ramped down and then turned off within 1 second or less. In some examples, the flow rate is ramped down within 0.75 seconds or within 0.5 seconds. In some examples, the flow rate of the polysilicon precursor may be ramped up as the oxidant flow rate is ramped down.
[0084] The transition film may comprise any suitable thickness. The thickness of the transition film may be affected by various factors, such as chamber pressure, plasma power and / or frequency, oxidant flow rate, polysilicon precursor flow rate, purge duration, residual oxidant amount after purge, and flow rate ramp duration. In some examples, at 316, the transition film comprises In other examples, the transition film may be deposited to have a thickness greater than Suitable thickness.
[0085] Next, the method 300 includes, at 320 , depositing a silicon layer onto the transition film. Figure 4C This example shows a polysilicon precursor flowing to deposit a silicon layer 420 on a transition film 410. Due to the transition film 410, the adhesion between the silicon layer 420 and the silicon oxide layer 400 is stronger than in an example lacking a transition film. Thus, an interfacial nitridation process can be avoided.
[0086] As discussed above, the silicon layer can be formed to have an n-type dopant concentration gradient. Thus, in some examples, method 300 further includes: at 322, when flowing a polysilicon precursor into the processing chamber to deposit polysilicon, ramping the flow rate of the n-type dopant precursor into the processing chamber. In some examples, at 324, the n-type dopant precursor includes phosphine. In other examples, any other suitable n-type dopant precursor can be used. Other exemplary n-type dopant precursors are listed above. An example of depositing a silicon layer having an n-type dopant concentration gradient is described above with respect to method 100.
[0087] As mentioned above, a transition film can be used in conjunction with a polysilicon layer containing an n-type dopant concentration gradient to form an OP stack. Such an example can help improve adhesion between layers compared to examples lacking such a concentration gradient. Figure 5Schematic diagram showing an exemplary OP stack 500 including a transition film in addition to polysilicon having an n-type dopant concentration gradient. OP stack 500 can be formed using methods 100 and 300, for example, followed by annealing to convert amorphous silicon into polysilicon. OP stack 500 includes silicon oxide layers 502A to 502C. The OP stack further includes transition films 504A to 504C. The OP stack further includes polysilicon layers 506A to 506C. Each of the polysilicon layers 506A to 506C includes an n-type dopant concentration gradient. Each silicon layer can independently include an ascending concentration gradient (e.g., silicon layer 202) or a descending concentration gradient (e.g., silicon layer 212). Although Figure 5 The example depicted in shows three OP units (labeled A, B, C), but in other examples the OP stack may include any suitable number of layers.
[0088] Figure 6 An exemplary CVD tool 600 that can be used to deposit transition films, silicon layers containing n-type dopant concentration gradients, and OP stacks is shown. CVD tool 600 includes a process chamber 602 and a substrate support 604 within the process chamber. Substrate support 604 is configured to support a substrate 606 positioned within process chamber 602. In some examples, substrate support 604 includes a substrate heater 608. Substrate support 604 can include a pedestal, an electrostatic chuck pedestal, a showerhead pedestal, or any other suitable structure.
[0089] The CVD tool 600 further includes a process gas inlet 610. The process gas inlet 610 is configured to introduce chemical precursors into the process chamber 602. In some examples, the process gas inlet 610 includes a showerhead.
[0090] The CVD tool 600 further includes flow control hardware 612. The flow control hardware 612 is connected to a polysilicon precursor source 616, an optional silicon oxide precursor source 617, an oxidant source 618, an n-type dopant precursor source 620, and a sweep gas source 622. The flow control hardware 612 is configured to fluidly connect one or more chemical sources to the process chamber 602.
[0091] The polysilicon precursor source 616 may comprise any suitable chemical that can react in a CVD process to form a silicon layer, wherein the silicon layer may be amorphous and may be annealed in a later processing step to form polysilicon. Suitable polysilicon precursors include silane, disilane, trisilane, and halosilanes. Examples of halosilanes may include dichlorosilane, hexachlorodisilane, and diiodosilane.
[0092] In some examples, a polysilicon precursor source 616 may also be used to provide a precursor for forming silicon oxide. In other examples, an optional silicon oxide precursor source may be used to form a silicon oxide film. The optional silicon oxide precursor source 617 may include any suitable precursor that can react in a CVD process to form silicon oxide. Examples of silicon oxide precursors for forming silicon oxide include tetraethylorthosilicate, tetramethoxysilane, monosilane, trimethylsilane, disilane, butasilane, pentasilane, octasilane, heptasilane, hexasilane, cyclotetrasilane, cycloheptasilane, cyclohexasilane, cyclooctasilane, cyclopentasilane, 1,4-dioxa-2,3,5,6-tetrasilcyclohexane, diethoxymethylsilane, diethoxysilane, dimethoxymethylsilane, dimethoxysilane, methyldiethoxysilane, methyldimethoxysilane, tert-butoxydisilane, triethoxysilane, and trimethoxysilane.
[0093] In some examples, the silicon oxide precursor may be a siloxane. Exemplary siloxanes include octamethylcyclotetrasiloxane, octamethoxydodecylsiloxane, tetramethylcyclotetrasiloxane, triethoxysiloxane, and tetraoxymethylcyclotetrasiloxane.
[0094] Oxidant source 618 comprises any suitable oxidant that can be used to react with the polysilicon precursor in a CVD process to deposit silicon oxide. Examples may include oxygen, ozone, water vapor, hydrogen peroxide, and nitrous oxide.
[0095] The n-type dopant precursor source 620 includes any suitable n-type dopant precursor. Examples may include phosphorus-containing dopant precursors, arsenic-containing dopant precursors, and antimony-containing dopant precursors. Examples of phosphorus-containing dopant precursors may include phosphine, methylphosphine, phosphorus trichloride, and methyldichlorophosphine. Examples of arsenic-containing dopant precursors may include arsine, alkylarsines such as trimethylarsine, and arsenic halides. Examples of antimony-containing dopant precursors may include antimony hydride (stibine).
[0096] The purge gas source 622 may comprise any suitable inert gas. Examples include helium, neon, nitrogen, argon, krypton, and xenon.
[0097] The flow control hardware 612 is configured to control the flow rate of a polysilicon precursor from a polysilicon precursor source 616 into the process chamber 602. The flow control hardware 612 is further configured to control the flow rate of a silicon oxide precursor from a silicon oxide precursor source 617 into the process chamber 602. Similarly, the flow control hardware 612 is configured to control the flow rate of an oxidant, an n-type dopant precursor, and a sweep gas from their respective sources into the process chamber 602. The flow control hardware 612 may include one or more mass flow controllers and / or valves to control the flow rates of the gases. In some examples, the flow control hardware 612 includes a point-of-use valve manifold (PVM). The PVM may include valves positioned sufficiently close to the process gas inlet 610 so that the respective gas flow rates of the multiple gases flowing into the process chamber 602 can be substantially precisely controlled.
[0098] The CVD tool 600 further includes an exhaust system 630. The exhaust system 630 is configured to receive gas flowing out of the process chamber 602. In some examples, the exhaust system 630 is configured to actively remove gas from the process chamber 602 and / or apply a partial vacuum. The exhaust system 630 can include any suitable hardware, including one or more pumps.
[0099] The CVD tool 600 further includes a radio frequency (RF) power source 632 electrically connected to the process gas inlet 610. The RF power source 632 is configured to form a plasma between a pair of electrodes comprising the process gas inlet 610 and the substrate support 606. The plasma can be used to promote the conversion of one or more film precursors into reactive chemicals to form a film. In some examples, the plasma can include an inert diluent gas, such as an inert gas from a purge gas source 622. The CVD tool 600 can include a matching network 634 for impedance matching of the RF power source 632. The RF power source 632 can be configured for any suitable frequency (e.g., 400 kHz or 13.56 MHz as examples) and power (e.g., power in the range of 0 to 6500 watts). In some examples, the RF power source 632 is configured to operate at a variety of different frequencies and / or powers. In other examples, the RF power source and matching network can be omitted. In still other examples, a remote plasma generator can be used. Remote plasma generators generate reactive chemicals using a plasma remote from the substrate being processed.
[0100] The CVD tool 600 further includes a controller 650 configured to control the functions of the CVD tool 600. The controller 650 is operably coupled to the substrate heater 608, the flow control hardware 612, and the exhaust system 630. The controller 650 may be further operably coupled to any other suitable components of the CVD tool 600. The controller 650 is configured to control various functions of the CVD tool 600 to form a film stack on a substrate. For example, the controller 650 is configured to operate the substrate heater 608 to heat the substrate. The controller 650 is also configured to operate the flow control hardware 612 to cause a polysilicon precursor to flow into the process chamber 602 at a selected flow rate. The controller 650 is also configured to operate the flow control hardware 612 to cause a silicon oxide precursor to flow into the process chamber 602 at a selected flow rate. The controller 650 is also configured to operate the flow control hardware 612 to cause an oxidant to flow into the process chamber 602 at a selected flow rate. The controller 650 is also configured to operate the flow control hardware 612 to flow the n-type dopant precursor into the processing chamber 602 at a selected flow rate.
[0101] The controller 650 is also configured to operate the exhaust system 630 to remove gas from the process chamber 602. The controller 650 is further configured to operate the flow control hardware 612 and the exhaust system 630 to maintain a selected pressure within the process chamber 602.
[0102] The controller 650 is further configured to operate the flow control hardware 612 to ramp the flow rate of gas flowing into the process chamber 602. The controller 650 is further configured to purge the process chamber 602. For example, the controller 650 is configured to operate the flow control hardware 612 to flow a purge gas into the process chamber 602 for a selected duration and / or control the exhaust system 630 to remove gas from the process chamber. The controller 650 is further configured to operate the RF power source 632 to form a plasma.
[0103] The controller 650 is further configured to control process conditions (e.g., pressure, RF power, gas flow) to control conformality, thickness, and other film properties. The controller 650 is further configured to control any other functions of the CVD tool 600. The controller 650 is also configured to operate the CVD tool 600 to perform any of the methods disclosed herein. The controller 650 may comprise any suitable computing system. Figure 7 An exemplary computing system is described.
[0104] Thus, the disclosed examples provide for the deposition of stacks of films having improved interfacial adhesion compared to other stacks. The stack can be formed to include a polysilicon (after annealing) layer containing an n-type dopant concentration gradient. The OP stack can be formed to include a transition film containing a silicon oxide with an oxygen concentration gradient. Furthermore, the OP stack can be formed to include a combination of these features. The examples disclosed herein can help improve adhesion in OP stacks without significantly affecting film properties. The improved adhesion can help avoid interfacial nitridation, which can also improve device performance compared to devices that use nitridation between OP stack layers for adhesion.
[0105] In some examples, the methods and processes described herein may be bound to a computing system of one or more computing devices. In particular, such methods and processes may be implemented as computer applications or services, application programming interfaces (APIs), libraries, and / or other computer program products.
[0106] Figure 7 A non-limiting example of a computing system 700 is schematically shown that can perform one or more of the methods and processes described above. The computing system 700 is shown in simplified form. The computing system 700 can take the form of one or more personal computers, workstations, computers integrated with substrate processing tools, and / or network-accessible server computers.
[0107] The computing system 700 includes a logic machine 702 and a storage machine 704. The computing system 700 may optionally include a display subsystem 706, an input subsystem 708, a communication subsystem 710, and / or Figure 7 Controller 650 is an example of computing system 700.
[0108] Logic machine 702 includes one or more physical devices configured to execute instructions. For example, the logic machine can be configured to execute instructions that are part of one or more applications, services, programs, routines, libraries, objects, components, data structures, or other logical constructs. Such instructions can be implemented to perform a task, implement a data type, transform the state of one or more components, achieve a technical effect, or otherwise achieve a desired result.
[0109] The logic machine may include one or more processors configured to execute software instructions. Additionally or alternatively, the logic machine may include one or more hardware or firmware logic machines configured to execute hardware or firmware instructions. The processors of the logic machine may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel, and / or distributed processing. The various components of the logic machine may optionally be distributed across two or more separate devices that may be remotely located and / or configured for coordinated processing. Various aspects of the logic machine may be virtualized and executed by a remotely accessible, networked computing device configured in a cloud computing configuration.
[0110] The storage machine 704 includes one or more physical devices configured to store instructions 712 that can be executed by a logic machine to implement the methods and processes described herein. When such methods and processes are implemented, the state of the storage machine 704 can be transformed—for example, to store different data.
[0111] The storage 704 may include removable and / or internal devices. The storage 704 may include optical storage (e.g., CD, DVD, HD-DVD, Blu-ray Disc, etc.), semiconductor memory (e.g., RAM, EPROM, EEPROM, etc.), and / or magnetic storage (e.g., hard disk drive, floppy disk drive, tape drive, MRAM, etc.). The storage 704 may include volatile, non-volatile, dynamic, static, read / write, read-only, random access, sequential access, location addressable, file addressable, and / or content addressable devices.
[0112] It should be understood that storage 704 comprises one or more physical devices. However, alternatively, aspects of the instructions described herein may be propagated via a communication medium (eg, electromagnetic signals, optical signals, etc.) that is not held for a finite duration by a physical device.
[0113] Aspects of the logic engine 702 and the memory engine 704 may be integrated together into one or more hardware logic components. For example, such hardware logic components may include field programmable gate arrays (FPGAs), program and application specific integrated circuits (PASIC / ASICs), program and application specific standard products (PSSP / ASSPs), systems on chips (SOCs), and complex programmable logic devices (CPLDs).
[0114] When included, the display subsystem 706 can be used to present a visual representation of the data stored by the storage machine 704. This visual representation can take the form of a graphical user interface (GUI). Because the methods and processes described herein change the data held by the storage machine and therefore change the state of the storage machine, the state of the display subsystem 706 can also be converted to visually represent the change of the underlying data. The display subsystem 706 can include one or more display devices using almost any type of technology. Such a display device can be combined with the logic machine 702 and / or the storage machine 704 in a shared cabinet (a shared enclosure), or such a display device can be a peripheral display device.
[0115] When included, the input subsystem 708 may include or interact with one or more user input devices (e.g., a keyboard, mouse, or touch screen). In some examples, the input subsystem may include or interact with selected natural user input (NUI) components. Such components may be integrated or peripheral, and the conversion and / or processing of input actions may be handled on-board or off-board. Exemplary NUI components may include microphones for voice and / or sound recognition, and infrared, color, stereo, and / or depth cameras for machine vision and / or gesture recognition.
[0116] When included, the communication subsystem 710 can be configured to communicatively couple the computing system 700 with one or more other computing devices. The communication subsystem 710 can include wired and / or wireless communication devices compatible with one or more different communication protocols. As non-limiting examples, the communication subsystem can be configured to communicate using a wireless telephone network, or a wired or wireless local area network or wide area network. In some examples, the communication subsystem can allow the computing system 700 to send messages to and / or receive messages from other devices over a network such as the Internet.
[0117] It should be understood that the configurations and / or methods described herein are exemplary in nature, and that these specific embodiments or examples should not be considered restrictive, as many variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. Thus, the various actions shown and / or described may be performed in the order shown and / or described, in other orders, in parallel, or omitted. Similarly, the order of the above-described processes may be changed.
[0118] The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various processes, systems and configurations, and other features, functions, acts and / or properties disclosed herein, as well as any and all equivalents thereof.
Claims
1. A method of depositing a stack of films on a substrate in a processing chamber using chemical vapor deposition, the method comprising: depositing a silicon oxide layer on the substrate; controlling process conditions to deposit a transition film onto the silicon oxide layer while flowing a polysilicon precursor into the process chamber, the transition film comprising silicon oxide having an oxygen concentration gradient; and A silicon layer is deposited onto the transition film.
2. The method of claim 1 , wherein controlling process conditions to deposit the transition film comprises: flowing an oxidant into the processing chamber, After flowing the oxidant into the process chamber, flowing a purge gas into the chamber to remove a portion of the oxidant from the process chamber, and The polysilicon precursor is flowed into the processing chamber.
3. The method of claim 2, wherein flowing the purge gas into the process chamber comprises flowing the purge gas into the process chamber for a duration of 0.75 seconds or less.
4. The method of claim 2, wherein flowing the oxidant into the processing chamber comprises flowing at least one of oxygen, ozone, water vapor, hydrogen peroxide, or nitrous oxide into the processing chamber.
5. The method of claim 1, wherein controlling process conditions to deposit the transition film comprises flowing an oxidant with the polysilicon precursor into the process chamber and ramping down the flow rate of the oxidant during deposition of the transition film. The method of claim 1 , wherein the polysilicon precursor comprises at least one of silane, disilane, trisilane, or a halosilane.
7. The method of claim 1 , wherein controlling the processing conditions to deposit the transition film comprises: depositing a or less thickness of the transition film.
8. The method of claim 1, further comprising ramping a flow rate of an n-type dopant precursor flowing into the process chamber when flowing the polysilicon precursor into the process chamber to deposit the silicon layer.
9. A method of depositing a stack of films on a substrate disposed in a processing chamber using chemical vapor deposition, the method comprising: Depositing a silicon layer including an n-type dopant concentration gradient on the substrate disposed in the processing chamber by the following steps; flowing a polysilicon precursor into the process chamber, and When flowing the polysilicon precursor into the process chamber, ramping a flow rate of an n-type dopant-containing precursor flowing into the process chamber to form the silicon layer; and A silicon oxide layer is deposited on the silicon layer comprising the n-type dopant concentration gradient. 10 . The method of claim 9 , wherein the silicon oxide layer is a second silicon oxide layer, and forming the silicon layer comprises forming the silicon layer on a first silicon oxide layer.
11. The method of claim 9, wherein ramping the flow rate of the n-type dopant-containing precursor comprises ramping the flow rate from a relatively low flow rate to a relatively high flow rate.
12. The method of claim 11, wherein the relatively high flow rate is in the range of 100 standard cubic centimeters per minute (sccm) to 1000 sccm.
13. The method of claim 9, further comprising, when flowing the polysilicon precursor into the processing chamber, flowing the n-type dopant containing precursor into the processing chamber at a constant flow rate before or after ramping.
14. The method of claim 9, wherein ramping the flow rate comprises linearly ramping the flow rate. The method of claim 9 , wherein the n-type dopant-containing precursor comprises phosphine.
16. A chemical vapor deposition tool comprising: processing room; a substrate support disposed in the processing chamber; a substrate heater configured to heat a substrate placed on the substrate support; a polysilicon precursor source comprising a polysilicon precursor; an oxidant source comprising an oxidant; flow control hardware fluidly connecting the polysilicon precursor source and the oxidant source to the processing chamber; Exhaust system; as well as A controller configured to: operating the substrate heater to heat a substrate on the substrate support, the substrate comprising a silicon oxide layer, operating the flow control hardware to deposit a transition film on the silicon oxide layer while flowing the polysilicon precursor into the process chamber, the transition film comprising silicon oxide having an oxygen concentration gradient, and The flow control hardware is operated to flow the polysilicon precursor into the process chamber to deposit a silicon layer onto the transition film.
17. The chemical vapor deposition tool of claim 16, wherein the controller is configured to operate the flow control hardware to deposit the transition film by operating the flow control hardware to: allowing the oxidant to flow into the processing chamber, After flowing the oxidant, purging the process chamber to remove some of the oxidant from the process chamber, and The polysilicon precursor is flowed into the processing chamber.
18. The chemical vapor deposition tool of claim 16, wherein the controller is configured to operate the flow control hardware to deposit the transition film by operating the flow control hardware to flow the oxidant and the polysilicon precursor into the processing chamber and ramping down the flow rate of the oxidant.
19. The chemical vapor deposition tool of claim 16, further comprising an n-type dopant source having an n-type dopant, the flow control hardware fluidly connecting the n-type dopant source to the processing chamber, The controller is further configured to, when flowing the polysilicon precursor into the process chamber, ramp a flow rate of the n-type dopant flowing into the process chamber to deposit the silicon layer, the silicon layer comprising an n-type dopant concentration gradient.
20. The chemical vapor deposition tool of claim 19, wherein the n-type dopant comprises at least one of phosphorus, arsenic, or antimony.