Zero-cross detection circuit, power device, PFC circuit control method and vehicle-mounted charger

Abstract

The invention discloses a zero-cross detection circuit, a power device PFC circuit control method and a vehicle-mounted charger, the zero-cross detection circuit comprises a detection unit, the input end of the detection unit is connected with a phase bridge arm of a PFC circuit, and the detection unit is used for detecting the current value of the phase bridge arm and outputting a voltage detection value according to the current value; and the first input end of the comparison unit is connected with the output end of the current detection unit, the second input end of the comparison unit is connected with a reference power supply, and the comparison unit outputs a zero-cross detection signal according to the voltage detection value and a reference voltage value provided by the reference power supply. The zero-cross detection circuit is simple in design, high in reliability and free of extra energy loss, can be applied to a PFC circuit, and can improve the circuit efficiency.

Description

Technical Field

[0001] The present invention relates to the field of vehicle-mounted charging technology, and in particular to a zero-crossing detection circuit, a power device, a PFC circuit control method, and a vehicle-mounted charger. Background Art

[0002] An on-board charger is a power conversion device composed of power devices that converts AC power to DC power. It is used to connect the power battery to the power grid. Its performance is directly related to the quality of the power grid and the lifespan and performance of the electric vehicle's power battery pack. On-board chargers generally consist of two parts: a front-stage PFC (Power Factor Correction) circuit and a back-stage DC-DC converter. Traditional single-phase boost PFC circuits are widely used in low-power on-board chargers, but their inductor current ripple is large, and the conduction loss of the switching tube increases, reducing efficiency. Summary of the Invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a zero-crossing detection circuit that has a simple design, high reliability, no additional energy loss, is suitable for use in PFC circuits, and can improve circuit efficiency.

[0004] A second objective of the present invention is to provide an electric power device.

[0005] A third objective of the present invention is to provide a PFC circuit control method.

[0006] A fourth object of the present invention is to provide a vehicle-mounted charger.

[0007] To address the above-mentioned problems, an embodiment of a first aspect of the present invention provides a zero-crossing detection circuit, comprising a detection unit, wherein an input end of the detection unit is connected to a phase bridge arm of a PFC circuit, and is used to detect a current value of the phase bridge arm and output a voltage detection value based on the current value; and a comparison unit, wherein a first input end of the comparison unit is connected to an output end of the current detection unit, a second input end of the comparison unit is connected to a reference power supply, and the comparison unit outputs a zero-crossing detection signal based on the voltage detection value and a reference voltage value provided by the reference power supply.

[0008] According to the zero-crossing detection circuit of the embodiment of the present invention, a detection unit detects the current flowing through the phase bridge arm of the PFC circuit and outputs a voltage detection value based on the current value. The comparison unit receives the voltage detection value and then outputs a zero-crossing detection signal based on a comparison result between the voltage detection value and a reference voltage value. Thus, the PFC circuit can control the switch tube through the zero-crossing detection signal to reduce current ripple and conduction loss. In addition, the zero-crossing detection circuit has a simple design, high reliability, and no additional energy loss.

[0009] In some embodiments, the detection unit includes: a transformer, the transformer includes a primary side and a secondary side, the primary side is connected in series to the bridge arm, and the first end of the secondary side is grounded; a diode, the anode of the diode is connected to the second end of the secondary side; a first resistor, the first end of the first resistor is connected to the cathode of the diode, and the second end of the first resistor is connected to the first input end of the comparison unit; a second resistor, the first end of the second resistor is connected to the first resistor and the first input end, and the second end of the second resistor is grounded.

[0010] In some embodiments, the comparison unit includes: a comparator, a first input end of the comparator is connected to the second end of the first resistor and the first end of the second resistor, a second input end of the comparator is connected to a reference power supply, and an output end of the comparator is used to output the zero-crossing detection signal.

[0011] A second aspect of the present invention provides an electric power device, including a PFC circuit; and the zero-crossing detection circuit of the above embodiment, wherein the zero-crossing detection circuit is connected to a phase bridge arm of the PFC circuit.

[0012] According to the power device of the embodiment of the present invention, the PFC circuit controls the on and off of the switch tube based on the zero-crossing detection circuit, which can effectively improve the stability of the circuit operation, reduce conduction loss, and improve the performance of the circuit.

[0013] In some embodiments, the PFC circuit includes N-phase bridge arms, each phase bridge arm includes two power tubes connected in series, and the connection point of the two power tubes is the midpoint of the bridge arm; the number of the zero-crossing detection circuits is 2N, each zero-crossing detection circuit is arranged in a one-to-one correspondence with each power tube, and the input end of the zero-crossing detection circuit is connected between the corresponding power tube and the midpoint of the bridge arm.

[0014] In some embodiments, the PFC circuit is an interleaved parallel totem pole PFC circuit.

[0015] A third aspect of the present invention provides a PFC circuit control method for the power device of the above embodiment. The method includes: when determining that the zero-crossing detection signal is a current zero crossing, recording the ePWM count value of each phase bridge arm; determining the phase difference between the two phase bridge arms based on the ePWM count value of each phase bridge arm; and controlling the opening time of each phase bridge arm based on the phase difference between the two phase bridge arms.

[0016] According to the PFC circuit control method of an embodiment of the present invention, the PFC circuit controls the on-time of each bridge arm based on the zero-crossing detection signal, thereby achieving the purpose of staggered parallel connection and realizing the mutual cancellation of the currents in the bridge arms of each phase, thereby reducing current ripple and lowering circuit losses.

[0017] In some embodiments, the PFC circuit includes a main phase and a slave phase, and controls the on-time of each phase bridge arm according to the phase difference between the two-phase bridge arms, including: determining that the phase of the slave phase leads the phase of the main phase according to the phase difference between the two-phase bridge arms, and controlling the on-time of the slave phase bridge arm in the next on-cycle to be a first time length, and the first time length is greater than the on-time of the slave phase bridge arm in the previous on-cycle; determining that the phase of the slave phase lags behind the phase of the main phase according to the phase difference between the two-phase bridge arms, and controlling the on-time of the main phase bridge arm in the next on-cycle to be a second time length, and the second time length is greater than the on-time of the main phase bridge arm in the previous on-cycle.

[0018] In some embodiments, the method further includes: obtaining a count difference based on the ePWM count value corresponding to the main phase bridge arm and the ePWM count value corresponding to the slave phase bridge arm; determining the voltage input value of each phase bridge arm and the voltage output value of each phase bridge arm; and determining the first duration or the second duration based on the voltage input value of each phase bridge arm, the voltage output value of each phase bridge arm and the count difference.

[0019] In some embodiments, the method further includes: determining a bridge arm midpoint voltage value of each phase bridge arm; and determining a turn-on state of a freewheeling diode in each phase bridge arm according to the bridge arm midpoint voltage value.

[0020] In some embodiments, the on-state of the freewheeling tube in each phase bridge arm is determined according to the bridge arm midpoint voltage value, including: under the condition that the positive half-cycle of the power supply AC voltage is determined according to the bridge arm midpoint voltage value and the bridge arm midpoint voltage value is greater than a first voltage threshold, controlling the on-state of the positive half-cycle freewheeling tube in each phase bridge arm to be on and the on-state of the negative half-cycle freewheeling tube to be off; under the condition that the negative half-cycle of the power supply AC voltage is determined according to the bridge arm midpoint voltage value and the bridge arm midpoint voltage value is less than a second voltage threshold, controlling the on-state of the positive half-cycle freewheeling tube in each phase bridge arm to be off and the on-state of the negative half-cycle freewheeling tube to be on.

[0021] In some embodiments, the PFC circuit is an interleaved parallel totem pole PFC circuit, comprising a first power frequency transistor and a second power frequency transistor, wherein a first end of the first power frequency transistor is connected to an upper end of a bridge arm of each phase, a second end of the first power frequency transistor is connected to a first end of the second power frequency transistor, and a second end of the second power frequency transistor is connected to a lower end of a bridge arm of each phase. The method further comprises: determining a midpoint voltage value of a bridge arm of each phase; and determining an on-state of the first power frequency transistor and an on-state of the second power frequency transistor based on the midpoint voltage value of the bridge arm.

[0022] In some embodiments, the on-state of each power frequency tube is determined according to the midpoint voltage value of the bridge arm, including: under the condition that the positive half-cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm, the on-state of the first power frequency tube is controlled to be off and the on-state of the second power frequency tube is controlled to be on; under the condition that the negative half-cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm, the on-state of the first power frequency tube is controlled to be on and the on-state of the second power frequency tube is controlled to be off.

[0023] A fourth embodiment of the present invention provides an on-board charger, comprising the power device of the above embodiment; and a controller connected to the power device and configured to execute the PFC circuit control method of the above embodiment.

[0024] According to the on-board charger of the embodiment of the present invention, a controller controls the power device to execute the PFC circuit control method, thereby achieving a good PFC output effect, reducing voltage and current ripple, improving the power factor, reducing conduction loss, and improving the stability and performance of the PFC circuit.

[0025] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which: Figure 1 1 is a circuit topology diagram of a zero-crossing detection circuit 100 according to an embodiment of the present invention; Figure 2 (a)-(b) are schematic diagrams of voltage detection values of a positive half cycle of an AC voltage according to an embodiment of the present invention; Figure 3 is a structural block diagram of an electric power device according to an embodiment of the present invention; Figure 4 is a circuit topology diagram of a PFC circuit according to an embodiment of the present invention; Figure 5 (a)-(d) are schematic diagrams of circuit topologies of a PFC circuit according to another embodiment of the present invention; Figure 6 (a)-(d) are schematic diagrams of circuit topologies of a PFC circuit according to another embodiment of the present invention; Figure 7 is a flow chart of a PFC circuit control method according to one embodiment of the present invention; Figure 8 is a phase diagram according to an embodiment of the present invention; Figure 9 is a phase diagram according to another embodiment of the present invention; Figure 10 is a flow chart of a PFC circuit control method according to another embodiment of the present invention; Figure 11 is a schematic diagram of a control framework according to one embodiment of the present invention; Figure 12 is a schematic diagram of ePWM operation according to an embodiment of the present invention; Figure 13 is a flow chart of a PFC circuit control method according to another embodiment of the present invention. Figure 14 FIG. 4 is a structural block diagram of a vehicle-mounted charger according to an embodiment of the present invention.

[0027] Reference numerals: On-board charger 1000; Zero-crossing detection circuit 100; PFC circuit 200; power device 300; controller 400; Detection unit 10; Comparison unit 20; Transformer CT1; diode Q5; first resistor R1; second resistor R2; first power frequency diode S1; second power frequency diode S2. DETAILED DESCRIPTION

[0028] The embodiments of the present invention will be described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. The embodiments of the present invention will be described in detail below.

[0029] In order to solve the above problems, an embodiment of the first aspect of the present invention proposes a zero-crossing detection circuit. The zero-crossing detection circuit has a simple design, high reliability, no additional energy loss, can be applied to the PFC circuit and can improve the circuit efficiency.

[0030] Reference below Figure 1 The zero-crossing detection circuit 100 according to an embodiment of the present invention is described. The zero-crossing detection circuit 100 includes a detection unit 10 and a comparison unit 20 .

[0031] Among them, the input end of the detection unit 10 is connected to the phase bridge arm of the PFC circuit, and is used to detect the current value of the phase bridge arm and output a voltage detection value based on the current value; the first input end of the comparison unit 20 is connected to the output end of the current detection unit 10, and the second input end of the comparison unit 20 is connected to the reference power supply. The comparison unit 20 outputs a zero-crossing detection signal based on the voltage detection value and the reference voltage value provided by the reference power supply.

[0032] Specifically, the detection unit 10 detects the current value of the phase bridge arm of the PFC circuit and converts the current value into a voltage detection value for output. A comparator then compares the voltage detection value with a reference voltage value. When the current value is zero, the comparison unit outputs a zero-crossing detection signal. Based on the zero-crossing detection signal, the PFC circuit controls the triggering timing of a new cycle, i.e., the on / off switching of the switch, thereby reducing current ripple and switching losses. The reference voltage value can be obtained experimentally. By adjusting the reference voltage value, the triggering timing of a new PFC circuit cycle can be precisely controlled, thereby optimizing switching losses.

[0033] In some embodiments, for a PFC circuit operating in critical conduction mode, the zero-crossing detection signal is a key signal for triggering a new switching cycle, such as Figure 2 As shown, Figure 2 It is a schematic diagram of the voltage detection value of the positive half cycle of the AC voltage. Figure 2 (a) When the input voltage Vin is less than half of the peak voltage Vm, after the MOSFET is turned off, the voltage detection value Vds reaches the peak voltage Vm, and the inductor current gradually decreases. After the inductor current becomes negative, the voltage detection value Vds can reach the minimum value of zero; Figure 2 (b) When the input voltage Vin is greater than half of the peak voltage Vm, after the MOSFET is turned off, the voltage detection value Vds reaches the peak voltage Vm, and the inductor current value gradually decreases. After the inductor current value becomes negative, the voltage detection value Vds can reach the minimum value, but will not reach zero. Therefore, when a negative current appears and the negative current reaches a certain amplitude, the voltage detection value Vds has already dropped to a relatively low value. Therefore, by utilizing the above characteristics, by querying the size of the negative current, the zero-crossing detection signal can be detected.

[0034] According to the zero-crossing detection circuit 100 of the embodiment of the present invention, the detection unit 10 detects the current flowing through the phase bridge arm of the PFC circuit and outputs a voltage detection value based on the current value. The comparison unit 20 receives the voltage detection value and then outputs a zero-crossing detection signal based on a comparison result between the voltage detection value and a reference voltage value. The PFC circuit can thereby initiate a new switching cycle using the zero-crossing detection signal, thereby reducing current ripple and conduction loss. In addition, the zero-crossing detection circuit 100 has a simple design, high reliability, and no additional energy loss.

[0035] In some embodiments, as Figure 1 As shown, the detection unit 10 includes a transformer CT1 , a diode Q5 , a first resistor R1 , and a second resistor R2 .

[0036] Among them, the transformer CT1 includes a primary side and a secondary side, the primary side is connected in series to the bridge arm, and the first end of the secondary side is grounded; the anode of the diode Q5 is connected to the second end of the secondary side; the first end of the first resistor R1 is connected to the cathode of the diode Q1, and the second end of the first resistor R1 is connected to the first input end of the comparison unit 20; the first end of the second resistor R2 is connected to the first resistor R1 and the first input end, and the second end of the second resistor R2 is grounded.

[0037] Specifically, transformer CT1 can reduce current at a fixed ratio, and the reduced current is converted into a voltage through first resistor R1, thereby converting the current value of the phase bridge arm into a voltage detection value and outputting it. The voltage detection value is then input to the first input terminal of the comparison unit 20. The reduction ratio of transformer CT1 is related to the turns ratio between the primary and secondary sides of transformer CT1, and can be set according to actual conditions, and is not specifically limited here.

[0038] In some embodiments, as Figure 1 As shown, the comparison unit 20 includes a comparator 1 .

[0039] The first input terminal of the comparator 1 is connected to the second terminal of the first resistor R1 and the first terminal of the second resistor R2 , the second input terminal of the comparator 1 is connected to the reference power supply, and the output terminal of the comparator 1 is used to output a zero-crossing detection signal.

[0040] Specifically, when the voltage detection value reaches the reference voltage value, the output terminal of the comparator 1 outputs a zero-crossing detection signal. Taking the negative half-cycle of the AC voltage as an example, the current value of the phase bridge arm is detected by the detection unit 10. When a negative current is detected, the transformer CT1 will reduce the voltage value according to a fixed ratio and convert the negative current into a voltage detection value through the first resistor R1. The voltage detection value is then input to the first input terminal of the comparison unit 20 and compared with the reference voltage value set at the second input terminal of the comparison unit 20. When the negative current reaches the threshold, that is, the current value is 0, the voltage detection value will exceed the reference voltage. At this time, the comparison unit 20 will change the output high-level signal to a low-level signal, and the low-level signal will serve as the zero-crossing detection signal. At the same time, the low-level signal can be processed by the DSP to obtain a PWM signal. Then, the PFC circuit can control the conduction and shutdown of the switch tube through the drive circuit, thereby starting a new switching cycle based on the zero-crossing detection signal. The reverse current corresponding to the reference voltage value can be calculated according to formula 1-1, where I th is the reverse current, V th is the reference voltage value, R1 is the resistance value of the first resistor R1, and n is the ratio of the number of turns of the secondary and primary coils of the transformer CT1. It should be noted that the working principle of the positive and negative half-cycles of the AC voltage measurement is the same and will not be elaborated here.

[0041] Formula 1-1 The second embodiment of the present invention provides an electric power device 300, such as Figure 3 As shown, the power device 300 includes a PFC circuit 200 and a zero-crossing detection circuit 100 .

[0042] The zero-crossing detection circuit 100 is connected to a phase bridge arm of the PFC circuit 200 .

[0043] According to the power device 300 of the embodiment of the present invention, the PFC circuit 200 controls the on and off of the switch tube based on the zero-crossing detection circuit 100, which can effectively improve the stability of the circuit operation, reduce conduction loss, and improve the performance of the circuit.

[0044] In some embodiments, the PFC circuit 200 includes N-phase bridge arms, each phase bridge arm includes two power tubes connected in series, and the connection point of the two power tubes is the midpoint of the bridge arm; the number of zero-crossing detection circuits 100 is 2N, each zero-crossing detection circuit 100 is provided in a one-to-one correspondence with each power tube, and the input end of the zero-crossing detection circuit is connected between the corresponding power tube and the midpoint of the bridge arm.

[0045] Specifically, each phase bridge arm of the PFC circuit 200 includes two power tubes connected in series, namely an upper tube and a lower tube. Each zero-crossing detection circuit 100 is provided in a one-to-one correspondence with each power tube, and the input end of the zero-crossing detection circuit 100 is connected between the corresponding power tube and the midpoint of the bridge arm. Figure 1 As shown, there are two zero-crossing detection circuits 100, namely auxiliary winding ZCD1 and auxiliary winding ZCD2, wherein the auxiliary winding ZCD1 and the auxiliary winding ZCD2 detect the current of the upper tube and the lower tube respectively. Taking the PFC circuit 200 including two-phase bridge arms as an example, refer to Figure 4 As shown, the PFC circuit 200 includes two-phase bridge arms, and two zero-crossing detection circuits 100 are connected to each phase bridge arm. The PFC circuit 200 needs to use four zero-crossing detection circuits 100.

[0046] In some embodiments, as Figure 4 As shown, the PFC circuit 200 is an interleaved parallel totem pole PFC circuit.

[0047] Specifically, the present application adopts an interleaved parallel totem pole PFC circuit as the PFC circuit 200. This allows the currents in the PFC circuit 200 to generate a phase difference, so that the currents of each phase can cancel each other out, thereby reducing current ripple and circuit losses. This also reduces the requirements for the differential mode filter and output capacitor.

[0048] For example, Figure 4As shown in the staggered parallel totem pole PFC circuit, L1 and L2 are PFC inductors, Q1, Q2, Q3, Q4 are high-frequency switches, S1 and S2 are power-frequency switches, C0 is the output capacitor, R0 is the load, and the input voltage is U ac , the output voltage is U0, reference Figure 5 (a)-(d) describe the working mode of the interleaved parallel totem pole PFC circuit in the positive half cycle of the AC input, as shown in Figure 5 As shown in (a), working mode 1: Q1 is turned on, Q2 is turned off, Q3 is turned off, Q4 is turned on, the current of inductor L1 decreases, the current of inductor L2 increases, inductor L1 releases energy to the load, inductor L2 charges energy, and output capacitor C0 is charged; as shown in Figure 5 As shown in (b), working mode 2: Q1 is turned on, Q2 is turned off, Q3 is turned on, Q4 is turned off, the current of inductors L1 and L2 decreases, inductors L1 and L2 release energy to the load, and the output capacitor C0 is charged; as shown in Figure 5 As shown in (c), working mode 3: Q1 is turned off, Q2 is turned on, Q3 is turned on, Q4 is turned off, the current of inductor L1 increases, and the current of inductor L2 decreases; inductor L1 is charged, inductor L2 releases energy to the load, and output capacitor C0 is charged; as shown in Figure 5 As shown in (d), working mode 4: Q1 is turned off, Q2 is turned on, Q3 is turned off, Q4 is turned on, the current of inductors L1 and L2 increases, inductors L1 and L2 are charged, and the output capacitor C0 releases energy to the load. In the positive half cycle of AC, when the duty cycle of Q2 and Q4 is less than or equal to 0.5, the circuit working mode sequence is 1-2-3-2. When the duty cycle of Q2 and Q4 is greater than 0.5, the circuit working mode sequence is 4-1-4-3; refer to Figure 6 (a)-(d) describe the working mode of the interleaved parallel totem pole PFC circuit in the negative half cycle of the AC input, as shown in Figure 6 As shown in (a), working mode 5: Q1 is turned off, Q2 is turned on, Q3 is turned on, Q4 is turned off, the current of inductor L1 decreases, the current of inductor L2 increases, inductor L1 releases energy to the load, inductor L2 charges energy, and the output capacitor is charged; as shown in Figure 6 (b) Operation mode 6: Q1 is off, Q2 is on, Q3 is off, Q4 is on, the current in inductors L1 and L2 decreases, inductors L1 and L2 release energy to the load, and the output capacitor charges; Figure 6 (c) Working mode 7: Q1 is on, Q2 is off, Q3 is off, Q4 is on, the current of inductor L1 increases, the current of inductor L2 decreases, inductor L1 is charged, inductor L2 releases energy to the load, and the output capacitor is charged; Figure 6(d) Operating mode 8: Q1 is turned on, Q2 is turned off, Q3 is turned on, Q4 is turned off. The currents of inductors L1 and L2 increase, inductors L1 and L2 are energized, and the output capacitor releases energy to the load. In the positive half-cycle of the alternating current, when the duty cycles of Q1 and Q3 are less than or equal to 0.5, the operating mode sequence of the circuit is 5-6-7-6. When the duty cycles of Q1 and Q3 are greater than 0.5, the operating mode sequence of the circuit is 8-5-8-7.

[0049] In the third aspect of the embodiments of the present invention, a PFC circuit control method is proposed for the power device 300 in the above embodiments, such as Figure 7 shown. The PFC circuit control method includes steps S1-step S3, and the specific steps are as follows.

[0050] Step S1, when it is determined that the zero-crossing detection signal is a current zero-crossing, record the ePWM count value of each phase leg.

[0051] Specifically, in order to ensure that the phase leg currents of the PFC circuit 200 maintain a constant phase difference, it is first necessary to determine the relative phases of each phase. Therefore, when it is determined that the zero-crossing detection signal is a current zero-crossing, record the ePWM count value of each phase leg. By comparing the ePWM count values of each phase leg, the phase difference between each phase can be obtained.

[0052] Step S2, determine the phase difference between two phase legs according to the ePWM count value of each phase leg.

[0053] Specifically, when the system is in a steady state, the ePWM count values of the phase legs of two phases in adjacent switching cycles can be approximately the same. For example, select one of the phases as a reference. According to Formula 1-2, the phase difference between two phase legs can be determined, where Δθ is the phase difference, CTR1 is the ePWM count value of the reference phase, and CTR2 is the ePWM count value of the other phase. If CTR2 = CTR1 / 2, then the phase difference between the two phase legs is 180°; if CTR2 < CTR1 / 2, then the phase of the other phase lags the reference phase by 180°; if CTR2 > CTR1 / 2, then the phase of the other phase leads the reference phase by 180°. If the drive signals of the two phase legs are exactly staggered by 180°, then the current phases are also staggered by 180°, so as to achieve the purpose of interleaved parallel connection. Thus, the currents of each phase leg of this application cancel each other out, thereby reducing the current ripple and lowering the circuit loss.

[0054] Formula 1-2 Step S3, control the on-time of each phase leg according to the phase difference between two phase legs.

[0055] Specifically, the reverse recovery current of the body diode in the MOSFET in the continuous current mode is large, making it difficult to achieve the ideal control effect in the staggered parallel totem pole PFC circuit. The current peak in the discontinuous current mode is large, and resonance will occur after the current reaches 0, increasing the loss. Based on this, the present application proposes to use the conduction market to maintain the phase difference between the bridge arms of each phase, so that the requirements for magnetic devices of the staggered parallel totem pole PFC working in the critical current mode are reduced, and the problem of excessive reverse recovery current of the body diode in the staggered parallel totem pole PFC circuit is improved. Figure 8 As shown, in the steady state, the opening time of each phase bridge arm is fixed and unchanged. The opening time of each phase bridge arm can be used to control the phase difference between the two phase bridge arms. According to the phase difference between the two phase bridge arms in the current cycle, the opening time of the phase bridge arm is adjusted to achieve a 180° phase stagger between the two phase bridge arms within one cycle. As a result, the currents of the phase bridge arms of the present application cancel each other out, thereby reducing current ripple and reducing circuit losses. Among them, the best effect can be achieved by stably maintaining the phase difference between the two phase bridge arms at 180°, but it is difficult to achieve in actual applications. Therefore, the phase difference between the two phase bridge arms can be maintained at 170°, 175°, 185°, 190°, etc., which can also achieve a good effect of suppressing current ripple. No specific restrictions are made here.

[0056] It should be noted that after determining the opening time of each phase bridge arm, the actual drive signal needs to be synthesized. The synthesis of the drive signal can be completed through the ePWM module of DSP. Each ePWM has two outputs, A and B, and each phase bridge arm is controlled by one ePWM module.

[0057] According to the PFC circuit control method of an embodiment of the present invention, the PFC circuit 200 controls the on-time of each phase bridge arm based on the zero-crossing detection signal, thereby achieving the purpose of staggered parallel connection and realizing the mutual cancellation of the currents in the bridge arms of each phase, thereby reducing current ripple and lowering circuit losses.

[0058] In some embodiments, the PFC circuit includes a main phase and a slave phase, and the on-time of each phase bridge arm is controlled according to the phase difference between the two-phase bridge arms, including determining that the slave phase phase leads the main phase phase according to the phase difference between the two-phase bridge arms, and then controlling the on-time of the slave phase bridge arm in the next on-cycle to be a first time length, and the first time length is greater than the on-time of the slave phase bridge arm in the previous on-cycle; determining that the slave phase phase lags behind the main phase phase according to the phase difference between the two-phase bridge arms, and then controlling the on-time of the main phase bridge arm in the next on-cycle to be a second time length, and the second time length is greater than the on-time of the main phase bridge arm in the previous on-cycle.

[0059] Specifically, in the staggered parallel totem pole PFC circuit, one phase is selected as the reference main phase, and the other phase is the slave phase. The phase reference of the main phase bridge arm of the PFC circuit 200 is Figure 9As shown, if it is determined that CTR2>CTR1 / 2, the phase of the slave phase is ahead of the phase of the main phase. By controlling the opening time of the slave phase bridge arm in the next opening cycle to the first time, the opening time of the slave phase bridge arm in this cycle is increased, and the peak value of the current of the slave phase bridge arm in this cycle will also increase accordingly, and the time for the current to fall from the peak to zero will increase, and finally the value of CTR2 in this control cycle will increase. Then, in the next control cycle, the phase current moves backward from the starting point, so that the phase difference between the slave phase bridge arm and the main phase bridge arm is reduced; if it is determined that CTR2<CTR1 / 2, the phase of the slave phase If the slave phase lags behind the main phase, the main phase bridge arm is controlled to be on for the second time in the next on-time period to reduce the on-time period of the slave phase bridge arm in this cycle. The peak value of the current in the slave phase bridge arm in this cycle will also increase accordingly, and the time for the current to drop from the peak value to zero will increase, and finally the value of CTR2 in this control cycle will be reduced. Then, in the next control cycle, the starting point of the main phase current moves backward, so that the phase difference between the slave phase bridge arm and the main phase bridge arm is reduced, thereby realizing the interleaving of the slave phase and the main phase, and the slave phase bridge arm and the main phase bridge arm can maintain a phase difference of 180° in the same cycle.

[0060] In some embodiments, the method further includes: obtaining a count difference based on the ePWM count value corresponding to the main phase bridge arm and the ePWM count value corresponding to the slave phase bridge arm; determining the voltage input value of each phase bridge arm and the voltage output value of each phase bridge arm; and determining the first duration or the second duration based on the voltage input value of each phase bridge arm, the voltage output value of each phase bridge arm and the count difference.

[0061] Specifically, refer to formula 1-3 to obtain the count difference, where ΔT c is the technical difference, CTR1 is the ePWM count value of the master phase, and CTR2 is the ePWM count value of the slave phase. The phase difference compensation value of the slave phase bridge arm in the next switching cycle is determined based on the technical difference. If the technical difference is positive, the on-time of the slave phase bridge arm should be increased. If the technical difference is negative, the on-time of the master phase bridge arm should be increased. Refer to Formula 1-4 to determine the on-time compensation of the slave phase bridge arm, where ΔT on To compensate for the opening time, V out is the voltage output value from the phase bridge arm, V in is the voltage input value of the slave phase bridge arm, and the first duration or the second duration is determined according to the turn-on duration compensation. If the turn-on duration compensation is positive, the first duration is determined to be the sum of the conduction duration of the slave phase bridge arm in the current cycle and the absolute value of the turn-on duration compensation; or if the turn-on duration compensation is negative, the second duration is determined to be the sum of the conduction duration of the slave phase bridge arm in the current cycle and the absolute value of the turn-on duration compensation.

[0062] Formula 1-3 Formula 1-4 In some embodiments, as Figure 10 As shown, the PFC circuit control method further includes steps S4 to S5, and the specific steps are as follows.

[0063] Step S4, determining the bridge arm midpoint voltage value of each phase bridge arm.

[0064] Step S5: determining the on-state of the freewheeling diode in each phase bridge arm according to the midpoint voltage value of the bridge arm.

[0065] Specifically, refer to Figure 11 As shown, Figure 11 This is a schematic diagram of the control framework of an embodiment of the present invention. In the critical current mode, the control schemes for the interleaved parallel totem-pole PFC circuit include current control and voltage control. Current control controls the peak value of the inductor current, controlling the inductor current peak to vary sinusoidally with the AC voltage. However, this requires the addition of an inductor current sampling circuit and a comparison circuit. The voltage mode, on the other hand, requires fixing the on-time of each phase bridge arm to achieve the same control effect as current control. Therefore, the midpoint voltage value of each phase bridge arm is determined to control the interleaved parallel totem-pole PFC circuit using the voltage mode.

[0066] In some embodiments, the on-state of the freewheeling tube in each phase bridge arm is determined according to the midpoint voltage value of the bridge arm, including controlling the on-state of the positive half-cycle freewheeling tube in each phase bridge arm to be on and the on-state of the negative half-cycle freewheeling tube to be off under the condition that the positive half-cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm and the midpoint voltage value of the bridge arm is greater than a first voltage threshold; controlling the on-state of the positive half-cycle freewheeling tube in each phase bridge arm to be off and the on-state of the negative half-cycle freewheeling tube to be on under the condition that the negative half-cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm and the midpoint voltage value of the bridge arm is less than a second voltage threshold.

[0067] Specifically, in the positive half cycle of the AC voltage of the power supply, the bridge arm midpoint voltage V0 is greater than the first voltage threshold x*V out , then the positive half-cycle freewheeling tube in each phase bridge arm is controlled to be turned on, and the negative half-cycle freewheeling tube is controlled to be turned off, and the freewheeling tube is controlled to be turned off, so that the current is continued through the positive half-cycle freewheeling tube; or in the negative half-cycle of the power supply AC voltage, the bridge arm midpoint voltage V0 is greater than the second voltage threshold (1-x)*V out , then the negative half-cycle freewheeling tube in each phase bridge arm is controlled to be turned on, and the positive half-cycle freewheeling tube is controlled to be turned off, and the negative half-cycle freewheeling tube is used for freewheeling. outIt is related, x is any value within 0-1. As x increases, the voltage difference on both sides decreases when the freewheeling tube is turned on, and tends to the zero voltage working state, but the conduction time of the body diode will also increase accordingly, resulting in an increase in the conduction loss of the body diode, making the heating problem of the body diode more serious. When x decreases, the voltage difference increases, and it is turned on away from zero voltage. The loss of the freewheeling tube increases, the conduction time of the body diode is shortened, and the loss is reduced accordingly. Therefore, for different power levels, the value of x can be finely adjusted to determine the appropriate first voltage threshold and second voltage threshold to balance the turn-on loss of the freewheeling tube and the conduction loss of the body diode while ensuring optimal working efficiency.

[0068] Specifically, refer to Figure 1 and Figure 4 As shown, the auxiliary winding ZCD1 and the auxiliary winding ZCD2 are two zero-crossing detection circuits 100. The auxiliary winding ZCD1 and the auxiliary winding ZCD2 detect the current values of the high-frequency switch tube Q1 and the high-frequency switch tube Q2 respectively. The ePWM action is as follows: Figure 12 As shown in (a)-(b), Figure 12 (a)-(b) are schematic diagrams of the ePWM operation according to an embodiment of the present invention, where ePWM1A controls the high-frequency switch Q1 and ePWM2A controls the high-frequency switch Q2 as an example. In the positive half cycle of the AC voltage of the power supply, the value of the comparison register CMPA of ePWM1A is X, the value of CMOB is Y, the value of the comparison register CMPA of ePWM2A is Y, and the value of CMPB is Z; in the negative half cycle of the AC voltage of the power supply, the value of the comparison register CMPA of ePWM1A is Y, the value of CMPB is Z, the value of the comparison register CMPA of ePWM2A is X, and the value of CMPB is Y. The dead time T is designed. dead To prevent the high-frequency switch tubes Q1 and Q2 from being turned on at the same time, a delay time T is designed. delay In order to achieve a soft switching effect and reduce switching losses, the zero-crossing detection signal is sent to the respective counters through the sub-modules of the ePWM1A module and the ePWM2A module to realize the synchronous counting of the ePWM1A module and the ePWM2A module. When the positive half cycle of the power supply AC voltage is determined, after the DSP receives the zero-crossing detection signal, the counters of the ePWM1A module and the ePWM2A module are synchronously cleared and incremented, and the high-frequency switch tube Q1 is immediately turned off, and the high-frequency switch tube Q2 is turned on after the delay time. After the conduction time T on After the shutdown, and after the dead time, the high-frequency switch tube Q1 is turned on as a freewheeling tube, and the high-frequency switch tube Q2 is turned on when the shutdown time T offAfter the shutdown, when the zero-crossing detection signal is the current crossing zero, the counter is cleared again synchronously and a new cycle is started. In this way, the MOS tube is used instead of the body diode for freewheeling. Compared with using the body diode for freewheeling, the conduction loss of the freewheeling tube is reduced, the heat dissipation burden of the MOSFET is reduced, and the power limit of the totem pole PFC is reduced.

[0069] Where T off The time it takes for the inductor current to drop from peak value to zero, T off It can be determined according to formula 1-5, T on is the first on-time or the second on-time.

[0070] Formula 1-5 It should be noted that due to sampling errors, signal delays, etc., T off The value of is difficult to calculate accurately, so T off A certain margin is left to ensure that the freewheeling tube is turned off before the current of the freewheeling tube reaches zero.

[0071] In some embodiments, as Figure 4 As shown, the PFC circuit 200 is an interleaved parallel totem pole PFC circuit, and the PFC circuit includes a first power frequency transistor S1 and a second power frequency transistor S2.

[0072] The first end of the first power-frequency diode S1 is connected to the upper end of each phase bridge arm, the second end of the first power-frequency diode S1 is connected to the first end of the second power-frequency diode S2, and the second end of the second power-frequency diode S2 is connected to the lower end of each phase bridge arm. The PFC circuit control method further includes determining a bridge arm midpoint voltage value of each phase bridge arm; and determining the on-state of the first power-frequency diode and the on-state of the second power-frequency diode based on the bridge arm midpoint voltage value.

[0073] Specifically, after determining the midpoint voltage value of each phase bridge arm, when the midpoint voltage value of each phase bridge arm is the positive half cycle and the negative half cycle of the power supply AC voltage, the conduction state of the first power frequency tube S1 and the second power frequency tube S2 is controlled to achieve stable operation of the circuit.

[0074] In some embodiments, the on-state of each power frequency tube is determined according to the midpoint voltage value of the bridge arm, including controlling the on-state of the first power frequency tube to be cut off and the on-state of the second power frequency tube to be on under the condition that the positive half cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm; and controlling the on-state of the first power frequency tube to be on and the on-state of the second power frequency tube to be cut off under the condition that the negative half cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm.

[0075] Specifically, refer to Figure 5As shown in (a)-(d), under the condition that the positive half cycle of the power supply AC voltage is determined according to the bridge arm midpoint voltage value, the first power frequency tube S1 is controlled to be turned off and the second power frequency tube is controlled to be turned on; Figure 6 As shown in (a)-(d), under the condition that the negative half cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm, the first power frequency tube S1 is controlled to be on and the second power frequency tube S2 is controlled to be off.

[0076] Reference below Figure 13 The PFC circuit control method according to an embodiment of the present invention is described, and the specific steps are as follows.

[0077] Step S6, start.

[0078] Step S7: voltage sampling.

[0079] Step S8, whether the AC voltage is in a positive half cycle, if so, go to step S19; if not, go to step S11.

[0080] Step S9: Is V0>x*V out If yes, go to step S10; if no, go to step S8.

[0081] Step S10, turning on the positive half-cycle MOS tube for freewheeling.

[0082] Step S11, whether V0 < (1-x) * Vout, if so, go to step S12; if not, go to step S8.

[0083] Step S12, turning on the negative half-cycle MOS tube for freewheeling.

[0084] Step S13: Detect the zero-crossing signal of the main phase current.

[0085] Step S14: Record the master and slave phase ePWM counter values.

[0086] Step S15, calculating the phase difference between the master phase and the slave phase.

[0087] Step S16: Is If yes, go to step S20; if no, go to step S17.

[0088] Step S17: If so, go to step S18; if not, go to step S19.

[0089] Step S18: The switching-on duration of the slave phase bridge arm in the next switching-on cycle is the first duration.

[0090] Step S19: The main phase bridge arm is turned on for a second time period in the next turn-on cycle.

[0091] Step S20, calculating the duty cycle ePWM module assignment.

[0092] Step S21, end.

[0093] The fourth embodiment of the present invention provides a vehicle charger 1000, such as Figure 14 As shown, the on-board charger 1000 includes a power device 300 and a controller 400 .

[0094] The controller 400 is connected to the power device 300 and is used to execute the PFC circuit control method of the above embodiment.

[0095] According to the on-board charger 1000 of the embodiment of the present invention, the controller 400 controls the power device 300 to execute the PFC circuit control method, thereby achieving a good output effect of the PFC circuit 200, reducing voltage and current ripple, improving the power factor, and lowering conduction losses, while also improving the stability and performance of the PFC circuit 200.

[0096] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "example," "specific example," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0097] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the claims and their equivalents.

Claims

1. A zero-crossing detection circuit, characterized in that: include: a detection unit, wherein an input end of the detection unit is connected to a phase bridge arm of the PFC circuit, and is used to detect a current value of the phase bridge arm and output a voltage detection value according to the current value; A comparison unit, wherein a first input terminal of the comparison unit is connected to the output terminal of the current detection unit, a second input terminal of the comparison unit is connected to a reference power supply, and the comparison unit outputs a zero-crossing detection signal according to the voltage detection value and a reference voltage value provided by the reference power supply.

2. The zero-crossing detection circuit according to claim 1, characterized in that The detection unit comprises: A transformer, the transformer comprising a primary side and a secondary side, the primary side being connected in series to the bridge arm, and a first end of the secondary side being grounded; a diode, wherein an anode of the diode is connected to the second end of the secondary side; a first resistor, wherein a first end of the first resistor is connected to the cathode of the diode, and a second end of the first resistor is connected to the first input end of the comparison unit; A second resistor, wherein a first end of the second resistor is connected to the first resistor and the first input end, and a second end of the second resistor is grounded.

3. The zero-crossing detection circuit according to claim 2, characterized in that: The comparison unit includes: A comparator, wherein a first input end of the comparator is connected to the second end of the first resistor and the first end of the second resistor, a second input end of the comparator is connected to a reference power supply, and an output end of the comparator is used to output the zero-crossing detection signal.

4. An electric power device, characterized in that: include: PFC circuit; The zero-crossing detection circuit according to any one of claims 1 to 3, wherein the zero-crossing detection circuit is connected to a phase bridge arm of the PFC circuit.

5. The power device according to claim 4, characterized in that The PFC circuit includes N-phase bridge arms, each phase bridge arm includes two power tubes connected in series, and the connection point of the two power tubes is the midpoint of the bridge arm; The number of the zero-crossing detection circuits is 2N, each zero-crossing detection circuit is provided in one-to-one correspondence with each power tube, and the input end of the zero-crossing detection circuit is connected between the corresponding power tube and the midpoint of the bridge arm.

6. The power device according to claim 4 or 5, characterized in that: The PFC circuit is an interleaved parallel totem pole PFC circuit.

7. A PFC circuit control method, characterized in that: For the power device according to any one of claims 4 to 6, the method comprises: When the zero-crossing detection signal is determined to be current zero-crossing, the ePWM count value of each phase bridge arm is recorded; Determine the phase difference between the two-phase bridge arms according to the ePWM count value of each phase bridge arm; The opening time of each phase bridge arm is controlled according to the phase difference between the two phase bridge arms.

8. The PFC circuit control method according to claim 7, wherein: The PFC circuit includes a master phase and a slave phase, and controls the on-time of each phase bridge arm according to the phase difference between the two phase bridge arms, including: Determining that the phase of the slave phase leads the phase of the master phase according to the phase difference between the two-phase bridge arms, controlling the opening duration of the slave phase bridge arm in the next opening cycle to be a first duration, wherein the first duration is greater than the opening duration of the slave phase bridge arm in the previous opening cycle; According to the phase difference between the two-phase bridge arms, it is determined that the phase of the slave phase lags behind the phase of the main phase, and the opening time of the main phase bridge arm in the next opening cycle is controlled to be a second time, and the second time is greater than the opening time of the main phase bridge arm in the previous opening cycle.

9. The PFC circuit control method according to claim 8, wherein: The method further comprises: Obtaining a count difference value according to the ePWM count value corresponding to the master phase bridge arm and the ePWM count value corresponding to the slave phase bridge arm; Determine the voltage input value of each phase bridge arm and the voltage output value of each phase bridge arm; The first duration or the second duration is determined according to the voltage input value of each phase bridge arm, the voltage output value of each phase bridge arm and the count difference.

10. The PFC circuit control method according to claim 7, wherein: The method further comprises: Determine the bridge arm midpoint voltage value of each phase bridge arm; The on-state of the freewheeling diode in each phase bridge arm is determined according to the bridge arm midpoint voltage value.

11. The PFC circuit control method according to claim 8, wherein: Determining the on-state of the freewheeling diode in each phase bridge arm according to the bridge arm midpoint voltage value includes: Under the condition that the positive half cycle of the power supply AC voltage is determined according to the bridge arm midpoint voltage value and the bridge arm midpoint voltage value is greater than the first voltage threshold, controlling the opening state of the positive half cycle freewheeling tube in each phase bridge arm to be on and the opening state of the negative half cycle freewheeling tube to be off; Under the condition that the negative half cycle of the power supply AC voltage is determined according to the midpoint voltage value of the bridge arm and the midpoint voltage value of the bridge arm is less than the second voltage threshold, the opening state of the positive half cycle freewheeling tube in each phase bridge arm is controlled to be cut off and the opening state of the negative half cycle freewheeling tube is controlled to be on.

12. The PFC circuit control method according to claim 7, wherein: The PFC circuit is a staggered parallel totem pole PFC circuit, comprising a first power frequency transistor and a second power frequency transistor, wherein a first end of the first power frequency transistor is connected to an upper end of a bridge arm of each phase, a second end of the first power frequency transistor is connected to a first end of the second power frequency transistor, and a second end of the second power frequency transistor is connected to a lower end of a bridge arm of each phase. The method further comprises: Determine the midpoint voltage value of each phase bridge arm; The on-state of the first power frequency tube and the on-state of the second power frequency tube are determined according to the midpoint voltage value of the bridge arm.

13. The PFC circuit control method according to claim 12, wherein: Determining the on-state of each power frequency tube according to the bridge arm midpoint voltage value includes: Under the condition that the positive half cycle of the AC voltage of the power supply is determined according to the midpoint voltage value of the bridge arm, the on-state of the first power frequency transistor is controlled to be cut off and the on-state of the second power frequency transistor is controlled to be on; Under the condition that the negative half cycle of the power supply AC voltage is determined according to the bridge arm midpoint voltage value, the on-state of the first power frequency tube is controlled to be on and the on-state of the second power frequency tube is controlled to be off.

14. A vehicle-mounted charger, characterized in that: include: The power device according to any one of claims 4 to 6; A controller, connected to the power device, and configured to execute the PFC circuit control method according to any one of claims 7 to 13.

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