Storage and calculation integrated optical chip based on photonic crystal microcavity and preparation method thereof

Abstract

The invention discloses a storage and calculation integrated optical chip based on a photonic crystal microcavity and a preparation method of the storage and calculation integrated optical chip, and belongs to the field of optical quantum chips. The optical chip comprises a substrate, a first contact layer, an n-type GaAs contact layer, a second contact layer and a p-type GaAs contact layer which are arranged from bottom to top; the n-type electrode is prepared on the step surface, and the step surface is formed by etching the p-type GaAs contact layer and the second contact layer and etching part of the n-type GaAs contact layer; the plurality of p-type electrodes are prepared on the surface of the p-type GaAs contact layer; a two-dimensional photonic crystal structure is formed through etching and comprises a photonic crystal waveguide, a plurality of photonic crystal microcavities, two optical gratings formed through etching at the two ends of the photonic crystal waveguide, and air grooves prepared below the two-dimensional photonic crystal structure and the optical gratings. The optical chip provided by the invention can realize the optical calculation of the matrix vector product and the storage of the optical signal.

Description

Technical Field

[0001] The present invention belongs to the field of optical quantum chips, and specifically relates to a storage and computing integrated optical chip based on a photonic crystal microcavity and a preparation method thereof. Background Art

[0002] With the demise of Moore's Law, the development of traditional electronic chips has been limited to a certain extent. However, the ever-expanding computing demands of today require us to find new computing methods with higher speeds and lower loss. This has given rise to the use of photons as information media, creating quantum optical chips that can replace traditional electronic chips. Quantum optical chips use photons as a carrier for information transmission and processing, offering advantages such as high speed, low latency, low power consumption, high parallelism, and multi-dimensional multiplexing. They are key to meeting the computing power demands of next-generation information technologies such as cloud computing and artificial intelligence.

[0003] However, due to the lack of effective optical logic, storage, and interconnect units, current optical computing solutions are unable to support on-chip training and on-chip information storage capabilities of optical computing chips. In particular, existing optical memory solutions for optical computing face numerous challenges, including high power consumption, low storage density, and slow state switching speeds. Summary of the Invention

[0004] In order to solve the problems in the prior art, the present invention provides a storage and computing integrated optical chip based on a photonic crystal microcavity and a preparation method thereof.

[0005] The technical solutions of the present invention are as follows:

[0006] In a first aspect, the present invention discloses a method for preparing a storage and computing integrated optical chip based on a photonic crystal microcavity, comprising the following steps: preparing a III-V semiconductor structure with semiconductor quantum dots, which comprises, from bottom to top, a substrate, a first contact layer, an n-type GaAs contact layer, a second contact layer, and a p-type GaAs contact layer; a quantum dot layer is provided in the second contact layer; etching the p-type GaAs contact layer, the second contact layer, and part of the n-type GaAs contact layer to form a step surface, and preparing an n-type electrode on the step surface; uniformly preparing a plurality of p-type electrodes on the surface of the p-type GaAs contact layer and along the width direction; etching to form a two-dimensional photonic crystal structure, the two-dimensional photonic crystal structure comprising a photonic crystal waveguide and a plurality of photonic crystal microcavities equal to the number of p-type electrodes, wherein one p-type electrode controls the transmittance of one photonic crystal microcavity; etching the p-type GaAs contact layer to insulate the photonic crystal microcavities from each other and the p-type electrodes from each other; etching to form two gratings at both ends of the photonic crystal waveguide; etching the two-dimensional photonic crystal structure and the first contact layer below the grating to form an air groove.

[0007] In a second aspect, the present invention provides a storage and computing integrated optical chip based on a photonic crystal microcavity prepared using the method.

[0008] Furthermore, the n-type electrode, p-type electrode, grating and two-dimensional photonic crystal structure constitute an optical chip unit, and the III-V semiconductor structure has multiple optical chip units arranged in the same direction and parallel to each other, and the arrangement direction of the multiple optical chip units is consistent with the length direction of the III-V semiconductor structure.

[0009] In a third aspect, the present invention discloses an optical convolution operation method using the storage and computing integrated optical chip, comprising the following steps: first, an external light intensity beam splitter divides the light beam to be input into the optical chip into M paths according to the intensity and inputs them into M optical chip units respectively; wherein, the light beam to be input into the optical chip contains N wavelengths of light, and the number of p-type electrodes in the optical chip unit is also N; then, an external voltage source is connected to the n-type electrode and the p-type electrode located in an optical chip unit to form an electrical circuit, wherein each p-type electrode forms an electrical circuit with the n-type electrode respectively; one path of light is input into a grating of an optical chip unit, and the light is coupled into a photonic crystal waveguide after diffraction by the grating, and light of a specific wavelength resonates and is absorbed and stored at the corresponding photonic crystal microcavity, and the remaining light is transmitted to another grating, and is received by an external avalanche photodiode detector after diffraction, and finally the product result of the M×N matrix and the N×1 vector is obtained; wherein, the resonance wavelength of the corresponding photonic crystal microcavity is changed by adjusting the voltage of each electrical circuit, so that the transmittance of each wavelength can be controlled.

[0010] Compared with the prior art, the present invention has the following beneficial effects:

[0011] The present invention adopts electron beam lithography, metal stripping, dry etching, wet etching, electroevaporation and other methods to perform micro-nano processing, and forms micro-nano structures such as air grooves, two-dimensional photonic crystal structures, gratings, and metal electrodes on the sample. The two-dimensional photonic crystal structure contains a photonic crystal waveguide and multiple photonic crystal microcavities. The air groove is arranged below the two-dimensional photonic crystal structure and the grating, which meets the total reflection condition of the photonic crystal waveguide and overcomes the problem of no cladding in the sample when the photonic crystal waveguide and the grating are coupled. At the same time, when light is coupled from the photonic crystal waveguide to the grating and diffracts, the air groove can also reflect the diffracted light to prevent the light from entering the i-type GaAs substrate. Therefore, after the air groove is provided, the diffracted light moving downward will hit the air boundary of the air groove and be reflected, which also improves the light collection rate to a certain extent. Similar to conventional waveguides, photonic crystal waveguides can be used to transmit light within a specific wavelength range. The photonic crystal waveguides of the present invention transmit light with wavelengths between 780 and 1000 nm. The two-dimensional photonic crystal structure comprises 16 to 20 rows of photonic crystal holes, with 20 to 40 holes per row arranged periodically. Three rows of holes are missing from the center of the two-dimensional photonic crystal structure, forming a line defect and thus a photonic crystal waveguide. A photonic crystal microcavity is similarly formed to a photonic crystal waveguide. Within the two-dimensional photonic crystal structure, three to five holes are removed, creating point defects. These point defects are photonic crystal microcavities. A photonic crystal microcavity can resonate with light of a certain wavelength, thereby largely confining that wavelength within it. By varying its size, it can resonate with light of different wavelengths. By applying a voltage to the p-type and n-type electrodes, the wavelength of the quantum dots and the refractive index of the photonic crystal microcavity can be adjusted to produce light of different wavelengths. Through the effective use of all structures, the present invention can ultimately realize a low-loss, high-density, addressable multi-bit storage optical chip. Among them, the response speed of the storage and computing integrated optical chip of the present invention can be reduced to below 100ps, the power consumption of a single switching storage state is no more than 1fJ, the power consumption of maintaining a certain storage state is 1uW, and the area required for storage is less than 44um. 2 , the number of units is 5×5. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a main view of the stack structure of an epitaxially grown III-V semiconductor structure with semiconductor quantum dots;

[0013] Figure 2 It is a cross-sectional view of a III-V semiconductor structure after processing a step surface for preparing an n-type electrode;

[0014] Figure 3 It is a cross-sectional view of the III-V semiconductor structure after processing the n-type electrode;

[0015] Figure 4 It is a cross-sectional view of the III-V semiconductor structure after processing the p-type electrode;

[0016] Figure 5 It is a cross-sectional view of the III-V semiconductor structure after processing the two-dimensional photonic crystal structure;

[0017] Figure 6 It is a cross-sectional view of a III-V semiconductor structure after the electrical insulation structure is prepared;

[0018] Figure 7 It is a cross-sectional view of the III-V semiconductor structure after the air groove is processed;

[0019] Figure 8 This is a top view of an optical chip unit in a III-V semiconductor structure;

[0020] Figure 9 This is a top view of the optical chip structure formed by five optical chip units after the optical chip is processed;

[0021] Figure 10 This is a flow chart of the present invention for preparing a storage and computing integrated optical chip.

[0022] In the figure, 1. p-type GaAs contact layer; 2. i-type GaAs contact layer; 3. i-type Al 0.3 Ga 0.7 As contact layer; 4. InAs quantum dot layer; 5. i-type GaAs contact layer; 6. n-type GaAs contact layer; 7. n-type Al 0.6 Ga 0.4 As contact layer; 8.i-type Al 0.6 Ga 0.4 As contact layer; 9. i-type GaAs substrate; 10. Quantum dot structure; 11. Dry etching platform; 12. n-type electrode; 13. p-type electrode; 14. Two-dimensional photonic crystal structure; 15. Electrically insulating structure; 16. Air slot; 17. Grating; 18. Photonic crystal waveguide; 19. Photonic crystal microcavity. DETAILED DESCRIPTION

[0023] The present invention will be further described and illustrated below in conjunction with specific embodiments. The embodiments are merely illustrative of the present disclosure and do not limit its scope. The technical features of the various embodiments of the present invention may be combined accordingly, provided that there is no conflict between them.

[0024] In order to facilitate understanding of the present invention, some terms are introduced below.

[0025] First of all, a waveguide is a transmission line similar to a pipe. There is a refractive index difference between the inside and outside of the waveguide. Light that meets a specific angle will be totally reflected at the side wall of the waveguide. Therefore, the light will be confined by the waveguide and will not diverge. This specific angle is also the numerical aperture of the waveguide.

[0026] Quantum dots are an ideal two-level system, generally grown by epitaxial growth or filling methods. Since quantum dots are very small, with a width of about tens of nanometers, they will be affected by the quantum confinement effect, thus producing a two-level system. Quantum dots are an ideal single-photon source. When light with the same frequency (wavelength) as the two-level is incident, the electrons in the quantum dots will migrate from the ground state to the excited state, thereby generating a single photon. The present invention also utilizes the Stark effect of quantum dots, and adjusts the luminescence frequency of quantum dots by electrical bias. The luminescence wavelength of the quantum dots used in the present invention is between 780nm and 1000nm.

[0027] A photonic crystal is a micro-nanostructure with a periodic arrangement of refractive index. The present invention uses a two-dimensional photonic crystal structure, and uses a dry etching method to form nano-air columns to achieve a structure with a periodic arrangement of refractive index. Photonic crystals are similar to ordinary crystals. Due to their periodic structure, they will produce photon bands similar to electronic bands, and at the same time, they will also produce photon band gaps. The generation of these band gaps allows photonic crystals to prevent light of certain frequencies (wavelengths) from passing through the photonic crystals.

[0028] A photonic crystal waveguide is a waveguide formed by creating line defects on a two-dimensional photonic crystal. This structure is similar to an ordinary waveguide, but it is more localized for light because the photonic crystal waveguide reduces the group velocity of light and can control the group velocity of light through design. When the group velocity of light is reduced, the interaction between light and the material is greatly enhanced, which also greatly reduces the efficiency loss caused by material loss.

[0029] A photonic crystal microcavity is a structure formed by making point defects on a two-dimensional photonic crystal. If the defect state formed by the defect is in the band gap of the photonic crystal, then light of this frequency (wavelength) will be localized in the microcavity. Due to the reflection of the band gap of the surrounding complete photonic crystal, the light with a frequency falling within the band gap will be reflected back to the defect area and cannot propagate outward. Therefore, the light is effectively confined to the defect area and reflects back and forth in the microcavity, forming optical resonance, thereby achieving effective confinement of the light. This confinement mechanism enables the photonic crystal microcavity to achieve a high quality factor and an extremely small mode volume, thereby significantly enhancing the light intensity in the cavity and the interaction between light and matter. At the same time, the photonic crystal microcavity has a lifetime. The longer the lifetime of the photonic crystal microcavity, the longer the light exists in the microcavity. The lifetime of the microcavity is inversely proportional to the quality factor Q of the microcavity. The quality factor Q of the microcavity is an important parameter of the microcavity. Q is proportional to the resonant frequency and the inverse of the loss rate of the microcavity. The longer the light exists in the photonic crystal microcavity, the better the storage effect. From the above analysis, it can be seen that the storage effect is mainly affected by the quality factor of the microcavity. The photonic crystal microcavity can realize the storage of light of a certain resonant wavelength, and at the same time, it can also reduce the transmittance of light of that wavelength.

[0030] A photonic crystal side-coupled cavity is a structure that couples a photonic crystal waveguide with a photonic crystal microcavity. This means that when light that resonates with the photonic crystal microcavity passes through the photonic crystal waveguide, it enters the photonic crystal microcavity and is localized, reducing the intensity of light of that frequency passing through the photonic crystal waveguide. In this invention, five photonic crystal microcavities are located beneath one photonic crystal waveguide.

[0031] A grating is a periodic optical micro-nanostructure. Due to the periodic change of the refractive index, this optical structure can change the propagation angle of the light beam reaching the grating. Combining the grating with a waveguide can emit the light in the waveguide perpendicular to the sample surface.

[0032] Electron beam lithography is a technique that uses high-energy focused electrons to create a pattern. The electrons act directly on an electron-sensitive photoresist, ultimately forming the desired pattern. Due to its short wavelength, electron beam lithography has very high resolution, achieving line widths of a few nanometers. Applying electron beam lithography allows quantum dots to be coupled to a photonic crystal side-coupling cavity, and the single photons emitted by the quantum dots can be collected by a grating.

[0033] Laser direct writing is a method of using a focused, certain intensity laser to change the properties of the medium (such as refractive index or corrosion resistance) at certain locations in certain media. The light intensity at the focus is I, and the threshold light intensity that the medium can withstand is I. th , when I>I thWhen the laser is applied to the UV photoresist, certain properties of the medium (such as refractive index or corrosion resistance) are changed. This laser acts on the UV photoresist to form the desired pattern.

[0034] Electroevaporation is a method for applying a metal film to a material's surface. In this method, photoresist is first spin-coated onto the material, and the desired metal deposition area is exposed. The desired metal is then converted to a vapor state through electrical heating, deposited on the material's surface (i.e., electroevaporation). The metal is then stripped from the material. The metal-coated material is placed in NMP (N-methylpyrrolidone, a solution for removing photoresist) and subjected to ultrasonic vibration. The presence of the photoresist removes the metal from the unexposed photoresist areas, resulting in the desired metal structure.

[0035] Thermal annealing is a process of subjecting metal to high temperatures and then cooling them in a specific gas atmosphere. Thermal annealing can alter certain physical properties of metals, thereby achieving various objectives. In the present invention, thermal annealing is used to transform the Schottky contact between the n-type electrode and the n-type GaAs contact layer into an ohmic contact, thereby achieving a lower resistance between the n-type electrode and the n-type GaAs contact layer and better current-voltage regulation.

[0036] Dry etching is a commonly used isotropic etching method. It is a process of removing solid thin films by chemically reacting with neutral substances in the ground state or excited state. At low pressure, a corresponding plasma is generated in the gas. At the same time, a magnetic induction coupling coil is added to the equipment to enhance the downward directionality of the plasma. These plasma gas flows react with the sample surface and produce volatile substances. The volatile substances are subsequently carried away in the vacuum environment, and the etching is finally completed.

[0037] Wet etching is an anisotropic etching method that mainly uses specific acidic or alkaline solutions to perform corrosion.

[0038] The present invention will be described in further detail below with reference to the accompanying drawings:

[0039] The present invention uses various micro-nano processing methods to manufacture n-type electrodes 12 and p-type electrodes 13 on a III-V semiconductor structure with quantum dots, and then etches the p-type GaAs contact layer 1, the i-type GaAs contact layer 2, and the i-type Al 0.3 Ga 0.7As contact layer 3, InAs quantum dot layer 4, i-type GaAs contact layer 5 and n-type GaAs contact layer 6 are used to make a two-dimensional photonic crystal structure. The two-dimensional photonic crystal structure includes a photonic crystal waveguide 18 and multiple photonic crystal microcavities 19. Then, the p-type GaAs contact layer 1 and the i-type GaAs contact layer 2 are etched to prepare an electrical insulation structure 15, and then a grating 17 and an air slot 16 are prepared. After the fabrication is completed, the device morphology is analyzed for process errors and finally used. Figure 1-8 and Figure 10 As shown, the specific implementation steps for preparing a storage and computing integrated optical chip based on a photonic crystal microcavity are as follows:

[0040] Step 1: Use epitaxial method to grow III-V semiconductor structure with quantum dots, such as Figure 1 As shown, the III-V semiconductor structure includes, from bottom to top, an i-type GaAs substrate 9, an i-type Al 0.6 Ga 0.4 As contact layer 8, n-type Al 0.6 Ga 0.4 As contact layer 7, n-type GaAs contact layer 6, i-type GaAs contact layer 5, InAs quantum dot layer 4, i-type Al 0.3 Ga 0.7 As contact layer 3, i-type GaAs contact layer 2 and p-type GaAs contact layer 1; wherein, i-type Al 0.6 Ga 0.4 As contact layer 8 and n-type Al 0.6 Ga 0.4 As contact layer 7 constitutes the first contact layer, i-type GaAs contact layer 5, InAs quantum dot layer 4, i-type Al 0.3 Ga 0.7 The As contact layer 3 and the i-type GaAs contact layer 2 constitute the second contact layer; the InAs quantum dot layer 4 is used to generate single photons, which is formed by lattice mismatch between the InAs and GaAs layers and can generate single photons under the excitation of lasers of corresponding wavelengths, such as Figure 1 As shown in the main view, the thickness of the p-type GaAs contact layer 1 is 30 to 50 nm, the thickness of the i-type GaAs contact layer 2 is 3 to 10 nm, and the thickness of the i-type Al 0.3 Ga 0.7 The thickness of the As contact layer 3 is 50-60 nm, the thickness of the InAs quantum dot layer 4 is 10-20 nm, the thickness of the i-type GaAs contact layer 5 is 40-50 nm, the thickness of the n-type GaAs contact layer 6 is 30-50 nm, and the thickness of the n-type Al 0.6 Ga 0.4 The thickness of the As contact layer 7 is 200-250 nm, and the i-type Al 0.6 Ga 0.4The thickness of the As contact layer 8 is 700 to 900 nm, and the n-type Al 0.6 Ga 0.4 As contact layer 7 and i-type Al 0.6 Ga 0.4 The As contact layer 8 is a sacrificial layer. The thickness of the i-type GaAs substrate 9 is 300-500 μm, and it is a substrate structure of a III-V group semiconductor material, and has no function in micro-nano structures.

[0041] Step 2: Use laser direct writing technology and dry etching technology to produce a step surface, which is used to expose the n-type GaAs contact layer 6; use electroevaporation technology, metal stripping technology and thermal annealing technology to produce an n-type electrode 12; use electroevaporation technology and metal stripping technology to produce a p-type electrode 13; then use electron beam lithography technology and dry etching technology to produce a two-dimensional photonic crystal structure 14, which contains a photonic crystal waveguide 18 and multiple photonic crystal microcavities 19; then use laser direct writing technology and dry etching technology to produce an electrical insulation structure 15, which is used to isolate each p-type electrode 13 from each other and isolate each photonic crystal microcavity 19 to ensure that they can control different photonic crystal microcavities 19; use electron beam lithography technology and dry etching technology to produce a grating 17; finally, use wet etching technology to produce an air groove 16.

[0042] like Figure 2 、 Figure 3 、 Figure 4 、 Figure 5 、 Figure 6 、 Figure 7 、 Figure 8 and Figure 10 As shown, the specific preparation method is as follows:

[0043] An n-type electrode 12 , a p-type electrode 13 , a two-dimensional photonic crystal structure 14 , an electrical insulation structure 15 , a grating 17 and an air slot 16 are prepared.

[0044] 2.1) Spin-coat AZ5214 (negative resist) on the upper surface of the p-type GaAs contact layer 1; then use laser direct writing to photoetch the desired pattern onto the spin-coated photoresist, the desired pattern is the shape of a step surface required to be formed on the n-type GaAs contact layer, and etch the p-type GaAs contact layer 1 and the second contact layer and partially etch the n-type GaAs contact layer 6 by dry etching to form a step surface on the n-type GaAs contact layer 6, that is, forming a step surface as shown in FIG. Figure 2 The structure of the dry etching platform 11 is shown;

[0045] 2.2) If Figure 3As shown, AR-P 5350 (negative photoresist) is spin-coated on the step surface of the n-type GaAs contact layer 6; the desired pattern is photoetched onto the spin-coated photoresist using laser direct writing, and the desired pattern is the shape of the n-type electrode, and then exposure and development are performed; nickel, germanium, gold, nickel and gold are sequentially deposited on the step surface of the n-type GaAs contact layer 6 using the electroevaporation method to form five metal layers, and then the five formed metal layers are subjected to metal stripping, that is, the photoresist that has not been exposed is removed using a solution for removing the photoresist, thereby removing the metal layer deposited on the surface of the photoresist, and finally thermal annealing is performed to obtain the n-type electrode 12; thus, the n-type electrode is composed of five metal layers of three metals Ni, Ge, and Au, which are, from top to bottom, a 10nm Ni metal layer, a 60nm Ge metal layer, a 120nm Au metal layer, a 10nm Ni metal layer and a 100nm Au metal layer, wherein Au is the main conductive component of the n-type electrode 12, and Ge metal can enter the n-type GaAs layer 6 during thermal annealing, thereby replacing Ga inside to form an ohmic contact. After the ohmic contact is formed, the quantum dots can be better electrically controlled; Ni metal plays a lubricating role in this process.

[0046] 2.3) If Figure 4 As shown, AR-P 5350 (negative photoresist) is spin-coated on the upper surface of the p-type GaAs contact layer 1; then, a desired pattern is photoetched onto the spin-coated photoresist using laser direct writing, and the desired pattern is the shape of the p-type electrode 13, which is then exposed and developed; then, chromium and gold are sequentially deposited on the surface of the p-type GaAs contact layer 1 using an electroevaporation method to form two metal layers, and then the two formed metal layers are subjected to metal stripping, that is, the photoresist that has not been exposed is removed using a solution for removing the photoresist, thereby removing the metal layer deposited on the surface of the photoresist to obtain an n-type electrode; thus, the p-type electrode 13 is composed of two metals, Cr and Au, wherein the Au metal layer is 100 nm and the Cr metal layer is 15 nm, the Au metal layer is on the upper layer of the Cr metal layer, Au is the main conductive component of the p-type electrode 13, and Cr serves to enhance the contact.

[0047] 2.4) If Figure 5 、 Figure 6 and Figure 8As shown, AR-P 6200.13 electron beam photoresist (positive photoresist) is spin-coated on the surface of the p-type GaAs contact layer 1; the desired pattern is transferred to the spin-coated photoresist by electron beam lithography, and the desired pattern is a two-dimensional photonic crystal structure 14 and a grating 17 designed according to physical principles such as cavity quantum electrodynamics and waveguide optics. The two-dimensional photonic crystal structure 14 includes a photonic crystal waveguide 18 and a plurality of photonic crystal microcavities 19; then the exposed pattern on the photoresist is removed by a developer, which is a special developer for the AR-P6200 series; and the pattern is then removed by dry etching. Transfer to the III-V semiconductor material, specifically the steps are: etching the p-type GaAs contact layer 1, the second contact layer and the n-type GaAs contact layer 6 to form a two-dimensional photonic crystal structure 14, the photonic crystal waveguide 18 is located in the middle position of the two-dimensional photonic crystal structure 14, and the length direction of the photonic crystal waveguide 18 is consistent with the width direction of the p-type GaAs contact layer 1, the number of photonic crystal microcavities 19 is equal to the number of p-type electrodes 13, and one p-type electrode 13 is used to control the refractive index of one photonic crystal microcavity 19; Figure 5 As shown, after the two-dimensional photonic crystal structure 14 is manufactured, AR-P 6200.13 electron beam photoresist (positive photoresist) is spin-coated on the surface of the p-type GaAs contact layer 1, and then the p-type GaAs contact layer 1 is etched using electron beam lithography technology to insulate the p-type electrodes 13 from each other and the photonic crystal microcavities 19 from each other, thereby completing the preparation of the electrical insulation structure 15. The width of the upper and lower ends of this electrical insulation structure 15 is 1 to 2 μm, and the width of the left, right and middle parts is 1 to 3 μm.

[0048] Then, a grating 17 is prepared, and the p-type GaAs contact layer 1, the second contact layer, and the n-type GaAs contact layer 6 at the left and right ends of the photonic crystal waveguide 18 are etched to form two gratings 17. The grating 17 can be any grating in the prior art. In a specific embodiment of the present invention, each grating is composed of two semicircular slits or a plurality of arc-shaped slits, and the convex ends of the semicircular slits and the arc-shaped slits face away from the photonic crystal waveguide 18. When a grating is composed of two semicircular slits, the width of the semicircular slits is 450 to 500 nm, and the distance between the two arc-shaped slits is 141 to 157 nm. When a grating is composed of multiple arc-shaped slits, the number of arc-shaped slits in a grating is 10 to 20, the arc center angle of the arc-shaped slits is 20 to 40 degrees, the width of the arc-shaped slits is 300 nm to 400 nm, and the distance between two adjacent arc-shaped slits is 150 nm to 200 nm.

[0049] Finally, the residual photoresist on the III-V semiconductor material is removed to obtain Figure 7 The structure shown.

[0050] 2.5) If Figure 7As shown, the first contact layer below the two-dimensional photonic crystal structure 14 and the grating 17 is etched by wet etching to form an air groove 16. After the preparation is completed, each photonic crystal microcavity 19 and each p-type electrode 13 correspond to each other through the preparation of the electrical insulation structure 15, and each electrode only controls one photonic crystal microcavity 19.

[0051] The n-type electrode 12, p-type electrode 13, grating 17 and two-dimensional photonic crystal structure 14 prepared in steps 2.1) to 2.5) constitute an optical chip unit. The III-V semiconductor structure has multiple optical chip units arranged in the same direction and parallel to each other. The arrangement direction of the multiple optical chip units is consistent with the length direction of the III-V semiconductor structure. Figure 8 As shown, five optical chip units are arranged on a III-V semiconductor structure, and the interval between each unit is 127um; that is, these five optical chip units constitute a storage and computing integrated optical chip based on the photonic crystal microcavity.

[0052] In the above steps, the n-type electrode 12 needs to be prepared first, because the n-type electrode 12 needs thermal annealing to form an ohmic contact, but the p-type electrode 13 does not need thermal annealing.

[0053] The radius of the photonic crystal holes in the two-dimensional photonic crystal structure 14 prepared by the above method is 70-80 nm, and the distance between the centers of two adjacent photonic crystal holes is 200-240 nm. The two-dimensional photonic crystal structure 14 has 16-20 rows of photonic crystal holes, with 20-40 photonic crystal holes in each row. The length of the photonic crystal waveguide 18 is equal to that of the two-dimensional photonic crystal structure 14, and the width of the photonic crystal waveguide 18 is 340-420 nm. The distance between the photonic crystal waveguide 18 and the photonic crystal microcavity 19 is 2-3 photonic crystal holes. The length of the photonic crystal microcavity 19 is 3-5 photonic crystal holes, and the width of the photonic crystal microcavity 19 is one photonic crystal hole.

[0054] In a specific embodiment of the present invention, the wet etching uses a 1:20 hydrofluoric acid solution, which can selectively etch i-type Al 0.6 Ga 0.4 As contact layer 8 and n-type Al 0.6 Ga 0.4 Al in As contact layer 7 0.6 Ga 0.4 As will not corrode other GaAs contact layers and quantum dot layers. The hydrofluoric acid solution enters the i-type Al from the grating 17 and photonic crystal holes produced after dry etching. 0.6 Ga 0.4 As contact layer 8 and n-type Al 0.6 Ga 0.4The As contact layer 7 is finally etched to form an approximately square air slot 16. The etched air slot 16 is located below the etched two-dimensional photonic crystal structure 14 and the grating 17 to meet the total reflection localization condition of the photonic crystal waveguide 18. At the same time, when a single photon is coupled from the photonic crystal waveguide 18 to the grating 17 and diffracted, the air slot 16 can also reflect the diffracted single photon to prevent the single photon from entering the i-type GaAs substrate 9. Therefore, with the air slot 16, the diffracted and downward-moving single photon will collide with the air boundary of the air slot 16 and be reflected, which also improves the single photon collection rate to a certain extent. If there is no air slot 16 below the grating 17, the diffracted and downward-moving single photon will enter the i-type GaAs substrate 9 and be absorbed by the i-type GaAs substrate 9, then the number of collected single photons will be reduced, and the single photon collection rate will be reduced. At the same time, since the metal used for the electrodes is resistant to a 1:20 hydrofluoric acid solution, the manufactured n-type electrode 12 and p-type electrode 13 will not be corroded.

[0055] During fabrication, smooth sidewalls of the photonic crystal holes and grating 17 are crucial. Therefore, the present invention employs methods such as low-temperature development to achieve this effect. Smooth sidewalls help improve light transmission and grating efficiency. Furthermore, electrode fabrication requires a laser direct writing overlay process, where overlay accuracy is crucial. The laser direct writing instrument used in the present invention can achieve overlay accuracy of several microns.

[0056] So far, completed Figure 7 The structure shown in the figure is made, and the functions of each part are as follows:

[0057] The grating 17 can change the propagation angle of the light beam reaching the grating. Combining the grating with a waveguide can emit light in the waveguide perpendicular to the sample surface. The grating 17 of the present invention includes, but is not limited to, a semicircular grating composed of two semicircular slits, an arcuate grating composed of arcuate slits, a uniform grating, a two-dimensional grating coupler, or a blazed grating, all of which have the same effect. The grating 17 composed of two semicircular slits is a semicircular grating, formed by etching into a semicircular ring grating. This semicircular grating couples light within the plane of the photonic crystal waveguide 18 to a plane perpendicular to the photonic crystal waveguide 18, resulting in relatively high transmission efficiency. One of the most important parameters of the grating 17 is its exit angle. The exit angle of the grating 17 is defined as the angle between the light emitted from the grating 17 and the normal to the plane of the grating 17. The exit angle of a grating generally ranges from 0 to 90°. Due to grating diffraction, light diffracted from the grating has diffraction orders, which are divided into primary and secondary orders. The primary order has the highest light intensity, while the secondary orders are weaker. The primary diffraction order exit angle of the grating 17 composed of two semicircular slits used in the present invention is approximately 4°, meaning the primary diffraction order exit angle is 4-5 degrees. The primary diffraction order exit angle of the grating 17 composed of multiple arc-shaped slits is approximately 8°, meaning the primary diffraction order exit angle is 8-15 degrees. This means the grating is essentially perpendicular to the grating plane. The coupling efficiency of the grating 17 composed of two semicircular slits in the present invention can theoretically reach a maximum of 40% to 55%, and the coupling efficiency of the grating 17 composed of multiple arc-shaped slits can theoretically reach a maximum of 60% to 75%.

[0058] The photonic crystal waveguide 18 and the photonic crystal microcavity 19 are composed of a p-type GaAs contact layer 1, an i-type GaAs contact layer 2, an i-type Al 0.3 Ga 0.7As contact layer 3, InAs quantum dot layer 4, i-type GaAs contact layer 5 and n-type GaAs contact layer 6 structure, the function of the photonic crystal waveguide 18 is to transmit light, in the photonic crystal waveguide 18, the group velocity of light is reduced, when the light passes through the photonic crystal microcavity 19 near the photonic crystal waveguide 18, due to the relatively low group velocity of light, the light can be more strongly coupled with the photonic crystal microcavity 19, and at the same time, there is air and air groove 16 in the direction perpendicular to the plane to wrap the photonic crystal waveguide 18, so that the light can be localized in the photonic crystal waveguide 18, and the width of the photonic crystal waveguide 18 is 340 to 420 nm; the function of the photonic crystal microcavity 19 is to store light of a certain frequency passing through the photonic crystal waveguide 18, and the photonic crystal microcavity 19 can resonate with the light of this frequency, and the resonant light will oscillate in the photonic crystal microcavity 19, thereby reducing the intensity of the light of this frequency in the photonic crystal waveguide 18 , and finally the intensity of the light of this frequency in the light reaching the grating 17 through the photonic crystal waveguide 18 is reduced. The transmittance of the photonic crystal microcavity 19 is related to the size, refractive index and wavelength of the photonic crystal microcavity 19. The quantum dots in the InAs quantum dot layer 4 can be biased by the n-type electrode 12 and the p-type electrode 13. Due to the quantum confined Stark effect, the luminous frequency (wavelength) of the quantum dots in the photonic crystal waveguide 18 can be adjusted. The adjustable range is about 7meV / V, corresponding to a wavelength range of several nanometers. By adjusting the wavelength of the quantum dots, the transmittance of the light in the microcavity can be changed, and the transmittance of the light reaching the grating 17 through the photonic crystal waveguide 18 can also be changed. In this way, the change of the value of a row in the 5×5 matrix in the optical convolution calculation is realized. The present invention is explained with a 5×5 matrix. Similarly, the present invention can be extended to multiply an M×N matrix and an N×1 vector.

[0059] In completing Figure 9After the preparation shown, the present invention conducts electrical and optical performance tests. The electrical performance tests include testing the performance of the quantum dots regulated by the electrodes and measuring the switching time of the electro-optical memory fabricated in the present invention. For the former, the present invention extracts the quantum dot's resonance spectrum under different bias voltages. First, the quantum dot is resonantly driven by a narrow-linewidth continuous-wave (CW) laser. The wavelength of the narrow-linewidth laser is continuously scanned, and the fluorescence spectrum signal entering the spectrometer is measured. The center wavelength of the quantum dot is obtained by fitting the fluorescence spectrum. By continuously varying the bias voltage applied to the quantum dot, the present invention measures the change in the quantum dot's resonance energy as the bias voltage changes. For the latter, the present invention applies a square wave generated by a high-speed waveform generator to the electro-optical memory. Then, a continuous laser beam is passed through and the laser signal is detected using a high-speed avalanche photodiode detector. The output signal of the avalanche photodiode detector is connected to a high-speed oscilloscope. Ideally, the signal detected by the oscilloscope should also be a square wave. The rise and fall times of the square wave signal correspond to the switching time of the electro-optical memory. The above measurement techniques can also be used to measure the storage time of the electro-optical memory of the present invention. In the present invention, square waves with the same duty cycle but different periods are loaded onto an electro-optical memory. A continuous laser is then introduced into the electro-optical memory, and the time-domain response of the output optical signal is detected using an avalanche photodiode detector and an oscilloscope. The duration of the high voltage of the output square wave signal corresponds to the storage time of the electro-optical memory. In calibrating the power consumption of the electro-optical memory, the present invention uses a Keithley source meter to apply different voltages to the electro-optical storage unit while detecting the leakage current, i.e., measuring the IV curve of the electro-optical memory. By calculating P = I × V, the power consumption of the electro-optical memory can be obtained. The response speed of the integrated storage and computing optical chip of the present invention can be reduced to below 100 ps, the power consumption of a single storage state switch is no more than 1 fJ, and the power consumption of maintaining a certain storage state is 1 uW.

[0060] The present invention also provides an optical convolution method for a storage-computing integrated optical chip based on a photonic crystal microcavity. First, the calculation method at the algorithm level. The core calculation method is the optical convolution operation, that is, matrix-vector multiplication. Its mathematical form is to multiply an M×N matrix and an N×1 vector. This calculation method is the core operation in optical computing. In the present invention, M=N=5 is used for illustration, that is, a 5×5 matrix is multiplied by a 5×1 vector. First, a broadband light source is demultiplexed into five paths, that is, it is divided into five paths according to wavelength. Polarization control is implemented on each path and modulated with a variable optical attenuator. The five paths of light are 5×1 vectors. Different vector values can be obtained by modulating the light intensity. The five paths of light are then multiplexed, that is, recombined. The light beam now contains five wavelengths of light. Then, through an optical intensity beam splitter, the five beams of light are evenly divided into five paths according to intensity. These five paths of light are the input light sources of the five optical computing channels. Each channel is composed of an incident and an output grating, a photonic crystal waveguide 18, and five photonic crystal microcavities 19. The five photonic crystal microcavities 19 can resonate with the five wavelengths of light after demultiplexing. These five channels are also a 5×5 matrix. When light enters the channel and passes near a photonic crystal microcavity 19 that resonates with that wavelength, it enters the photonic crystal microcavity 19, reducing the amount of light of that wavelength passing through the photonic crystal waveguide 18 and lowering the transmittance of that wavelength throughout the photonic crystal waveguide 18. Through electrical control, the wavelength of the quantum dots can be adjusted. Due to the dispersion relationship between wavelength and refractive index, the refractive index of the photonic crystal microcavity 19 changes, thereby adjusting the transmittance of light entering and resonating in the photonic crystal microcavity 19, and thus adjusting the transmittance of single photons passing through the photonic crystal waveguide 18. By adjusting each photonic crystal microcavity 19 in each path, different values of the 5×5 matrix can be obtained. The output light is finally measured using an avalanche photodiode detector to obtain the calculated result. The 5×5 matrix-vector multiplication in this invention is not an upper limit. Similar to the principles and preparation methods of this invention, it can be expanded to n×n matrix-vector multiplication in the future.

[0061] The above-described embodiments merely illustrate several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. Persons skilled in the art will readily appreciate that variations and modifications may be made without departing from the scope of the present invention, all of which fall within the scope of protection of the present invention.

Claims

1. A method for preparing a storage and computing integrated optical chip based on a photonic crystal microcavity, characterized in that: The following steps are involved: A III-V semiconductor structure with semiconductor quantum dots is prepared, which comprises, from bottom to top, a substrate, a first contact layer, an n-type GaAs contact layer, a second contact layer, and a p-type GaAs contact layer; a quantum dot layer is provided in the second contact layer; Etching the p-type GaAs contact layer, the second contact layer, and a portion of the n-type GaAs contact layer to form a step surface, and preparing an n-type electrode on the step surface; A plurality of p-type electrodes are uniformly formed on the surface of the p-type GaAs contact layer and along the width direction; Etching to form a two-dimensional photonic crystal structure, the two-dimensional photonic crystal structure comprising a photonic crystal waveguide and a plurality of photonic crystal microcavities equal in number to the number of p-type electrodes, wherein each p-type electrode controls the transmittance of each photonic crystal microcavity; etching a p-type GaAs contact layer to insulate the photonic crystal microcavities from each other and to insulate the p-type electrodes from each other; Two gratings are etched at both ends of the photonic crystal waveguide; An air groove is formed by etching the two-dimensional photonic crystal structure and the first contact layer below the grating.

2. The method for preparing a storage-computing integrated optical chip based on a photonic crystal microcavity according to claim 1, characterized in that: The method for preparing an n-type electrode comprises: Spin-coating a photoresist on the step surface of the n-type GaAs contact layer, then photoetching a pattern corresponding to the shape of the n-type electrode onto the photoresist, followed by exposure and development; sequentially depositing nickel, germanium, gold, nickel, and gold on the step surface of the n-type GaAs contact layer using an electroevaporation method to form five metal layers, then removing the photoresist that has not been exposed using a photoresist removal solution, and then performing thermal annealing to obtain the n-type electrode; The thicknesses of the five metal layers from bottom to top are 10 nm, 60 nm, 120 nm, 10 nm and 100 nm respectively.

3. The method for preparing a storage-computing integrated optical chip based on a photonic crystal microcavity according to claim 1, characterized in that: The method for preparing a p-type electrode comprises: A photoresist is spin-coated on the surface of the p-type GaAs contact layer, and a pattern corresponding to the shape of the p-type electrode is photoetched onto the photoresist, followed by exposure and development. Two metal layers, chromium and gold, are sequentially deposited on the surface of the p-type GaAs contact layer using an electroevaporation method, and the photoresist that has not been exposed is removed using a photoresist removal solution to obtain a p-type electrode. The thicknesses of the two metal layers from bottom to top are 100 nm and 15 nm, respectively.

4. The method for preparing a storage-computing integrated optical chip based on a photonic crystal microcavity according to claim 1, characterized in that: Etching a p-type GaAs contact layer, a second contact layer, and an n-type GaAs contact layer to form a two-dimensional photonic crystal structure, wherein the radius of the photonic crystal hole in the two-dimensional photonic crystal structure is 70 to 80 nm, the distance between the centers of two adjacent photonic crystal holes is 200 to 240 nm, and the two-dimensional photonic crystal structure has 16 to 20 rows of photonic crystal holes, with 20 to 40 photonic crystal holes in each row; The photonic crystal waveguide is located in the middle of the two-dimensional photonic crystal structure, and the length direction of the photonic crystal waveguide is consistent with the width direction of the p-type GaAs contact layer; the length of the photonic crystal waveguide is equal to the length of the two-dimensional photonic crystal structure, and the width of the photonic crystal waveguide is 340 to 420 nm; the distance between the photonic crystal waveguide and the photonic crystal microcavity is 2 to 3 photonic crystal holes; the length of the photonic crystal microcavity is 3 to 5 photonic crystal holes, and the width of the photonic crystal microcavity is one photonic crystal hole.

5. The method for preparing a storage-computing integrated optical chip based on a photonic crystal microcavity according to claim 1, characterized in that: Two gratings are formed by etching a p-type GaAs contact layer, a second contact layer, and an n-type GaAs contact layer at the left and right ends of a photonic crystal waveguide. Each grating is composed of two semicircular slits or a plurality of arc-shaped slits, and the convex ends of the semicircular slits and the arc-shaped slits face away from the photonic crystal waveguide. When a grating is composed of two semicircular slits, the width of the semicircular slits is 450 to 500 nm, and the distance between the two arc-shaped slits is 141 to 157 nm. When a grating is composed of a plurality of arc-shaped slits, the number of arc-shaped slits in a grating is 10 to 20, the arc center angle of the arc-shaped slits is 20 to 40 degrees, the width of the arc-shaped slits is 300 to 400 nm, and the distance between two adjacent arc-shaped slits is 150 to 200 nm.

6. The method for preparing a storage-computing integrated optical chip based on a photonic crystal microcavity according to claim 1, characterized in that: The two-dimensional photonic crystal structure and the grating are both prepared by dry etching; the air groove is prepared by wet etching.

7. The method for preparing a storage-computing integrated optical chip based on a photonic crystal microcavity according to claim 1, characterized in that: An air slot is prepared using a 1:20 hydrofluoric acid solution; the air slot serves as the cladding of a photonic crystal waveguide to meet the total reflection condition of the photonic crystal waveguide. At the same time, when a single photon is coupled from the photonic crystal waveguide into the grating and diffracts, the air slot can also reflect the diffracted single photon to prevent the single photon from entering the substrate.

8. A storage and computing integrated optical chip based on a photonic crystal microcavity prepared by the method according to any one of claims 1 to 7.

9. The storage and computing integrated optical chip according to claim 8, characterized in that: The n-type electrode, p-type electrode, grating and two-dimensional photonic crystal structure constitute an optical chip unit. There are multiple optical chip units arranged in the same direction and parallel to each other on the III-V semiconductor structure. The arrangement direction of the multiple optical chip units is consistent with the length direction of the III-V semiconductor structure.

10. An optical convolution method using the storage-computing integrated optical chip according to claim 9, characterized in that: The following steps are involved: First, an external light intensity beam splitter splits the light beam to be input to the optical chip into M paths according to intensity and inputs each path into M optical chip units. The light beam to be input to the optical chip contains light of N wavelengths, and the number of p-type electrodes in the optical chip unit is also N. Then, an external voltage source is connected to the n-type electrode and p-type electrode located in one optical chip unit to form an electrical circuit, wherein each p-type electrode forms an electrical circuit with the n-type electrode. One path of light is input into a grating in an optical chip unit. After being diffracted by the grating, the light is coupled into a photonic crystal waveguide. Light of a specific wavelength resonates in the corresponding photonic crystal microcavity and is absorbed and stored. The remaining light is transmitted to another grating, diffracted, and received by an external avalanche photodiode detector. The final result is the product of an M×N matrix and an N×1 vector. Among them, by adjusting the voltage of each electrical circuit to change the resonance wavelength of the corresponding photonic crystal microcavity, the transmittance of each wavelength can be controlled.

Images