Automatic checking method and device for electrical safety of circuit schematic diagram capacitor

Abstract

The invention discloses an automatic checking method and device for electrical safety of a circuit schematic diagram capacitor, and the scheme can comprise the steps: analyzing a target circuit schematic diagram in an EDIF200 format, and generating a capacitance parameter matrix Capdata according to the attribute parameters of a capacitor in an analysis result, the column index of the capacitance parameter matrix Capdata comprises a capacitance bit number, a rated voltage, a capacitance pin name and an electrical network name connected with the capacitance pin; determining the power supply voltage of each capacitor in the capacitor parameter matrix Capdata, and storing the obtained power supply voltage of each capacitor in a capacitor power supply voltage matrix Cappower; and calculating a voltage derating factor of each capacitor in the capacitance parameter matrix Capdata based on the capacitance parameter matrix Capdata and the capacitor power supply voltage matrix Cappower, and marking the capacitance bit number of the capacitor of which the calculated voltage derating factor exceeds a preset threshold.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic design automation, and in particular to a method and device for automatically checking the electrical safety of capacitors in a circuit schematic. Background Art

[0002] In modern electronic circuit design, capacitors are essential components whose performance and electrical safety have a crucial impact on the stability and reliability of the entire circuit system. As electronic circuits continue to increase in integration and complexity, manual inspections of capacitor electrical safety are not only inefficient but also prone to inspection gaps due to human negligence. For example, in complex multi-layer printed circuit board (PCB) designs, where capacitors are numerous and interconnected, manual inspections are prone to omissions or misjudgments.

[0003] Therefore, a method is needed to automatically and accurately check the electrical safety of capacitors in schematic diagrams to meet the high quality requirements of modern electronic circuit design. Summary of the Invention

[0004] This specification provides a method and device for automatically checking the electrical safety of capacitors in a circuit schematic diagram, which is used to overcome at least one technical problem existing in the related art.

[0005] According to a first aspect of an embodiment of this specification, a method for automatically checking the electrical safety of a capacitor in a circuit schematic is provided, comprising:

[0006] Parse the target circuit schematic in EDIF200 format and generate a capacitance parameter matrix Cap_data based on the attribute parameters of the capacitor components in the parsed results. The column index of the capacitance parameter matrix Cap_data includes the capacitor bit number and rated voltage, the capacitor pin name, and the name of the electrical network connected to the capacitor pin;

[0007] Determine the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, and store the obtained supply voltage of each capacitor in the capacitor supply voltage matrix Cap_power;

[0008] The voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data is calculated based on the capacitor parameter matrix Cap_data and the capacitor supply voltage matrix Cap_power, and the capacitor bit number of the capacitor whose calculated voltage derating factor exceeds a preset threshold is marked.

[0009] In some optional implementations, parsing the target circuit schematic in EDIF200 format and generating the capacitance parameter matrix Cap_data according to the attribute parameters of the capacitor devices in the parsing result specifically includes:

[0010] Based on the hierarchical bracket structure of the target circuit schematic in the EDIF200 format, the design elements are extracted by splitting "(", ")" and separators;

[0011] Traversing the library unit Library and the circuit unit Cell in the design element, identifying all capacitor instances, and filtering out capacitor devices according to the cell definitions referenced by the capacitor instances;

[0012] Parse the properties of each capacitor instance and extract the rated voltage value of the capacitor device by matching the pre-set rated voltage keyword;

[0013] The instance name of the capacitor device is stored as a capacitor bit number in association with the corresponding rated voltage value, generating a capacitor parameter matrix Cap_data containing four columns: "capacitor bit number", "rated voltage", "capacitor pin name" and "name of the electrical network connected to the capacitor pin".

[0014] In some optional implementations, before traversing the capacitance parameter matrix Cap_data row by row, the method includes:

[0015] Based on the preset power keyword and ground keyword, the electrical network names of all electrical networks in the target circuit schematic are matched one by one, and all electrical network names containing the power keyword and the ground keyword are stored in the Power_Data list; wherein, the power keyword is used to filter the power network in the electrical network, and the ground keyword is used to filter the ground network in the electrical network.

[0016] In some optional implementations, before traversing the capacitance parameter matrix Cap_data row by row, the method further includes:

[0017] The bit number, pin number, pin name and the name of the electrical network connected to each pin of each non-chip component in the analysis result are sorted into a non-chip component parameter matrix Part_data.

[0018] In some optional implementations, determining the supply voltage of each capacitor in the capacitance parameter matrix Cap_data specifically includes:

[0019] Traversing the capacitance parameter matrix Cap_data row by row, reading the electrical network name connected to each pin of each capacitor in the capacitance parameter matrix Cap_data, and for any target capacitor in the capacitance parameter matrix Cap_data, when a first electrical network name of the electrical network connected to any pin of the target capacitor is included in the Power_Data list and is not a ground network, obtaining the supply voltage of the target capacitor from the first electrical network name;

[0020] When the first pin and the second pin of the target capacitor and the electrical network connected thereto are not power supply networks, based on the names of the electrical networks connected to the first pin and the second pin of the target capacitor, traverse the non-chip component parameter matrix Part_data, and screen out non-chip devices associated with the target capacitor based on the consistency of the electrical network names; wherein the association relationship indicates that the target capacitor and the screened non-chip devices are connected through the same electrical network;

[0021] The supply voltage of the target capacitor is determined recursively according to the electrical network to which the non-chip component is connected.

[0022] In some optional implementations, recursively determining the supply voltage of the target capacitor according to the electrical network to which the non-chip device is connected specifically includes:

[0023] S1. Extracting the name of the electrical network connected to another pin of the non-chip component that is not connected to the target capacitor from the non-chip component parameter matrix Part_data;

[0024] S2. Determine whether the electrical network name in step S1 represents a power network according to a preset power network identification rule;

[0025] S3. If it is determined in step S2 that the electrical network name in step S1 does not represent a power network, then comprehensively traverse the non-chip component parameter matrix Part_data based on the electrical network name to screen out other non-chip components whose pins are connected to the electrical network;

[0026] S4. For each other non-chip device screened out in step S3, recursively execute steps S1 to S3 until the electrical network is determined to be a power supply network;

[0027] S5. parse the power supply voltage value from the name of the power supply network using a predefined parsing rule, and use the value as the power supply voltage of the target capacitor.

[0028] In some optional implementations, the voltage derating factor is calculated as follows:

[0029]

[0030] Wherein, symbol q represents the voltage derating factor, symbol V1 represents the rated voltage of the capacitor, and symbol V2 represents the supply voltage of the capacitor.

[0031] In some optional implementations, the column index of the capacitance parameter matrix Cap_data further includes capacitance type;

[0032] The method further includes traversing the capacitance parameter matrix Cap_data row by row using capacitance type as an identifier, classifying the capacitance components included in the target circuit schematic into polarized capacitors and non-polarized capacitors, and storing attribute information of the polarized capacitors in a polarized capacitance parameter matrix Cap_polarized; wherein the column index of the polarized capacitance parameter matrix Cap_polarized includes a capacitor bit number, a pin withstand voltage value, a capacitance type, a pin name, and the connected power network;

[0033] Traversing the polarized capacitor parameter matrix Cap_polarized, determining whether the polarized capacitor is reversely connected based on the positive and negative terminal rules of the polarized capacitor device pin connection network, and outputting the inspection result;

[0034] The rule for connecting the positive and negative terminals of the polar capacitor device pins to the network is as follows: the positive terminal of the polar capacitor needs to be connected to the high-potential network in the circuit, and the negative terminal needs to be connected to the low-potential network.

[0035] In some optional embodiments, the polar capacitor includes an electrolytic capacitor, and the non-polar capacitor includes a ceramic capacitor, a film capacitor, a paper dielectric capacitor, a mica capacitor, and a polyester capacitor.

[0036] According to a second aspect of the embodiments of this specification, there is provided an automatic inspection device for the electrical safety of a capacitor in a circuit schematic diagram, comprising:

[0037] A target circuit schematic parsing module is used to parse the target circuit schematic in EDIF200 format and generate a capacitance parameter matrix Cap_data based on the attribute parameters of the capacitor components in the parsing results. The column index of the capacitance parameter matrix Cap_data includes the capacitor bit number and rated voltage, the capacitor pin name, and the name of the electrical network connected to the capacitor pin;

[0038] a capacitor supply voltage determination module, configured to determine the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, and store the obtained supply voltage of each capacitor in the capacitor supply voltage matrix Cap_power;

[0039] The voltage derating factor calculation module is used to calculate the voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data based on the capacitor parameter matrix Cap_data and the capacitor supply voltage matrix Cap_power, and mark the capacitor bit number of the capacitor whose calculated voltage derating factor exceeds a preset threshold.

[0040] The beneficial effects of the embodiments of this specification are as follows:

[0041] This technical solution first parses a circuit schematic file in the standardized EDIF200 format, converting the complex circuit schematic information into structured data that can be processed and analyzed by a computer. By generating a non-chip component parameter matrix (Part_data) and a capacitor parameter matrix (Cap_data), the parameters of the non-chip components and capacitor devices are organized and stored separately, making the data more organized and facilitating subsequent analysis and processing.

[0042] By traversing the capacitor parameter matrix Cap_data row by row and combining it with pre-set power network identification rules, the supply voltage of each capacitor can be automatically determined. The determined supply voltage of each capacitor is then stored in the capacitor supply voltage matrix Cap_power, which can achieve centralized management of supply voltage data. On this basis, the voltage derating factor of each capacitor in the capacitor supply voltage matrix Cap_power is calculated, and capacitors exceeding the preset threshold are marked as not meeting the voltage derating requirements. This process realizes the automation of capacitor voltage derating safety assessment and can quickly and accurately identify capacitors that may pose safety risks.

[0043] The capacitor parameter matrix Cap_data is traversed row by row using capacitor type as a marker, classifying polarized and non-polarized capacitors. The polarized capacitor information is then stored in the polarized capacitor parameter matrix Cap_polarized. By traversing the polarized capacitor parameter matrix Cap_polarized and combining it with the positive and negative terminal rules of the pin connection network, it can be determined whether the polarized capacitors are reversely connected. This allows for quick and accurate identification of reverse polarized capacitor connections, avoiding potential oversights during manual inspection.

[0044] The technical solution of this application realizes the automation and intelligentization of capacitor electrical safety inspection through a series of steps, including parsing circuit schematic files, generating parameter matrices, determining supply voltages, calculating voltage derating factors, classifying polarized capacitors, and performing reverse connection inspections. This not only improves inspection efficiency and accuracy, but also enables the early detection of potential electrical safety issues, providing strong support for circuit design and optimization, thereby improving the reliability and stability of the entire circuit system. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of this specification or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 A flow chart of a method for automatically checking the electrical safety of a capacitor in a circuit schematic provided in an embodiment of this specification;

[0047] Figure 2 is a schematic diagram of a capacitor electrical safety inspection principle in a specific embodiment;

[0048] Figure 3 is a schematic diagram of a portion of the contents of the non-chip component parameter matrix Part_data in an embodiment;

[0049] Figure 4 is a schematic diagram of a capacitance parameter matrix Cap_data in an embodiment;

[0050] Figure 5 is a schematic diagram of the results of searching and obtaining the capacitor power supply network in an embodiment;

[0051] Figure 6 is a schematic diagram of the arrangement and calculation results of capacitor-related power supply parameters in the embodiment;

[0052] Figure 7 is a schematic diagram of a polar capacitance parameter matrix Cap_polarized in an embodiment;

[0053] Figure 8 Schematic diagram of the content of the capacitor safety automatic detection report output in the embodiment;

[0054] Figure 9 It is a flow chart of a method for checking the voltage derating of capacitors in a circuit schematic and checking the reverse polarity of capacitors;

[0055] Figure 10 This specification provides the corresponding embodiment Figure 1 A circuit schematic diagram and a structural diagram of an automatic inspection device for capacitor electrical safety. DETAILED DESCRIPTION

[0056] The following will be combined with the drawings in the embodiments of this specification to clearly and completely describe the technical solutions in the embodiments of this specification. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0057] It should be noted that the terms "including" and "having" and any variations thereof in the embodiments of this specification and the accompanying drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to the process, method, product, or apparatus.

[0058] The basic approach to capacitor electrical safety inspections in current design work involves traversing each capacitor component in the schematic after the circuit design is complete, determining parameters such as the capacitor's type and rated voltage. Based on the capacitor's power supply voltage and electrical connections, the capacitor's voltage derating is then calculated to determine whether it meets the required voltage. This current inspection method requires traversing each capacitor component in the schematic one by one, making the process cumbersome and prone to errors. Furthermore, as the complexity of the schematic increases, the inspection workload and the probability of errors also increase.

[0059] In order to solve the above-mentioned defects, the technical solution of the present invention provides an automated electrical safety inspection method for capacitor devices in circuit schematics, which can automatically analyze the capacitor parameters and corresponding supply voltage in the circuit schematic, and perform voltage derating inspection on this basis. The technical solution of the present invention is introduced below in conjunction with the accompanying drawings.

[0060] Figure 1 This is a flow chart of a method for automatically checking the electrical safety of a capacitor in a circuit schematic diagram provided by an embodiment of this specification. From a program perspective, the execution body of the flow can be a script program written in a scripting language.

[0061] like Figure 1 As shown, the process may include the following steps.

[0062] Step 102: Parse the target circuit schematic in EDIF200 format, and generate a capacitance parameter matrix Cap_data based on the attribute parameters of the capacitor device in the parsing result. The column index of the capacitance parameter matrix Cap_data includes the capacitor position number and rated voltage, the capacitor pin name, and the name of the electrical network connected to the capacitor pin.

[0063] First, let's explain the term "EDIF200" in this step. EDIF200 (Electronic Design Interchange Format) is a specific version of the Electronic Design Interchange Format (EDIF), specifically used to describe and exchange circuit design information between Electronic Design Automation (EDA) tools. EDIF files store data in plain text and use a hierarchical bracket structure to express design data, which can accurately express the hierarchical relationship and logical structure of the circuit design. The components of the EDIF200 file structure include version status information and component elements. The EDIF200 file structure includes version status information such as EDIF (root element, indicating the beginning of the file), edifVersion (EDIF version number), edifLevel (EDIF file level), keywordMap (keyword mapping), status (design file status information), as well as Library (a library containing a group of related units), Cell (circuit unit), Interface (input and output ports of the circuit unit), Port (a port of the unit, defining the name, direction and other parameters of the port), Contents (the specific content of each circuit unit, which describes the internal structure and connections of the circuit unit in detail). Connection relationship, including information such as the sub-units, components and connections between them), Instance (an instance of a unit, which can be a reference to another unit. Through instantiation, the same unit can be used multiple times in different locations without repeating its internal structure. Each instance has its own name and location information, which is convenient for management and identification in circuit design), Net (network connection, used to represent the connection between different instance ports), Property (related ancillary information in the design element, including additional information of the design element (such as units, ports, networks, etc.), such as component parameter values, layout constraints, design annotations, etc.) and other hierarchically divided components.

[0064] Based on the above, the target circuit schematic refers to the electronic circuit design file provided by the user that requires electrical safety inspection. Since the target circuit schematic in EDIF200 format contains information such as the hierarchical structure of the circuit, component parameters (such as the rated voltage and type of capacitors), pin connection relationships, and electrical network names, it can be parsed to extract the key attribute parameters of the capacitor components and generate a structured capacitor parameter matrix Cap_data. The column index of the capacitor parameter matrix Cap_data can include the capacitor position number and rated voltage, the capacitor pin name, and the name of the electrical network to which the capacitor pin is connected.

[0065] Step 104: Determine the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, and store the obtained supply voltage of each capacitor in the capacitor supply voltage matrix Cap_power.

[0066] A circuit schematic is the blueprint for an electronic design, detailing the connections and electrical parameters of each component. Capacitors, as key components, have their parameters, such as rated voltage and connection network, clearly marked during the design phase. EDIF200 files store structured data that can be parsed to retrieve the supply voltage data for each capacitor contained within. By combining standardized circuit design specifications, the structured data of EDIF200 files, and automated parsing technology, it's possible to extract the electrical information—the capacitor supply voltage—implicit in the network names and connection relationships.

[0067] Step 106: Calculate the voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data based on the capacitor parameter matrix Cap_data and the capacitor supply voltage matrix Cap_power, and mark the capacitor bit number of the capacitor whose calculated voltage derating factor exceeds a preset threshold.

[0068] In this step, the voltage derating factor is an indicator used to evaluate the voltage safety margin of capacitor components in practical applications. By calculating the voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data, the safety of each capacitor included in the target circuit schematic during operation can be evaluated. Capacitors with voltage derating factors exceeding the preset threshold are screened out in advance for subsequent processing to avoid damage to the components due to voltage overload.

[0069] based on Figure 1 The present specification also provides some specific implementation plans of the method, which are described below.

[0070] In an optional embodiment, the parsing of the target circuit schematic in EDIF200 format and generating the capacitance parameter matrix Cap_data according to the attribute parameters of the capacitor components in the parsing result may specifically include:

[0071] Based on the hierarchical bracket structure of the target circuit schematic in the EDIF200 format, the design elements are extracted by splitting "(", ")" and separators;

[0072] Traversing the library unit Library and the circuit unit Cell in the design element, identifying all capacitor instances, and filtering out capacitor devices according to the cell definitions referenced by the capacitor instances;

[0073] Parse the properties of each capacitor instance and extract the rated voltage value of the capacitor device by matching the pre-set rated voltage keyword;

[0074] The instance name of the capacitor device is stored as a capacitor bit number in association with the corresponding rated voltage value, generating a capacitor parameter matrix Cap_data containing four columns: "capacitor bit number", "rated voltage", "capacitor pin name" and "name of the electrical network connected to the capacitor pin".

[0075] This embodiment mainly describes how to parse the target circuit schematic in EDIF200 format to obtain the capacitance parameter matrix Cap_data. Since the EDIF200 file uses a hierarchical bracket structure to describe the circuit design, all elements are defined by nested brackets. Therefore, in this embodiment, the symbols are first split to extract the design elements, that is, the file is split into multiple hierarchical structures by splitting "(", ")" and separators. For example, (library...) is a library unit block, and (cell...) is a circuit unit block. The extracted blocks are marked by type as edifVersion, library, cell, instance, etc. to form a structured data tree. Then, the library cells and circuit cells are traversed to identify the capacitor instance. Among them, capacitor instances are identified by matching the bit number prefix. For example, the bit number of a capacitor instance usually starts with C (such as C1, C2). Then, in the library unit library, the circuit unit cell of the capacitor may be named Capacitor or contain the Cap keyword. By matching the unit name, the capacitor device can be filtered out, and then the attribute keyword verification is performed, that is, checking whether the capacitor instance contains capacitor-specific attributes, such as Capacitance and Voltage_Rating. Then, the capacitor attributes are parsed and the rated voltage is extracted. When parsing the capacitor attributes, the pre-defined rated voltage keyword list can be used to parse the capacitor attributes, and then the rated voltage value is extracted from the attribute value through regular expression matching.

[0076] In an optional embodiment and technical solution, before traversing the capacitance parameter matrix Cap_data row by row, the following steps may be included:

[0077] Based on the preset power keyword and ground keyword, the electrical network names of all electrical networks in the target circuit schematic are matched one by one, and all electrical network names containing the power keyword and the ground keyword are stored in the Power_Data list; wherein, the power keyword is used to filter the power network in the electrical network, and the ground keyword is used to filter the ground network in the electrical network.

[0078] The main purpose of the technical solution of this embodiment is to find the electrical network names corresponding to the power network and the ground network from the target circuit schematic. The power keyword is a pre-set set of keywords, and its purpose is to filter the power network in the electrical network. Since the power network is responsible for delivering electrical energy to each component in the circuit, keywords such as "UB" and "VCC" are generally the names of the power network commonly used in the circuit design field. The ground keyword is also a pre-set set of keywords used to filter the ground network in the electrical network. The ground network is the reference potential of the circuit, usually represented by "GND", "AGND" (analog ground) and "DGND" (digital ground).

[0079] Because the target circuit schematic contains multiple electrical networks, each with its own name, each network name must be checked individually to see if it contains the preset power or ground keywords. For example, if the network name is "VCC_3V3," it will be identified as a power network because it contains the power keyword "VCC." If the network name is "GND_PCB," it will be identified as a ground network because it contains the ground keyword "GND." Finally, all network names containing the power or ground keywords are added to the Power_Data list.

[0080] In an optional embodiment and technical solution, before traversing the capacitance parameter matrix Cap_data row by row, the following steps may also be included:

[0081] The bit number, pin number, pin name and the name of the electrical network connected to each pin of each non-chip component in the analysis result are sorted into a non-chip component parameter matrix Part_data.

[0082] Considering that effective management of non-chip device information helps to fully understand the composition and connection relationship of the circuit, the technical solution of this embodiment will organize the relevant information of each non-chip device in the analysis results into a non-chip component parameter matrix Part_data before traversing the capacitance parameter matrix Cap_data row by row. The purpose is to systematically collect and structure the non-chip device information in the circuit schematic diagram, so as to facilitate subsequent more in-depth analysis and processing of the circuit.

[0083] In the parsing results, it's necessary to distinguish between chip devices and non-chip devices. Non-chip devices typically include basic electronic components such as resistors, capacitors, inductors, diodes, and transistors. Filtering can be based on information such as the device type identifier or device name. For example, if the device name contains "R," it indicates a resistor, and if it contains "C," it indicates a capacitor.

[0084] For each screened non-chip device, it is necessary to collect information such as the bit number, pin number, pin name, and the name of the electrical network to which the pin is connected. Among them, the bit number is a number used to uniquely identify each device in the circuit, such as "R1" represents the first resistor, "C2" represents the second capacitor, etc. The bit number can be used to accurately locate the device in the circuit schematic. At the same time, each device has a certain number of pins, and the pin number is used to distinguish different pins. For example, a transistor may have three pins, marked as 1, 2, and 3. The pin name is usually used to describe the function of the pin, such as "+" represents the positive pin, "" represents the negative pin, etc. The electrical network is a conductive path connecting the pins of each device in the circuit. Each electrical network has a name. The name of the electrical network to which the pin is connected can be used to understand the connection relationship between the device and other devices.

[0085] Finally, the collected bit number, pin number, pin name and the name of the electrical network connected to the pin of each non-chip device are organized into a non-chip component parameter matrix Part_data according to a certain format. Each row of the matrix represents the information of a pin of a non-chip device, and each column corresponds to the bit number, pin number, pin name and the name of the electrical network connected to the pin.

[0086] In an optional embodiment and technical solution, determining the supply voltage of each capacitor in the capacitance parameter matrix Cap_data may specifically include:

[0087] Traversing the capacitance parameter matrix Cap_data row by row, reading the electrical network name connected to each pin of each capacitor in the capacitance parameter matrix Cap_data, and for any target capacitor in the capacitance parameter matrix Cap_data, when a first electrical network name of the electrical network connected to any pin of the target capacitor is included in the Power_Data list and is not a ground network, obtaining the supply voltage of the target capacitor from the first electrical network name;

[0088] When the first pin and the second pin of the target capacitor and the electrical network connected thereto are not power supply networks, based on the names of the electrical networks connected to the first pin and the second pin of the target capacitor, traverse the non-chip component parameter matrix Part_data, and screen out non-chip devices associated with the target capacitor based on the consistency of the electrical network names; wherein the association relationship indicates that the target capacitor and the screened non-chip devices are connected through the same electrical network;

[0089] The supply voltage of the target capacitor is determined recursively according to the electrical network to which the non-chip component is connected.

[0090] Calculating the voltage derating factor of each capacitor in the target circuit schematic requires determining the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, so as to calculate the voltage derating factor in combination with the rated electrical value of each capacitor. The technical solution of this embodiment provides a possible method for determining the supply voltage of a capacitor. This method is based on the name of the electrical network connected to the capacitor pin, combined with the existing power network information (stored in the Power_Data list described in the technical solution of the previous embodiment) and the non-chip component parameter matrix Part_data. This method is explained in detail below.

[0091] The method first traverses the capacitor parameter matrix Cap_data row by row and reads the pin connection information. The purpose is to check each capacitor in the capacitor parameter matrix Cap_data one by one, obtain the name of the electrical network to which its pin is connected, and prepare for the subsequent judgment of the power supply voltage. Its operating process is based on the script program to process the data of each capacitor in the order of the rows of the capacitor parameter matrix Cap_data, and for each capacitor, read the name of the electrical network to which each pin is connected. For any target capacitor in the Cap_data matrix, check whether the name of the electrical network to which any pin is connected (i.e., the first electrical network name) is included in the Power_Data list, and the network is not a ground network. The Power_Data list here has stored the names of electrical networks containing power keywords and ground keywords in the previous embodiment technical solution. The power network names that are not ground networks are screened out because the ground network usually represents a reference potential (such as GND), not a network that provides power. When the above conditions are met, the supply voltage of the target capacitor is obtained from the first electrical network name. Specifically, this can be achieved through the voltage identification information contained in the electrical network name. For example, the electrical network name "VCC_3V3" indicates that the network provides a 3.3V power supply, so the supply voltage of the capacitor is 3.3V.

[0092] The following describes a method for determining the supply voltage from a power net name using a regular expression. Power net names are typically formatted like "VCC_5V" and "VBAT_8V3," a common naming format in circuit schematic design. A specific string combination can be used to identify a power net and its corresponding voltage value. For example, a regular expression might be r'_(\d+)V(\d)? '. Here, _ matches an underscore character, (\d+) matches one or more digits and forms a capture group, used here to retrieve the integer portion of the voltage value; V matches the letter V; and (\d)? matches an optional digit, potentially a decimal point, and forms another capture group. This regular expression can be used to match power net names. For example, for the power net name "VCC_5V," the voltage information obtained is 5, and for the power net name "VBAT_8V3," the voltage information obtained is 8.3.

[0093] The situation described above is when the capacitor pins are directly connected to a known power network, and its supply voltage can be quickly determined from the electrical network name. However, if the electrical networks connected to the first and second pins of the target capacitor are not power networks (that is, their electrical network names are not in the part that meets the power network conditions in the Power_Data list), it is necessary to further search for non-chip devices associated with the capacitor. The operation process includes:

[0094] Based on the names of the electrical networks connected to the first and second pins of the target capacitor, the non-chip component parameter matrix Part_data is traversed. Based on the consistency of the electrical network names, non-chip devices connected to the target capacitor through the same electrical network are screened out. For example, if a pin of a capacitor is connected to the electrical network "NET1", search the Part_data matrix for non-chip devices whose pins are connected to "NET1". These devices are associated with the capacitor. This method can be used when the capacitor is not directly connected to the power supply network. By searching for non-chip devices associated with it, the source of the power supply can be indirectly found, thereby determining the supply voltage of the capacitor.

[0095] For the non-chip devices that are screened out and are associated with the target capacitor, check the electrical networks to which these devices are connected. If these electrical networks still cannot be directly determined as power supply networks, repeat the above steps of screening associated devices. That is, based on the pin connection information of these non-chip devices, search the Part_data matrix again for other non-chip devices connected to them through the same electrical network. Repeat this recursively until a power supply network that can determine the supply voltage is found.

[0096] Considering that in complex circuits, capacitors may not be directly connected to the power network, but rather indirectly connected through multiple non-chip components, a recursive approach can gradually trace the circuit connection relationship, ultimately finding the capacitor's power source and thus determining its supply voltage. The entire process of the technical solution of this embodiment uses direct search or recursive tracing to utilize the electrical network information connected to the capacitor pins and the connection relationship of non-chip components to determine the capacitor's supply voltage as accurately as possible.

[0097] In an optional embodiment and technical solution, the recursive determination of the supply voltage of the target capacitor based on the electrical network to which the non-chip device is connected may specifically include:

[0098] Step S1: extracting the name of the electrical network connected to another pin of the non-chip component that is not connected to the target capacitor from the non-chip component parameter matrix Part_data.

[0099] The purpose of this step is to obtain the name of the electrical network to which the other pin of the non-chip device connected to the target capacitor is connected from the non-chip component parameter matrix Part_data, so as to further determine whether the network is a power supply network. Specifically, in the Part_data matrix, for non-chip devices that have a connection relationship with the target capacitor, find the pin that is not connected to the target capacitor and record the name of the electrical network to which the pin is connected. For example, assuming that a resistor is connected to the target capacitor through an electrical network, this step is to find the name of the electrical network to which the other pin of the resistor is connected. For example, assuming that the non-chip device is a resistor R1, one of its pins is connected to the electrical network NET1 where the target capacitor C1 is located. By checking the Part_data matrix, it is found that the other pin of R1 is connected to the electrical network NET2, and NET2 is extracted as the object of subsequent analysis.

[0100] Step S2: determining whether the electrical network name in step S1 represents a power network according to a preset power network identification rule.

[0101] The purpose of this step is to determine whether the electrical network name extracted in step S1 represents a power network based on pre-defined power network identification rules. This pre-defined power network identification rule is the same as the previously described method for identifying power networks using a predetermined set of power and ground keywords. The electrical network name extracted in step S1 is matched with these keywords. If a match is successful, the network is determined to be a power network; otherwise, it is determined not to be a power network. For example, if the electrical network name extracted in step S1 is VCC_3V3, since it contains the power keyword "VCC," the network is determined to be a power network.

[0102] Step S3: If it is determined in step S2 that the electrical network name in step S1 does not represent a power network, then the non-chip component parameter matrix Part_data is fully traversed based on the electrical network name to screen out other non-chip components whose pins are connected to the electrical network.

[0103] If step S2 determines that the electrical network is not a power network, it is necessary to further track other non-chip devices connected to it and continue searching for the power network. Specifically, based on the name of the electrical network extracted in step S1, the Part_data matrix is fully traversed to filter out other non-chip devices whose pins are connected to the electrical network. Since these devices may be connected to other electrical networks, it is possible to find the power network. For example, assuming that the name of the electrical network extracted in step S1 is NET2, the pin connection information of all devices in the Part_data matrix is traversed to find other non-chip devices whose pins are connected to NET2, such as capacitor C2, inductor L1, etc.

[0104] Step S4: for each other non-chip device screened out in step S3, recursively execute steps S1 to S3 until the electrical network is determined to be a power supply network.

[0105] In this step, for each other non-chip device screened out in step S3, repeat steps S1 to S3, continuously expanding the search range until a power network is found. Specifically, for each non-chip device screened out in step S3, use it as a new starting point, execute step S1 again, extract the name of the electrical network to which its other pin that is not connected to the current electrical network is connected; then execute step S2 to determine whether the network is a power network; if not, execute step S3 to screen other non-chip devices connected to it, and so on recursively until a power network is found. For example, assuming that capacitor C2 is screened out in step S3, use C2 as a new starting point, execute step S1 to extract the name of the electrical network to which its other pin is connected as NET3; execute step S2 to determine whether NET3 is a power network; if not, execute step S3 to filter out other non-chip devices whose pins are connected to NET3, and continue recursively.

[0106] Step S5: parse the power supply voltage value from the name of the power supply network using a predefined parsing rule, and use the value as the power supply voltage of the target capacitor.

[0107] After recursively finding a power network, the supply voltage is parsed from the network name and used as the supply voltage for the target capacitor. For example, if the power network name is VCC_5V, the voltage value of 5V is extracted from the name according to predefined rules and used as the supply voltage for the target capacitor.

[0108] In this implementation, when the target capacitor is not directly connected to a clear power supply network, it is necessary to gradually trace its electrical connection relationship through the non-chip devices connected to it, and finally find the network that provides power, thereby determining the supply voltage of the target capacitor. The technical solution of this embodiment introduces the specific content of the recursive method, which determines the target capacitor supply voltage based on the electrical network connected to the non-chip devices. This recursive method gradually expands the search range by continuously tracing the electrical connection relationship between non-chip devices, and finally finds the supply voltage of the target capacitor.

[0109] In an optional embodiment, the voltage derating factor is calculated as follows:

[0110]

[0111] Wherein, symbol q represents the voltage derating factor, symbol V1 represents the rated voltage of the capacitor, and symbol V2 represents the supply voltage of the capacitor.

[0112] In practical scenarios, considering that high-voltage power supplies are typically used in power circuits and have a large voltage fluctuation range, and taking into account factors such as dynamic changes in power supply voltage (such as voltage drops caused by sudden load changes), the decline in voltage resistance due to capacitor aging, and the impact of temperature changes on capacitor performance, a maximum error of 30% can be set for power supply voltages greater than 10V. Setting a 30% error can cover these influencing factors. At the same time, considering that low-voltage power supplies are mostly signal processing circuits with high voltage stability requirements, a maximum error of 5% can be set for power supply voltages less than 10V to cover factors such as linear regulator output accuracy and digital circuit logic level tolerance. Based on the above formula, this solution traverses and calculates the matrix Cap_power row by row to obtain the voltage derating factor for each capacitor in the schematic. If the calculated derating factor of the current capacitor is less than the derating factor threshold set by this method, the voltage derating design of the current capacitor meets the requirements. Otherwise, it is judged that the voltage derating design does not meet the requirements and the position number of the current capacitor is output.

[0113] As previously mentioned, it's possible to check the voltage derating of capacitor components in circuit schematics. Circuit schematics include both polarized and non-polarized capacitors. Polarized capacitors (such as electrolytic and tantalum capacitors) have polarity-dependent internal structures. For example, in electrolytic capacitors, the positive oxide film forms a stable insulating layer when connected in the correct polarity, enabling energy storage and filtering functions. However, if connected in reverse, the oxide film is destroyed, increasing the capacitor's equivalent series resistance and dramatically decreasing its capacitance. This prevents the capacitor from properly performing its energy storage, filtering, and coupling functions, leading to degraded circuit performance (such as increased power supply ripple and signal transmission distortion). Furthermore, reverse connection can trigger abnormal internal chemical reactions in polarized capacitors. When an electrolytic capacitor is connected in reverse, the internal electrolyte undergoes a violent electrochemical reaction due to incorrect polarity, causing a surge in leakage current, rapid heating, bulging, leakage, and even explosion. Tantalum capacitors, when connected in reverse, can similarly overheat and burn due to internal dielectric breakdown. Identifying reverse connection can prevent this type of physical damage and protect the capacitor itself and surrounding circuit components. Therefore, it's also possible to check whether polarized capacitor components in circuit schematics are connected in reverse.

[0114] Thus, in an optional embodiment and technical solution, the column index of the capacitance parameter matrix Cap_data may further include the capacitance type, and the content of the polarity reversal may include traversing the capacitance parameter matrix Cap_data row by row with the capacitance type as the mark, classifying the capacitance devices included in the target circuit schematic into polarized capacitors and non-polarized capacitors, and storing the attribute information of the polarized capacitors in the polarized capacitance parameter matrix Cap_polarized; wherein the column index of the polarized capacitance parameter matrix Cap_polarized includes the capacitance bit number, the pin withstand voltage value, the capacitance type, the pin name, and the connected power network;

[0115] Traversing the polarized capacitor parameter matrix Cap_polarized, determining whether the polarized capacitor is reversely connected based on the positive and negative terminal rules of the polarized capacitor device pin connection network, and outputting the inspection result;

[0116] The rule for connecting the positive and negative terminals of the polar capacitor device pins to the network is as follows: the positive terminal of the polar capacitor needs to be connected to the high-potential network in the circuit, and the negative terminal needs to be connected to the low-potential network.

[0117] In the technical solution of the present embodiment, the positive end of the polar capacitor needs to be connected to the high potential network (such as the positive electrode of the power supply) in the circuit, and the negative end is connected to the low potential network (such as the ground terminal or the negative electrode of the power supply). For example, the positive end should be connected to the network representing the positive electrode of the power supply such as VCC_5V, VDD_3.3V, and the negative end should be connected to the low potential network such as GND (ground). If the positive end is mistakenly connected to a low potential and the negative end is mistakenly connected to a high potential, it is determined to be reverse connection. In some optional embodiments, the capacitance type of the polar capacitor includes an electrolytic capacitor, and the type of the non-polar capacitor includes a ceramic capacitor, a film capacitor, a paper dielectric capacitor, a mica capacitor and a polyester capacitor.

[0118] The following is an introduction to the technical solution of the present application using a complete embodiment as an example. This specific embodiment performs voltage derating checks on capacitors in the target circuit schematic and also checks for reverse polarity of the capacitors. The specific contents of this complete embodiment are as follows:

[0119] Step 1: Analyze and organize the content of the standard EDIF200 format schematic diagram to obtain the parameters and electrical connection relationships of the capacitors and other non-chip components in the schematic diagram. Figure 2 The schematic diagram of the DCDC circuit contains 13 capacitor components, namely C314, C315, C319, C320, C312, C301, C313, C302, C303, C323, C321, C322 and C311. Among them, C323, C321 and C322 are electrolytic capacitors, and the rest are ceramic capacitors. The schematic diagram can be converted into the standard EDIF200 format by any design tool. The schematic diagram in EDIF200 format is used as the input of this method. Based on step 1, this method obtains the position number, pin number, pin name and the network name connected to the pin of all non-chip components in the schematic diagram, such as Figure 3 Shown is the Figure 1 A part of the matrix Part_data obtained after sorting the parameters of non-chip components in the schematic diagram shown in the figure; then, the capacitor-related parameters are further sorted to obtain the bit number, rated voltage, type, pin name and the name of the network connected to the pin of all capacitor components, such as Figure 4 Shown is the Figure 1 The matrix Cap_data is obtained by sorting the capacitor component parameters in the schematic diagram shown.

[0120] in, Figure 3This is a table that records the pin connection information of some non-chip devices in an electronic circuit. It contains 4 columns, which are explained in detail below: Part Ref represents the device number, which is used to identify each non-chip device in the circuit, such as resistors (R304, R307, etc.), capacitors (C302, C319, etc.), and inductors (L301). These numbers can be used to quickly locate the corresponding device in the circuit diagram. PinIndex is the pin number, which indicates the number of the pin on the device. Taking common two-terminal devices such as capacitors and resistors as an example, there are generally two pin numbers 1 and 2 to distinguish different pins. Pin Name is the pin name, which indicates the name of each pin. "&1" and "&2" are used to further clarify the identity of the pin. In some complex circuits, the pin name can help understand the flow and function of the signal. RefNet is the connection network, which is used to display the network to which each pin is connected. For example, "VCC_5V" and "VCC_8V3" are power networks that provide electrical energy of different voltage levels to the circuit; "GND" is the ground network; and numbers starting with "N" (such as N19814643) are custom network identifiers used to distinguish different electrical connection lines.

[0121] Through this table, you can clearly understand the connection status of each non-chip device pin.

[0122] Figure 4It is a table about capacitor parameters and connection information, which contains 5 columns and is used to record the relevant data of capacitors in electronic circuits. The specific explanations are as follows: PartRef is the capacitor position number, which is the unique identifier of the capacitor in the circuit schematic and is used to distinguish different capacitor components, such as C301, C322, etc. With this identifier, you can quickly locate the corresponding capacitor in the circuit diagram. Pin Vol represents the rated voltage, which indicates the maximum operating voltage that each capacitor can withstand. For example, the rated voltage of some capacitors such as C301 and C322 is 50, and combined with circuit common sense, it is estimated to be 50V. Different capacitors have different rated voltage values according to their characteristics and application scenarios. This is one of the important parameters for selecting and using capacitors. Cap Type indicates the capacitor type, primarily "Ceramic Capacitors" and "Electrolytic Capacitors." Ceramic and electrolytic capacitors differ in electrical performance, structure, and application scenarios. For example, electrolytic capacitors have positive and negative polarity, while ceramic capacitors are generally non-polar. PinName is the pin name, which designates each pin of the capacitor. In this figure, the pins are named &1 and &2 to distinguish the two pins of the capacitor. RefNet is the connected network, that is, the circuit network to which the capacitor pins are connected. For example, "VCC_5V" and "VCC_8V3" are power networks, providing voltages of 5V and 8.3V, respectively. "GND" is the ground network. Numbers beginning with "N" (such as N19814647) are custom network identifiers used to indicate specific electrical connections. This table summarizes key capacitor information and is valuable for analyzing the operating status of capacitors in circuits, evaluating the rationality of circuit designs, and troubleshooting circuit faults.

[0123] Step 2: Obtain the capacitor supply voltage. This method traverses the Cap_data matrix based on step 1. If a capacitor has a pin directly connected to the power network, this network is directly used as the power supply pin of the current capacitor, such as Figure 5 C314, C315, C319, C302, C303, C323, C321, C322 and C311 shown in FIG; If the capacitor is not directly connected to the power supply network but is connected to the power supply through other non-chip devices, then Figure 6 As shown in C301, C313, and C320 in the figure, by connecting the network consistency, the power supply network connected to the non-chip device connected to the capacitor is found as the power supply for the current capacitor. Figure 5 In the example, C301 is connected to the power supply network VCC_5V through the inductor L301, C313 is connected to VCC_8VC through the resistor R301, connected to the GND network through R308, and C320 is connected to VCC_5V through R302. Figure 5After obtaining the power supply of each capacitor, the current capacitor supply voltage is obtained from the power network using regular expression parsing, such as Figure 6 As shown in the Pow vol column.

[0124] Figure 5 It is a table that records the relevant parameters and connection information of capacitors in the circuit. It has a total of 7 columns, and the meaning of each column is as follows: PartRef represents the position number of the capacitor, which is the unique identifier of the capacitor in the circuit schematic, such as C302, C311, etc., which is used to distinguish different capacitor components. Pin Vol represents the rated voltage of the capacitor, that is, the maximum working voltage that the capacitor can withstand. Cap Typ represents the type of capacitor, among which "Ceramic Capacitors" represents ceramic capacitors and "Electrolytic Capacitors" represents electrolytic capacitors. Ceramic capacitors are often used in high-frequency circuits and have no polarity; electrolytic capacitors have polarity and are often used in power supply filtering and other occasions. Pin Name is the name of the capacitor pin, Figure 5 "&1" and "&2" distinguish the two pins of the capacitor, which helps to clarify the connection direction and signal transmission path of the capacitor in the circuit. RefNet records the network name to which the capacitor pin is connected. Among them, "VCC_5V" and "VCC_8V3" are power networks, providing voltages of 5V and 8.3V respectively, and "GND" is the ground network. Numbers starting with "N" (such as N19814928) can be custom network identifiers used to indicate specific electrical connection lines. RefPart indicates the position numbers of other devices connected to the capacitor pin through the network. For example, "NC" can indicate that no other specific devices are connected; and the position number of other devices connected to the &2 pin of C313 is R308, and the position number of other devices connected to the &2 pin of C301 is L301. PowNet represents the power network to which the capacitor pin is connected, clarifying the power supply source of the capacitor.

[0125] Figure 6This table displays capacitor electrical parameters and voltage derating results. It contains seven columns and is used to assess the safety of capacitors in a circuit under actual operating voltages. The following is a detailed explanation of each column: Cap Ref represents the capacitor's position number, a unique identifier for the capacitor in the circuit. It's used to distinguish different capacitors, such as C311 and C322, making it easier to locate and record information about a specific capacitor. PowerNet represents the power network to which the capacitor is connected. For example, "VCC_8V3" indicates that the capacitor is connected to an 8.3V power network, while "VCC_5V" indicates that it is connected to a 5V power network. Cap Vol represents the rated voltage of the capacitor, which is the maximum operating voltage the capacitor can withstand. For example, the rated voltage of capacitors such as C311 and C322 is 50.0V, while the rated voltage of capacitors such as C315 and C312 is 10.0V. Pow Vol represents the actual supply voltage, which indicates the actual supply voltage received by the capacitor in the current circuit. q represents the derating factor, which reflects the ratio of the capacitor's actual operating voltage to its rated voltage. For example, the derating factor for C311 is 0.1743. Threshold is a preset standard value, typically 0.7. This threshold is used to determine if the capacitor voltage derating meets the requirements and is compared with the derating factor. Result represents the judgment result, which is derived from the comparison between the derating factor and the threshold. If the derating factor is less than the threshold, the result is displayed as "pass," indicating that the capacitor meets the voltage derating requirements and is safe to operate in the current circuit.

[0126] Step 3: Determine the capacitor voltage derating. This method determines the capacitor voltage derating based on step 2. Based on the capacitor-related parameters obtained in the previous steps and the voltage derating factor calculation formula, the capacitor derating factor is calculated. The calculation results of each capacitor derating factor are as follows: Figure 6 As shown in the q column, the capacitor with a derating factor less than the threshold is judged to meet the capacitor derating requirements, otherwise it is not met. The judgment result is as follows Figure 6 As shown, all capacitors meet the voltage derating requirements.

[0127] Step 4: Determine the polarity of the capacitor. This method determines the polarity of the capacitor based on step 2. First, the method traverses the Cap_data matrix row by row and reads the capacitor type information, such as Figure 7 As shown, the capacitor types of capacitors C323, C321, and C322 are electrolytic capacitors, so these three capacitors are stored as polarized capacitors in the Cap_polarized matrix.

[0128] Step 5: Check if the polarity of the capacitor is reversed. This method checks if the polarity of the capacitor is reversed based on step 5. Figure 7The positive terminal (&1) of capacitor C323 is connected to the GND network, and the negative terminal (&2) is connected to the VCC_8V3 network. The positive and negative poles are reversed, but capacitors C321 and C322 are not reversed. Therefore, it is determined that the polarity of capacitor C323 is reversed. Figure 2 The contents of the electrical safety inspection report for the capacitor shown in the schematic diagram are as follows Figure 8 shown.

[0129] Figure 8 The table in the figure shows the key parameters and connection information for electrolytic capacitors in a circuit. The specific columns and their meanings are analyzed as follows: Part Ref represents the device number, which uniquely identifies the capacitor component in the circuit, such as C323, C321, and C322, making it easier to locate the specific component in the circuit schematic. Pin Vol represents the pin voltage rating, indicating the voltage that the capacitor pin can withstand. Cap Type represents the capacitor type. Electrolytic Capacitors represents electrolytic capacitors, which have polarity and require pin connections to strictly correspond to the circuit network. PinName represents the pin name, which is used to distinguish the different pins of the capacitor. &1 and &2 are used to identify the two pins of a capacitor, typically corresponding to the positive and negative terminals, respectively. RefNet represents the connection network, which records the name of the electrical network to which the capacitor pins are connected. GND represents the ground network, which is the reference potential point of the circuit. The following example uses one row of data to explain the table in the figure. For example, capacitor C323 has pin &1 connected to the GND network and pin &2 connected to the VCC_8V3 power network. It has a voltage rating of 50V and is an electrolytic capacitor.

[0130] This technical solution first parses a circuit schematic file in the standardized EDIF200 format, converting the complex circuit schematic information into structured data that can be processed and analyzed by a computer. By generating a non-chip component parameter matrix (Part_data) and a capacitor parameter matrix (Cap_data), the parameters of the non-chip components and capacitor devices are organized and stored separately, making the data more organized and facilitating subsequent analysis and processing.

[0131] Then, by traversing the capacitor parameter matrix Cap_data row by row and combining it with pre-set power network identification rules, the supply voltage of each capacitor can be automatically determined. The determined supply voltage of each capacitor is then stored in the capacitor supply voltage matrix Cap_power, which can achieve centralized management of supply voltage data. On this basis, the voltage derating factor of each capacitor in the capacitor supply voltage matrix Cap_power is calculated, and capacitors exceeding the preset threshold are marked as not meeting the voltage derating requirements. This process realizes the automation of capacitor voltage derating safety assessment and can quickly and accurately identify capacitors that may pose safety risks.

[0132] At the same time, the capacitor parameter matrix Cap_data is traversed row by row using capacitor type as a marker to classify polarized and non-polarized capacitors, and the polarized capacitor information is stored in the polarized capacitor parameter matrix Cap_polarized. By traversing the polarized capacitor parameter matrix Cap_polarized and combining it with the positive and negative terminal rules of the pin connection network, it can be determined whether the polarized capacitors are reversely connected. This can quickly and accurately identify reverse connection issues of polarized capacitors, avoiding potential omissions during manual inspection.

[0133] Based on the same idea, the embodiments of this specification also provide a device corresponding to the above method. Figure 10 The embodiments of this specification provide corresponding Figure 10 A circuit schematic diagram of a device for automatically checking the electrical safety of a capacitor. Figure 10 As shown, the device may include:

[0134] The target circuit schematic parsing module 1002 is used to parse the target circuit schematic in EDIF200 format and generate a capacitance parameter matrix Cap_data based on the attribute parameters of the capacitor device in the parsing result. The column index of the capacitance parameter matrix Cap_data includes the capacitor position number and the rated voltage, the capacitor pin name and the name of the electrical network connected to the capacitor pin.

[0135] The capacitor supply voltage determination module 1004 is configured to determine the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, and store the obtained supply voltage of each capacitor in the capacitor supply voltage matrix Cap_power.

[0136] The voltage derating factor calculation module 1006 is used to calculate the voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data based on the capacitor parameter matrix Cap_data and the capacitor supply voltage matrix Cap_power, and mark the capacitor bit number of the capacitor whose calculated voltage derating factor exceeds a preset threshold.

[0137] Those skilled in the art will appreciate that the accompanying drawings are merely schematic diagrams of an embodiment, and the modules or processes in the accompanying drawings are not necessarily required to implement the present invention.

[0138] Those skilled in the art will appreciate that the modules in the apparatuses of the embodiments may be distributed in the apparatuses of the embodiments as described in the embodiments, or may be located in one or more apparatuses different from the embodiments with corresponding changes. The modules in the above embodiments may be combined into one module or further divided into multiple sub-modules.

[0139] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for automatically checking the electrical safety of capacitors in circuit schematics, characterized in that: The method is executed by a script program written in a scripting language and includes the following steps: Parse the target circuit schematic in EDIF200 format and generate a capacitance parameter matrix Cap_data based on the attribute parameters of the capacitor components in the parsed results. The column index of the capacitance parameter matrix Cap_data includes the capacitor bit number and rated voltage, the capacitor pin name, and the name of the electrical network connected to the capacitor pin; Determine the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, and store the obtained supply voltage of each capacitor in the capacitor supply voltage matrix Cap_power; The voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data is calculated based on the capacitor parameter matrix Cap_data and the capacitor supply voltage matrix Cap_power, and the capacitor bit number of the capacitor whose calculated voltage derating factor exceeds a preset threshold is marked.

2. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 1, characterized in that: The step of parsing the target circuit schematic in EDIF200 format and generating the capacitance parameter matrix Cap_data according to the attribute parameters of the capacitor components in the parsing result specifically includes: Based on the hierarchical bracket structure of the target circuit schematic in the EDIF200 format, the design elements are extracted by splitting "(", ")" and separators; Traversing the library unit Library and the circuit unit Cell in the design element, identifying all capacitor instances, and filtering out capacitor devices according to the cell definitions referenced by the capacitor instances; Parse the properties of each capacitor instance and extract the rated voltage value of the capacitor device by matching the pre-set rated voltage keyword; The instance name of the capacitor device is stored as a capacitor bit number and associated with the corresponding rated voltage value. This generates a capacitor parameter matrix Cap_data containing four columns: "capacitor bit number", "rated voltage", "capacitor pin name", and "name of the electrical network connected to the capacitor pin".

3. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 1, characterized in that: Before traversing the capacitance parameter matrix Cap_data row by row, the method includes: Based on the preset power keyword and ground keyword, the electrical network names of all electrical networks in the target circuit schematic are matched one by one, and all electrical network names containing the power keyword and the ground keyword are stored in the Power_Data list; wherein, the power keyword is used to filter the power network in the electrical network, and the ground keyword is used to filter the ground network in the electrical network.

4. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 3, characterized in that: Before traversing the capacitance parameter matrix Cap_data row by row, the method further includes: The bit number, pin number, pin name and the name of the electrical network connected to each pin of each non-chip component in the analysis result are sorted into a non-chip component parameter matrix Part_data.

5. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 4, characterized in that: The determining of the supply voltage of each capacitor in the capacitance parameter matrix Cap_data specifically includes: Traversing the capacitance parameter matrix Cap_data row by row, reading the electrical network name connected to each pin of each capacitor in the capacitance parameter matrix Cap_data, and for any target capacitor in the capacitance parameter matrix Cap_data, when a first electrical network name of the electrical network connected to any pin of the target capacitor is included in the Power_Data list and is not a ground network, obtaining the supply voltage of the target capacitor from the first electrical network name; When the first pin and the second pin of the target capacitor and the electrical network connected thereto are not power supply networks, based on the names of the electrical networks connected to the first pin and the second pin of the target capacitor, traverse the non-chip component parameter matrix Part_data, and screen out non-chip devices associated with the target capacitor based on the consistency of the electrical network names; wherein the association relationship indicates that the target capacitor and the screened non-chip devices are connected through the same electrical network; The supply voltage of the target capacitor is determined recursively according to the electrical network to which the non-chip device is connected.

6. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 5, characterized in that: The recursive determination of the supply voltage of the target capacitor according to the electrical network to which the non-chip device is connected specifically includes: S1. Extracting the name of the electrical network connected to another pin of the non-chip component that is not connected to the target capacitor from the non-chip component parameter matrix Part_data; S2. Determine whether the electrical network name in step S1 represents a power network according to a preset power network identification rule; S3. If it is determined in step S2 that the electrical network name in step S1 does not represent a power network, then comprehensively traverse the non-chip component parameter matrix Part_data based on the electrical network name to screen out other non-chip components whose pins are connected to the electrical network; S4. For each other non-chip device screened out in step S3, recursively execute steps S1 to S3 until the electrical network is determined to be a power supply network; S5. parse the power supply voltage value from the name of the power supply network using a predefined parsing rule, and use the value as the power supply voltage of the target capacitor.

7. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 1, characterized in that: The calculation formula of the voltage derating factor is: Wherein, symbol q represents the voltage derating factor, symbol V1 represents the rated voltage of the capacitor, and symbol V2 represents the supply voltage of the capacitor.

8. The method for automatically checking the electrical safety of a circuit schematic capacitor according to claim 1, characterized in that: The column index of the capacitance parameter matrix Cap_data also includes capacitance type; The method further includes traversing the capacitance parameter matrix Cap_data row by row using capacitance type as an identifier, classifying the capacitance components included in the target circuit schematic into polarized capacitors and non-polarized capacitors, and storing attribute information of the polarized capacitors in a polarized capacitance parameter matrix Cap_polarized; wherein the column index of the polarized capacitance parameter matrix Cap_polarized includes a capacitor bit number, a pin withstand voltage value, a capacitance type, a pin name, and the connected power network; Traversing the polarized capacitor parameter matrix Cap_polarized, determining whether the polarized capacitor is reversely connected based on the positive and negative terminal rules of the polarized capacitor device pin connection network, and outputting the inspection result; The rule for connecting the positive and negative terminals of the polar capacitor device pins to the network is as follows: the positive terminal of the polar capacitor needs to be connected to the high-potential network in the circuit, and the negative terminal needs to be connected to the low-potential network.

9. The automatic inspection method for electrical safety of capacitors in circuit schematics according to claim 8, characterized in that: The polar capacitor includes an electrolytic capacitor, and the non-polar capacitor includes a ceramic capacitor, a film capacitor, a paper dielectric capacitor, a mica capacitor, and a polyester capacitor.

10. An automatic inspection device for the electrical safety of capacitors in circuit schematics, characterized in that: The device includes: A target circuit schematic parsing module is used to parse the target circuit schematic in EDIF200 format and generate a capacitance parameter matrix Cap_data based on the attribute parameters of the capacitor components in the parsing results. The column index of the capacitance parameter matrix Cap_data includes the capacitor bit number and rated voltage, the capacitor pin name, and the name of the electrical network connected to the capacitor pin; a capacitor supply voltage determination module, configured to determine the supply voltage of each capacitor in the capacitor parameter matrix Cap_data, and store the obtained supply voltage of each capacitor in the capacitor supply voltage matrix Cap_power; The voltage derating factor calculation module is used to calculate the voltage derating factor of each capacitor in the capacitor parameter matrix Cap_data based on the capacitor parameter matrix Cap_data and the capacitor supply voltage matrix Cap_power, and mark the capacitor bit number of the capacitor whose calculated voltage derating factor exceeds a preset threshold.

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