Storage device, operating system and control method

Abstract

The embodiment of the invention provides a storage device, an operating system and a control method. The storage device comprises a communication interface, a local bus and a micro-control chip. The communication interface is used for receiving address information. The local bus is coupled to at least one electronic device. The micro-control chip comprises a first interface, a control logic, a driving circuit and a second interface. The first interface is coupled to the local bus. The control logic is coupled between the communication interface and the local bus and determines whether the address information meets a preset condition. When the address information meets the preset condition, the control logic provides the address information to the local bus. When the address information does not meet the preset condition, the control logic generates a control signal. The driving circuit generates a driving signal according to the control signal. The second interface outputs a driving signal for driving a preset device.

Description

Technical Field

[0001] The present invention relates to a storage device, and more particularly to a storage device, an operating system and a control method for performing different operations according to address information. Background Art

[0002] With technological advancements, electronic devices are becoming increasingly diverse and versatile. Most electronic devices have at least one storage device for storing data. Storage devices are categorized as non-volatile and volatile.

[0003] In the e-sports market, computer peripherals are required to have relevant e-sports lighting effect control. Summary of the Invention

[0004] One embodiment of the present invention provides a storage device, comprising a communication interface, a memory chip, a local bus, and a microcontroller chip. The communication interface is used to receive address information. The memory chip is used to store data. The local bus is coupled to at least one electronic device. The microcontroller chip comprises a first interface, a control logic, a drive circuit, and a second interface. The first interface is coupled to the local bus. The control logic is coupled between the communication interface and the local bus, and determines whether the address information meets a preset condition. When the address information meets the preset condition, the control logic provides the address information to the local bus. When the address information does not meet the preset condition, the control logic generates a control signal. The drive circuit generates a drive signal based on the control signal. The second interface outputs a drive signal to drive a preset device.

[0005] Another embodiment of the present invention provides an operating system, including a control circuit and a storage device. The control circuit sends an address information. The storage device is coupled to the control circuit and includes a communication interface, a memory chip, a local bus and a microcontroller chip. The communication interface is used to receive the address information. The memory chip is used to store data. The local bus is coupled to at least one electronic device. The microcontroller chip includes a first interface, a control logic, a drive circuit and a second interface. The first interface is coupled to the local bus. The control logic is coupled between the communication interface and the local bus, and determines whether the address information meets a preset condition. When the address information meets the preset condition, the control logic provides the address information to the local bus. When the address information does not meet the preset condition, the control logic generates a control signal. The drive circuit generates a drive signal based on the control signal. The second interface outputs a drive signal to drive a light-emitting device.

[0006] Another embodiment of the present invention provides a control method for a storage device. The control method includes receiving address information; when the address information meets a first preset condition, providing the address information to a local bus, the local bus being coupled to an electronic device, and the electronic device providing a response signal; driving a fan device based on the response signal; when the address information meets a second preset condition, reading an internal storage circuit and outputting basic data stored in the internal storage circuit; and when the address information meets a third preset condition, driving a light-emitting device.

[0007] The control method of the present invention can be implemented via the microcontroller chip and storage device of the present invention, which are hardware or software capable of executing predetermined functions. Alternatively, the control method can be implemented via program code stored on a recording medium and combined with predetermined hardware. When the program code is loaded and executed by an electronic device, processor, computer, or machine, the electronic device, processor, computer, or machine becomes the microcontroller chip and storage device for implementing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 Schematic diagram of the operating system of the present invention.

[0009] Figure 2A Schematic diagram of the control logic of the present invention.

[0010] Figure 2B FIG. 2 is another action diagram of the control logic of the present invention.

[0011] Figure 2C FIG. 2 is another action diagram of the control logic of the present invention.

[0012] Figure 2D FIG. 2 is another action diagram of the control logic of the present invention.

[0013] Figure 3 Schematic diagram of the control method of the present invention.

[0014] [Explanation of symbols]

[0015] 100: Operating System

[0016] 110: Control circuit

[0017] 111: Central Processing Unit

[0018] 112: Platform path controller

[0019] 120: Storage device

[0020] 130, 140: bus

[0021] 121: Storage module

[0022] 122: Microcontroller chip

[0023] 123: Local bus

[0024] 124, 125: Preset device

[0025] 126: Control Logic

[0026] 127, 128: driving circuit

[0027] 129: Storage Circuit

[0028] ADR: Address Information

[0029] E_1~E_N:Electronic devices

[0030] M_1, M_2: memory chips

[0031] C_1~C_4: Communication interface

[0032] ACK: reply signal

[0033] SD_1, SD_2: driving signals

[0034] SPD: Basic Data

[0035] SC_1, SC_2: control signals

[0036] S311~S318: Steps DETAILED DESCRIPTION

[0037] To make the objectives, features, and advantages of the present invention more readily apparent, the following examples are provided and described in detail with reference to the accompanying drawings. This specification provides various examples to illustrate the technical features of various embodiments of the present invention. The configurations of the various components in the examples are for illustrative purposes only and are not intended to limit the present invention. Furthermore, some duplication of reference numerals in the figures of the examples is for simplification and does not imply a correlation between the different examples.

[0038] Figure 1 Schematic diagram of an operating system according to the present invention. As shown, operating system 100 includes a control circuit 110 and a storage device 120. The present invention is not limited to the type of operating system 100. In one embodiment, operating system 100 is a motherboard. In this example, control circuit 110 and storage device 120 are disposed on the motherboard. In some embodiments, the motherboard has a slot for inserting storage device 120.

[0039] The control circuit 110 includes a central processing unit (CPU) 111. The CPU 111 writes data to the storage device 120 or reads data stored in the storage device 120 via a bus 130. In one embodiment, the bus 130 is a dynamic random access memory (DRAM) bus.

[0040] In other embodiments, the control circuit 110 further includes a platform path controller (PCH) 112. The platform path controller 112 sends address information ADR to the storage device 120 via a bus 140. In one embodiment, the CPU 111 provides the address information ADR to the platform path controller 112 and instructs the platform path controller 112 to output the address information ADR to the storage device 120. The present invention is not limited to the type of bus 140. In one embodiment, the bus 140 is an Improved Inter-Integrated Circuit (I3C) bus.

[0041] The storage device 120 includes a communication interface C_1, a storage module 121, a microcontroller chip 122, a local bus 123, electronic devices E_1-E_N, and a default device 124. The present invention does not limit the type of storage device 120. In one embodiment, the storage device 120 is a dual in-line memory module (DIMM). In some embodiments, the storage device 120 includes a printed circuit board (not shown). The storage module 121, microcontroller chip 122, local bus 123, electronic devices E_1-E_N, and default device 124 are electrically connected to the printed circuit board. In this example, the printed circuit board has a gold finger structure for insertion into a slot on a motherboard.

[0042] In other embodiments, the default device 124 is an external device. In this case, the default device 124 and the storage device 120 are independent. The default device 124 may be secured to the storage device 120 via a fixture. The fixture may be integrated into the storage device 120 or the default device 124. In some embodiments, the storage device 120 has a connection port (such as communication port C_3) for electrically connecting to the default device 124.

[0043] The communication interface C_1 is coupled between the bus 140 and the microcontroller 122 to transmit the address information ADR to the microcontroller 122. The present invention does not limit the type of the communication interface C_1. In one embodiment, the communication interface C_1 is a serial interface, such as an I3C interface.

[0044] The memory module 121 includes memory chips M_1 and M_2. The memory chips M_1 and M_2 store data from the CPU 111 or output data to the CPU 111 via the bus 130. The present invention does not limit the number of memory chips. In other embodiments, the memory module 121 has more or fewer memory chips. The present invention also does not limit the types of memory chips M_1 and M_2. In one embodiment, the memory chips M_1 and M_2 are volatile memories, such as dynamic random access memory (DRAM).

[0045] The microcontroller 122 receives address information ADR via the communication interface C_1 and operates based on the address information ADR. For example, when the address information ADR meets a first predetermined condition, the microcontroller 122 enters a first operating mode. In the first operating mode, the microcontroller 122 provides the address information ADR to the local bus 123. When the address information ADR does not meet the first predetermined condition, the microcontroller 122 enters a first driving mode. In the first driving mode, the microcontroller 122 drives the preset device 124.

[0046] In other embodiments, when the address information ADR meets a second predetermined condition, the microcontroller 122 enters a second operating mode. In the second operating mode, the microcontroller 122 outputs basic data to the control circuit 110. The basic data is stored in the microcontroller 122. In some embodiments, the basic data may include timing parameters of the storage device 120, a manufacturer's serial number, and other useful information.

[0047] Local bus 123 couples between microcontroller chip 122 and electronic devices E_1-E_N to transmit address information ADR to electronic devices E_1-E_N. The present invention does not limit the type of local bus 123. The type of local bus 123 may be the same as or different from the type of bus 140. In one embodiment, local bus 123 is an I3C bus.

[0048] Electronic devices E_1-E_N are coupled to a local bus 123 for receiving address information ADR. Each of electronic devices E_1-E_N has a preset address. When the address information ADR matches the preset address of one of electronic devices E_1-E_N, the corresponding electronic device provides a response signal ACK to the local bus 123. The present invention is not limited to the types of electronic devices E_1-E_N. In one embodiment, at least one of electronic devices E_1-E_N is a data buffer, a register clock driver (RCD), a temperature sensor, or a power management integrated circuit (PMIC).

[0049] The preset device 124 is coupled to the microcontroller chip 122 and operates according to the drive signal SD_1. The present invention does not limit the type of the preset device 124. In one possible embodiment, the preset device 124 is a light-emitting device. The preset device 124 presents a lighting effect according to the drive signal SD_1. In one possible embodiment, the preset device 124 includes a plurality of light-emitting elements, such as light-emitting diodes (LEDs). In some embodiments, the drive signal SD_1 includes a pulse width modulation component (PWM) and a common component (COM). In another possible embodiment, the preset device 124 is a heat dissipation device, such as a fan. In this example, the preset device 124 provides a heat dissipation effect according to the drive signal SD_1.

[0050] The present invention does not limit the number of preset devices. In other embodiments, the storage device 120 further includes a preset device 125. The preset device 125 operates according to the drive signal SD_2. The present invention does not limit the type of the preset device 125. In one possible embodiment, the type of the preset device 125 is the same as or different from the type of the preset device 124. In some embodiments, the preset device 124 is a light-emitting device and the preset device 125 is a heat dissipation device. In this example, when the address information ADR meets a first drive condition, the microcontroller chip 122 operates in a first drive mode. In the first drive mode, the microcontroller chip 122 generates a drive signal SD_1 to drive the preset device 124. When the address information ADR meets a second drive condition, the microcontroller chip 122 operates in a second drive mode. In the second drive mode, the microcontroller chip 122 generates a drive signal SD_2 to drive the preset device 125.

[0051] In some embodiments, the microcontroller 122 receives the response signal ACK via the communication interface C_2 and outputs the response signal ACK to the platform path controller 112 via the communication interface C_1 and the bus 140. The CPU 111 takes action based on the response signal ACK, such as changing the address information ADR. In another embodiment, the microcontroller 122 adjusts at least one of the drive signals SD_1 and SD_2 based on the response signal ACK. For example, assume that the microcontroller 122 detects, based on the response signal ACK, that the temperature of the operating system 100 exceeds a threshold. In this example, the microcontroller 122 generates the drive signal SD_2 to adjust the preset device 125, such as increasing the fan speed. In other embodiments, the microcontroller 122 may generate the drive signal SD_1 based on the response signal ACK to request the preset device 124 to display a different lighting effect. In this example, the user can understand the operating status of the operating system 100 based on the lighting effect of the preset device 124.

[0052] In this embodiment, the microcontroller chip 122 includes a control logic 126, a driver circuit 127, and communication interfaces C_2 and C_3. The control logic 126 is coupled between communication interfaces C_1 and C_2 and operates based on address information ADR. When the address information ADR meets a first predetermined condition, the control logic 126 provides the address information ADR to the local bus 123 via the communication interface C_2. The present invention is not limited to the type of communication interface C_2. In one embodiment, the communication interface C_2 is a serial interface. In some embodiments, the control logic 126 further receives a response signal ACK via the communication interface C_2.

[0053] In other embodiments, the microcontroller chip 122 further includes a storage circuit 129. The storage circuit 129 is used to store basic data SPD. In this example, when the address information ADR meets a second predetermined condition, the control logic 126 accesses the storage circuit 129 and outputs the basic data SPD to the communication interface C_1 via the communication interface C_1. The present invention is not limited to the type of storage circuit 129. In one embodiment, the storage circuit 129 is a non-volatile memory (NVM).

[0054] In some embodiments, when the address information ADR meets a first driving condition, the control logic 126 generates a control signal SC_1. The driver circuit 127 generates a drive signal SD_1 based on the control signal SC_1. In other embodiments, when the address information ADR meets a second driving condition, the control logic 126 generates a control signal SC_2. The present invention is not limited to the architecture of the control logic 126. Any circuit architecture that can recognize the address information ADR can be used as the control logic 126. In other embodiments, the control logic 126 generates the control signals SC_1 and SC_2 based on the response signal ACK.

[0055] Communication interface C_3 is coupled between driver circuit 127 and preset device 124 to provide a drive signal SD_1 to preset device 124. Preset device 124 operates based on drive signal SD_1, such as providing a lighting effect. In some embodiments, preset device 124 is independent of microcontroller chip 122. Preset device 124 may be fixed within storage device 120. In another embodiment, preset device 124 is a removable device. In this case, a user can install and remove preset device 124 from storage device 120.

[0056] In other embodiments, the microcontroller chip 122 further includes a driver circuit 128 and a communication interface C_4. The driver circuit 128 generates a drive signal SD_2 based on the control signal SC_2. The communication interface C_4 is coupled between the driver circuit 128 and the preset device 125 to provide the drive signal SD_2 to the preset device 125. The preset device 125 operates based on the drive signal SD_2, such as to provide a heat dissipation effect.

[0057] Because microcontroller 122 controls the operations of electronic devices E_1-E_N and default devices 124 and 125 based on address information ADR, storage device 120 only needs to utilize a single bus (e.g., 140) to receive address information ADR. This reduces component costs and printed circuit board space for storage device 120. Furthermore, microcontroller 122 adjusts the function of default device 124 or 125 based on a response signal generated by one of electronic devices E_1-E_N. Therefore, default devices 124 and 125 can respond immediately, such as increasing fan speed to reduce the temperature of storage device 120.

[0058] Figures 2A to 2D This is a schematic diagram of the operation of the control logic 126 of the present invention. Figure 2AWhen the address information ADR is 0x31, the control logic 126 provides the address information ADR to the local bus 123. Since the default address information of electronic device E_1 is equal to the address information ADR, electronic device E_1 provides a response signal ACK. At this time, since the default address information of electronic device E_2 (0x41) is not equal to the address information ADR, electronic device E_2 does not respond to the address information ADR. In some embodiments, the control logic 126 outputs the response signal ACK. In another embodiment, the control logic 126 generates the control signal SC_1 or SC_2 based on the response signal ACK.

[0059] exist Figure 2B In the example, the address information ADR is 0x51. Since the address information ADR is equal to the preset address information of the storage circuit 129, the control logic 126 accesses the storage circuit 129 to read the basic data SPD. In one embodiment, the control logic 126 outputs the basic data SPD to the control circuit 110.

[0060] exist Figure 2C In FIG, the address information ADR is a value of 0x71. Since the address information ADR is equal to the preset address information of the driving circuit 127, the control logic 126 generates the control signal SC_1. The driving circuit 127 generates the driving signal SD_1 according to the control signal SC_1.

[0061] exist Figure 2D In this example, the address information ADR is the value 0x21. Because the address information ADR does not match the default address information of the storage circuit 129 and the driver circuit 127, the control logic 126 provides the address information ADR to the local bus 123. In this example, because the address information ADR does not match the default address information of the electronic devices E_1 and E_2, neither electronic devices E_1 nor E_2 provides a response signal. At this point, the control logic 126 may provide a negative acknowledgement signal NACK to the control circuit 110. In some embodiments, because the address information ADR does not match the default address information of the electronic devices E_1 and E_2, the control logic 126 does not provide the address information ADR to the local bus 123 and provides a negative acknowledgement signal NACK to the control circuit 110.

[0062] Figure 3Schematic diagram of the control method of the present invention. The control method of the present invention is applicable to a storage device and can be stored in program code. When the program code is loaded and executed by a machine, the machine becomes a storage device and microcontroller chip for implementing the present invention. First, address information is received (step S311). In one possible embodiment, the address information is generated by a central processing unit. In this example, the central processing unit outputs the address information to the storage device via a platform path controller. In some embodiments, the storage device uses an I3C interface to receive the address information.

[0063] Next, a determination is made as to whether the address information meets a first preset condition (step S312). When the address information meets the first preset condition, the address information is provided to a local bus (step S313). In one embodiment, the local bus is coupled to at least one electronic device. When the address information meets the address information of the electronic device itself, the electronic device provides a response signal. In one embodiment, step S313 provides the response signal to a central processing unit. In another embodiment, step S313 drives a fan device based on the response signal.

[0064] If the address information does not meet the first preset condition, a determination is made as to whether the address information meets a second preset condition (step S314). If the address information meets the second preset condition, an internal storage circuit is read (step S315). In one embodiment, the internal storage circuit is disposed within a microcontroller chip. In other embodiments, step S315 further outputs basic data stored in the internal storage circuit to the central processing unit.

[0065] If the address information does not meet the second preset condition, a determination is made as to whether the address information meets a third preset condition (step S316). If the address information meets the third preset condition, a light-emitting device is driven to emit light (step S317). If the address information does not meet the third preset condition, a negative acknowledgement signal is issued (step S318). In one embodiment, step S318 outputs the negative acknowledgement signal to the central processing unit.

[0066] It should be understood that when an element is referred to as being “coupled” to another element, it can be directly coupled or connected to the other element, or have other elements intervening therebetween. Conversely, if an element is “connected” to another element, there will be no other elements intervening therebetween.

[0067] The control method of the present invention, or the preset form or part thereof, can exist in the form of program code. The program code can be stored on a physical medium, such as a floppy disk, a CD, a hard disk, or any other machine-readable (such as computer-readable) storage medium, or a computer program product that is not limited to an external form, wherein when the program code is loaded and executed by a machine, such as a computer, the machine becomes used to participate in the microcontroller chip and storage device of the present invention. The program code can also be transmitted through some transmission medium, such as a wire or cable, an optical fiber, or any other transmission mode, wherein when the program code is received, loaded and executed by a machine, such as a computer, the machine becomes used to participate in the microcontroller chip and storage device of the present invention. When implemented in a general-purpose processing unit, the program code combines with the processing unit to provide a unique device that operates similarly to the application preset logic circuit.

[0068] Unless otherwise defined, all terms used herein (including technical and scientific terms) are those generally understood by those skilled in the art. In addition, unless expressly stated otherwise, definitions of terms in general dictionaries should be interpreted as consistent with their meanings in articles in the relevant technical field and should not be interpreted as ideal or overly formal. Although terms such as "first" and "second" may be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. In the scope of the patent application, terms such as "first" and "second" are used as labels and are not intended to impose numerical requirements on their objects.

[0069] While the present invention has been disclosed above with reference to preferred embodiments, these are not intended to limit the present invention. Any skilled artisan may make modifications and variations without departing from the spirit and scope of the present invention. For example, the systems, devices, or methods described in the embodiments of the present invention may be implemented in hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be determined by the claims.

Claims

1. A storage device, characterized in that: include: A communication interface for receiving address information; a memory chip for storing data; a local bus coupled to at least one electronic device; as well as A microcontroller chip comprising: a first interface coupled to the local bus; a control logic coupled between the communication interface and the local bus, and configured to determine whether the address information meets a first preset condition, provide the address information to the local bus when the address information meets the first preset condition, and generate a first control signal when the address information does not meet the first preset condition; a first driving circuit, generating a first driving signal according to the first control signal; and A second interface outputs the first driving signal to drive a first preset device.

2. The storage device according to claim 1, wherein The first preset device is a light-emitting device, and the light-emitting device presents a lighting effect according to the first driving signal.

3. The storage device according to claim 1, wherein: The first preset device is a heat dissipation device, and the heat dissipation device operates according to the first driving signal.

4. The storage device according to claim 1, wherein When the address information meets the first preset condition, the control logic provides the address information to the electronic device via the local bus and receives a response signal from the electronic device. The control logic generates the first control signal according to the response signal.

5. The storage device according to claim 1, wherein: Also includes: a second driving circuit generating a second driving signal according to a second control signal; and a third interface, outputting the second driving signal to drive a second preset device, When the address information meets the first preset condition, the control logic provides the address information to the electronic device via the local bus and receives a response signal from the electronic device. The control logic generates the second control signal according to the response signal.

6. The storage device according to claim 1, wherein: Also includes: a printed circuit board electrically connected to the memory chip, the microcontroller chip, and the first preset device; The first preset device is independent of the microcontroller chip.

7. An operating system, characterized in that: include: a control circuit, sending out address information; as well as a storage device coupled to the control circuit and comprising: a communication interface for receiving the address information; a memory chip for storing data; a local bus coupled to at least one electronic device; and A microcontroller chip comprising: a first interface coupled to the local bus; a control logic coupled between the communication interface and the local bus, and configured to determine whether the address information meets a first preset condition, provide the address information to the local bus when the address information meets the first preset condition, and generate a first control signal when the address information does not meet the first preset condition; a first driving circuit, generating a first driving signal according to the first control signal; and A second interface outputs the first driving signal to drive a light emitting device.

8. The operating system according to claim 7, wherein: The control circuit comprises: a platform path controller, providing the address information to the communication interface; and A central processing unit instructs the platform path controller to issue the address information and access the memory chip.

9. The operating system according to claim 7, wherein: The storage device further comprises: a second driving circuit generating a second driving signal according to a second control signal; and a third interface, outputting the second driving signal to drive a second preset device, When the address information meets the first preset condition, the control logic provides the address information to the electronic device via the local bus and receives a response signal from the electronic device. The control logic generates the second control signal according to the response signal.

10. A control method, characterized in that: Suitable for use in a storage device, and comprising: receiving address information; When the address information meets a first preset condition, providing the address information to a local bus, the local bus is coupled to an electronic device, and the electronic device provides a response signal; driving a fan device according to the reply signal; When the address information meets a second preset condition, reading an internal storage circuit and outputting basic data stored in the internal storage circuit; and When the address information meets a third preset condition, a light emitting device is driven.

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