Operational amplifier and electronic equipment

Abstract

The invention provides an operational amplifier and electronic equipment. The operational amplifier comprises a reference current source, a bias circuit, a differential pair input stage, an amplification stage and an output stage, the reference current source starts to work after the voltage between the positive power supply and the negative power supply is greater than a specified voltage value, and the reference current source is used for providing a reference voltage for the operational amplifier; the reference voltage is input to the biasing circuit, and the biasing circuit is used for outputting stable output current based on the stable reference voltage; the differential pair input stage is the input stage of the operational amplifier, and comprises a symmetrical NPN tube and VPNP tube structure; the amplification stage is an intermediate stage of the operational amplifier, and a circuit of the amplification stage comprises symmetrical structures of an NPN tube and a PNP tube; the circuit of the output stage comprises an NPN tube and a PNP tube interdigitated structure. In the mode, the structure that the NPN tube and the PNP tube are completely symmetrical is adopted, the time delay effect can be reduced, and the slew rate can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of operational amplifiers, and in particular to an operational amplifier and electronic equipment. Background Art

[0002] Currently, the existing operational amplifier power supply current power consumption is large, the slew rate is low, and the N-substrate bipolar process used for wafer taping is relatively expensive, resulting in a high input offset voltage. Summary of the Invention

[0003] In light of this, the present invention aims to provide an operational amplifier and electronic device, wherein the circuit utilizes a completely symmetrical structure of NPN and PNP transistors. N represents an N-type semiconductor injection, and P represents a P-type semiconductor injection. This reduces time delay effects and improves slew rate. Laser trimming of SiCr (silicon chromium) thin-film resistors effectively reduces input offset voltage.

[0004] In the first aspect, an embodiment of the present invention provides an operational amplifier, which includes: a reference current source, a bias circuit, a differential pair input stage, an amplification stage and an output stage; the reference current source starts working after the voltage between the positive power supply and the negative power supply is greater than a specified voltage value, and the reference current source is used to provide a reference voltage for the operational amplifier; the reference voltage is input to the bias circuit, and the bias circuit is used to output a stable output current based on a stable reference voltage; the differential pair input stage is the input stage of the operational amplifier, and the differential pair input stage includes: a symmetrical NPN tube and VPNP tube structure; the amplification stage is the intermediate stage of the operational amplifier, and the circuit of the amplification stage includes: a symmetrical NPN tube and PNP tube structure; the circuit of the output stage includes: an NPN tube and a PNP tube interdigital structure.

[0005] In an optional embodiment of the present application, the above-mentioned reference current source includes: a sixth transistor, a seventh transistor, a first resistor and a voltage regulator.

[0006] In an optional embodiment of the present application, the bias circuit includes: a vertically symmetrical Wilson current source structure.

[0007] In an optional embodiment of the present application, the above-mentioned output stage circuit includes: a protection circuit.

[0008] In an optional embodiment of the present application, the tape-out of the above-mentioned operational amplifier adopts a 36V P-substrate bipolar process and a double-layer metal design, and the tape-out layout includes: NPN tube, vertical VPNP tube, Zener diode, SiCr thin film resistor, base resistor and SiN capacitor.

[0009] In an optional embodiment of the present application, the NPN tube and the VPNP tube in the above-mentioned tape-out circuit are of a vertically symmetrical structure; the area of the VPNP tube is increased so that the NPN tube and the VPNP tube have the same amplification factor.

[0010] In an optional embodiment of the present application, the above-mentioned SiCr thin film resistor row is used to reduce the input offset voltage through laser trimming.

[0011] In an optional embodiment of the present application, during laser trimming, the resistance value of the SiCr thin film resistor is set to an initial value less than a preset threshold, and the shape of the SiCr thin film resistor is set to an L-shape; the resistance value of the SiCr thin film resistor is increased from the initial value.

[0012] In an optional embodiment of the present application, after each increase in the resistance value of the SiCr thin film resistor, it is tested whether the offset voltage meets the preset condition; if the offset voltage does not meet the preset condition, the resistance value of the SiCr thin film resistor continues to be increased until the offset voltage meets the preset condition; if the offset voltage meets the preset condition, the increase in the resistance value of the SiCr thin film resistor is stopped.

[0013] In a second aspect, an embodiment of the present invention further provides an electronic device, the electronic device including: the above-mentioned operational amplifier.

[0014] The embodiments of the present invention bring the following beneficial effects:

[0015] An embodiment of the present invention provides an operational amplifier and electronic device. A reference current source begins operating when the voltage between the positive and negative power supplies exceeds a specified voltage value. The reference current source is used to provide a reference voltage for the operational amplifier. The reference voltage is input to a bias circuit, which is used to output a stable output current based on the stable reference voltage. The differential pair input stage is the input stage of the operational amplifier and includes a symmetrical NPN and VPN transistor structure. The amplifier stage is the intermediate stage of the operational amplifier and includes a symmetrical NPN and PNP transistor structure. The output stage includes an interdigitated NPN and PNP transistor structure. In this approach, the fully symmetrical structure of the NPN and PNP transistors can reduce time delay effects and improve slew rate.

[0016] Other features and advantages of the present disclosure will be set forth in the following description, or some features and advantages may be inferred or unambiguously determined from the description, or may be learned by practicing the above-mentioned technology of the present disclosure.

[0017] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 A schematic structural diagram of an operational amplifier provided in an embodiment of the present invention;

[0020] Figure 2 A schematic diagram of the principle of an operational amplifier provided by an embodiment of the present invention;

[0021] Figure 3 A circuit diagram of a current source of an operational amplifier provided by an embodiment of the present invention;

[0022] Figure 4 A schematic diagram of simulation results of gain, unity gain bandwidth, and phase margin of an operational amplifier provided in an embodiment of the present invention;

[0023] Figure 5 A schematic diagram of a common-mode rejection ratio simulation result of an operational amplifier provided in an embodiment of the present invention;

[0024] Figure 6 A schematic diagram of a slew rate simulation result of an operational amplifier provided by an embodiment of the present invention;

[0025] Figure 7 A schematic diagram of a cross-section of an NPN transistor provided in an embodiment of the present invention;

[0026] Figure 8 A schematic diagram of a VPNP pipe cross section provided in an embodiment of the present invention;

[0027] Figure 9 A schematic diagram of an overall layout of a tape-out provided by an embodiment of the present invention;

[0028] Figure 10 A schematic diagram of a simulation curve of input offset voltage changing with trimming resistance value provided by an embodiment of the present invention;

[0029] Figure 11 A schematic diagram of a resistor trimming layout provided by an embodiment of the present invention;

[0030] Figure 12 A schematic diagram of a statistical distribution of input offset voltage before adjustment provided by an embodiment of the present invention;

[0031] Figure 13A schematic diagram of the statistical distribution of a trimmed input offset voltage provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0033] Currently, the existing operational amplifier power supply current power consumption is large, the slew rate is low, and the N-substrate bipolar process used for wafer taping is relatively expensive, resulting in a high input offset voltage.

[0034] Based on this, an operational amplifier and electronic device provided by an embodiment of the present invention specifically provides a precision, high-speed quad operational amplifier. The circuit adopts a completely symmetrical structure of NPN and PNP tubes, which can reduce the time delay effect and improve the slew rate; after laser trimming of the SiCr thin film resistor, the input offset voltage can be effectively reduced.

[0035] To facilitate understanding of this embodiment, an operational amplifier disclosed in an embodiment of the present invention is first introduced in detail.

[0036] Example 1:

[0037] The embodiment of the present invention provides an operational amplifier, see Figure 1 The schematic diagram of the structure of an operational amplifier shown in the figure includes: a reference current source, a bias circuit, a differential pair input stage, an amplifier stage and an output stage; the reference current source starts to operate after the voltage between the positive power supply and the negative power supply is greater than a specified voltage value, and the reference current source is used to provide a reference voltage for the operational amplifier; the reference voltage is input to the bias circuit, and the bias circuit is used to output a stable output current based on the stable reference voltage; the differential pair input stage is the input stage of the operational amplifier, and the differential pair input stage includes: a symmetrical NPN transistor and VPNP transistor structure; the amplifier stage is the intermediate stage of the operational amplifier, and the amplifier stage circuit includes: a symmetrical NPN transistor and PNP transistor structure; the output stage circuit includes: an NPN transistor and a PNP transistor interdigital structure.

[0038] See also Figure 2 The schematic diagram of an operational amplifier shown in FIG. Figure 3 The circuit diagram of a current source of an operational amplifier is shown in FIG. Figure 3 Shown is Figure 2 Detailed circuit of I1, I2, I3, and I4 current sources.

[0039] like Figure 2 As shown, the operational amplifier includes: a reference current source, a bias circuit, a differential pair input stage, an amplification stage, and an output stage.

[0040] Among them, such as Figure 3 As shown, the reference current source includes a sixth transistor Q6, a seventh transistor Q7, a first resistor R1, and a voltage regulator D0. The quasi-current source operates when the voltage between the positive and negative power supplies is greater than approximately 7V (i.e., the specified voltage value can be 7V), providing a regulated 6.5V reference voltage to the operational amplifier.

[0041] like Figure 2 As shown, a reference voltage is input to the bias circuit. Because the voltage regulator circuit maintains a constant current over a wide voltage operating range, the bias current output is also constant over the entire voltage operating range. The bias circuit includes a vertically symmetrical Wilson current source structure. This structure provides a more stable bias circuit.

[0042] like Figure 2 As shown, the differential pair input stage is the op amp input stage, using a symmetrical NPN and VPNP transistor structure to ensure the op amp's accuracy. The amplifier stage is the op amp's intermediate stage, and the circuit uses a completely symmetrical NPN and PNP transistor structure to achieve high CMRR (Common Mode Rejection Ratio) and high-speed performance, resulting in a high slew rate. The complementary output stage circuit uses a large-area interdigitated structure for the NPN and PNP transistors, which improves the circuit's load capacity. The multiplication circuit also eliminates crossover distortion.

[0043] In some embodiments, the output stage circuit includes: a protection circuit. Figure 2 As shown, this embodiment can also add a protection circuit at the output stage to prevent damage caused by excessive input stage signals or output short circuit.

[0044] See also Figure 4 Schematic diagram of the simulation results of gain, unity gain bandwidth and phase margin of an operational amplifier shown in FIG. Figure 5 The schematic diagram and simulation results of the common mode rejection ratio of an operational amplifier are shown. Figure 6 The diagram shows the slew rate simulation results of an operational amplifier.

[0045] in, Figure 4 1 shows the simulation results of the gain (86 dB), unity gain bandwidth (28 MHz), and phase margin (57 degrees) of the operational amplifier provided in this embodiment. Figure 5: shows the result of the common mode rejection ratio simulation (100dB) of the operational amplifier provided in this embodiment, Figure 6 The result of the slew rate simulation (160V / us) of the operational amplifier provided in this embodiment is shown.

[0046] An embodiment of the present invention provides an operational amplifier. A reference current source begins operating when the voltage between the positive and negative power supplies exceeds a specified voltage value. The reference current source is used to provide a reference voltage for the operational amplifier. The reference voltage is input to a bias circuit, which is used to output a stable output current based on the stable reference voltage. The differential pair input stage is the input stage of the operational amplifier and includes a symmetrical NPN and VPNP transistor structure. The amplifier stage is the intermediate stage of the operational amplifier and includes a symmetrical NPN and PNP transistor structure. The output stage includes an interdigitated NPN and PNP transistor structure. This approach uses a completely symmetrical structure of NPN and PNP transistors to reduce time delay effects and improve slew rate.

[0047] Example 2:

[0048] Based on the aforementioned embodiments, embodiments of the present invention provide another operational amplifier, implemented on the basis of the aforementioned embodiments, with a focus on the tape-out of the operational amplifier. In some embodiments, the tape-out of the operational amplifier utilizes a 36V P-substrate bipolar process and a double-layer metal design. The tape-out layout includes an NPN transistor, a vertical VPNP transistor, a Zener diode, a SiCr thin-film resistor, a base resistor, and a SiN capacitor.

[0049] The tape-out in this embodiment can adopt a 2um 36V P-substrate bipolar process and a double-layer metal design. The layout mainly includes an NPN transistor, a vertical VPNP transistor, a Zener diode, a SiCr thin film resistor, a base resistor, and a SiN capacitor.

[0050] In some embodiments, the NPN transistor and the VPNP transistor in the circuit of the above-mentioned tape-out are of a vertically symmetrical structure; the area of the VPNP transistor is increased so that the NPN transistor and the VPNP transistor have the same amplification factor.

[0051] Since the NPN transistor and VPNP transistor in the circuit have a vertically symmetrical structure, and the amplification factor β of the VPNP transistor is usually smaller than that of the NPN transistor, it is necessary to make the amplification factor β values of the NPN transistor and the VPNP transistor the same. In this embodiment, the area of the VPNP transistor can be increased by 20% in the layout design to achieve a matching effect with the NPN transistor.

[0052] Among them, the cross-section of NPN tube and VPNP tube can be seen in Figure 7 The schematic diagram of an NPN tube cross section shown in Figure 8The schematic diagram of a VPNP tube cross section is shown in Figure 1. The overall layout design of the tape-out can be found in Figure 1. Figure 9 A schematic diagram of the overall layout of a tape-out is shown.

[0053] Example 3:

[0054] Based on the above embodiments, another embodiment of the present invention provides another operational amplifier, which is implemented on the basis of the above embodiments, focusing on the method of laser trimming thin film resistors. In some embodiments, the above SiCr thin film resistors are used to reduce input offset voltage through laser trimming.

[0055] After the manufacturer's tape-out, the input offset voltage exceeded the value, requiring laser trimming of the SiCr thin film resistors inside the chip.

[0056] In some embodiments, during laser trimming, the resistance value of the SiCr thin film resistor is set to an initial value less than a preset threshold, and the shape of the SiCr thin film resistor is set to an L-shape; and the resistance value of the SiCr thin film resistor is increased from the initial value.

[0057] See also Figure 10 The schematic diagram of a simulation curve of input offset voltage changing with trimming resistance value is shown in FIG. Figure 10 The horizontal axis in is the length variable of the resistor. Figure 10 As shown in the figure, simulations show that gradually increasing the value of two resistors changes the input offset voltage from negative to positive. Since laser trimming can only increase the resistance value (because resistance is inversely proportional to cross-sectional area), the initial resistance should be set within a reasonable range when simulating the schematic, generally using a smaller resistance value and an L-shaped shape.

[0058] In some embodiments, after each increase in the resistance value of the SiCr thin film resistor, whether the offset voltage meets a preset condition is tested; if the offset voltage does not meet the preset condition, the resistance value of the SiCr thin film resistor continues to be increased until the offset voltage meets the preset condition; if the offset voltage meets the preset condition, the increase in the resistance value of the SiCr thin film resistor stops.

[0059] The instrument finds the position of the trimming resistor through the cross coordinates and gradually makes small adjustments. Each time it is adjusted, a test is performed. Generally, after several iterations of adjustment, the offset voltage can meet the specification requirements of the preset conditions. The shape of the trimming resistor can be seen in Figure 11 A schematic diagram of a trimming resistor layout is shown.

[0060] After the circuit is printed and taped out, the test results are shown in Table 1:

[0061] Table 1

[0062]

[0063]

[0064] The statistical distribution of the input offset voltage before thin film resistor trimming (taking the absolute value of the measurement results of 30 chips) can be found in Figure 12 The statistical distribution of the input offset voltage before trimming is shown in Figure 1. The statistical distribution of the input offset voltage after thin film resistor trimming (taking the absolute value of the measurement results of 30 chips) can be seen in Figure 1. Figure 13 Figure 2 shows the statistical distribution of input offset voltage after trimming. The specification requires that the offset voltage value should not exceed 0.5mV at room temperature. However, before trimming, at least one of the four chip offset voltages exceeded 0.5mV. After trimming, none of the four chip offset voltages exceeded 0.5mV.

[0065] After tape-out testing and laser trimming of the internal SiCr thin film resistors, all parameters meet the specification requirements and have a higher slew rate and smaller input offset voltage.

[0066] In summary, the operational amplifier and electronic device provided in the embodiments of the present invention adopt a completely symmetrical structure of NPN and PNP transistors, which can reduce the time delay effect and improve the slew rate. The input offset voltage can be effectively reduced after laser trimming of the SiCr thin film resistor.

[0067] Example 4:

[0068] An embodiment of the present invention provides an electronic device, including: the operational amplifier provided by the above embodiment.

[0069] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working process of the electronic device described above can refer to the corresponding process in the aforementioned operational amplifier embodiment, and will not be repeated here.

[0070] In addition, in the description of the embodiments of the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0071] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program code.

[0072] In the description of the present invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0073] Finally, it should be noted that the above embodiments are only specific implementation methods of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above embodiments within the technical scope disclosed by the present invention, or replace some of the technical features therein with equivalents. Such modifications, changes or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. An operational amplifier, characterized in that: The operational amplifier includes: a reference current source, a bias circuit, a differential pair input stage, an amplification stage and an output stage; The reference current source starts to work after the voltage between the positive power supply and the negative power supply is greater than a specified voltage value, and the reference current source is used to provide a reference voltage for the operational amplifier; The reference voltage is input to the bias circuit, and the bias circuit is used to output a stable output current based on the stable reference voltage; The differential pair input stage is the input stage of the operational amplifier, and the differential pair input stage includes: a symmetrical NPN tube and a VPNP tube structure; The amplifier stage is an intermediate stage of the operational amplifier, and the circuit of the amplifier stage includes: a symmetrical structure of an NPN transistor and a PNP transistor; The output stage circuit includes an NPN tube and a PNP tube interdigital structure.

2. The operational amplifier according to claim 1, wherein: The reference current source includes: a sixth transistor, a seventh transistor, a first resistor and a voltage regulator.

3. The operational amplifier according to claim 1, wherein: The bias circuit includes a Wilson current source structure that is symmetrical in both directions.

4. The operational amplifier according to claim 1, wherein: The circuit of the output stage includes: a protection circuit.

5. The operational amplifier according to any one of claims 1 to 4, wherein: The operational amplifier is tape-outed using a 36V P-substrate bipolar process and a double-layer metal design. The tape-out layout includes: an NPN transistor, a vertical VPNP transistor, a Zener diode, a SiCr thin film resistor, a base resistor, and a SiN capacitor.

6. The operational amplifier according to claim 5, wherein: The NPN tube and the VPNP tube in the circuit of the tape-out are of a vertically symmetrical structure; the area of the VPNP tube is increased so that the NPN tube and the VPNP tube have the same amplification factor.

7. The operational amplifier according to claim 6, wherein: The SiCr thin film resistor row is used to reduce input offset voltage through laser trimming.

8. The operational amplifier according to claim 7, wherein: During laser trimming, the resistance value of the SiCr thin film resistor is set to an initial value less than a preset threshold value, and the shape of the SiCr thin film resistor is set to an L-shape; The resistance value of the SiCr thin film resistor is increased from the initial value.

9. The operational amplifier according to claim 8, wherein: After each increase in the resistance value of the SiCr thin film resistor, testing whether the offset voltage meets a preset condition; If the offset voltage does not meet the preset condition, continue to increase the resistance value of the SiCr thin film resistor until the offset voltage meets the preset condition; If the offset voltage satisfies the preset condition, increasing the resistance value of the SiCr thin film resistor is stopped.

10. An electronic device, characterized in that: The electronic device comprises: the operational amplifier according to any one of claims 1 to 9.

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