Schottky diode manufacturing method and Schottky diode

Abstract

The invention belongs to the technical field of semiconductor devices, and particularly relates to a Schottky diode manufacturing method and a Schottky diode. The Schottky diode manufacturing method comprises the steps that an epitaxial layer is formed on a substrate, an initial oxide layer is formed on the upper layer of the epitaxial layer through thermal oxidation, a metal deposition window is etched in the initial oxide layer, and the metal deposition window is formed on the substrate; the metal deposition window extends to the epitaxial layer, a metal layer is deposited in the metal deposition window, annealing treatment is carried out in the atmosphere of mixed gas formed by mixing protective gas and oxygen, the metal layer and part of the epitaxial layer react to form a barrier metal layer, and the volume ratio of the oxygen to the mixed gas is 8%-10%. The metal material reacts with part of the epitaxial layer in a micro-aerobic environment to generate a barrier metal layer, the micro-aerobic environment can induce part of the epitaxial layer material and the metal material to be slightly oxidized, a compact silicon dioxide and metal oxide interface layer is formed, a leakage current path is blocked, the antistatic capacity of the Schottky diode is improved, and the service life of the Schottky diode is prolonged. And the electrostatic discharge capability requirement of over 4kV can be met.

Description

Technical Field

[0001] The present application belongs to the technical field of semiconductor devices, and specifically relates to a method for manufacturing a Schottky diode and a Schottky diode. Background Art

[0002] A Schottky diode utilizes the potential barrier formed by the contact between metal and semiconductor. The forward voltage drop of a Schottky diode is only half that of a PN junction diode, thus reducing power consumption by half. The recovery time of a Schottky diode is significantly shorter than that of a PN junction diode, resulting in a switching speed twice as fast. However, existing Schottky diodes are insensitive to electrostatic discharge (ESD), meaning they have weak anti-static capabilities and are unable to meet ESD requirements exceeding 4kV. Summary of the Invention

[0003] The purpose of this application is to provide a method for manufacturing a Schottky diode and a Schottky diode, so as to improve the antistatic ability of the Schottky diode.

[0004] To achieve the above objectives, the present application provides a method for manufacturing a Schottky diode, comprising:

[0005] forming an epitaxial layer on a substrate;

[0006] Thermally oxidizing the upper layer of the epitaxial layer to form an initial oxide layer;

[0007] Etching a metal deposition window on the initial oxide layer, wherein the metal deposition window extends to the epitaxial layer;

[0008] depositing a metal layer in the metal deposition window;

[0009] Annealing is performed in a mixed gas atmosphere formed by a mixture of protective gas and oxygen, so that the metal layer and a portion of the epitaxial layer react to form a barrier metal layer, wherein the volume ratio of the oxygen to the mixed gas is 8% to 10%.

[0010] Optionally, the annealing treatment includes:

[0011] performing a first annealing to allow the metal layer and a portion of the epitaxial layer to react to form an intermediate barrier layer;

[0012] removing the portion of the metal layer that has not reacted with the epitaxial layer by etching;

[0013] A second annealing is performed to transform the intermediate barrier layer into the barrier metal layer.

[0014] Optionally, at least one of the first annealing and the second annealing is performed in the mixed gas atmosphere.

[0015] Optionally, the epitaxial layer includes an N-doped silicon epitaxial layer, the metal layer includes a NiPt alloy, the intermediate barrier layer includes Ni2Pt2Si, and the barrier metal layer includes NiPtSi.

[0016] Optionally, the thickness of the metal layer is 35±3 nm.

[0017] Optionally, the reaction temperature of the first annealing and the second annealing are both 600±15° C., and the processing time of the first annealing and the second annealing are both 1±0.1 h.

[0018] Optionally, the protective gas includes nitrogen.

[0019] Optionally, the method for manufacturing the Schottky diode includes:

[0020] After forming the initial oxide layer, partially etching the initial oxide layer to form a ring-shaped ion implantation window;

[0021] Injecting boron impurities from the annular ion implantation window to form a P+ diffusion protection ring;

[0022] After forming the P+ diffusion protection ring, the metal deposition window is etched on the initial oxide layer, and the edge of the metal deposition window is located between the inner ring and the outer ring of the annular ion implantation window.

[0023] Optionally, the method for manufacturing the Schottky diode includes:

[0024] After forming the barrier metal layer, an upper electrode is formed on a side of the barrier metal layer away from the substrate, and a lower electrode is formed on a side of the substrate away from the epitaxial layer.

[0025] The present application also provides a Schottky diode, which is manufactured using the above-mentioned Schottky diode manufacturing method.

[0026] The Schottky diode manufacturing method and the Schottky diode disclosed in this application have the following beneficial effects:

[0027] In this application, the method for manufacturing a Schottky diode includes: forming an epitaxial layer on a substrate, thermally oxidizing the upper layer of the epitaxial layer to form an initial oxide layer, etching a metal deposition window in the initial oxide layer, wherein the metal deposition window extends to the epitaxial layer, depositing a metal layer in the metal deposition window, and performing an annealing process in a mixed gas atmosphere formed by a mixture of a protective gas and oxygen, so that the metal layer and a portion of the epitaxial layer react to form a barrier metal layer, wherein the volume ratio of oxygen to the mixed gas is 8% to 10%. In a micro-oxygen environment, the metal material reacts with the portion of the epitaxial layer to form the barrier metal layer. The micro-oxygen environment can induce slight oxidation of the epitaxial layer material and the metal material, forming a dense silicon dioxide and metal oxide interface layer, blocking the leakage current path, and improving the anti-static capability of the Schottky diode, which can meet the electrostatic discharge capability requirements of more than 4kV.

[0028] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by practice of the present application.

[0029] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0031] Figure 1 It is a flow chart of the method for manufacturing a Schottky diode in an embodiment of the present application.

[0032] Figure 2 Schematic diagram of forming an initial oxide layer in an embodiment of the present application.

[0033] Figure 3 This is a schematic diagram of forming a ring-shaped ion implantation window in an embodiment of the present application.

[0034] Figure 4 This is a schematic diagram of forming a P+ diffusion protection ring in an embodiment of the present application.

[0035] Figure 5 It is a schematic diagram of forming a metal deposition window in an embodiment of the present application.

[0036] Figure 6 It is a schematic diagram of forming a metal layer in an embodiment of the present application.

[0037] Figure 7 It is a schematic diagram of forming a barrier metal layer and upper and lower electrodes in an embodiment of the present application.

[0038] Figure 8 Schematic diagram of the relationship between the reaction temperature and ESD parameters of the annealing treatment in the embodiment of the present application.

[0039] Figure 9 Schematic diagram of the relationship between the thickness of the barrier metal layer and the ESD parameters in the embodiment of the present application.

[0040] Description of reference numerals:

[0041] 100, substrate; 200, epitaxial layer;

[0042] 300, initial oxide layer; 301, metal deposition window; 302, annular ion implantation window; 310, patterned oxide layer;

[0043] 400, metal layer; 401, barrier metal layer; 500, P+ diffusion protection ring;

[0044] 610, upper electrode; 620, lower electrode. DETAILED DESCRIPTION

[0045] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0046] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0047] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0048] Example 1

[0049] See also Figures 1 to 7 As shown, the method for manufacturing a Schottky diode in this embodiment includes:

[0050] S100: forming an epitaxial layer 200 on a substrate 100;

[0051] S200: forming an initial oxide layer 300 by thermal oxidation on the epitaxial layer 200;

[0052] S300: etching a metal deposition window 301 on the initial oxide layer 300, wherein the metal deposition window 301 penetrates the initial oxide layer 300 and extends to the epitaxial layer 200;

[0053] S400: depositing a metal layer 400 in the metal deposition window 301;

[0054] S500 : performing annealing in a mixed gas atmosphere formed by a mixture of protective gas and oxygen, so that the metal layer 400 and a portion of the epitaxial layer 200 react to form a barrier metal layer 401 , wherein the volume ratio of oxygen to the mixed gas is 8% to 10%.

[0055] The substrate 100 can be made of, but is not limited to, silicon (Si). The substrate 100 can also be made of materials such as silicon carbide (SiC), gallium nitride (GaN), germanium (Ge), and gallium arsenide (GaAs). This embodiment illustrates the substrate 100 as being made of silicon. When the substrate 100 is made of silicon, phosphorus impurities can be doped into the silicon. Heavily doped with phosphorus impurities to form an N+ substrate 100, or moderately doped with phosphorus impurities to form an N substrate 100. The epitaxial layer 200 is also made of silicon. The doping concentrations of the epitaxial layer 200 and the substrate 100 are lower than the doping concentration of the substrate 100. The epitaxial layer 200 can be moderately doped with phosphorus impurities to form an N epitaxial layer 200, or lightly doped with phosphorus impurities to form an N- epitaxial layer 200. For example, the substrate 100 is an N+ substrate 100 formed by heavily doping with phosphorus impurities, and the epitaxial layer 200 is an N epitaxial layer 200 formed by moderately doping with phosphorus impurities; the substrate 100 is an N substrate 100 formed by moderately doping with phosphorus impurities, and the epitaxial layer 200 is an N- epitaxial layer 200 formed by lightly doping with phosphorus impurities.

[0056] The metal layer 400 can be formed by physical vapor deposition (PVD), which includes evaporation and sputtering. Sputtering has good film uniformity, strong adhesion, and can deposit high-melting-point metals. Specifically, the metal layer 400 can be formed by sputtering.

[0057] During the annealing process, the metal material and the silicon in the epitaxial layer 200 undergo a silicidation reaction to form a metal silicide, or barrier metal layer 401. The silicidation reaction is a solid-phase diffusion reaction between metal and silicon under high-temperature annealing conditions, forming a metal silicide. Its core is the formation of a stable compound layer at the metal-silicon interface through atomic-level interdiffusion. The conductivity of metal silicide is intermediate between that of metal and silicon, alleviating the potential barrier caused by the work function difference between metal and silicon, forming a low-resistance ohmic contact. The metal silicide layer acts as a barrier, preventing excessive diffusion of metal atoms into the silicon, thereby preventing device failure.

[0058] The silicidation reaction is carried out in a mixed gas atmosphere formed by a mixture of a protective gas and oxygen, where the volume ratio of oxygen to the mixed gas formed by the mixture of the protective gas and oxygen is 8% to 10%, for example, 8%, 9%, 9.1%, 10%, etc. In other words, in this application, the metal material undergoes a silicidation reaction with silicon in a micro-oxygen environment to form a metal silicide. The micro-oxygen environment can induce slight oxidation of the silicon and metal materials, forming a dense silicon dioxide and metal oxide interface layer, blocking the leakage current path and improving the antistatic capability of the Schottky diode.

[0059] In some technical solutions, annealing is performed in a pure, oxygen-free protective gas atmosphere to prevent oxidation of silicon to form silicon dioxide when the metal reacts with silicon to form metal silicide. However, when annealing is performed in a pure, protective gas atmosphere, Schottky diodes are less sensitive to electrostatic discharge and have weak anti-static capabilities, making it difficult to meet electrostatic discharge requirements above 4kV.

[0060] In this embodiment, the method for fabricating a Schottky diode includes forming an epitaxial layer 200 on a substrate 100, thermally oxidizing the epitaxial layer 200 to form an initial oxide layer 300, etching a metal deposition window 301 in the initial oxide layer 300, wherein the metal deposition window 301 extends to the epitaxial layer 200, depositing a metal layer 400 in the metal deposition window 301, and performing an annealing process in a mixed gas atmosphere of a protective gas and oxygen, so that the metal layer 400 reacts with a portion of the epitaxial layer 200 to form a barrier metal layer 401, wherein the oxygen content of the mixed gas is 8% to 10% by volume. The metal material reacts with the portion of the epitaxial layer 200 in a micro-oxygen environment to form the barrier metal layer 401. The micro-oxygen environment can induce slight oxidation of the epitaxial layer 200 and the metal material, forming a dense silicon dioxide and metal oxide interface layer, which blocks the leakage current path and improves the anti-static capability of the Schottky diode, meeting the electrostatic discharge capability requirement of 4kV or above.

[0061] In some embodiments, nitrogen may be used as the protective gas, and the volume ratio of oxygen to the mixed gas formed by the mixture of nitrogen and oxygen is 8% to 10%, for example, 8%, 9%, 9.1%, 10%, etc. The nitrogen and oxygen may be supplied in two separate routes, with a nitrogen flow rate of 8 L / min and an oxygen flow rate of 0.8 L / min. The nitrogen and oxygen are mixed in the reaction chamber of the heat treatment equipment to form a mixed gas.

[0062] It should be noted that the protective gas can be nitrogen, but is not limited thereto. The protective gas can also be inert gases such as argon and helium, depending on the specific situation.

[0063] Nitrogen can be used as the protective gas. Nitrogen has low manufacturing cost, high stability, and is easy to obtain, which can reduce the production cost of Schottky diodes.

[0064] In some embodiments, the metal layer 400 comprises a NiPt alloy, and the barrier metal layer 401 comprises NiPtSi. It should be noted that the metal layer 400 may comprise a NiPt alloy, but is not limited thereto. The metal layer 400 may also be made of metal materials such as nickel (Ni), cobalt (Co), titanium (Ti), and platinum (Pt), depending on the specific circumstances.

[0065] The Schottky barrier height of NiPt alloy is significantly higher than that of a single metal, which helps reduce reverse leakage current and improve the device's voltage resistance. While maintaining a high barrier height, it can also maintain a low forward voltage drop. Therefore, NiPt alloy is an ideal barrier metal material for high-voltage Schottky diodes, especially in terms of balancing performance, reliability and cost.

[0066] In some embodiments, the annealing process includes:

[0067] Performing a first annealing to react the metal layer 400 with a portion of the epitaxial layer 200 to form an intermediate barrier layer;

[0068] A second annealing is performed to transform the intermediate barrier layer into a barrier metal layer 401 .

[0069] Metal layer 400 is a NiPt alloy. During the first annealing, the NiPt alloy reacts with silicon to form an intermediate barrier layer, which is Ni2Pt2Si. During the second annealing, the intermediate barrier layer transforms into barrier metal layer 401, which is NiPtSi. The first and second annealing processes have the same processing time and reaction temperature.

[0070] The barrier metal layer 401 is NiPtSi. Compared with Ni2Pt2Si, NiPtSi has a higher Schottky barrier and lower reverse leakage current. The annealing process is divided into two steps: the first annealing and the second annealing, which can improve the electrical characteristics of the Schottky diode.

[0071] In some embodiments, after the first annealing, the portion of metal layer 400 that has not reacted with epitaxial layer 200 is removed by etching, that is, the NiPt alloy that has not reacted with silicon is removed. Aqua regia having a volume ratio of HCl:HNO3=3:1 can be used to etch away the portion of metal layer 400 that has not reacted with silicon in epitaxial layer 200.

[0072] During the first annealing, metal layer 400 reacts with silicon to form metal silicide, or barrier metal layer 401. However, some metal typically remains unreacted and remains on the surface. This unreacted metal can affect the electrical performance of barrier metal layer 401, such as by changing the barrier height and causing instability in parameters such as the device's forward voltage drop and reverse leakage current. Removing this metal through etching improves the composition and structure of barrier metal layer 401, ensuring that the barrier height meets design requirements and thus optimizing the device's electrical performance.

[0073] In some embodiments, at least one of the first annealing and the second annealing is performed in a mixed gas atmosphere. That is, the first annealing is performed in a mixed gas atmosphere, or the second annealing is performed in a mixed gas atmosphere, or both the first annealing and the second annealing are performed in a mixed gas atmosphere.

[0074] Both the first annealing and the second annealing are performed in a mixed gas atmosphere. The NiPt alloy reacts with silicon in a micro-oxygen environment to form a barrier metal layer 401. The micro-oxygen environment can induce slight oxidation of part of the silicon material and part of the nickel metal, forming a dense silicon dioxide and nickel oxide interface layer, blocking the leakage current path, and improving the antistatic ability of the Schottky diode.

[0075] In some embodiments, the reaction temperature of the first annealing and the second annealing is 600±15°C, and the treatment time of the first annealing and the second annealing is 1±0.1h. Figure 8 As shown, the thickness of the barrier metal layer 401 is 60nm. When the reaction temperature of the annealing treatment is 515°C, the ESD parameter of the Schottky diode is approximately 2.4kV to 3.4kV, that is, the antistatic ability of the Schottky diode can meet the electrostatic release ability requirement of 2.4kV to 3.4kV; when the reaction temperature of the annealing treatment is 550°C, the ESD parameter of the Schottky diode is approximately 3.4kV to 4.0kV; when the reaction temperature of the annealing treatment is 600°C, the ESD parameter of the Schottky diode is approximately 6.4kV to 6.6kV; when the reaction temperature of the annealing treatment is 650°C, the ESD parameter of the Schottky diode is approximately 9.4kV to 10.4kV.

[0076] When the thickness of the barrier metal layer 401 remains unchanged, the reaction temperature of the first annealing and the second annealing increases, and the ESD parameter of the Schottky diode increases. When the reaction temperature of the first annealing and the second annealing increases to 650°C, the reverse breakdown voltage (VR) of the Schottky diode is significantly reduced.

[0077] The reaction temperature of the first annealing and the second annealing is both 600±15°C, which can not only ensure the antistatic ability of the Schottky diode and meet the electrostatic discharge capability requirement of more than 4kV, but also avoid a significant reduction in the reverse breakdown voltage of the Schottky diode.

[0078] In some embodiments, the thickness of the metal layer 400 is 35±3 nm, and the thickness of the barrier metal layer 401 is also 35±3 nm. Figure 9 As shown, the reaction temperature of the annealing treatment is 600°C. When the thickness of the barrier metal layer 401 is 45nm, the ESD parameter of the Schottky diode is approximately 3kV, that is, the antistatic ability of the Schottky diode can meet the electrostatic discharge ability requirement of 3kV; when the thickness of the barrier metal layer 401 is 42.5nm, the ESD parameter of the Schottky diode is approximately 4kV; when the thickness of the barrier metal layer 401 is 40nm, the ESD parameter of the Schottky diode is approximately 5kV; when the thickness of the barrier metal layer 401 is 37.5nm, the ESD parameter of the Schottky diode is approximately 6kV; when the thickness of the barrier metal layer 401 is 35nm, the ESD parameter of the Schottky diode is approximately 7kV.

[0079] In some technical solutions, the barrier metal layer 401 of the Schottky diode has a thickness of 60±5nm, which has weak antistatic capabilities and cannot meet the electrostatic discharge requirements of 4kV or above. In this embodiment, the thickness of the metal layer 400 and the barrier metal layer 401 is controlled to 35±3nm, which is significantly lower than 60±5nm. This not only reduces the material consumption of the metal layer 400, but also reduces the interfacial stress, thereby improving the antistatic capability of the Schottky diode.

[0080] In summary, the annealing process includes: a first annealing to react the metal layer 400 with a portion of the epitaxial layer 200 to form an intermediate barrier layer; and a second annealing to transform the intermediate barrier layer into a barrier metal layer 401. Metal layer 400 is a NiPt alloy. During the first annealing, the NiPt alloy reacts with silicon to form an intermediate barrier layer, which is Ni2Pt2Si. During the second annealing, the intermediate barrier layer transforms into a barrier metal layer 401, which is NiPtSi. The first and second annealing processes have the same duration and reaction temperature. After the first annealing, the portion of the metal layer 400 that has not reacted with the epitaxial layer 200 is removed by etching, that is, the NiPt alloy that has not reacted with silicon is removed.

[0081] At least one of the first annealing and the second annealing is performed in a mixed gas atmosphere. Nitrogen can be used as the protective gas, and the volume ratio of oxygen to the mixed gas formed by the mixture of nitrogen and oxygen is 8% to 10%, for example, 8%, 9%, 9.1%, 10%, etc. The reaction temperature of the first annealing and the second annealing is 600±15°C, and the processing time of the first annealing and the second annealing is 1±0.1h. The thickness of the metal layer 400 is 35±3nm, and the thickness of the barrier metal layer 401 is also 35±3nm.

[0082] The annealing treatment includes a first annealing and a second annealing, and at least one of the first annealing and the second annealing is carried out in a mixed gas atmosphere. The reaction temperature of the first annealing and the second annealing is 600±15°C, and the thickness of the metal layer 400 and the barrier metal layer 401 is 35±3nm. The combination of the above four conditions can ensure the antistatic ability of the Schottky diode and meet the electrostatic discharge capability requirements of more than 4kV.

[0083] In some embodiments, a method for fabricating a Schottky diode includes:

[0084] After forming the initial oxide layer 300, the initial oxide layer 300 is partially etched to form an annular ion implantation window 302. Boron impurities are then implanted through the annular ion implantation window 302 to form a P+ diffusion guard ring. After forming the P+ diffusion guard ring 500, a metal deposition window 301 is etched on the initial oxide layer 300. The edge of the metal deposition window 301 is located between the inner and outer rings of the annular ion implantation window 302. After etching the annular ion implantation window 302 and the metal deposition window 301, the remaining initial oxide layer 300 forms a patterned oxide layer 310.

[0085] For example, the inner ring diameter of the annular ion implantation window 302 is R1, the outer ring diameter of the annular ion implantation window 302 is R3, the metal deposition window 301 is a groove with a diameter of R2, the metal deposition window 301 and the annular ion implantation window 302 are coaxially arranged, the inner ring diameter R1 of the annular ion implantation window 302 is smaller than the diameter R2 of the metal deposition window 301, and the diameter R2 of the metal deposition window 301 is smaller than the outer ring diameter R3 of the annular ion implantation window 302. When etching the metal deposition window 301, the portion of the initial oxide layer 300 within the inner ring diameter R1 of the annular ion implantation window 302 is completely removed, and the portion of the initial oxide layer 300 at the bottom of the annular ion implantation window 302 is partially removed.

[0086] The reverse breakdown of a Schottky diode typically occurs in the edge region of the metal-semiconductor interface. The P+ diffusion protection ring 500 is disposed in the epitaxial layer 200 to form a local PN junction. By adjusting the doping concentration and depth of the P+ diffusion protection ring 500, the electric field distribution can be made more uniform, reducing the edge electric field peak, thereby increasing the reverse breakdown voltage. Dangling bonds and defects on the semiconductor surface form surface states, which become recombination centers for carriers. The P+ diffusion protection ring 500 reduces reverse leakage current by compensating for surface states and reducing the recombination of carriers on the surface. The P+ diffusion protection ring can increase the reverse breakdown voltage and reduce the reverse leakage current, thereby improving the reverse withstand voltage and reliability of the Schottky diode without sacrificing forward conduction performance.

[0087] In some embodiments, a method for fabricating a Schottky diode includes:

[0088] After forming the barrier metal layer 401, an upper electrode 610 is formed on the side of the barrier metal layer 401 away from the substrate 100, and a lower electrode 620 is formed on the side of the substrate 100 away from the epitaxial layer 200. Figure 7 The upper electrode 610 and the lower electrode 620 can be made of metal materials such as aluminum, copper, titanium, and silver.

[0089] The upper electrode 610 and the lower electrode 620 can be formed using a physical vapor deposition process, which includes evaporation coating and sputtering coating. Evaporation coating equipment is simple, low-cost, and has a fast deposition rate. Specifically, the upper electrode 610 and the lower electrode 620 can be formed using evaporation coating. In other embodiments, the upper electrode 610 and the lower electrode 620 can be formed using sputtering coating. Evaporation coating can be used to deposit low-melting-point metal materials, while sputtering coating can be used to deposit high-melting-point metal materials. The specific deposition process can be selected based on the materials used for the upper electrode 610 and the lower electrode 620.

[0090] Metal materials such as aluminum, copper, titanium, and silver have excellent electrical conductivity. Using metal materials such as aluminum, copper, titanium, and silver to make electrodes can reduce contact resistance.

[0091] Example 2

[0092] The present application also provides a Schottky diode, which is manufactured using the Schottky diode manufacturing method disclosed above.

[0093] See also Figure 7As shown, the Schottky diode includes a lower electrode 620, a substrate 100, an epitaxial layer 200, a patterned oxide layer 310, a barrier metal layer 401, a P+ diffusion protection ring 500, and an upper electrode 610. The epitaxial layer 200 is formed on one side of the substrate 100, and the lower electrode 620 is formed on the other side of the substrate 100. The patterned oxide layer 300 is formed on the side of the epitaxial layer 200 away from the substrate 100. A metal deposition window 301 extending to the epitaxial layer 200 is defined in the patterned oxide layer 300. The barrier metal layer 401 is formed on the side of the epitaxial layer 200 away from the substrate 100 and is located in the metal deposition window 301. The P+ diffusion protection ring 500 is embedded in the epitaxial layer 200 and is located on the side of the contact portion between the barrier metal layer 401 and the patterned oxide layer 300 close to the substrate 100. The upper electrode 610 is formed on a side of the barrier metal layer 401 away from the substrate 100 , and the upper electrode 610 extends to a side of the patterned oxide layer 300 away from the substrate 100 .

[0094] When making the barrier metal layer 401, an epitaxial layer 200 is formed on the substrate 100, and an initial oxide layer 300 is formed by thermal oxidation on the upper layer of the epitaxial layer 200. A metal deposition window 301 is etched on the initial oxide layer 300, and the metal deposition window 301 extends to the epitaxial layer 200. A metal layer 400 is deposited in the metal deposition window 301, and annealing is performed in a mixed gas atmosphere formed by a mixture of protective gas and oxygen, so that the metal layer 400 and part of the epitaxial layer 200 react to form the barrier metal layer 401, and the volume ratio of oxygen to the mixed gas is 8% to 10%.

[0095] The annealing process includes: a first annealing to react the metal layer 400 with a portion of the epitaxial layer 200 to form an intermediate barrier layer; and a second annealing to transform the intermediate barrier layer into the barrier metal layer 401. Metal layer 400 is a NiPt alloy. During the first annealing, the NiPt alloy reacts with silicon to form the intermediate barrier layer, which is Ni2Pt2Si. During the second annealing, the intermediate barrier layer transforms into the barrier metal layer 401, which is NiPtSi. The first and second annealing processes have the same duration and reaction temperature. After the first annealing, the portion of the metal layer 400 that has not reacted with the epitaxial layer 200 is removed by etching, that is, the NiPt alloy that has not reacted with silicon is removed.

[0096] At least one of the first annealing and the second annealing is performed in a mixed gas atmosphere. Nitrogen can be used as the protective gas, and the volume ratio of oxygen to the mixed gas formed by the mixture of nitrogen and oxygen is 8% to 10%, for example, 8%, 9%, 9.1%, 10%, etc. The reaction temperature of the first annealing and the second annealing is 600±15°C, and the processing time of the first annealing and the second annealing is 1±0.1h. The thickness of the metal layer 400 is 35±3nm, and the thickness of the barrier metal layer 401 is also 35±3nm.

[0097] The manufacturing method of the Schottky diode includes: forming an epitaxial layer 200 on a substrate 100, thermally oxidizing the upper layer of the epitaxial layer 200 to form an oxide layer 300, etching a metal deposition window 301 on the oxide layer 300, extending the metal deposition window 301 to the epitaxial layer 200, depositing a metal layer 400 in the metal deposition window 301, and performing an annealing treatment in a mixed gas atmosphere formed by a mixture of a protective gas and oxygen, so that the metal layer 400 and a portion of the epitaxial layer 200 react to form a barrier metal layer 401, wherein the volume ratio of oxygen to the mixed gas is 8% to 10%. The Schottky diode is manufactured using the Schottky diode manufacturing method disclosed above. The metal material of the metal layer 400 reacts with part of the epitaxial layer 200 in a micro-oxygen environment to form a barrier metal layer 401. The micro-oxygen environment can induce slight oxidation of part of the epitaxial layer 200 material and the metal material to form a dense silicon dioxide and metal oxide interface layer, blocking the leakage current path, improving the anti-static ability of the Schottky diode, and meeting the electrostatic discharge capability requirements of more than 4kV.

[0098] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified with "first," "second," etc., may explicitly or implicitly include one or more of such features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0099] In this application, unless otherwise specified or limited, terms such as "assembly" and "connection" should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0100] In the description of this specification, the reference terms "some embodiments", "exemplarily", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0101] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent application.

Claims

1. A method for manufacturing a Schottky diode, characterized in that: include: forming an epitaxial layer on a substrate; Thermally oxidizing the upper layer of the epitaxial layer to form an initial oxide layer; Etching a metal deposition window on the initial oxide layer, wherein the metal deposition window extends to the epitaxial layer; depositing a metal layer in the metal deposition window; Annealing is performed in a mixed gas atmosphere formed by a mixture of protective gas and oxygen, so that the metal layer and a portion of the epitaxial layer react to form a barrier metal layer, wherein the volume ratio of the oxygen to the mixed gas is 8% to 10%.

2. The method for manufacturing a Schottky diode according to claim 1, wherein: The annealing treatment includes: performing a first annealing to allow the metal layer and a portion of the epitaxial layer to react to form an intermediate barrier layer; removing the portion of the metal layer that has not reacted with the epitaxial layer by etching; A second annealing is performed to transform the intermediate barrier layer into the barrier metal layer.

3. The method for manufacturing a Schottky diode according to claim 2, wherein: At least one of the first annealing and the second annealing is performed in the mixed gas atmosphere.

4. The method for manufacturing a Schottky diode according to claim 2, wherein: The epitaxial layer includes an N-doped silicon epitaxial layer, the metal layer includes a NiPt alloy, the intermediate barrier layer includes Ni2Pt2Si, and the barrier metal layer includes NiPtSi.

5. The method for manufacturing a Schottky diode according to claim 4, wherein: The thickness of the metal layer is 35±3 nm.

6. The method for manufacturing a Schottky diode according to any one of claims 2 to 5, wherein: The reaction temperature of the first annealing and the second annealing is both 600±15° C., and the processing time of the first annealing and the second annealing is both 1±0.1 h.

7. The method for manufacturing a Schottky diode according to claim 1, wherein: The protective gas includes nitrogen.

8. The method for manufacturing a Schottky diode according to claim 1, wherein: The manufacturing method of the Schottky diode includes: After forming the initial oxide layer, partially etching the initial oxide layer to form a ring-shaped ion implantation window; Injecting boron impurities from the annular ion implantation window to form a P+ diffusion protection ring; After forming the P+ diffusion protection ring, the metal deposition window is etched on the initial oxide layer, and the edge of the metal deposition window is located between the inner ring and the outer ring of the annular ion implantation window.

9. The method for manufacturing a Schottky diode according to claim 1, wherein: The manufacturing method of the Schottky diode includes: After forming the barrier metal layer, an upper electrode is formed on a side of the barrier metal layer away from the substrate, and a lower electrode is formed on a side of the substrate away from the epitaxial layer.

10. A Schottky diode, characterized in that: The Schottky diode is manufactured by the method for manufacturing a Schottky diode according to any one of claims 1 to 9.

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