Epitaxial wafer with nanometer air gap, preparation method of epitaxial wafer and LED chip
By combining bonding and nano-patterning technology on a sapphire substrate to form a spindle-shaped nano-air gap and alternately grow AlN template layers, the problems of low light extraction efficiency and large warping of deep ultraviolet LED epitaxial wafers were solved, achieving efficient light propagation and improved uniformity.
Patent Information
- Application Number
- CN202510946999.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-10
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-07-10
AI Technical Summary
In the existing technology, deep ultraviolet LED epitaxial wafers have problems such as low light extraction efficiency, large warping and poor uniformity, which are mainly due to the total reflection at the sapphire and AlN interface, the warping of the epitaxial wafer caused by the excessive thickness of the AlN film, and the influence of the chip preparation process.
The epitaxial wafer design adopts a nano-air gap structure. By combining bonding and nano-patterning technology on a sapphire substrate, a spindle-shaped nano-air gap is formed. The AlN template layer is grown by alternating three-dimensional and two-dimensional growth methods. Combined with magnetron sputtering and MOCVD processes, an epitaxial wafer with a nano-air gap is prepared.
The light propagation path at the interface between the sapphire substrate and the air is improved, the warping of the AlN template is reduced, the light extraction efficiency is enhanced, and the problems of low light extraction efficiency and poor uniformity are solved.
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Figure CN120456680B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of LEDs, and in particular relates to an epitaxial wafer with a nanometer air gap, a method for preparing the epitaxial wafer, and an LED chip. Background Art
[0002] Aluminum nitride templates are the base material for epitaxial growth of AlGaN-based deep ultraviolet LEDs. The crystal quality of the template directly determines the crystal quality of the upper AlGaN layer. High-quality AlN templates can effectively reduce the threading dislocation density (TDDs) of AlGaN, improve the radiative recombination efficiency of electrons and holes in the LED structure grown on this material, and improve the reliability and life of the LED.
[0003] AlN films grown on nano-patterned sapphire substrates have the advantages of low dislocation density and improved light extraction efficiency. However, to achieve a smooth film on the nano-patterned substrate, the AlN layer must be grown thicker (typically greater than 2 μm). Excessively thick AlN layers can cause significant warping of the epitaxial wafer, affecting the uniformity of the Al composition in subsequent epitaxial layers (reducing wavelength, brightness, and voltage uniformity) and hindering subsequent chip processing, potentially causing fragmentation and uneven photoresist coating.
[0004] When n-type AlGaN is grown on an AlN template with high crystalline quality, the n-type AlGaN also has a lower dislocation density, higher mobility and lower resistivity.
[0005] AlGaN-based materials have a relatively high refractive index. For example, at 275nm, the wavelength band typically used in UVC applications, AlN has a refractive index of 2.3226, while GaN has a refractive index of 2.5955. The refractive index of AlGaN ranges from 2.3226 to 2.5955, depending on the Al content. In a flip-chip UVC LED structure, light emitted from the quantum well first passes through the n-type AlGaN material, then through the AlN material (with a slightly lower refractive index), and finally through the sapphire substrate (with an even lower refractive index of 1.8273 at 275nm). When light enters a denser material into a less dense one, total internal reflection occurs, resulting in low light extraction efficiency. The rough interface between sapphire and AlN can block total internal reflection, a principle exploited in periodically patterned substrates and LED epitaxy.
[0006] The use of periodic patterned substrates not only improves the growth quality of AlN templates, but also increases the light extraction efficiency of LEDs. Since the lateral migration rate of Al atoms is much lower than that of Ga atoms during AlN template preparation, the pattern size required for AlN template growth must be nanometer-scale (the pattern size for GaN materials only needs to be micrometer-scale). This results in a low yield for the preparation of nano-patterned substrates suitable for AlN templates, making it difficult to ensure the consistency of the size and height of the periodic pattern. Due to the smaller size, incomplete patterns may occur in some areas of the same substrate surface.
[0007] Patent publication number CN117894892A discloses a substrate structure for light-emitting diodes and its manufacturing method. The patent describes the use of a sapphire substrate with a high density of pits / depressions on its surface, known as a patterned substrate, combined with pulsed growth using NH3 and MO sources, and controlled temperature, pressure, and VIII ratio to create an air gap layer with a certain density within an AlN template layer. However, the pulsed growth process places high demands on equipment reliability due to the frequent opening and closing of the diaphragm valve.
[0008] It can be seen from this that the following defects exist in the existing technology: 1. When using a flat sapphire substrate to grow the AlN template, there is a large refractive index difference between sapphire and AlN, which will cause part of the light emitted by the quantum well to be totally reflected at the interface between sapphire and AlN. Light with an incident angle greater than the total reflection angle cannot directly pass through the sapphire and AlN, so the light extraction efficiency is low. At the same time, there is a large refractive index between sapphire and air, and there is also total reflection, which will further reduce the light extraction efficiency. 2. When using a patterned substrate to grow AlN, in order to obtain an AlN thin film layer with a smooth surface, it is necessary to grow an AlN film with a thickness greater than 2um, which will cause large warping of the epitaxial wafer, affecting the uniformity of the subsequent epitaxial structure and the chip preparation process. 3. The sapphire substrate is made by cutting and polishing a directionally grown sapphire crystal rod. The interior is a uniform and dense bulk material, and light propagates in it in a straight line. Summary of the Invention
[0009] In response to the technical problems existing in the above-mentioned traditional deep ultraviolet LED epitaxial wafer structure, the present invention provides an epitaxial wafer with a nano-air gap, a method for preparing the epitaxial wafer, and an LED chip.
[0010] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0011] An epitaxial wafer with a nanometer air gap comprises a bonded sapphire substrate, an AlN template layer, an n-type AlGaN layer, a multi-quantum well active layer, an electron blocking layer, a p-type AlGaN layer, and a p-type GaN contact layer. The bonded sapphire substrate is formed by combining a first sapphire substrate and a second sapphire substrate via a bonding region. The first sapphire substrate has an n-electrode region on its upper surface provided with a first conical protruding bonding region, and a p-electrode region on its upper surface provided with a second conical concave bonding region. The second sapphire substrate has an n-electrode region on its lower surface provided with a first conical concave bonding region. A third conical pit bonding area is provided in the p-electrode area on the lower surface of the second sapphire substrate, the first conical protrusion bonding area is bonded to the first conical pit bonding area, the second conical pit bonding area is bonded to the third conical pit bonding area, and the second conical pit bonding area of the first sapphire substrate and the third conical pit bonding area of the second sapphire substrate form a shuttle-shaped nano-air gap; an AlN template layer, an n-type AlGaN layer, a multi-quantum well active layer, an electron blocking layer, a p-type AlGaN layer and a p-type GaN contact layer are sequentially stacked and grown on the upper end of the second sapphire substrate.
[0012] The thickness of the first sapphire substrate and the second sapphire substrate are both 0.2mm~0.3mm, the bottom diameter of the first conical protrusion bonding area is 0.1mm~0.5mm, and the height is 0.1mm~0.5mm, the bottom diameter of the second conical pit bonding area is 0.05μm~0.5μm, and the height is 0.1μm~1μm; the bottom diameter of the first conical pit bonding area is 0.1mm~0.5mm, and the height is 0.1mm~0.5mm, the bottom diameter of the third conical pit bonding area is 0.05μm~0.5μm, and the height is 0.1μm~1μm.
[0013] The AlN template layer comprises:
[0014] AlN buffer layer grown by magnetron sputtering, with a thickness of 2nm~13nm;
[0015] Medium-temperature AlN layer, with a thickness of 200nm~450nm, growth temperature of 900℃~1100℃, and pressure of 45torr~60torr;
[0016] The high-temperature AlN layer has a thickness of 1500nm~2500nm, a growth temperature of 1150℃~1300℃, and a pressure of 25torr~50torr.
[0017] The Al composition of the n-type AlGaN layer is 0.55-0.7, the thickness is 400nm-800nm, and the Si doping concentration is 1×10 19 cm -3~1×10 20 cm -3 , and an internal air gap is formed by alternating three-dimensional growth and two-dimensional growth processes;
[0018] The multi-quantum well active layer includes 1 to 10 barrier layers and well layers. The Al composition of the barrier layer is 0.6 to 0.75 and the thickness is 8 nm to 15 nm. The Al composition of the well layer is 0.49 to 0.54 and the thickness is 1.3 nm to 3 nm.
[0019] The electron blocking layer is a single layer or a multi-quantum well structure, wherein the Al composition of the single layer is 0.7-0.9, the thickness is 15nm-60nm, and the Mg doping concentration is 1×10 17 cm -3 ~1×10 18 cm -3 ; The multi-quantum well structure comprises 1 to 5 barrier layers and well layers, wherein the Al composition of the barrier layer is 0.7 to 0.8, and the Al composition of the well layer is 0.53 to 0.6.
[0020] A method for preparing an epitaxial wafer having a nanometer air gap comprises the following steps:
[0021] S1. Preparing a bonded sapphire substrate: dry-etching the first sapphire substrate and the second sapphire substrate to form a concave and convex bonding area;
[0022] The bonding surface is treated by plasma activation, an initial pressure of 6MPa~7.6MPa is applied and vacuum is applied, and the pressure is reduced to 0MPa at a rate of 3MPa / h~3.8MPa / h to complete the bonding;
[0023] S2. Growth of AlN template layer: magnetron sputtering AlN buffer layer, sputtering power of 3300W~4000W, N2 flow rate of 70sccm~95sccm, Ar flow rate of 1sccm~4sccm, temperature of 700℃~750℃;
[0024] MOCVD grows medium-temperature AlN layers and high-temperature AlN layers, filling air gaps through 3D-2D alternating growth;
[0025] The growth temperature of the medium-temperature AlN layer is 900°C to 1100°C; the growth temperature of the high-temperature AlN layer is 1150°C to 1300°C;
[0026] S3. Growing an n-type AlGaN layer, a multi-quantum well active layer, an electron blocking layer, a p-type AlGaN layer and a p-type GaN contact layer in sequence to prepare an epitaxial wafer.
[0027] The preparation method of the n-type AlGaN layer is as follows:
[0028] Three-dimensional growth stage: TMAl flow rate is 260umol / min~300umol / min, TMGa flow rate is 140umol / min~180umol / min, NH3 flow rate is 8000sccm~16000sccm, SiH4 flow rate is 2.6×10 -9 mol / min~2.6×10 - 8 mol / min, H2 carrier gas, H2 flow rate is 30SLM~80SLM, growth time is 25min~50min, growth distance is 30mm~50mm;
[0029] Two-dimensional growth stage: temperature 1000℃~1100℃, pressure 40torr~80torr, TMAl flow rate 260umol / min~300umol / min, TMGa flow rate 180umol / min~220umol / min, NH3 flow rate 4000sccm~8000sccm, SiH4 flow rate 2.6×10 -9 mol / min~2.6×10 -8 mol / min, H2 carrier gas, H2 flow rate is 30SLM~80SLM, growth time is 25min~50min, and growth distance is 10mm~30mm.
[0030] The preparation conditions of the p-type AlGaN layer are as follows: growth time of 100s-300s, Al composition of 0.3-0.6, Mg doping concentration of 1×10 18 cm -3 ~1×10 20 cm -3 , temperature is 900℃~1000℃, pressure is 60torr~100torr, TMAl flow rate is 180umol / min~210umol / min, TMGa flow rate is 50umol / min~80umol / min, NH3 flow rate is 2000sccm~8000sccm, Cp2Mg flow rate is 200scm~600sccm, H2 carrier gas, H2 flow rate is 30SLM~80SLM.
[0031] The preparation conditions of the p-type GaN contact layer are as follows: growth time is 100s~500s, Mg doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3, temperature is 800℃~950℃, pressure is 100torr~300torr, TMGa flow rate is 30μmol / min~60μmol / min, NH3 flow rate is 6000sccm~20000sccm, Cp2Mg flow rate is 400sccm~800sccm, H2 carrier gas, H2 flow rate is 10SLM~30SLM.
[0032] The LED chip includes an epitaxial wafer with a nano-air gap, an n-electrode metal and a p-electrode metal. The n-electrode metal is grown on an n-type AlGaN layer, and the p-electrode metal is grown on a p-type GaN contact layer. The n-electrode metal adopts a NiAuNiAu or NiAuNiRhTi metal system; the p-electrode metal adopts a CrAlTiAu or CrTiAlNiAuTi metal system.
[0033] Compared with the prior art, the present invention has the following beneficial effects:
[0034] 1. This invention utilizes a combination of bonding and nanopatterning technologies within a sapphire substrate to increase the light propagation path at the sapphire substrate-air interface, addressing the low light extraction efficiency of deep-ultraviolet LEDs caused by total internal reflection between the substrate and the template. Furthermore, this invention reduces warpage of the AlN template, addressing the problem of poor uniformity in UVC LED epitaxial wafers due to significant warpage.
[0035] 2. The present invention combines nano-patterned substrates into a thick substrate with an air gap in the center, a nano-pattern on the back, and a smooth front surface by bonding. The air gap in the substrate and the pattern on the back will increase the propagation path of light, thereby improving the light extraction efficiency. The front surface is smooth, and there is no need to grow an overly thick AlN layer to fill the pits.
[0036] 3. The present invention realizes the three-dimensional and two-dimensional growth of a single-component nAlGaN layer by rationally using temperature and the molar composition ratio of Al and Ga in the nAlGaN layer, thereby realizing the growth of an nAlGaN layer containing air gaps, further increasing the light output path in the nAlGaN layer, and thus improving the light output efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the embodiments or the description of the prior art. Obviously, the drawings described below are merely exemplary, and those skilled in the art can, without inventive effort, derive other implementation drawings based on the provided drawings.
[0038] The structures, proportions, sizes, etc. illustrated in this specification are intended solely to complement the contents disclosed herein and to facilitate understanding and reading by persons skilled in the art. They are not intended to limit the conditions under which the present invention may be implemented and therefore have no substantive technical significance. Any structural modifications, changes in proportions, or adjustments in sizes, without affecting the efficacy and objectives of the present invention, shall remain within the scope of the technical contents disclosed herein.
[0039] Figure 1 Schematic diagram of the structure of the first sapphire substrate and the second sapphire substrate of the present invention;
[0040] Figure 2 Schematic diagram of the structure of the bonded sapphire substrate after bonding according to the present invention;
[0041] Figure 3 Schematic diagram of the epitaxial wafer structure of the present invention;
[0042] Figure 4 This is a schematic diagram of the deep ultraviolet LED chip structure of the present invention.
[0043] Wherein: 1 is the first sapphire substrate, 101 is the first conical protrusion bonding area, 102 is the second conical pit bonding area, 2 is the second sapphire substrate, 201 is the first conical pit bonding area, 202 is the third conical pit bonding area, 3 is the AlN template layer, 4 is the n-type AlGaN layer, 5 is the multi-quantum well active layer, 6 is the electron blocking layer, 7 is the p-type AlGaN layer, 8 is the p-type GaN contact layer, 9 is the n-electrode metal, and 10 is the p-electrode metal. DETAILED DESCRIPTION
[0044] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only part of the embodiments of this application, not all the embodiments. These descriptions are only to further illustrate the features and advantages of the present invention, rather than to limit the claims of the present invention. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0045] The following embodiments of the present invention are described in further detail with reference to the accompanying drawings and examples. The following embodiments are used to illustrate the present invention but are not intended to limit the scope of the present invention.
[0046] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. Throughout this application, unless otherwise specified, "plurality" means two or more.
[0047] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediate medium; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.
[0048] Example 1
[0049] This embodiment provides an epitaxial wafer with a nanometer air gap, which specifically includes the following components:
[0050] 1. Bonding sapphire substrate
[0051] It is formed by combining a first sapphire substrate 1 and a second sapphire substrate 2 via a bonding area, and both have a thickness of 0.25 mm.
[0052] Bonding area design:
[0053] like Figure 1 As shown, the top surface of the first sapphire substrate 1 has a first conical raised bonding area 101 with a bottom diameter of 0.3mm and a height of 0.3mm in the n-electrode region; the p-electrode region has a second conical recessed bonding area 102 with a bottom diameter of 0.3μm and a height of 0.6μm. The bottom surface of the second sapphire substrate 2 has a first conical recessed bonding area 201 with a bottom diameter of 0.3mm and a height of 0.3mm in the n-electrode region; the p-electrode region has a third conical recessed bonding area 202 with a bottom diameter of 0.3μm and a height of 0.6μm.
[0054] like Figure 2 As shown, after the concave-convex structures of the first sapphire substrate 1 and the second sapphire substrate 2 are matched and bonded, a spindle-shaped nanometer air gap is formed in the middle.
[0055] 2. AlN template layer 3
[0056] Magnetron sputtering AlN buffer layer: thickness 10 nm, sputtering power 3500 W, N2 flow rate 80 sccm, Ar flow rate 3 sccm, temperature 730 °C.
[0057] Medium-temperature AlN layer: thickness is 300nm, growth temperature is 1000℃, and pressure is 50torr.
[0058] High-temperature AlN layer: thickness is 2000nm, growth temperature is 1250℃, and pressure is 40torr.
[0059] 3. n-type AlGaN layer 4
[0060] The Al composition is 0.6, the thickness is 600 nm, and the Si doping concentration is 5×10 19 cm -3 , air gaps are formed inside by alternating growth.
[0061] Three-dimensional growth stage: TMAl flow rate is 280 μmol / min, TMGa flow rate is 160 μmol / min, NH3 flow rate is 12000 sccm, H2 flow rate is 50 SLM, and growth time is 40 min.
[0062] Two-dimensional growth stage: temperature is 1050°C, pressure is 60 torr, TMAl flow rate is 280 μmol / min, TMGa flow rate is 200 μmol / min, NH3 flow rate is 6000 sccm, H2 flow rate is 50 SLM, and growth time is 30 min.
[0063] 4. Multi-quantum well active layer 5
[0064] It includes five pairs of AlGaN barrier layers and AlGaN well layers, the Al composition of the AlGaN barrier layers is 0.65, the Al composition of the AlGaN well layers is 0.52, the thickness of the AlGaN barrier layers is 12 nm, and the thickness of the AlGaN well layers is 2 nm.
[0065] 5. Electron blocking layer 6
[0066] A multi-quantum well structure is adopted, including three barrier layers and a well layer, the Al composition of the barrier layer is 0.75, and the Al composition of the well layer is 0.55.
[0067] 6. p-type AlGaN layer 7 and p-type AlGaN contact layer 8
[0068] p-type AlGaN layer 7: Al composition is 0.5, thickness is 200 nm, Mg doping concentration is 5×10 18 cm -3 .
[0069] p-type GaN contact layer 8: thickness 150 nm, Mg doping concentration 5×10 20 cm -3 .like Figure 3 As shown, an epitaxial wafer structure is formed.
[0070] Example 2
[0071] This embodiment provides an LED chip, based on the epitaxial wafer with nano air gaps in the first embodiment, such as Figure 4 As shown, an n-electrode metal 9 is grown on the n-type AlGaN layer 4, and a p-electrode metal 10 is grown on the p-type GaN contact layer 8. The n-electrode metal 9 adopts a Ni / Au / Ni / Au metal system with a total thickness of 200 nm. The p-electrode metal 10 adopts a Cr / Al / Ti / Au metal system with a total thickness of 300 nm.
[0072] Example 3
[0073] This embodiment provides a method for preparing an epitaxial wafer with a nanometer air gap, and the specific steps are as follows:
[0074] Step 1: Preparation of bonded sapphire substrate
[0075] The first sapphire substrate 1 and the second sapphire substrate 2 are dry-etched to form pits and raised bonding areas, respectively.
[0076] The bonding area was activated by O2 plasma with a power of 300 W and a time of 5 min.
[0077] Apply an initial pressure of 6.5 MPa and evacuate to 1×10 -6 Torr, and the pressure was reduced to 0 MPa at a rate of 3.5 MPa / h to complete the bonding.
[0078] Step 2: Growth of AlN template layer 3
[0079] Magnetron sputtering buffer layer: power is 3500W, N2 flow rate is 80sccm, Ar flow rate is 3sccm, temperature is 730℃, and thickness is 10nm.
[0080] MOCVD growth of medium-temperature AlN layer: temperature is 1000℃, pressure is 50 torr, TMAl flow rate is 300μmol / min, NH3 flow rate is 15000sccm, and time is 2h.
[0081] High-temperature AlN layer: temperature is 1250°C, pressure is 40 torr, TMAl flow rate is 300 μmol / min, NH3 flow rate is 20,000 sccm, and time is 4 hours.
[0082] Alternating switching between three-dimensional (V / III ratio = 2000) and two-dimensional (V / III ratio = 500) growth modes was adopted.
[0083] Step 3: Epitaxial structure growth
[0084] n-type AlGaN layer 4: first perform three-dimensional stage growth, then perform two-dimensional stage growth. The TMGa flow rate for the three-dimensional stage growth is 160 μmol / min, and the H2 flow rate is 50 SLM. The temperature for the two-dimensional stage growth is 1050°C, and the TMGa flow rate is 200 μmol / min.
[0085] Multi-quantum well layer 5: The barrier layer is grown at a temperature of 1100°C, the well layer at a temperature of 950°C, and they grow alternately in each cycle.
[0086] Electron blocking layer 6: multi-quantum well structure, the Al composition of the barrier layer is 0.75, and the Al composition of the well layer is 0.55.
[0087] p-type AlGaN layer 7: Growth time 200s, Al composition 0.3~0.6, Mg doping concentration 1×10 19 cm -3 , temperature is 950℃, pressure is 70torr, TMAl flow rate is 200umol / min, TMGa flow rate is 65umol / min, NH3 flow rate is 4000sccm, Cp2Mg flow rate is 400sccm, H2 carrier gas, H2 flow rate is 50SLM.
[0088] p-type GaN contact layer 8: Growth time is 300s, Mg doping concentration is 1×10 20 cm -3 , temperature is 900℃, pressure is 200torr, TMGa flow rate is 40μmol / min, NH3 flow rate is 8000sccm, Cp2Mg flow rate is 500sccm, H2 carrier gas, H2 flow rate is 20SLM.
[0089] Example 4
[0090] This embodiment provides a method for fabricating an LED chip. Based on the method for fabricating an epitaxial wafer with a nano-air gap described in Example 3, an n-electrode metal 9 is deposited on an n-type AlGaN layer 4, and a p-electrode metal 10 is deposited on a p-type GaN contact layer 8. The n-electrode metal 9 utilizes a Ni / Au / Ni / Au metal system, while the p-electrode metal 10 utilizes a Cr / Al / Ti / Au metal system. The bonded sapphire substrate is ground to 80 μm and then cleaved into 300 μm × 300 μm chips.
[0091] The above only describes in detail the preferred embodiments of the present invention, but the present invention is not limited to the above embodiments. Various changes can be made within the knowledge of ordinary technicians in this field without departing from the purpose of the present invention, and various changes should be included in the scope of protection of the present invention.
Claims
1. An epitaxial wafer with a nanometer air gap, characterized in that: The invention comprises a bonded sapphire substrate, an AlN template layer (3), an n-type AlGaN layer (4), a multi-quantum well active layer (5), an electron blocking layer (6), a p-type AlGaN layer (7) and a p-type GaN contact layer (8), wherein the bonded sapphire substrate is formed by combining a first sapphire substrate (1) and a second sapphire substrate (2) via a bonding region; the n-electrode region on the upper surface of the first sapphire substrate (1) is provided with a first conical protruding bonding region (101), and the p-electrode region on the upper surface of the first sapphire substrate (1) is provided with a second conical concave bonding region (102); the n-electrode region on the lower surface of the second sapphire substrate (2) is provided with a first conical concave bonding region (201), and the lower surface of the second sapphire substrate (2) is provided with a first conical concave bonding region (202). The p-electrode region is provided with a third conical pit bonding area (202); the first conical protrusion bonding area (101) is bonded to the first conical pit bonding area (201); the second conical pit bonding area (102) is bonded to the third conical pit bonding area (202); the second conical pit bonding area (102) of the first sapphire substrate (1) and the third conical pit bonding area (202) of the second sapphire substrate (2) form a shuttle-shaped nanometer air gap; and an AlN template layer (3), an n-type AlGaN layer (4), a multi-quantum well active layer (5), an electron blocking layer (6), a p-type AlGaN layer (7) and a p-type GaN contact layer (8) are sequentially stacked and grown on the upper end of the second sapphire substrate (2).
2. The epitaxial wafer with nano-air gap according to claim 1, wherein: The thickness of the first sapphire substrate (1) and the second sapphire substrate (2) are both 0.2 mm to 0.3 mm; the bottom diameter of the first conical protrusion bonding area (101) is 0.1 mm to 0.5 mm and the height is 0.1 mm to 0.5 mm; the bottom diameter of the second conical pit bonding area (102) is 0.05 μm to 0.5 μm and the height is 0.1 μm to 1 μm; the bottom diameter of the first conical pit bonding area (201) is 0.1 mm to 0.5 mm and the height is 0.1 mm to 0.5 mm; the bottom diameter of the third conical pit bonding area (202) is 0.05 μm to 0.5 μm and the height is 0.1 μm to 1 μm.
3. The epitaxial wafer with nano-air gap according to claim 1, wherein: The AlN template layer (3) comprises: AlN buffer layer grown by magnetron sputtering, with a thickness of 2nm~13nm; Medium-temperature AlN layer, with a thickness of 200nm~450nm, growth temperature of 900℃~1100℃, and pressure of 45torr~60torr; The high-temperature AlN layer has a thickness of 1500nm~2500nm, a growth temperature of 1150℃~1300℃, and a pressure of 25torr~50torr.
4. The epitaxial wafer with nano-air gap according to claim 1, wherein: The Al composition of the n-type AlGaN layer (4) is 0.55-0.7, the thickness is 400nm-800nm, and the Si doping concentration is 1×10 19 cm -3 ~1×10 20 cm -3 , and an internal air gap is formed by alternating three-dimensional growth and two-dimensional growth processes; The multi-quantum well active layer (5) comprises 1 to 10 barrier layers and well layers, wherein the Al composition of the barrier layers is 0.6 to 0.75 and the thickness is 8 nm to 15 nm; the Al composition of the well layers is 0.49 to 0.54 and the thickness is 1.3 nm to 3 nm.
5. The epitaxial wafer with nano-air gap according to claim 1, wherein: The electron blocking layer (6) is a single layer or multi-quantum well structure, the Al component of the single layer is 0.7-0.9, the thickness is 15nm-60nm, and the Mg doping concentration is 1×10 17 cm -3 ~1×10 18 cm -3 ; The multi-quantum well structure comprises 1 to 5 barrier layers and well layers, wherein the Al composition of the barrier layer is 0.7 to 0.8, and the Al composition of the well layer is 0.53 to 0.
6.
6. The method for preparing an epitaxial wafer having a nanometer air gap according to any one of claims 1 to 5, characterized in that: The following steps are involved: S1. Preparing a bonded sapphire substrate: dry-etching the first sapphire substrate (1) and the second sapphire substrate (2) to form a concave and convex bonding area; The bonding surface is treated by plasma activation, an initial pressure of 6MPa~7.6MPa is applied and vacuum is applied, and the pressure is reduced to 0MPa at a rate of 3MPa / h~3.8MPa / h to complete the bonding; S2. Growth of AlN template layer (3): magnetron sputtering AlN buffer layer, sputtering power is 3300W~4000W, N2 flow rate is 70sccm~95sccm, Ar flow rate is 1sccm~4sccm, temperature is 700℃~750℃; MOCVD grows medium-temperature AlN layers and high-temperature AlN layers, filling air gaps through 3D-2D alternating growth; The growth temperature of the medium-temperature AlN layer is 900°C to 1100°C; the growth temperature of the high-temperature AlN layer is 1150°C to 1300°C; S3, sequentially growing an n-type AlGaN layer (4), a multi-quantum well active layer (5), an electron blocking layer (6), a p-type AlGaN layer (7) and a p-type GaN contact layer (8) to prepare an epitaxial wafer.
7. The method for preparing an epitaxial wafer with a nanometer air gap according to claim 6, wherein: The preparation method of the n-type AlGaN layer (4) is: Three-dimensional growth stage: TMAl flow rate is 260umol / min~300umol / min, TMGa flow rate is 140umol / min~180umol / min, NH3 flow rate is 8000sccm~16000sccm, SiH4 flow rate is 2.6×10 -9 mol / min~2.6×10 - 8 mol / min, H2 carrier gas, H2 flow rate is 30SLM~80SLM, growth time is 25min~50min, growth distance is 30mm~50mm; Two-dimensional growth stage: temperature 1000℃~1100℃, pressure 40torr~80torr, TMAl flow rate 260umol / min~300umol / min, TMGa flow rate 180umol / min~220umol / min, NH3 flow rate 4000sccm~8000sccm, SiH4 flow rate 2.6×10 -9 mol / min~2.6×10 -8 mol / min, H2 carrier gas, H2 flow rate is 30SLM~80SLM, growth time is 25min~50min, and growth distance is 10mm~30mm.
8. The method for preparing an epitaxial wafer with a nanometer air gap according to claim 6, wherein: The preparation conditions of the p-type AlGaN layer (7) are as follows: growth time is 100s~300s, Al composition is 0.3~0.6, and Mg doping concentration is 1×10 18 cm -3 ~1×10 20 cm -3 , temperature is 900℃~1000℃, pressure is 60torr~100torr, TMAl flow rate is 180umol / min~210umol / min, TMGa flow rate is 50umol / min~80umol / min, NH3 flow rate is 2000sccm~8000sccm, Cp2Mg flow rate is 200scm~600sccm, H2 carrier gas, H2 flow rate is 30SLM~80SLM.
9. The method for preparing an epitaxial wafer with a nanometer air gap according to claim 6, wherein: The preparation conditions of the p-type GaN contact layer (8) are: growth time of 100s to 500s, Mg doping concentration of 1×10 19 cm -3 ~1×10 21 cm -3 , temperature is 800℃~950℃, pressure is 100torr~300torr, TMGa flow rate is 30μmol / min~60μmol / min, NH3 flow rate is 6000sccm~20000sccm, Cp2Mg flow rate is 400sccm~800sccm, H2 carrier gas, H2 flow rate is 10SLM~30SLM.
10. An LED chip comprising the epitaxial wafer with a nano-air gap according to any one of claims 1 to 5, characterized in that: It also includes an n-electrode metal (9) and a p-electrode metal (10), wherein the n-electrode metal (9) is grown on the n-type AlGaN layer (4), and the p-electrode metal (10) is grown on the p-type GaN contact layer (8), wherein the n-electrode metal (9) adopts a NiAuNiAu or NiAuNiRhTi metal system; and the p-electrode metal (10) adopts a CrAlTiAu or CrTiAlNiAuTi metal system.