LTO film optimization preparation method for improving thick epitaxial back silicon slag

Abstract

The invention discloses an LTO film optimization preparation method for improving thick epitaxial back silicon slag, and particularly relates to the technical field of semiconductor manufacturing, and the method comprises the steps of S1, gradient temperature deposition; s2, optimizing the flow of the silane gas; s3, optimizing the thickness of the LTO film; and S4, in-situ annealing and strengthening. According to the LTO film optimization preparation method for improving thick epitaxial back silicon slag, the effectiveness of the method under common conditions is verified by adopting a conventional silicon wafer which is not subjected to special pretreatment, and the preparation effect of the LTO film is further optimized by introducing special surface passivation treatment in the silicon wafer pretreatment stage; meanwhile, fine adjustment is conducted on gas flow in the step-by-step gradient APCVD deposition process, the influence rule of gas flow parameters on the performance of the LTO film is deeply explored, the compactness and thickness uniformity of the LTO film are successfully optimized, multiple means such as silicon wafer special pretreatment, gas flow fine adjustment and deposition rate optimization are comprehensively applied, and the performance of the LTO film is improved. And the synergistic effect among the optimization measures is fully exerted.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an optimized preparation method for an LTO film with improved thick epitaxial back silicon slag. Background Art

[0002] In the field of semiconductor manufacturing technology, automotive-grade fast recovery diodes (FRDs) are increasingly used, especially in new energy vehicles. With the continuous upgrade of high-voltage platforms in new energy vehicles, the voltage resistance requirements for automotive-grade FRD devices have also increased accordingly, from the traditional 400V to 1200V. To meet this higher voltage requirement, silicon-based substrates need to be enhanced by growing multiple thick epitaxial layers, typically with a total thickness of 100μm or more.

[0003] However, during the growth of thick epitaxial layers, the epitaxial process needs to be carried out under high temperature conditions for a long time, such as at a temperature of 1150°C for 8 to 12 hours. This high temperature environment poses a severe challenge to traditional LTO (low-temperature silicon oxide) protective films. In the existing technology, LTO films are generally prepared using conventional CVD (chemical vapor deposition) processes with a deposition temperature of 450°C and a deposition rate of approximately 500A / min. However, the LTO films prepared by this process have many defects. The film layer has a high porosity, a density of only 230A / min, and poor thickness uniformity, with a fluctuation range of about ±5%. Under the huge thermal stress of the high-temperature thick epitaxial process, traditional LTO protective films are difficult to withstand and are prone to cracking.

[0004] After the LTO film breaks, microcracks will be left on its surface. Since it is difficult for the silicon wafer to fit completely tightly against the edge of the tray, epitaxial gas will have the opportunity to invade through these microcracks. Subsequently, the epitaxial gas reacts at the microcracks of the LTO film to form polysilicon particles. These polysilicon particles continue to accumulate and fall off on the surface of the LTO film, eventually forming silicon slag. The presence of silicon slag has a serious negative impact on the performance and reliability of automotive-grade FRD devices, specifically a significant increase in device leakage current and failure of voltage resistance. This not only affects the electrical performance of the device, but may also cause problems such as surface short circuits, thereby reducing the service life of the device and increasing the risk of product failure in actual applications. It is difficult to meet the stringent requirements of high reliability and high performance of semiconductor devices in high-end application fields such as new energy vehicles.

[0005] In response to the above-mentioned problems in the prior art, the present invention proposes an optimized preparation method for LTO film with improved thick epitaxial back silicon slag. By precisely controlling the deposition temperature, silane gas flow rate, and introducing in-situ annealing strengthening treatment and other key technical means, the coordinated optimization of the density and thickness of the LTO film is achieved, effectively solving the problem of traditional LTO film cracking due to thermal stress and causing back silicon slag defects in high-temperature thick epitaxial processes, significantly improving the pressure resistance and reliability of automotive-grade FRD devices, enabling them to better adapt to the development needs of high-end applications such as high-voltage platforms for new energy vehicles. Summary of the Invention

[0006] The main purpose of the present invention is to provide an optimized preparation method for LTO film with improved thick epitaxial back silicon slag, which can effectively solve the problems in the background technology.

[0007] To achieve the above object, the technical solution adopted by the present invention is:

[0008] An optimized preparation method for LTO film with improved thick epitaxial back silicon slag comprises the following steps:

[0009] S1. Gradient temperature deposition: The deposition temperature is controlled in three stages: 450°C in the first stage, 430°C in the second stage, and 400°C in the third stage, which gradually reduces thermal stress and improves film density.

[0010] S2. Silane gas flow optimization: reduce the silane flow to reduce the film-forming reaction rate and reduce microporous defects in the film layer;

[0011] S3, LTO film thickness optimization: control the total thickness of LTO film ≥8000A, thickness uniformity ≤±5%;

[0012] S4. In-situ annealing strengthening: In-situ annealing is performed immediately after the APCVD deposition is completed. The annealing temperature is 600-650℃, the time is 30min, and the N2 atmosphere is used to promote the rearrangement of the film structure and increase the density.

[0013] Preferably, in the gradient temperature deposition, the deposition rate in the first stage is 300A / min, and the thickness target is 3000A; the deposition rate in the second stage is 250A / min, and the thickness target is 3000A; and the deposition rate in the third stage is 200A / min, and the thickness target is 2000A.

[0014] Preferably, the silane gas flow rate in the first stage is 50 sccm, and the He gas flow rate is 300 sccm;

[0015] In the second stage, the silane gas flow rate is 40 sccm and the He gas flow rate is 240 sccm;

[0016] In the third stage, the silane gas flow rate is 30 sccm, and the He gas flow rate is 180 sccm.

[0017] Preferably, in the in-situ annealing strengthening, the annealing temperature is 650° C. and the N 2 flow rate is 500 sccm.

[0018] Preferably, the silicon wafer pretreatment adopts N-type <100> Crystalline silicon wafers are cleaned by RCA and then dried.

[0019] Preferably, the density of the LTO membrane is measured by an acid corrosion method, and the density index is 150 A / min.

[0020] Preferably, after the LTO film is subjected to a simulated thick epitaxial growth process (1150° C. / 10 h), the area of silicon slag on the back side accounts for ≤0.1%.

[0021] Preferably, the thickness uniformity of the LTO film is controlled by a corresponding deposition process to ensure accurate superposition of the deposition thickness at each stage, meeting the requirements of a total thickness ≥ 8000 Å and a thickness uniformity ≤ ± 5%.

[0022] Preferably, the density of the LTO film after the in-situ annealing strengthening treatment is in the range of 150A / min-230A / min.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. The present invention verifies the effectiveness of the method under ordinary conditions by using conventional silicon wafers without special pretreatment. Experimental results show that compared with the traditional process, the LTO film optimized by the method of the present invention has been significantly improved in terms of density and thickness uniformity, and the area proportion of back silicon slag is effectively reduced to about 0.8%. This shows that the method of the present invention can achieve good back silicon slag defect suppression effect on conventional silicon wafers, providing strong support for its promotion and application in large-scale industrial production, and has significant practical value and application prospects.

[0025] 2. The present invention further optimizes the preparation of LTO films by introducing a special surface passivation treatment during the silicon wafer pretreatment stage. Experimental results show that after this special pretreatment, the bonding strength of the LTO film to the silicon wafer is significantly enhanced, the density and crack resistance of the film layer are further improved, and the area of silicon slag on the back side is significantly reduced to less than 0.3%, effectively improving the reliability of automotive-grade fast recovery diode (FRD) devices in the multi-layer thick epitaxial process. This pretreatment method, combined with the present invention's step-by-step gradient deposition and in-situ annealing process, can fully leverage the advantages of each step to achieve comprehensive optimization of LTO film performance, providing a more reliable technical guarantee for the manufacture of high-end semiconductor devices, and has significant technical innovation and practical application value.

[0026] 3. By fine-tuning the gas flow rate during the step-gradient APCVD deposition process, this paper deeply explores the influence of gas flow parameters on LTO film performance and successfully optimizes the density and thickness uniformity of LTO films. Experimental results show that reasonable gas flow adjustment can significantly improve the quality and stability of LTO films while ensuring deposition efficiency, reducing the area of silicon slag on the back side to approximately 0.5%, effectively improving the high-temperature resistance and reliability of automotive-grade FRD devices in thick epitaxial processes. This refined control of gas flow provides new ideas and methods for optimizing the LTO film preparation process, helping to further improve the manufacturing level and product quality of semiconductor devices, and has important practical significance and application value.

[0027] 4. This invention utilizes a combination of methods, including specialized wafer pretreatment, gas flow rate fine-tuning, and deposition rate optimization, leveraging the synergistic effects of these optimization measures to achieve optimal LTO film performance. Experimental results demonstrate that the fully optimized LTO film exhibits excellent density, thickness uniformity, crack resistance, and suppression of backside silicon slag defects. The slag area ratio is reduced to less than 0.1%, providing reliable support for the application of automotive-grade FRD devices in multi-layer thick epitaxial processes. This comprehensive optimization strategy not only significantly improves device performance and reliability but also provides semiconductor manufacturers with an efficient and feasible solution to the backside silicon slag problem in high-temperature thick epitaxial processes. It demonstrates significant technological innovation and broad market application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a schematic diagram of the back silicon slag of the present invention;

[0029] Figure 2 Schematic diagram of the formation mechanism of back silicon slag of the present invention;

[0030] Figure 3 Schematic diagram showing the comparison of the density between the conventional group and the improved group of the present invention;

[0031] Figure 4 Schematic diagram comparing the silicon slag incidence rates of the conventional group and the improved group of the present invention. DETAILED DESCRIPTION

[0032] In order to make the technical means, creative features, objectives and effects achieved by the present invention easier to understand, the present invention is further described below in conjunction with specific implementation methods.

[0033] like Figure 1 、 Figure 2 、 Figure 3 and Figure 4 As shown, an optimized preparation method for LTO film with improved thick epitaxial back silicon slag comprises the following steps:

[0034] Silicon wafer pretreatment: using N-type <100> The crystal silicon wafer is cleaned by RCA and then dried. This step is to completely remove organic impurities, metal ions and other pollutants on the surface of the silicon wafer. The drying process forms a dry and clean surface, providing a good interface for subsequent chemical vapor deposition, helping to improve the bonding strength between the LTO film and the silicon wafer, and ensuring the uniformity and density of the film deposition.

[0035] S1. Gradient temperature deposition: The deposition temperature is controlled in three stages. The first stage is 450°C, the deposition rate is set to 300A / min, the target thickness is 3000A, the silane gas flow rate is adjusted to 50sccm, and the He gas flow rate is set to 300sccm. In this stage, the higher deposition temperature and rate help to quickly form the initial film layer. At the same time, the flow ratio of silane and helium can ensure the efficient film formation reaction, so that the LTO film is evenly spread on the silicon wafer surface, laying the foundation for subsequent deposition;

[0036] The second stage is at 430°C, with the deposition rate reduced to 250A / min. The target thickness remains at 3000A. Accordingly, the silane gas flow rate is reduced to 40sccm and the He gas flow rate is adjusted to 240sccm. The appropriate reduction in temperature and gas flow rate makes the film deposition process smoother, helps to improve the uniformity and density of the film, further optimizes the microstructure of the film, and reduces the generation of pores and defects.

[0037] The third stage is at 400°C, where thermal stress is gradually reduced to improve film density. The deposition rate is further reduced to 200A / min, with a target thickness of 2000A. The silane gas flow rate is reduced to 30sccm, and the He gas flow rate is correspondingly reduced to 180sccm. In this stage, the lower temperature and gas flow rate help reduce internal stress in the film and reduce the risk of film rupture due to stress concentration. At the same time, the density and crack resistance of the film are further improved, ensuring the stability of the LTO film in subsequent high-temperature epitaxial processes.

[0038] S2. Silane gas flow optimization: reduce the silane flow to reduce the film-forming reaction rate and reduce microporous defects in the film layer;

[0039] S3, LTO film thickness optimization: control the total thickness of LTO film ≥8000A, thickness uniformity ≤±5%;

[0040] S4. In-situ annealing strengthening: In-situ annealing is performed immediately after APCVD deposition is completed. The annealing temperature is 600-650℃, the time is 30min, and the N2 atmosphere is used to promote the rearrangement of the film structure and increase the density. After APCVD deposition is completed, in-situ annealing is performed immediately. The annealing temperature is set to 650℃ and the annealing time is 30min. At the same time, N2 gas is introduced with a flow rate controlled at 500sccm. The annealing process can provide a high-temperature, low-oxygen environment for the LTO film, promote the rearrangement of atoms inside the film, further improve the density and structural stability of the film, eliminate internal defects that may be generated during the deposition process, and enhance the high-temperature resistance and crack resistance of the film, so that it can better adapt to the subsequent high-temperature epitaxial growth process;

[0041] Epitaxial growth verification: 5 cycles of epitaxial growth verification were performed. The epitaxial thickness was precisely controlled at 20μm each time. The epitaxial growth temperature was set to 1150℃ and the growth time was 2h each time. By simulating the actual thick epitaxial process conditions, the optimized LTO film was subjected to rigorous performance tests. The stability of the LTO film in a high-temperature environment was observed in particular, and it was checked for abnormal phenomena such as cracking and peeling. The back of the silicon wafer was carefully inspected using microscopy and other detection methods. The generation of silicon slag was counted and the effect of the LTO film on the suppression of silicon slag defects on the back was evaluated to verify the practical application value and reliability of the method of the present invention.

[0042] Furthermore, in the gradient temperature deposition, the deposition rate in the first stage is 300A / min, and the thickness target is 3000A; the deposition rate in the second stage is 250A / min, and the thickness target is 3000A; and the deposition rate in the third stage is 200A / min, and the thickness target is 2000A.

[0043] Furthermore, the silane gas flow rate in the first stage is 50 sccm, and the He gas flow rate is 300 sccm;

[0044] In the second stage, the silane gas flow rate is 40 sccm and the He gas flow rate is 240 sccm;

[0045] In the third stage, the silane gas flow rate is 30 sccm, and the He gas flow rate is 180 sccm.

[0046] Furthermore, in the in-situ annealing strengthening, the annealing temperature is 650° C. and the N 2 flow rate is 500 sccm.

[0047] Furthermore, the silicon wafer pretreatment adopts N-type <100> Crystalline silicon wafers are cleaned by RCA and then dried.

[0048] Furthermore, the density of the LTO membrane was measured by an acid corrosion method, and the density index was 150 A / min.

[0049] Furthermore, after simulating a thick epitaxial process (1150° C. / 10 h), the area of silicon slag on the back side accounted for ≤0.1%.

[0050] Furthermore, the thickness uniformity of the LTO film is controlled by a corresponding deposition process to ensure the precise superposition of the deposition thickness at each stage, meeting the requirements of a total thickness ≥ 8000 Å and a thickness uniformity ≤ ± 5%.

[0051] Furthermore, the density of the LTO film after the in-situ annealing strengthening treatment is increased from the conventional 150A / min to 230A / min, thereby improving the density and crack resistance of the film layer.

[0052] Example 1: This example uses N-type <100> The crystal-oriented silicon wafer is operated according to the standard process in the above specific embodiment.

[0053] Step-by-step APCVD deposition process: First, the silicon wafer is placed in the deposition chamber. The first-stage deposition temperature is controlled at 450°C. The silane gas flow rate is set to 50 sccm and the He gas flow rate is 300 sccm through a precise flow control system. Under these conditions, a 3000 Å thick LTO film is deposited at a rate of 300 A / min.

[0054] Subsequently, the deposition temperature was lowered to 430°C, the silane gas flow rate was adjusted to 40 sccm, the He gas flow rate was adjusted to 240 sccm, and the LTO film with a thickness of 3000 Å was deposited at a rate of 250 A / min.

[0055] Finally, the temperature was lowered to 400°C, the silane gas flow rate was reduced to 30 sccm, and the He gas flow rate was reduced to 180 sccm. The 2000A thick LTO film was deposited at a rate of 200A / min. During the entire deposition process, the deposition rate and gas flow rate were monitored in real time to ensure the stability and accuracy of each parameter, thereby ensuring uniform deposition and performance consistency of the film layer.

[0056] In-situ annealing strengthening treatment: After the deposition is completed, the LTO film is immediately subjected to in-situ annealing treatment. The deposition chamber temperature is raised to 650°C, and N2 gas is introduced with a flow rate controlled at 500 sccm. The annealing time is maintained for 30 minutes.

[0057] During this process, close attention is paid to the appearance changes and temperature curve of the film layer to ensure the uniformity and stability of the annealing process, so that the LTO film can fully undergo structural rearrangement and densification in a high-temperature N2 atmosphere.

[0058] Epitaxial growth verification process: The silicon wafers that have undergone the above treatment are transferred to the epitaxial growth equipment and subjected to 5 cycles of epitaxial growth verification. Before each epitaxial growth, the silicon wafers are strictly cleaned and dried to ensure that there are no impurities on the silicon wafer surface to avoid external contamination affecting the growth process and results;

[0059] During each 2-hour epitaxial growth process, the temperature is strictly controlled at 1150°C. Precise gas flow control and pressure regulation ensure uniform growth of the epitaxial layer. After the growth is completed, the silicon wafer is cooled and the surface morphology of the LTO film and the silicon slag on the back are comprehensively inspected using optical microscopy and scanning electron microscopy (SEM).

[0060] At the same time, professional testing equipment is used to accurately measure and analyze key performance indicators of the LTO film, such as density and thickness uniformity, to evaluate the effect of the method of the present invention on improving the performance of the LTO film;

[0061] In the existing technology, LTO film is usually prepared by conventional CVD process (temperature 450 ° C, deposition rate of about 500A / min), but its film has high porosity (density of about 230A / min) and poor thickness uniformity (± 5%). It cannot withstand the thermal stress impact of thick epitaxial process, resulting in the cracking of traditional LTO protective film and the occurrence of abnormal silicon slag on the back of silicon wafer (silicon slag can be observed under a microscope after removing the LTO film, such as Figure 1 shown.

[0062] Example 2. This example is the same as Example 1 in the step-by-step gradient APCVD deposition and in-situ annealing strengthening process. The difference is that this example performs special pretreatment on the silicon wafer. After RCA cleaning, a specific chemical solution is used for surface passivation treatment to further improve the surface quality of the silicon wafer.

[0063] Special pretreatment process for silicon wafers: During the drying process of silicon wafers after RCA cleaning, they are placed in a treatment chamber containing a specific passivating agent. By controlling the temperature and time parameters, the passivating agent forms a uniform passivation layer on the surface of the silicon wafer;

[0064] This passivation layer can effectively reduce the activity of the silicon wafer surface, reduce the surface defect state density, improve the chemical and thermal stability of the surface, provide a more ideal interface for the subsequent deposition of the LTO film, and help enhance the bonding strength between the LTO film and the silicon wafer, thereby improving the stability and reliability of the entire film structure.

[0065] Step-by-step APCVD deposition process: Step-by-step gradient deposition was performed according to the deposition parameters and operating steps in Example 1, with precise control of deposition temperature, rate, and gas flow at each stage to ensure uniform deposition and optimized performance of the LTO film;

[0066] At the same time, when depositing on the surface of a specially pretreated silicon wafer, it can be observed that the LTO film has better film quality and a more uniform and dense film layer. This is due to the modification of the passivation layer on the silicon wafer surface, which reduces the impact of surface defects on the film formation process and improves the film formation efficiency and film quality.

[0067] In-situ annealing strengthening treatment: The deposited LTO film is subjected to in-situ annealing treatment, also following the annealing conditions and operating procedures in Example 1;

[0068] During this process, the structural rearrangement of the LTO film after special pretreatment under high-temperature annealing is more orderly, and the degree of densification is further improved. This is mainly attributed to the good matching and synergy between the passivation layer and the LTO film, which makes the entire film structure more stable under high-temperature conditions and can better withstand the thermal stress impact during subsequent epitaxial growth.

[0069] Epitaxial growth verification process: Using the same epitaxial growth conditions and verification methods as in Example 1, five cycles of epitaxial growth verification were performed on the silicon wafer that had undergone special pretreatment and optimization by the method of the present invention;

[0070] During the verification process, careful inspection and performance testing of the backside of the silicon wafers revealed that the formation of silicon slag on the backside was more effectively suppressed, with the proportion of silicon slag area further reduced to less than 0.3%.

[0071] At the same time, the stability of the LTO film during high-temperature epitaxial growth was significantly improved, with no abnormal phenomena such as cracking or peeling. Its density and thickness uniformity were better than those in Example 1, indicating that the combination of special pretreatment and the method of the present invention can produce better results.

[0072] Analysis of the formation mechanism of silicon slag on the back side:

[0073] a. During the epitaxial heating and high temperature process, because the expansion coefficient of Si is much larger than that of Si, Si expands due to heat, breaking the LTO and leaving micro cracks on the LTO;

[0074] b. Since the silicon wafer and the tray do not fit tightly together at the edges, epitaxial gas may enter the micro-cracks and form polysilicon particles;

[0075] c. Polysilicon particles fall off on LTO, forming silicon slag, such as Figure 2 shown.

[0076] Example 3: In this example, the silicon wafer is still subjected to conventional RCA cleaning and drying pretreatment. The step-by-step gradient APCVD deposition process is similar to that of Example 1, but the gas flow rate is slightly adjusted:

[0077] In the first stage, the SiH4 flow rate was increased to 55 sccm and the He flow rate was increased to 320 sccm;

[0078] In the second stage, the SiH4 flow rate was increased to 45 sccm and the He flow rate was increased to 260 sccm;

[0079] In the third stage, the SiH4 flow rate was increased to 35 sccm and the He flow rate was increased to 200 sccm. The in-situ annealing strengthening treatment conditions remained unchanged.

[0080] Step-gradient APCVD deposition process: Step-gradient deposition is performed on silicon wafers after conventional pretreatment according to the adjusted gas flow parameters;

[0081] In the first stage, increasing the flow rates of SiH4 and He can increase the supply of reactive gases, promote the film-forming reaction, and improve the thickness uniformity of the LTO film while maintaining the deposition rate of 300 A / min.

[0082] As the deposition process progresses, the gas flow rate is gradually reduced in the second and third stages to precisely control the growth rate and microstructure of the film layer, reducing film defects and stress concentration problems that may be caused by excessive gas flow.

[0083] Through this gas flow fine-tuning strategy, the density and thickness uniformity of the film layer can be further optimized while ensuring that the total thickness of the LTO film reaches ≥8000A, making it more in line with the high performance requirements of automotive-grade FRD devices for epitaxial protective films.

[0084] In-situ annealing strengthening treatment: In-situ annealing treatment was performed according to the annealing conditions and operating procedures of Example 1. After fine-tuning the gas flow rate, the LTO film showed better structural stability during the annealing process;

[0085] High-temperature annealing promotes further rearrangement of atoms within the film layer based on the microstructure formed under the optimized gas flow conditions, eliminating tiny defects that may remain during the deposition process, and significantly improving the density of the film layer. The density index reaches above 230A / min, which is significantly improved compared with the results in Example 1, indicating that fine-tuning of the gas flow rate has a positive impact on the optimization of LTO film performance.

[0086] Epitaxial growth verification process: According to the epitaxial growth verification method of Example 1, the silicon wafer after gas flow fine-tuning and annealing treatment is subjected to 5 cycles of epitaxial growth verification;

[0087] During the verification process, through detailed inspection and performance evaluation of the back side of the silicon wafer, it was found that the generation of silicon slag on the back side was effectively controlled, and the area proportion of silicon slag was reduced to about 0.5%. In addition, the overall stability of the LTO film in a high-temperature epitaxial growth environment was better than that of Example 1, and no cracking or peeling occurred. Its effect of suppressing silicon slag defects on the back side was more significant, which was mainly due to the improvement of the structure and performance of the LTO film by the optimized gas flow parameters.

[0088] Example 4: This example adopts the same special pretreatment method as Example 2 for silicon wafer pretreatment.

[0089] During the step-gradient APCVD deposition process, not only was the gas flow rate fine-tuned (same as in Example 3), but the deposition rate was also optimized: the deposition rate was increased to 320 A / min in the first stage, 270 A / min in the second stage, and 220 A / min in the third stage. The in-situ annealing treatment conditions remained unchanged: a temperature of 650°C, a duration of 30 minutes, and an N2 flow rate of 500 sccm.

[0090] Silicon wafer pretreatment process: Same as Example 2, after RCA cleaning, a specific chemical solution is used to passivate the surface of the silicon wafer to form a uniform passivation layer, improve the surface quality and thermal stability of the silicon wafer, and create good conditions for the subsequent LTO film deposition.

[0091] Step-gradient APCVD deposition process: Step-gradient deposition is performed on specially pretreated silicon wafers using a dual strategy of gas flow fine-tuning and deposition rate optimization.

[0092] In the first stage, the deposition rate was increased to 320 A / min, while the SiH4 flow rate was 55 sccm and the He flow rate was 320 sccm. This increased the deposition rate while ensuring sufficient supply of reactant gases, enabling the LTO film to be deposited quickly and evenly on the silicon wafer surface, and the initial density of the film was good.

[0093] In the second stage, the deposition rate was adjusted to 270 A / min, the SiH4 flow rate was 45 sccm, and the He flow rate was 260 sccm. This parameter combination helped to further improve the uniformity and density of the film while ensuring the deposition efficiency, and reduce the internal stress of the film.

[0094] In the third stage, the deposition rate was reduced to 220 A / min, the SiH4 flow rate was 35 sccm, and the He flow rate was 200 sccm. By reducing the deposition rate and gas flow rate, the LTO film deposition in the final stage was made finer and smoother, effectively reducing the porosity and defect density of the film layer, and improving the overall quality and crack resistance of the film layer.

[0095] During the entire deposition process, the parameter conversion between each stage is smooth, ensuring the continuity and stability of the LTO film structure.

[0096] In-situ annealing strengthening treatment: In-situ annealing treatment is carried out according to the established annealing conditions. The high-temperature annealing process causes a significant rearrangement and optimization of the internal structure of the LTO film after special pretreatment, gas flow fine-tuning and deposition rate optimization.

[0097] During this stage, the density of the LTO film is maximized, reaching a density index of over 240A / min, while the thermal stability and mechanical strength of the film are significantly enhanced;

[0098] The annealed LTO film is more uniform and dense in microstructure, and can effectively resist the thermal stress shock during subsequent high-temperature epitaxial growth, ensuring the integrity and protective performance of the film layer.

[0099] Epitaxial growth verification process: Following the epitaxial growth verification process of Example 1, five cycles of epitaxial growth verification were performed on the silicon wafer that had undergone comprehensive optimization treatment;

[0100] During the verification process, rigorous testing revealed that the LTO membrane exhibited excellent stability under high-temperature conditions, without any cracking, wrinkling, or peeling.

[0101] The area ratio of silicon slag on the back of the silicon wafer is reduced to less than 0.1%, almost completely suppressing the silicon slag on the back side. This shows that the comprehensively optimized LTO film has achieved significant results in preventing silicon slag defects on the back side.

[0102] In addition, through further testing of device performance, it was found that the LTO film optimized using the method of this embodiment can effectively reduce the leakage current of the device, improve the voltage resistance performance, and significantly improve the overall performance and reliability of automotive-grade FRD devices, meeting the high-performance requirements of semiconductor devices for the high-voltage platform of new energy vehicles.

[0103] Experimental results:

[0104] 1. The density of LTO sample of the optimized group of the present invention is improved to 150A / min. Figure 3 As shown;

[0105] 2. After epitaxy, the silicon slag area accounts for less than 0.1%, such as Figure 4 shown.

[0106] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. An optimized preparation method for LTO film with improved thick epitaxial back silicon slag, characterized in that: The following steps are involved: S1. Gradient temperature deposition: The deposition temperature is controlled in three stages: 450°C in the first stage, 430°C in the second stage, and 400°C in the third stage, which gradually reduces thermal stress and improves film density. S2. Silane gas flow optimization: reduce the silane flow to reduce the film-forming reaction rate and reduce microporous defects in the film layer; S3, LTO film thickness optimization: control the total thickness of LTO film ≥8000A, thickness uniformity ≤±5%; S4. In-situ annealing strengthening: In-situ annealing is performed immediately after the APCVD deposition is completed. The annealing temperature is 600-650℃, the time is 30min, and the N2 atmosphere is used to promote the rearrangement of the film structure and increase the density.

2. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: In the gradient temperature deposition, the deposition rate in the first stage is 300A / min, and the thickness target is 3000A; the deposition rate in the second stage is 250A / min, and the thickness target is 3000A; the deposition rate in the third stage is 200A / min, and the thickness target is 2000A.

3. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: The silane gas flow rate in the first stage is 50 sccm, and the He gas flow rate is 300 sccm; In the second stage, the silane gas flow rate is 40 sccm and the He gas flow rate is 240 sccm; In the third stage, the silane gas flow rate is 30 sccm, and the He gas flow rate is 180 sccm.

4. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: During the in-situ annealing strengthening, the annealing temperature is 650° C. and the N 2 flow rate is 500 sccm.

5. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: The silicon wafer pretreatment adopts N-type <100> Crystalline silicon wafers are cleaned by RCA and then dried.

6. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: The density of the LTO film is measured by an acid corrosion method, and the density index is 150 A / min.

7. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: After the LTO film is subjected to a simulated thick epitaxial growth process (1150° C. / 10 h), the area of silicon slag on the back side accounts for ≤0.1%.

8. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: The thickness uniformity of the LTO film is controlled by a corresponding deposition process to ensure the precise superposition of the deposition thickness at each stage, meeting the requirements of a total thickness ≥ 8000A and a thickness uniformity ≤ ± 5%.

9. The LTO film optimization preparation method for improving thick epitaxial back silicon slag according to claim 1, characterized in that: The LTO film density after the in-situ annealing strengthening treatment is in the range of 150A / min to 230A / min.

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