Modulator, modulation method and D-type amplifier

Abstract

The embodiment of the invention discloses a modulator, a modulation method and a class-D amplifier. According to the embodiment of the invention, the delay parameter is dynamically controlled according to the envelope of the input signal, and dynamic duty ratio reduction is carried out on the pulse width modulation signal obtained through preliminary modulation, so that the duty ratio of the pulse width modulation signal obtained through audio signal modulation can be effectively reduced when the signal is small, the conduction loss and the switching loss of a class-D amplifier are reduced, and the power consumption of the class-D amplifier is reduced. And the power consumption is optimized.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a modulator, a modulation method and a class D amplifier. Background Art

[0002] Existing BD modulation (Bridge Differential Modulation) generates a high-frequency pulse signal with a duty cycle close to 50% for small signals. This large duty cycle results in large ripple currents during the subsequent low-pass filtering process, which in turn prevents the reduction of conduction and switching losses, resulting in high power consumption. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a modulator, a modulation method, and a class D amplifier, which are intended to reduce ripple current that may be subsequently generated by a pulse width modulation signal output by the modulator, thereby reducing power consumption.

[0004] In a first aspect, a modulator is provided, wherein:

[0005] The modulator is used to convert the received input signal into a pulse width modulation signal;

[0006] The modulator is configured to detect the envelope of the input signal and reduce the duty cycle of the initial signal according to the envelope amplitude to output a corresponding pulse width modulation signal;

[0007] The initial signal is a signal obtained by performing pulse width modulation on an input signal.

[0008] In a second aspect, a modulation method is provided, wherein the method is used to convert a received input signal into a pulse width modulation signal, the method comprising:

[0009] detecting the envelope of the input signal, and reducing the duty cycle of the initial signal according to the envelope amplitude to output a corresponding pulse width modulation signal;

[0010] The initial signal is a signal obtained by performing pulse width modulation on an input signal.

[0011] In a third aspect, a class D amplifier is provided, comprising:

[0012] The modulator according to the first aspect is used to convert a received audio signal into a pulse width modulation signal;

[0013] a power switching circuit, receiving an output signal of the modulator and configured to amplify the output signal of the modulator;

[0014] The output filter circuit receives the output signal of the power switch circuit and is used to filter the output signal of the power switch circuit to generate a signal for driving a load.

[0015] The modulator, modulation method, and Class D amplifier of the embodiments of the present invention dynamically control the delay parameter according to the envelope of the input signal to perform real-time dynamic duty cycle reduction on the corresponding portion of the pulse width modulation signal obtained by preliminary modulation. When the input signal is a differential signal, the reduction in the duty cycle reduces the common-mode component between the two-phase pulse width modulation signals, which helps to reduce the loss caused by the common-mode component. At the same time, the duty cycle of the pulse width modulation signal obtained by modulating the input signal can be effectively reduced when the signal is small, reducing conduction loss and switching loss, and optimizing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0017] Figure 1 is a circuit block diagram of a Class D amplifier according to an embodiment of the present invention;

[0018] Figure 2 is an exemplary waveform diagram of reducing the duty cycle of a pulse width modulation signal according to a delay parameter according to an embodiment of the present invention;

[0019] Figure 3 is a block diagram of a modulator according to an embodiment of the present invention;

[0020] Figure 4 is a curve diagram of the envelope amplitude-delay correspondence relationship of an embodiment of the present invention;

[0021] Figure 5 is an exemplary waveform diagram showing the variation of delay parameters with envelope amplitude according to an embodiment of the present invention;

[0022] Figure 6 is a circuit block diagram of a modulator according to one implementation of an embodiment of the present invention;

[0023] Figure 7 is a circuit block diagram of a delay unit according to one implementation of an embodiment of the present invention;

[0024] Figure 8 is a working waveform diagram of the modulator according to an embodiment of the present invention;

[0025] Figure 9 is a flow chart of a modulation method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, certain specific details are described in detail. Those skilled in the art can fully understand the present invention without these details. To avoid obscuring the essence of the present invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0027] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0028] At the same time, it should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or subcircuit connected electrically or electromagnetically. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected" between two nodes, it can be directly coupled or connected to the other element or there can be intermediate elements. The connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0029] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0030] In the following description, the modulator is used in a Class D amplifier and the input signal is an audio signal. It should be understood that the modulator of the present invention is not limited to Class D amplifiers and can also be applied to any system that modulates and outputs a pulse-width modulated signal and subsequently has a filtering circuit. These systems can be used to process audio signals or other signals.

[0031] Figure 1 : is a circuit block diagram of a Class D amplifier according to an embodiment of the present invention. Figure 1 As shown, the Class D amplifier 1 of this embodiment includes a modulator 11, a power switching circuit 12, and an output filter circuit 13. Modulator 11 is used to convert an audio signal into a pulse-width modulated signal. This embodiment is applicable to both Class D amplifiers that use a single-channel audio signal and Class D amplifiers that use a differential audio signal.

[0032] In this embodiment, when converting an input signal into a pulse-width modulated signal to be amplified, the modulator 11 detects the envelope of the input signal, determines a delay parameter based on the envelope amplitude, and reduces the duty cycle of the initial signal based on the delay parameter to output the corresponding pulse-width modulated signal to be amplified. In this embodiment, the input signal is an audio signal. The delay parameter changes dynamically in real time based on the envelope amplitude. Furthermore, the initial signal is a signal obtained by pulse-width modulating the input signal. The duty cycle of the output pulse-width modulated signal is dynamically reduced relative to the initial signal based on the magnitude of the delay parameter. The power switching circuit 12 is used to amplify the pulse-width modulated signal and output the amplified pulse-width modulated signal. The power switching circuit 12 is the executive portion of a Class D amplifier, controlling the rapid on and off switching of a power switching device (such as a MOSFET or GaN), thereby converting the modulated initial signal into a high-power pulse-width modulated signal (i.e., the amplified initial signal). Because the power switching device operates in a saturated or cutoff state, rather than in a nonlinear amplification region, energy loss is extremely low, resulting in efficiency far superior to that of conventional Class A, Class B, or Class AB amplifiers. The output filter circuit 13 is used to filter the amplified pulse width modulation signal and then drive the load. Specifically, the output filter circuit 13 generally includes an LC filter circuit, which constitutes a low-pass filter to filter the received signal and restore the audio signal.

[0033] In the prior art, when there is no audio signal or the amplitude of the audio signal is low, the duty cycle of the initial signal is high, close to 50%. The high duty cycle will cause a large ripple current in the filter circuit, resulting in high conduction loss and switching loss of the Class D amplifier in the prior art.

[0034] In this embodiment, the modulator 11 determines a delay parameter based on the envelope amplitude and reduces the duty cycle of the initial signal based on the delay parameter to output a corresponding pulse-width modulated signal. When the envelope amplitude is large, the delay parameter is determined to be small, thereby making little or no significant adjustment to the duty cycle. When there is no audio signal input or the audio signal envelope amplitude is small, the delay parameter is determined to be large, and the duty cycle of the initial signal is reduced by a large amount. This maintains a small duty cycle for the pulse-width modulated signal in the small-signal state, thereby reducing ripple current and lowering power loss.

[0035] As used herein, a delay parameter refers to a value corresponding to the delay time relative to an initial signal. This can be the delay time itself, a count value, or other voltage or current parameter value used in a circuit to represent the delay time. One example of reducing the duty cycle by varying delay parameters is to delay the initial signal by the delay parameter and then perform a logical AND operation on the initial signal before and after the delay to produce a pulse-width modulated signal with a reduced duty cycle.

[0036] Figure 2 This is an exemplary waveform diagram of reducing the duty cycle of a pulse width modulation signal according to a delay parameter according to an embodiment of the present invention. Figure 2 As shown in FIG, the initial signal P1 is delayed according to the delay parameter Td to obtain the delayed signal P2. Then the initial signal P1 and the delayed signal P2 are logically ANDed to obtain the pulse width modulation signal P3. Figure 2 As can be seen from FIG, since the PWM signal P3 only retains the overlapping portion of the initial signal P1 and the delayed signal P2, the duty cycle is reduced. Moreover, the reduced portion of the duty cycle corresponds to the delay parameter Td.

[0037] Figure 3 FIG. 1 is a block diagram of a modulator according to an embodiment of the present invention. Figure 3 As shown, the modulator 11 of this embodiment includes an envelope detection unit 111, a delay parameter generation unit 112, a delay unit 113, and a logic unit 114. The envelope detection unit 111 is configured to receive an audio signal VS (i.e., an input signal), detect the envelope of the audio signal VS, and output an envelope amplitude ENV of the audio signal. The delay parameter generation unit 112 is configured to generate a delay parameter Td based on the envelope amplitude ENV. The delay unit 113 is configured to output a delayed signal PWM2 that is delayed relative to the initial signal PWM1 based on the delay parameter Td. The logic unit 114 is configured to reduce the duty cycle of the initial signal PWM1 based on the delayed signal PWM2, and output the pulse width modulated signal PWM3.

[0038] In an optional implementation, different envelope amplitudes ENV can be used to determine different delay parameters Td based on a predetermined envelope amplitude-delay correspondence (also referred to as a static control curve). In one example, the static control curve can be a piecewise function that takes a fixed, larger value (a first value) when the envelope amplitude is small, and then changes to a second value that varies linearly with the envelope amplitude ENV as the envelope amplitude increases to a value greater than a predetermined envelope threshold. For example, the delay parameter Td decreases continuously to zero as the envelope amplitude increases further. In another example, the static control curve can also be such that the delay parameter is fixed when the envelope amplitude is less than a preset value, and is zero when the envelope amplitude is greater than the preset value.

[0039] Figure 4 : is a curve diagram of the envelope amplitude-delay correspondence relationship of an embodiment of the present invention. Figure 4 As shown, the envelope amplitude-delay correspondence is a piecewise function, and the parameters of the piecewise function include a first envelope threshold TH1, a second envelope threshold TH2 and a slope Slope. Figure 4For the curve graph, the horizontal axis is the envelope amplitude ENV and the vertical axis is the delay parameter Td. When the envelope amplitude is small and between 0 and the first envelope threshold TH1, the delay parameter Td is a fixed value T0. When the envelope amplitude is between the first envelope threshold TH1 and the second envelope threshold TH2, it presents a linear function that gradually decreases as the envelope amplitude increases, and the slope of the decrease is Slope. And at the first envelope threshold TH1, the delay parameter Td jumps to a predetermined value T1, where T1 < T0. Until the envelope amplitude is greater than the second threshold TH2, the delay parameter Td drops to zero. The envelope amplitude - delay correspondence can be predetermined by the parameters of the class - D amplifier. Among them, T0 is related to the power consumption and audio performance of the class - D amplifier. When the value of T0 is larger, the power consumption of the class - D amplifier at small signals is lower and the efficiency is higher. When the amplitude is between the first threshold TH1 and the second threshold TH2, the slope is related to the power consumption of the class - D amplifier. The larger the slope, the lower the power consumption of the class - D amplifier.

[0040] Furthermore, at least one time parameter TP for controlling the delay change can be input to the delay parameter generation unit 112, so that the delay parameter changes more smoothly according to the envelope amplitude, to avoid the influence of audio changes on the sound quality. For example, the time parameter TP for controlling the delay change can include at least one of Hold Time, Release Time, and Attack Time. Among them, when the envelope amplitude decreases and the delay parameter needs to change according to the envelope amplitude - delay correspondence, the delay parameter changes at the speed defined by the release time after maintaining the hold time. When the envelope amplitude increases and the delay parameter needs to change according to the envelope amplitude - delay correspondence, the delay parameter changes at the speed defined by the attack time. Usually, the attack time is less than the hold time, so that the delay parameter drops to the delay parameter corresponding to a higher envelope amplitude in a shorter time. Thus, the delay parameter can change smoothly and avoid generating noise in the audio signal.

[0041] Figure 5 is an exemplary waveform diagram of the delay parameter changing with the envelope amplitude in an embodiment of the present invention. As Figure 5 shown, before the moment t0, the envelope amplitude of the audio signal Vs maintains at a high point and the delay parameter Td maintains at a small value.

[0042] After the moment t0, the envelope amplitude of the audio signal VS decreases, resulting in the delay parameter Td needing to follow Figure 4The envelope amplitude-delay relationship shown increases. At this point, the actual delay parameter Td does not change immediately. Instead, it remains unchanged for a period of time defined by the hold time Th. Then, at time t1 (t0 + hold time Th), it changes to the delay parameter corresponding to the current envelope amplitude at a rate defined by the release time Tr (that is, the above change process is completed within the duration Tr corresponding to the release time). Because the change process is smoothed by the hold time Th and release time Tr, it can prevent the occurrence of noise caused by excessively rapid changes.

[0043] After time t2, the envelope amplitude of the audio signal VS increases, causing the delay parameter Td to need to be adjusted according to Figure 4 The envelope amplitude-delay relationship shown decreases, and the delay parameter Td changes to the corresponding target value at the speed defined by the start time Ta (that is, the above change process is completed within the duration Ta corresponding to the start time). This process is usually shorter than the change time of the delay parameter Td rising phase, that is, the start time is less than the hold time, so that the delay parameter drops to the delay parameter corresponding to the higher envelope amplitude in a shorter time, thereby avoiding the occurrence of noise.

[0044] Return Reference Figure 3 The delay unit 113 is used to delay the initial signal PWM1 according to the delay parameter Td and output the delayed delayed signal PWM2. As described above, the initial signal PWM1 is a pulse width modulated signal obtained by comparing the audio signal with a triangular wave carrier whose frequency is higher than that of the audio signal. For example, an audio signal and a triangular wave signal are input to the input end of the comparator. When the audio signal is higher than the triangular wave signal, the comparator outputs a high level, and when the audio signal is lower than the triangular wave signal, the comparator outputs a low level. Thus, the initial signal PWM1 can be obtained. In another optional implementation, the delay unit 113 can delay the carrier according to the delay parameter, pulse width modulate the input signal according to the delayed carrier, and output the delayed signal; wherein the carrier is used to pulse width modulate the input signal to determine the initial signal. The logic unit 114 is used to reduce the duty cycle of the initial signal PWM1 according to the delayed delay signal PWM2, and output the pulse width modulated signal PWM3. In one implementation, logic unit 114 may be an AND gate that performs a logical AND operation on the initial signal PWM1 and the delayed signal PWM2 to output a pulse-width modulation signal PWM3 with a reduced duty cycle. Furthermore, the extent to which the duty cycle is reduced is directly related to the delay parameter. When the delay parameter is large, the duty cycle is reduced significantly; when the delay parameter is small, the duty cycle is reduced slightly. When the delay parameter is zero (i.e., the delayed signal PWM2 has the same duty cycle as the initial signal PWM1), the duty cycle remains unchanged after output.

[0045] exist Figure 3 In the embodiment shown, the delay unit 113 and the logic unit 114 can be a single-path processing circuit, and thus can be suitable for application scenarios where the input signal is a single-path signal, or can be a dual-path parallel processing circuit, so that the positive phase signal and the negative phase signal in the differential signal can be processed in parallel.

[0046] In audio signal processing, differential signals are a common form of audio signals. These signals consist of a positive-phase signal and a negative-phase signal. These signals are a pair of signals with opposite phases. Using differential signals for audio signal processing can reduce external electromagnetic interference and noise. Because differential signals are a widely used audio signal format, the following description uses the processing of a differential signal modulator as an example for further explanation.

[0047] Figure 6 FIG. 1 is a circuit block diagram of a modulator according to an embodiment of the present invention. Figure 6 As shown, the modulator of this implementation includes an envelope detection unit 61, a delay parameter generation unit 62, a delay unit 63 and a logic unit 64. The envelope detection unit 61 is used to receive the audio signal VS and output the envelope amplitude ENV of the audio signal. The delay parameter generation unit 62 is used to generate the delay parameter Td based on the envelope amplitude ENV. Furthermore, at least one time parameter Tp for controlling the delay change can be input to the delay parameter generation unit 62 so that the delay parameter Td changes more smoothly according to the envelope amplitude, thereby avoiding the impact of excessive changes on the sound quality, preventing noise, and reducing harmonics. For example, the time parameter Tp for controlling the delay change can include at least one of the hold time (Hold Time), the release time (Release Time) and the attack time (Attack Time).

[0048] In this embodiment, the audio signal VS is a differential signal, including a positive-phase signal VSp and a negative-phase signal VSn. The initial signals obtained by triangular wave modulation of the audio differential signal include a positive-phase initial signal PWM1p and a negative-phase initial signal PWM1n, which correspond to the positive-phase signal VSp and the negative-phase signal VSn of the audio signal, respectively. Envelope detection can be performed on a single-channel signal before it is converted into a differential signal, or on a signal that simultaneously receives both the positive-phase signal and the negative-phase signal, or on only one of the two signals. When envelope detection is performed on a single-channel signal and a differential signal, the corresponding envelope amplitude-delay correspondence will differ. However, it is necessary to obtain the corresponding positive-phase initial signal PWM1p and negative-phase initial signal PWM1n based on the positive-phase signal VSp and the negative-phase signal VSn, respectively.

[0049] The delay unit 63 is used to delay the positive phase initial signal PWM1p and the negative phase initial signal PWM1n according to the delay parameter Td determined by the envelope amplitude ENV of the audio signal and at least one time parameter Tp, and output the delayed positive phase delayed signal PWM2p and the negative phase delayed signal PWM2n. Figure 6 In the example shown, the delay unit 63 inputs the positive phase initial signal PWM1p and the negative phase initial signal PWM1n and the delay parameter Td, and delays the positive phase initial signal PWM1p and the negative phase initial signal PWM1n in two ways respectively, generating the corresponding positive phase delayed signal PWM2p delayed relative to the positive phase initial signal and the negative phase delayed signal PWM2n delayed relative to the negative phase initial signal.

[0050] Logic unit 64 includes AND gates AND1 and AND2. AND gate AND1 receives the positive-phase initial signal PWM1p and the positive-phase delayed signal PWM2p as inputs, performs a logical AND operation on them, and outputs a positive-phase pulse-width modulation signal PWM3p with a reduced duty cycle based on a delay parameter Td. AND gate AND2 receives the negative-phase initial signal PWM1n and the negative-phase delayed signal PWM2n as inputs, performs a logical AND operation on them, and outputs a negative-phase pulse-width modulation signal PWM3n with a reduced duty cycle based on the delay parameter. It should be understood that in practical applications, logic unit 64 may also include other necessary circuits such as drivers and buffers.

[0051] In the prior art, when the audio signal is a differential signal, when there is no audio signal or when the audio signal amplitude is low, the common-mode duty cycle of the two PWM signals is relatively high, approaching 50%. In this embodiment, the reduction in duty cycle reduces the common-mode component between the positive and negative PWM signals, further reducing losses caused by the common-mode component. Furthermore, the duty cycle reduction is greatest when there is no audio signal input or when the audio signal envelope amplitude is low, thereby reducing power loss in small-signal conditions.

[0052] The delay unit 63 of the above implementation can be implemented in various ways, such as RC delay circuit, digital delay circuit, analog delay line, etc. At the same time, other implementations can also be used to combine the generation and delay of the initial signal in the delay unit.

[0053] Figure 7 FIG. 1 is a circuit block diagram of a delay unit according to another embodiment of the present invention. Figure 7As shown, the delay unit 7 in this implementation receives the positive-phase signal VSp and the negative-phase signal VSn of the audio signal as input, along with a delay parameter Td, and then simultaneously generates and delays the positive-phase initial signal PWM1p and the negative-phase initial signal PWM1n. The delay unit 7 includes a clock generator 71, a triangular wave generator 72, and a comparison unit. The clock generator 71 receives a reference clock CLK0 and a delay parameter Td, and generates a first clock signal CLK1 and a second clock signal CLK2 that is delayed relative to the first clock signal CLK1 by the delay parameter Td. The triangular wave generator 72 generates a first triangular wave signal TRI1 and a second triangular wave signal TRI2, respectively, based on the first clock signal CLK1 and the second clock signal CLK2. The first triangular wave signal TRI1 and the second triangular wave signal TRI2 have the same frequency, while the second triangular wave signal TRI2 is delayed relative to the first triangular wave signal TRI1 by the delay parameter Td. The comparison unit is used to compare the positive phase signal VSp with the first triangular wave signal TRI1 and the second triangular wave signal TRI2, respectively, to generate a positive phase initial signal PWM1p and a positive phase delayed signal PWM2p delayed relative to the positive phase initial signal; and to compare the negative phase signal VSn with the first triangular wave signal TRI1 and the second triangular wave signal TRI2, respectively, to generate a negative phase initial signal PWM1n and a negative phase delayed signal PWM2n delayed relative to the negative phase initial signal. Specifically, Figure 7In the example, the comparison unit includes four comparators, CMP1, CMP2, CMP3, and CMP4. Comparator CMP1 receives the positive-phase audio signal VSp and the first triangular wave signal TRI1 as inputs and outputs the positive-phase initial signal PWM1p. Comparator CMP2 receives the negative-phase audio signal VSn and the first triangular wave signal TRI1 as inputs and outputs the negative-phase initial signal PWM1n. Comparator CMP3 receives the positive-phase audio signal VSp and the second triangular wave signal TRI2 as inputs. Because the second triangular wave signal TRI2 is delayed by a delay parameter Td relative to the first triangular wave signal TRI1, and the frequencies of the first and second triangular wave signals TRI1 and TRI2, which serve as carriers, are much higher than the frequency of the audio signal, changes in the audio signal are negligible. Therefore, comparator CMP3 outputs a positive-phase delayed signal PWM2p, which is the positive-phase initial signal PWM1p delayed by a delay parameter Td. Similarly, comparator CMP4 receives the negative-phase audio signal VSn and the second triangular wave signal TRI2 as inputs and outputs a delayed negative-phase delayed signal PWM2n. Thus, the differential initial signal and the delayed differential delayed signal can be obtained synchronously. For the delay unit of this implementation, on the one hand, because the delay is operated by the clock signal, the accuracy is high. On the other hand, the initial signal and the delayed signal are generated through the same number of circuit stages, so there is no unexpected delay due to the difference in circuit stages, further improving the accuracy of the signal.

[0054] After obtaining the positive-phase initial signal PWM1p, the negative-phase initial signal PWM1n, the positive-phase delayed signal PWM2p, and the negative-phase delayed signal PWM2n, a logical AND operation can be further performed to output duty-reduced pulse-width modulated signals PWM3p and PWM3n. Specifically, a logical AND operation is performed on the positive-phase initial signal PWM1p and the positive-phase delayed signal PWM2p to obtain the positive-phase pulse-width modulated signal PWM3p, while a logical AND operation is performed on the negative-phase initial signal PWM1n and the negative-phase delayed signal PWM2n to obtain the negative-phase pulse-width modulated signal PWM3n.

[0055] Figure 8 : is the working waveform diagram of the modulator of the embodiment of the present invention. Figure 8 As shown in FIG, for the positive phase signal VSp and the negative phase signal VSn of the audio signal, their changes relative to one cycle of the first triangle wave signal TRI1 and the second triangle wave signal TRI2 can be ignored. Figure 8In the figure, the positive-phase signal VSp and the negative-phase signal VSn appear as straight lines. The second triangular wave signal TRI2 is delayed relative to the first triangular wave signal TRI1 by a time corresponding to the delay parameter Td. By performing comparison operations, the positive-phase initial signal PWM1p, the negative-phase initial signal PWM1n, the positive-phase delayed signal PWM2p, and the negative-phase delayed signal PWM2n are modulated. The positive-phase initial signal PWM1p is obtained by comparing the positive-phase signal VSp with the first triangular wave signal TRI1. The positive-phase delayed signal PWM2p is obtained by comparing the positive-phase signal VSp with the second triangular wave signal TRI2. Both have the same duty cycle, and the positive-phase delayed signal PWM2p is delayed by a time Td relative to the positive-phase initial signal PWM1p. The negative-phase initial signal PWM1n is obtained by comparing the negative-phase signal VSn with the first triangular wave signal TRI1. The negative-phase delayed signal PWM2n is obtained by comparing the negative-phase signal VSn with the second triangular wave signal TRI2. Both have the same duty cycle, and the negative-phase delayed signal PWM2n is delayed by a time Td relative to the negative-phase initial signal PWM1n. Furthermore, because the positive-phase signal VSp and the negative-phase signal VSn have opposite phases, the duty cycle of the positive-phase initial signal PWM1p and the positive-phase delayed signal PWM2p is D. Meanwhile, the duty cycle of the negative-phase initial signal PWM1n and the negative-phase delayed signal PWM2n is 1-D, where D is less than 1. A logical AND operation is performed on the positive-phase initial signal PWM1p and the positive-phase delayed signal PWM2p to obtain the positive-phase pulse-width modulated signal PWM3p corresponding to the positive-phase signal of the audio signal, with its duty cycle reduced to D-Td. A logical AND operation is performed on the negative-phase initial signal PWM1n and the negative-phase delayed signal PWM2n to obtain the negative-phase pulse-width modulated signal PWM3n corresponding to the negative-phase signal of the audio signal, with its duty cycle reduced to 1-D-Td. Reducing the duty cycle shortens the inductor charging time per cycle in the subsequent output filter circuit, reducing ripple current and lowering losses. Furthermore, reducing the duty cycle reduces the common-mode component of the differential signal, further reducing losses.

[0056] The modulator in this example may also be implemented using program instructions running on a general-purpose data processor (eg, a DSP).

[0057] The embodiments of the present invention dynamically reduce the duty cycle of the pulse width modulation signal obtained by preliminary modulation by dynamically controlling the delay parameter according to the envelope of the input signal. Thus, the duty cycle of the pulse width modulation signal obtained by modulating the audio signal can be effectively reduced when the signal is small, thereby reducing the ripple current in the output filter circuit of the Class D amplifier, reducing the charging time of the inductor in the output filter circuit and the inductor current, thereby reducing the conduction loss and switching loss, and optimizing the power consumption of the Class D amplifier.

[0058] Figure 9This is a flow chart of a modulation method according to an embodiment of the present invention. The method of this embodiment can be applied to Class D amplifiers or other systems requiring pulse-width modulation signals. The method of this embodiment is used to convert an input signal (a differential signal or a single-channel signal) into a pulse-width modulated signal.

[0059] The method of this embodiment includes the following steps:

[0060] The envelope of the input signal is detected, and the duty cycle of the initial signal is reduced according to the envelope amplitude to output a corresponding pulse width modulation signal.

[0061] The initial signal is a signal obtained by performing pulse width modulation on an input signal.

[0062] like Figure 9 As shown, the above steps of the method of this embodiment may specifically include:

[0063] Step S100: Detect the envelope of the input signal.

[0064] Step S200: Determine a delay parameter according to the envelope amplitude.

[0065] Step S300: Output a delayed signal relative to the initial signal according to the delay parameter.

[0066] Step S400: Reduce the duty cycle of the initial signal according to the delayed signal and output the pulse width modulation signal.

[0067] The initial signal is a pulse width modulation signal obtained by performing pulse width modulation on an input signal.

[0068] In one implementation, step S300 includes: delaying the initial signal according to the delay parameter, and outputting the delayed signal.

[0069] In another implementation, step S300 includes delaying a carrier wave according to the delay parameter, comparing the input signal with the delayed carrier wave, and outputting the delayed signal; wherein the carrier wave is used to pulse-width modulate the input signal to determine the initial signal. Furthermore, the carrier wave may be a triangular wave signal.

[0070] In one implementation, step S400 is specifically to perform a logical AND operation on the initial signal and the delayed signal.

[0071] In one implementation, in order to improve anti-interference capability, the audio signal is a differential signal, including a positive phase signal and a negative phase signal. Outputting a delayed signal relative to the initial signal according to the delay parameter includes:

[0072] generating a first triangular wave signal and a second triangular wave signal, wherein the second triangular wave signal is delayed by the delay parameter relative to the first triangular wave signal;

[0073] comparing the positive phase signal with the first triangle wave signal and the second triangle wave signal to generate a positive phase initial signal and a positive phase delayed signal respectively; and

[0074] The negative phase signal is compared with the first triangle wave signal and the second triangle wave signal to generate a negative phase initial signal and a negative phase delayed signal respectively.

[0075] Furthermore, generating the first triangular wave signal and the second triangular wave signal includes:

[0076] Generate a first clock signal and a second clock signal delayed according to the delay parameter relative to the first clock signal according to the reference clock and the delay parameter;

[0077] generating the first triangular wave signal according to the first clock signal;

[0078] The second triangular wave signal is generated according to the second clock signal.

[0079] In one implementation, determining the delay parameter according to the envelope amplitude includes:

[0080] A corresponding delay parameter is generated based on a predetermined envelope amplitude-delay correspondence, the envelope amplitude, and at least one time parameter used to control delay variation. This allows for real-time dynamic adjustment of the delay parameter based on the envelope amplitude. When the envelope amplitude is large, the resulting delay parameter is determined to be small, thereby avoiding significant duty cycle adjustments. When the envelope amplitude is small, the resulting delay parameter is determined to be large, and the duty cycle of the initial signal is reduced by a larger amount, thereby maintaining a small duty cycle for the pulse-width modulated signal to be amplified in a small signal state, thereby reducing ripple current and lowering losses.

[0081] Specifically, the at least one time parameter used to control the delay change includes a hold time, a release time, and a start time. When the envelope amplitude decreases so that the delay parameter needs to change according to the envelope amplitude-delay correspondence, the delay parameter changes at a speed specified by the release time after maintaining the hold time. When the envelope amplitude increases so that the delay parameter needs to change according to the envelope amplitude-delay correspondence, the delay parameter changes at a speed specified by the start time.

[0082] In one implementation, the envelope amplitude-delay correspondence is a piecewise function. Specifically, when the envelope amplitude is less than a first envelope threshold, the delay parameter of the piecewise function is a constant first value; optionally, in response to the envelope amplitude being greater than the first envelope threshold and less than a second envelope threshold, the delay parameter is a second value that decreases as the envelope amplitude increases; in response to the envelope amplitude being greater than the second envelope threshold, the delay parameter is zero.

[0083] The method of the embodiment of the present invention dynamically reduces the duty cycle of the initial signal in real time by dynamically controlling the delay parameter according to the envelope of the input signal. In this embodiment, when the input signal is a differential signal, the reduction in the duty cycle reduces the common-mode component between the positive-phase and negative-phase pulse-width modulated signals, which can further reduce the loss caused by the common-mode component. At the same time, the duty cycle of the pulse-width modulated signal obtained by modulating the audio signal is effectively reduced in the case of small signals, reducing the charging time and inductor current of the inductor in the output filter circuit, thereby reducing the ripple current in the output filter circuit of the class D amplifier and further reducing the conduction loss and switching loss of the class D amplifier, thereby optimizing the power consumption of the class D amplifier.

[0084] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A modulator, characterized in that: The modulator is used to convert the received input signal into a pulse width modulation signal; The modulator is configured to detect the envelope of the input signal and reduce the duty cycle of the initial signal according to the envelope amplitude to output a corresponding pulse width modulation signal; The initial signal is a signal obtained by performing pulse width modulation on an input signal.

2. The modulator according to claim 1, wherein The modulator is configured to: A delay parameter is determined according to the envelope amplitude of the input signal, and the duty cycle of the initial signal is reduced according to the delay parameter.

3. The modulator according to claim 2, wherein: The modulator comprises: an envelope detection unit, configured to receive the input signal and output the envelope amplitude of the input signal; a delay parameter generating unit, configured to generate the delay parameter according to the envelope amplitude; a delay unit, configured to output a delayed signal relative to the initial signal according to the delay parameter; The logic unit is configured to reduce the duty cycle of the initial signal according to the delay signal and output the pulse width modulation signal.

4. The modulator according to claim 3, wherein: The delay unit delays the initial signal according to the delay parameter and outputs the delayed signal.

5. The modulator according to claim 3, wherein The delay unit delays the carrier according to the delay parameter, performs pulse width modulation on the input signal according to the delayed carrier, and outputs the delayed signal; wherein the carrier is used to perform pulse width modulation on the input signal to determine the initial signal.

6. The modulator according to claim 5, characterized in that The carrier wave is a triangular wave signal.

7. The modulator according to claim 3, wherein: The logic unit is a logic AND circuit, which is used to perform a logic AND operation on the initial signal and the delayed signal.

8. The modulator according to claim 3, wherein: The input signal is a differential signal, including a positive phase signal and a negative phase signal.

9. The modulator according to claim 8, wherein The delay unit comprises: A comparing unit compares the positive phase signal with the first triangular wave signal and the second triangular wave signal, respectively, to generate a positive phase initial signal and a positive phase delayed signal delayed relative to the positive phase initial signal, respectively; and compares the negative phase signal with the first triangular wave signal and the second triangular wave signal, respectively, to generate a negative phase initial signal and a negative phase delayed signal delayed relative to the negative phase initial signal, respectively.

10. The modulator according to claim 9, wherein The delay unit further comprises a clock generator for generating a first clock signal and a second clock signal delayed according to the delay parameter relative to the first clock signal according to the reference clock and the delay parameter; as well as The triangular wave generator generates the first triangular wave signal according to the first clock signal and generates the second triangular wave signal according to the second clock signal.

11. The modulator according to claim 9, wherein The comparison unit includes: a first comparator, inputting the positive phase signal of the input signal and the first triangular wave signal to generate the positive phase initial signal; a second comparator, inputting the negative phase signal of the input signal and the first triangular wave signal to generate the negative phase initial signal; a third comparator, inputting the positive phase signal of the input signal and the second triangular wave signal to generate the positive phase delayed signal; The fourth comparator receives the negative phase signal of the input signal and the second triangular wave signal as input and generates the negative phase delayed signal.

12. The modulator according to claim 1, wherein The modulator generates a corresponding delay parameter according to a predetermined envelope amplitude-delay correspondence, the envelope amplitude, and at least one time parameter for controlling delay variation, and reduces the duty cycle of the initial signal according to the delay parameter.

13. The modulator according to claim 12, wherein: The at least one time parameter used to control the delay change includes a hold time, a release time, and a start time. When the envelope amplitude decreases so that the delay parameter needs to increase according to the envelope amplitude-delay correspondence, the delay parameter changes at a speed defined by the release time after maintaining the hold time. When the envelope amplitude increases so that the delay parameter needs to decrease according to the envelope amplitude-delay correspondence, the delay parameter changes at a speed defined by the start time.

14. The modulator according to claim 12, wherein: The envelope amplitude-delay correspondence is: In response to the envelope amplitude being less than a first envelope threshold, the delay parameter is a constant first value.

15. The modulator according to claim 14, wherein The envelope amplitude-delay correspondence is: In response to the envelope amplitude being greater than a first envelope threshold and less than a second envelope threshold, the delay parameter is a second value that decreases as the envelope amplitude increases; In response to the envelope amplitude being greater than the second envelope threshold, the delay parameter is zero.

16. The modulator according to claim 1, wherein The input signal is an audio signal, and the modulator is used for a class D amplifier.

17. A modulation method, characterized in that: The method is used to convert a received input signal into a pulse width modulation signal, and the method comprises: Detect the envelope of the input signal and reduce the duty cycle of the initial signal according to the envelope amplitude to output a corresponding pulse width modulation signal; The initial signal is a signal obtained by performing pulse width modulation on an input signal.

18. The method according to claim 17, characterized in that Detecting the envelope of the input signal and reducing the duty cycle of the initial signal according to the envelope amplitude to output a corresponding pulse width modulation signal includes: Detecting the envelope of the input signal; Determine the delay parameter according to the envelope amplitude; Outputting a delayed signal relative to the initial signal according to the delay parameter; The duty cycle of the initial signal is reduced according to the delay signal, and the pulse width modulation signal is output.

19. The method according to claim 18, characterized in that Outputting a delayed signal relative to the initial signal according to the delay parameter includes: The initial signal is delayed according to the delay parameter, and the delayed signal is output.

20. The method according to claim 18, wherein Outputting a delayed signal relative to the initial signal according to the delay parameter includes: The carrier is delayed according to the delay parameter, and the input signal is pulse-width modulated according to the delayed carrier to output the delayed signal; wherein the carrier is used to pulse-width modulate the input signal to determine the initial signal.

21. The method according to claim 20, characterized in that The carrier wave is a triangular wave signal.

22. The method according to claim 18, wherein Reducing the duty cycle of the initial signal according to the delayed signal includes: Perform a logic AND operation on the initial signal and the delayed signal.

23. The method according to claim 18, wherein The input signal is a differential signal, including a positive phase signal and a negative phase signal.

24. The method according to claim 23, wherein Outputting a delayed signal relative to the initial signal according to the delay parameter includes: generating a first triangular wave signal and a second triangular wave signal, wherein the second triangular wave signal is delayed by the delay parameter relative to the first triangular wave signal; Comparing the positive phase signal with the first triangular wave signal and the second triangular wave signal, respectively, to generate a positive phase initial signal and a positive phase delayed signal delayed relative to the positive phase initial signal, respectively; and The negative phase signal is compared with the first triangle wave signal and the second triangle wave signal to generate a negative phase initial signal and a negative phase delayed signal delayed relative to the negative phase initial signal.

25. The method according to claim 24, characterized in that Generating the first triangular wave signal and the second triangular wave signal includes: Generate a first clock signal and a second clock signal delayed according to the delay parameter relative to the first clock signal according to the reference clock and the delay parameter; generating the first triangular wave signal according to the first clock signal; The second triangular wave signal is generated according to the second clock signal.

26. The method according to claim 18, wherein Determining the delay parameters based on the envelope amplitude includes: A corresponding delay parameter is generated according to a predetermined envelope amplitude-delay correspondence, the envelope amplitude, and at least one time parameter for controlling delay variation.

27. The method according to claim 26, characterized in that The at least one time parameter used to control the delay change includes a hold time, a release time, and a start time. When the envelope amplitude decreases so that the delay parameter needs to increase according to the envelope amplitude-delay correspondence, the delay parameter changes at a speed defined by the release time after maintaining the hold time. When the envelope amplitude increases so that the delay parameter needs to decrease according to the envelope amplitude-delay correspondence, the delay parameter changes at a speed defined by the start time.

28. The method according to claim 26, characterized in that The envelope amplitude-delay correspondence is: In response to the envelope amplitude being less than a first envelope threshold, the delay parameter is a constant first value.

29. The method according to claim 28, characterized in that The envelope amplitude-delay correspondence is: In response to the envelope amplitude being greater than a first envelope threshold and less than a second envelope threshold, the delay parameter is a second value that decreases as the envelope amplitude increases; In response to the envelope amplitude being greater than the second envelope threshold, the delay parameter is zero.

30. A class D amplifier, characterized in that: include: The modulator according to any one of claims 1 to 16, configured to convert a received audio signal into a pulse width modulated signal; a power switching circuit, receiving an output signal of the modulator and configured to amplify the output signal of the modulator; The output filter circuit receives the output signal of the power switch circuit and is used to filter the output signal of the power switch circuit to generate a signal for driving a load.

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