Sinterable electrical contact on semiconductor substrate

Abstract

The invention discloses a sinterable electrical contact on a semiconductor substrate. A semiconductor device includes a semiconductor substrate and a sinterable electrical contact disposed on the semiconductor substrate. The sinterable electrical contact includes a copper-based layer disposed on a semiconductor substrate. The copper-based layer has a thickness of between 50 nm and 1000 nm. The sinterable electrical contact also includes a titanium-based layer disposed between the copper-based layer and the semiconductor substrate. The final functional layer for joining the sinterable electrical contact by sintering is a copper-based layer or a silver-based layer disposed on the copper-based layer.

Description

Technical Field

[0001] The present disclosure relates to semiconductor devices having sinterable electrical contacts, and in particular to chip metallization techniques for providing high-quality electrical sintered contacts. Background Art

[0002] Generally speaking, a problem with making electrical contact with a semiconductor substrate by sintering is that sintered connections are porous, meaning they are typically more susceptible to corrosion than, for example, soldered connections. For this reason, sintered connections must be protected from moisture and oxygen, which may not be necessary to the same extent with soldered connections. For example, it is known to use a nickel-vanadium layer as a protective layer in the metallization stack that forms the sinterable contact.

[0003] However, the quality of the subsequent sintered bond connection, for example in terms of robustness and / or corrosion resistance, is sensitive to changes in the parameters of the sintering process. Therefore, providing sinterable electrical contacts on semiconductor substrates that enable the generation of high-quality sintered bond connections within a wide process window of the sintering process (i.e. also under suboptimal sintering conditions, in particular also in air) is a constant challenge. Summary of the Invention

[0004] According to one aspect of the present disclosure, a semiconductor device includes a semiconductor substrate and a sinterable electrical contact disposed on the semiconductor substrate. The sinterable electrical contact includes a copper-based layer disposed on the semiconductor substrate. The copper-based layer has a thickness between 50 nm and 1000 nm. The sinterable electrical contact further includes a titanium-based layer disposed between the copper-based layer and the semiconductor substrate. The final functional layer for bonding the sinterable electrical contact by sintering is the copper-based layer itself or a silver-based layer disposed on the copper-based layer.

[0005] According to a further aspect of the present disclosure, a system comprises a semiconductor device as specified above and a device carrier comprising contact pads. The sinterable electrical contacts are bonded to the contact pads by a sintered bond connection.

[0006] According to a further aspect of the present disclosure, a method for forming a sinterable electrical contact on a semiconductor substrate includes depositing a titanium-based layer on the semiconductor substrate. A copper-based layer is formed on the titanium-based layer. The copper-based layer has a thickness between 50 nm and 1000 nm. The final functional layer for bonding the sinterable electrical contact by sintering is the copper-based layer itself, or a silver-based layer is formed on the copper-based layer, wherein the final functional layer for bonding the sinterable electrical contact by sintering is the silver-based layer.

[0007] According to a further aspect of the present disclosure, a method of attaching a semiconductor device as specified above to a device carrier comprising contact pads comprises sintering a sinterable electrical contact to the contact pads. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In the accompanying drawings, like reference numerals designate corresponding similar parts. Features of the various illustrated embodiments may be combined unless they are mutually exclusive, and / or may be selectively omitted if not described as being necessarily required. Embodiments are depicted in the accompanying drawings and are exemplarily detailed in the following description.

[0009] Figure 1 is a schematic cross-sectional view of an example of a semiconductor device including a semiconductor substrate and a sinterable electrical contact.

[0010] Figure 2 yes Figure 1 Schematic cross-sectional view of a specific example of a semiconductor device.

[0011] Figure 3 yes Figure 1 FIG. 1 is a schematic cross-sectional view of another specific example of a semiconductor device.

[0012] Figure 4 is a schematic cross-sectional view of an example of a system including a semiconductor device bonded to a device carrier by sintering.

[0013] Figure 5 is a flow chart illustrating stages in an exemplary method of forming a sinterable electrical contact on a semiconductor substrate.

[0014] Figure 6 is a flow chart illustrating stages of an exemplary method of attaching a semiconductor device to a device carrier by sintering. DETAILED DESCRIPTION

[0015] It is to be understood that the features of the various exemplary embodiments and examples described herein may be combined with each other unless specifically stated otherwise.

[0016] As used in this specification, the terms "electrically connected" or "electrically coupled" or similar terms are not meant to imply that elements are directly in contact with each other; intermediate elements may be provided between the "electrically connected" or "electrically coupled" elements. However, according to the present disclosure, the above-mentioned and similar terms may also optionally have the following specific meanings: elements are directly in contact with each other, that is, no intermediate elements are provided between the "electrically connected" or "electrically coupled" elements.

[0017] Further, the words “above” or “below” or similar terms with respect to a component, element or material layer formed or located or arranged “above” or “below” a surface may be used herein to mean that the component, element or material layer is “directly” located (e.g., placed, formed, arranged, deposited, etc.) “above” or “below” the implied surface, such as in direct contact with the implied surface. However, the words “above” or “below” or similar terms with respect to a component, element or material layer formed or located or arranged “above” or “below” a surface may be used herein to mean that the component, element or material layer is “indirectly” located (e.g., placed, formed, arranged, deposited, etc.) “above” or “below” the implied surface, with one or more additional components, elements or layers arranged between the implied surface and the component, element or material layer.

[0018] Reference Figure 1 , the semiconductor device 100 includes a semiconductor substrate 110. The semiconductor device 100 further includes a sinterable electrical contact 120 disposed on the semiconductor substrate 110. By "sinterable electrical contact" is meant an electrical contact that is configured to be connected to a conductive structure (such as, for example, a contact pad on a device carrier) by a sintering process.

[0019] The semiconductor substrate 110 may have a front side 110A and a back side 110B. For example, a sinterable electrical contact 120 is arranged on the back side 110B of the semiconductor substrate 110. In this case, the sinterable electrical contact 120 is also referred to in the art as backside metallization.

[0020] In other examples (not shown), the sinterable electrical contacts 120 may be additionally or exclusively arranged on the front side 110A of the semiconductor substrate 110. The sinterable electrical contacts 120 may then be referred to as the front side metallization of the semiconductor substrate 110. For illustration purposes, the sinterable electrical contacts 120 are disposed on the front side 110A of the semiconductor substrate 110. Figure 1 It is shown as backside metallization in , but it may also represent the frontside metallization of the semiconductor substrate 110 .

[0021] For example, the semiconductor substrate 110 may be a semiconductor chip or a semiconductor wafer. The semiconductor substrate 110 may include one or more electrical components, such as, for example, one or more integrated circuits (not shown), that individually or in combination control the flow of current between the front side 110A and the back side 110B of the semiconductor substrate 110. Such a semiconductor device 100 is also referred to as a vertical device. In other examples, the semiconductor substrate 110 may include one or more electrical components that individually or in combination control the flow of current in the lateral direction. Such a semiconductor device 100 is also referred to as a lateral (or horizontal) device. In a lateral device, one or more sinterable electrical contacts 120 may, for example, be provided only at one main side (front side 110A or back side 110B) of the semiconductor substrate 110.

[0022] For example, the electrical component may be a power component. In this case, the semiconductor device 100 is a semiconductor power device 100. For example, the semiconductor power device 100 may control a voltage equal to or greater than 50V, 100V, 500V, 750V, or 1000V.

[0023] The electrical components (not shown) integrated into the semiconductor substrate 110 may be, for example, transistors or transistor arrays. For example, the semiconductor device 100 may be a discrete transistor device. The electrical components integrated into the semiconductor substrate 110 may be, for example, MOSFETs (metal oxide semiconductor field effect transistors) or IGBTs (insulated gate bipolar transistors).

[0024] In other examples, the electrical component (not shown) integrated into the semiconductor substrate 110 may include or represent a diode. In this case, the semiconductor device 100 may represent a discrete diode device, such as a power diode. For example, the semiconductor device 100 may include or be a fast switching EMCON (emitter controlled) diode.

[0025] In other words, the semiconductor substrate 110 may be, for example, a diode or transistor power chip, and / or the semiconductor device 100 may be, for example, a (discrete) diode or transistor power package.

[0026] The semiconductor substrate 110 includes or is composed of a semiconductor material, such as Si, SiC, SiGe, Ge, GaN, GaAs, InAs, and other compound semiconductors. In particular, the semiconductor substrate 110 may include or be composed of Si or a WBG (wide bandgap) semiconductor material, such as, for example, SiC, GaN, and many III-V and II-VI compound semiconductors having a high bandgap.

[0027] In some examples, the sinterable electrical contact 120 can form a load contact of the semiconductor device 100. For example, the sinterable electrical contact 120 can form a source contact or an emitter contact of the semiconductor device 100 (e.g., a MOSFET or an IGBT, respectively). Additionally or alternatively, the sinterable electrical contact 120 can form a drain contact or a collector contact of the semiconductor device 100 (e.g., a MOSFET or an IGBT, respectively).

[0028] The sinterable electrical contact 120 comprises a titanium-based layer 122 and a copper-based layer 124. Here and in the following, the expression "X-based layer" means that the layer consists of material X or of an alloy comprising material X as main alloying material.

[0029] The copper-based layer 124 is disposed on the semiconductor substrate 110. The titanium-based layer 122 is disposed between the copper-based layer 124 and the semiconductor substrate 110. In some examples, the copper-based layer 124 can directly adjoin the titanium-based layer 122.

[0030] In the first case, the final functional layer for bonding the sinterable electrical contact 120 by sintering is a copper-based layer 124. In this case, the surface of the final functional layer facing away from the substrate 110 can be formed, for example, by the surface 124A of the copper-based layer 124. In other words, the final functional layer can provide an exposed surface for bonding the sinterable electrical contact 120 by the sintering process.

[0031] The final functional layer of the sinterable electrical contact 120 is the layer that interacts with the sintering bonding material (not shown) during the sintering process. Although in many examples the final functional layer (therefore) provides the exposed surface of the sinterable electrical contact 120, it is also possible that the final functional layer can be coated with a top layer (not shown), which can, for example, serve as a protective layer to promote sintering, for example, because it does not form a stable metal oxide at the sintering process temperature even when processed in air.

[0032] In the second case, the silver-based layer 126 can be disposed, for example, on the copper-based layer 124. In this case, the final functional layer for joining the sinterable electrical contact 120 by sintering is the silver-based layer 126. Similar to the first case, the surface 126A of the silver-based layer 126 facing away from the substrate 110 can be the exposed surface of the sinterable electrical contact 120 or can be covered, for example, by a coating that does not affect the function of sintering the final functional layer (here: the silver-based layer 126).

[0033] The copper-based layer 124 has a thickness T3 between 50 nm and 1000 nm. In a specific example, the thickness T3 of the copper-based layer 124 may be, for example, between 100 nm and 500 nm, in particular between 200 nm and 400 nm.

[0034] It should be noted that the thickness T3 of the copper-based layer 124 can be significantly smaller than the thickness of the copper layer in the electrical contact as a solderable contact. The copper layer in the solderable electrical contact is typically at least partially "consumed" during the soldering process and therefore needs to have a higher minimum thickness.

[0035] The sinterable electrical contact 120 may be, for example, a non-solderable contact. This means that the sinterable electrical contact 120 cannot be joined to any electrically conductive structure (eg, a contact pad on a device carrier) by a soldering process.

[0036] For example, the titanium-based layer 122 may have a thickness T2 between 100 nm and 500 nm, in particular between 200 nm and 400 nm.

[0037] The titanium-based layer 122 acts as a diffusion barrier and (optionally) as an adhesion promoter (at least in the presence of a Ti-Cu interface). In many examples, the copper-based layer 124 and the titanium-based layer 122 are in direct contact with each other, i.e., provide such an interface. However, in other examples, one or more other layers (e.g., a tungsten layer, not shown) may optionally be disposed between the titanium-based layer 122 and the copper-based layer 124.

[0038] The silver-based layer 126 , if present, may have a thickness T4 between 20 nm and 1500 nm, in particular between 100 or 200 nm and 400 or 1000 nm.

[0039] Conventional sinterable electrical contacts often use a nickel-vanadium-based layer disposed between the semiconductor substrate 110 and the final silver-based layer 126. The nickel-vanadium-based layer is weakened by oxygen, which may reach the layer during or after the sintering process. The final silver layer 126 does not prevent oxygen from reaching the nickel-vanadium-based layer, as oxygen can penetrate through the silver layer 126.

[0040] It has been found that the interface between the copper-based layer 124 and the final silver layer is not mechanically weakened by oxygen to the same extent as conventional nickel-vanadium-based layers. This can likely be due to the fact that the cohesion between the final silver layer and copper oxide is stronger than the cohesion between the final silver layer and nickel oxide.

[0041] In some examples, the sinterable electrical contact 120 does not include any nickel-vanadium-based layers. In other words, the copper-based layer 124 can be used to replace layers conventionally used in sinterable electrical contacts, such as nickel-vanadium-based layers. Avoiding nickel-vanadium-based layers enhances the robustness of the sinterable electrical contact.

[0042] Furthermore, in contrast to (conventional) nickel-vanadium-based layers, the copper-based layer 124 can form the final functional layer for sintering (see the first case described above). This can be particularly attractive if a silver paste sintering process is switched to a copper paste sintering process, since the copper-based final functional layer 124 sintered with copper paste is expected to provide a particularly high mechanical stability of the sintered bond connection (as will be described in more detail below).

[0043] Furthermore, the contact layer ( Figure 1 Not shown, see for example Figure 2 and Figure 3 A layer 210 of titanium (e.g., a titanium-based layer 210) may be disposed between the semiconductor substrate 110 and the titanium-based layer 122. The contact layer may include or consist of a material that provides good electrical contact between the sinterable electrical contact 120 and the semiconductor substrate 110.

[0044] Figure 2 Shown Figure 1 1 . A specific example of a semiconductor device 100 in FIG. 1 is shown. In this example, the semiconductor substrate 110 may, for example, include or consist of silicon (Si). The sinterable electrical contact 120 includes or consists of a titanium-based layer 122, a copper-based layer 124, and a silver-based layer 126. In the specific example shown, the titanium-based layer 122 is composed of titanium, where, for example, T2=400 nm, the copper-based layer 124 is composed of copper, where, for example, T3=300 nm, and the silver-based layer 126 is composed of silver, where, for example, T4=200 nm.

[0045] Furthermore, in particular if the semiconductor substrate 110 is composed of silicon, a contact layer formed of an aluminum-based layer 210 can be arranged between the sinterable electrical contact 120 and the substrate 110. The aluminum-based layer 210 can, for example, have a thickness T0 of between 100 nm and 500 nm, in particular between 200 nm and 400 nm. The aluminum-based layer 210 can serve as an electrical contact for the silicon substrate 110. The aluminum-based layer 210 can, for example, consist of aluminum. In the example shown, T0 = 400 nm.

[0046] Reference Figure 3, shows another specific example of the semiconductor device 100. In this example, for example, the semiconductor substrate 110 includes silicon carbide (SiC) or is composed of silicon carbide (SiC).

[0047] In this case, no aluminum-based layer is needed for electrical contact formation to the semiconductor substrate 110. Instead, the electrical contact to the semiconductor substrate 110 may be formed by a nickel-silicon (NiSi)-based layer 310, for example.

[0048] The nickel silicon based layer 310 may be disposed, for example, between the titanium based layer 122 and the semiconductor substrate 110. The nickel silicon based layer 310 may have a thickness T0, in particular, between 30 nm and 80 nm, or between 20 nm and 200 nm. In the particular example shown, for example, the nickel silicon based layer 310 may have a thickness T0 = 40 nm.

[0049] Figure 3 The sinterable electrical contact 120 in the embodiment of the present invention comprises a titanium-based layer 122, a copper-based layer 124, and (optionally) a silver-based layer 126. The titanium-based layer 122 can, for example, consist of titanium and can, for example, have a thickness T2 = 200 nm. The copper-based layer 124 can, for example, consist of copper and can, for example, have a thickness T3 = 300 nm. The silver-based layer 126 (if present) can, for example, consist of silver and can, for example, have a thickness T4 = 200 nm.

[0050] Figure 2 and Figure 3 All specific thickness values listed in may vary within the limits recited above and / or within a range of, for example, ±50%, ±30%, ±10%.

[0051] In all cases, it is possible to avoid any nickel-vanadium based layers, which are conventionally used for contact formation. This eliminates the risk of producing sintered bond connections with low mechanical properties due to degradation of nickel-vanadium based layers by oxygen.

[0052] Furthermore, in all examples, the sinterable electrical contact may be free of tin and / or may not include a tin-based layer.Tin-based layers are often used in solderable electrical contacts.

[0053] Figure 4 A system 400 is illustrated that includes the semiconductor device 100 bonded to a device carrier 410 by sintering.

[0054] The device carrier 410 can be any device carrier for mounting the semiconductor device 100, in particular a device carrier 410 configured to mount a power semiconductor device 100. For example, the semiconductor device carrier 410 can be, for example, a lead frame, a printed circuit board (PCB), or a ceramic-based carrier, such as, for example, a copper-plated ceramic carrier, for example, a DBC (direct bonded copper) carrier. The device carrier 410 includes contact pads 420. The contact pads 420 can, but need not, be a distinct portion of the device carrier 410, but can, for example, simply represent a zone or area of the device carrier 410 on which the semiconductor device 100 is to be mounted.

[0055] The sinterable electrical contact 120 is bonded to the contact pad 420 by a sintered bond connection 450. The sintered bond connection 450 includes metal sintered particles 452. The metal sintered particles 452 are in contact with each other and are electrically connected to both the final functional layer of the sinterable electrical contact 120 and the contact pad 420. As previously mentioned, the final functional layer of the sinterable electrical contact 120 can be formed from the copper-based layer 124 or from the silver-based layer 126 (and, for example, can be provided with an exposed surface 124A of the copper-based layer 124 or an exposed surface 126A of the silver-based layer 126).

[0056] The metal sintering particles 452 of the sintered bonding connection 150 may include silver or consist of silver. In this case, the final functional layer may be, for example, the silver-based layer 126. However, it is also possible to use a sintered bonding connection 450 made of silver sintering particles 452 for the sinterable electrical contact 120, wherein the final functional layer is the copper-based layer 124.

[0057] In other examples, the sintered bonding connection 450 includes copper-based sintered particles 452. In one possibility, the copper-based sintered particles 452 may be connected to a silver-based final functional layer, for example to the surface 126A of the silver-based layer 126.

[0058] In other examples, the sinterable electrical contact 120 can be provided with a copper-based final functional layer. In this case, the copper-based sintered particles 452 can be directly connected to the surface 124A of the copper-based layer 124. The direct copper-to-copper connection can provide high mechanical properties of the sintered bond connection 450. In particular, by combining the copper-based sintered bond connection 450 with the copper-based terminal of the sinterable electrical contact 120, oxygen degradation of the mechanical properties of the sinterable electrical contact 120 can be greatly reduced.

[0059] Reference Figure 5The method of forming a sinterable electrical contact 120 on a semiconductor substrate 110 includes, at A1, depositing a titanium-based layer 122 on the semiconductor substrate 110. Prior to depositing the titanium-based layer 122, several processes may be performed, depending on the material of the semiconductor substrate 110.

[0060] In the case of Si-based technologies (compare Figure 2 ), a pre-cleaning process may be initially performed. For example, the pre-cleaning process may be performed as an in-situ H2 reactive plasma etch or as an ex-situ HF wet etch. By the pre-cleaning process, native SiO2 at the exposed surface of the semiconductor substrate 110 is removed.

[0061] Subsequently, an aluminum-based layer 210 (or any other contact layer) can be deposited, for example, on the cleaned surface of the semiconductor substrate 110. The deposition of aluminum can be performed, for example, by physical vapor deposition (PVD), such as sputtering deposition. During aluminum deposition, the wafer temperature can be increased to approximately 200-400° C. by, for example, increasing the chuck temperature and / or the applied sputtering power of the deposition process. The increased substrate temperature causes the recrystallization of silicon at the interface with the aluminum-based layer 210, and the formation of an ohmic contact between the silicon substrate 110 and the aluminum-based layer 210.

[0062] After depositing the titanium-based layer 122 at A1, a copper-based layer 124 is formed at A2 on the titanium-based layer 122. For example, the copper-based layer 124 may be formed by sputtering deposition or electroplating. The copper-based layer 124 has a thickness between 50 nm and 1000 nm.

[0063] The aluminum-based layer 210, the titanium-based layer 122, and the copper-based layer 124 can be sputter-deposited, for example, in different modules (processing chambers) of a PVD cluster tool. In this case, the semiconductor substrate 110 can be kept under vacuum between the deposition of the various layers to avoid contamination and oxidation of the interfaces. This can avoid the risk of delamination of adjacent layers.

[0064] In silicon carbide (SiC) technology (comparison Figure 3 ), the contact formation before the deposition of the titanium-based layer 122 at A1 can be accomplished by depositing a NiSi-based layer 310. For example, the NiSi-based layer 310 can have a composition of 11 wt% Si and 89 wt% Ni. The formation of the NiSi-based layer 310 can be accomplished in combination with a laser thermal annealing (LTA) process.

[0065] Subsequently, before depositing the titanium-based layer at A1, one or more ex-situ cleaning processes may be performed. (One or more) ex-situ cleaning processes may be used to remove carbon produced by the Ni / SiC reaction, or to remove (one or more) oxide layers. Further, still before depositing the titanium-based layer 122 at A1, an in-situ H2 plasma etch pre-clean of the surface of the NiSi-based layer 310 may be performed.

[0066] Subsequently, a titanium-based layer 122 (at A1) and a copper-based layer 124 (at A2) may be deposited, for example sputter deposited without a vacuum breaker. The deposition of the various layers 122, 124, 126 may be performed in the same manner as described above for silicon-based technology.

[0067] According to the first case, the final functional layer for joining the sinterable electrical contact 120 by sintering is a copper-based layer 124 (at A3_1). Alternatively, according to the second case, a silver-based layer 126 is subsequently applied on the copper-based layer 124. In this case, the final functional layer for joining the sinterable electrical contact by sintering is a silver-based layer 126 (at A3_2).

[0068] As mentioned above, A3_1 can enable the bare copper termination of the sinterable electrical contact 120 to be combined with copper sintering. This particular option allows avoiding the silver-based layer 126 and can provide a high mechanical quality sintering.

[0069] In all examples where the silver-based layer 126 is used, providing the copper-based layer 124 allows for a reduction in the thickness T4 of the silver-based layer 126 compared to a case where the copper-based layer 124 would not be present. For example, in the absence of the copper-based layer 124, a thicker silver-based layer 126 (e.g., T4 ≥ 800 nm) would be necessary to achieve the desired robustness of the sinterable electrical contact 120. However, high T4 values result in increased cycle times for deposition and, therefore, higher costs.

[0070] Reference Figure 6 , a method of attaching the semiconductor device 100 to the device carrier 410 may include: providing the semiconductor device 100 as described above at B1 ; and providing the device carrier 410 including the contact pads 420 at B2 .

[0071] At B3, the sinterable electrical contact 120 is sintered to the contact pad 420. Sintering may include applying a sintering material (eg, silver particles or copper particles or a mixture of silver and copper particles) to the contact pad 420 to which the semiconductor device 100 is to be sintered.

[0072] The sintering material (silver and / or copper particles 452) can, for example, be included in a sintering paste. If the metal sintering particles 452 are dispersed in a volatile solution, then after sintering, the (porous) sintered bond connection 450 can contain only or include the metal sintering particles 452. If the metal sintering particles 452 are dispersed in an epoxy resin material, then the epoxy resin material can solidify during sintering, so that the sintered bond connection 450 includes a solidified epoxy resin matrix in which the metal sintering particles 452 are embedded.

[0073] During the sintering process, which may be performed by applying pressure and / or by applying energy (e.g., heat, radiation, etc.) to the semiconductor substrate 110 and the device carrier 410, the metal particles 452 are bonded together. Typically, the metal particles 452 do not melt during the sintering process, and no intermetallic phase is formed between the sintered material and the surface of the final functional layer and / or the surface of the contact pad 420.

[0074] The process window for sintering can include parameters that must be met (sintering specifications). For example, such parameters may include the pressure to be applied, the heat to be applied (sintering temperature), the atmosphere under which the sintering process is to be performed (e.g., in vacuum or in air), and the sintering time. The wider the process window, the easier and more reliable the sintering process. This is particularly important for customers who receive bare dies (bare chips) in which the chip manufacturer does not have control over the subsequent sintering process. For example, the sintering specifications may allow sintering under air due to the enhanced stability of the sinterable electrical contacts 120.

[0075] Example

[0076] The following examples relate to further aspects of the present disclosure:

[0077] Example 1 is a semiconductor device comprising a semiconductor substrate and a sinterable electrical contact disposed on the semiconductor substrate. The sinterable electrical contact comprises a copper-based layer disposed on the semiconductor substrate. The copper-based layer has a thickness between 50 nm and 1000 nm. The sinterable electrical contact further comprises a titanium-based layer disposed between the copper-based layer and the semiconductor substrate. The final functional layer used to bond the sinterable electrical contact by sintering is the copper-based layer itself or a silver-based layer disposed on the copper-based layer.

[0078] In Example 2, the subject matter of Example 1 can optionally include wherein the sinterable electrical contact is a non-solderable contact.

[0079] In Example 3, the subject matter of Example 1 or Example 2 can optionally include, wherein the semiconductor substrate is a silicon substrate or a silicon carbide substrate.

[0080] In Example 4, the subject matter of any preceding example can optionally include wherein the semiconductor device is a power device, and the sinterable electrical contact is a load contact of the power device.

[0081] In Example 5, the subject matter of any preceding example can optionally include wherein the copper-based layer and the titanium-based layer are in direct contact with each other.

[0082] In Example 6, the subject matter of any preceding example can optionally include wherein the copper-based layer has a thickness between 100 nm and 500 nm, specifically between 200 nm and 400 nm.

[0083] In Example 7, the subject matter of any preceding example can optionally include wherein the titanium-based layer has a thickness between 100 nm and 500 nm, specifically between 200 nm and 400 nm.

[0084] In Example 8, the subject matter of any of the preceding examples can optionally include wherein the final functional layer provides an exposed surface for bonding a sinterable electrical contact by sintering.

[0085] In Example 9, the subject matter of any preceding example can optionally include wherein the silver-based layer has a thickness between 20 nm and 1500 nm, specifically between 200 nm and 400 nm.

[0086] In Example 10, the subject matter of any of the preceding examples can optionally further include an aluminum-based layer disposed between the titanium-based layer and the semiconductor substrate (particularly a silicon substrate).

[0087] In Example 11, the subject matter of Example 10 can optionally include, wherein the aluminum-based layer has a thickness between 100 nm and 500 nm, particularly between 200 nm and 400 nm.

[0088] In Example 12, the subject matter of any preceding example can optionally further include, wherein the nickel silicon based layer is disposed between the titanium based layer and the semiconductor substrate (particularly a silicon carbide substrate).

[0089] In Example 13, the subject matter of Example 12 can optionally include, wherein the nickel silicon based layer has a thickness between 20 nm and 200 nm, specifically between 30 nm and 80 nm.

[0090] In Example 14, the subject matter of any of the preceding examples can optionally include wherein the sinterable electrical contact does not include a nickel-vanadium-based layer and / or a tin-based layer.

[0091] In Example 15, the subject matter of any of the preceding examples can optionally include wherein the sinterable electrical contact is or forms part of a backside metallization and / or a frontside metallization of the semiconductor device.

[0092] Example 16 is a system comprising a semiconductor device as described above and a device carrier comprising contact pads. The sinterable electrical contacts are bonded to the contact pads by sintering the bond connection.

[0093] In Example 17, the subject matter of Example 16 can optionally include, wherein the sintered bond connection includes silver-based sintered particles.

[0094] In Example 18, the subject matter of Example 17 can optionally include, wherein the final functional layer is a silver-based layer.

[0095] In Example 19, the subject matter of Example 16 can optionally include, wherein the sintered bond connection comprises copper-based sintered particles.

[0096] In Example 20, the subject matter of Example 16 can optionally include, wherein the final functional layer is a copper-based layer.

[0097] Example 21 is a method for forming a sinterable electrical contact on a semiconductor substrate, comprising depositing a titanium-based layer on the semiconductor substrate. A copper-based layer is formed on the titanium-based layer. The copper-based layer has a thickness between 50 nm and 1000 nm. A final functional layer for bonding the sinterable electrical contact by sintering is the copper-based layer, or a silver-based layer is formed on the copper-based layer, wherein the final functional layer for bonding the sinterable electrical contact by sintering is the silver-based layer.

[0098] In Example 22, the subject matter of Example 21 can optionally include, wherein the semiconductor substrate is a silicon substrate, the method further comprising depositing an aluminum-based layer on the silicon substrate before depositing the titanium-based layer, wherein during depositing the aluminum-based layer, the silicon substrate is heated to a temperature between 200°C and 400°C.

[0099] In Example 23, the subject matter of Example 21 can optionally include wherein the semiconductor substrate is a silicon carbide substrate, the method further comprising, before depositing the titanium based layer, depositing a nickel silicon based layer on the silicon carbide substrate, and annealing the silicon carbide substrate and the nickel silicon based layer.

[0100] In Example 24, the subject matter of Example 21 can optionally include, wherein the copper-based layer is formed by sputtering or by electroplating.

[0101] Example 25 is a method of attaching the semiconductor device of any one of Examples 1 to 15 to a device carrier including a contact pad. The method includes sintering a sinterable electrical contact to the contact pad.

[0102] Although specific embodiments have been illustrated and described herein, it will be appreciated by those skilled in the art that various alternative and / or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptation or variation of the specific embodiments discussed herein. Therefore, the present invention is intended to be limited only by the claims and their equivalents.

Claims

1. A semiconductor device comprising: semiconductor substrates; and A sinterable electrical contact disposed on a semiconductor substrate, wherein the sinterable electrical contact comprises: a copper-based layer disposed on a semiconductor substrate, the copper-based layer having a thickness between 50 nm and 1000 nm; as well as A titanium-based layer is disposed between the copper-based layer and the semiconductor substrate, wherein the final functional layer for joining the sinterable electrical contact by sintering is the copper-based layer or a silver-based layer disposed on the copper-based layer.

2. The semiconductor device of claim 1, wherein the sinterable electrical contact is a non-solderable contact. 3 . The semiconductor device according to claim 1 , wherein the semiconductor substrate is a silicon substrate or a silicon carbide substrate.

4. The semiconductor device according to any of the preceding claims, wherein the semiconductor device is a power device and the sinterable electrical contact is a load contact of the power device.

5. The semiconductor device according to any of the preceding claims, wherein the copper-based layer and the titanium-based layer are in direct contact with each other. 6 . The semiconductor device according to claim 1 , wherein the copper-based layer has a thickness between 100 nm and 500 nm, in particular between 200 nm and 400 nm. 7 . The semiconductor device according to claim 1 , wherein the titanium-based layer has a thickness between 100 nm and 500 nm, in particular between 200 nm and 400 nm.

8. A semiconductor device according to any of the preceding claims, wherein the final functional layer provides an exposed surface for bonding a sinterable electrical contact by sintering.

9. Semiconductor device according to any of the preceding claims, wherein the silver-based layer has a thickness between 20 nm and 1500 nm, in particular between 200 nm and 400 nm.

10. The semiconductor device according to any one of the preceding claims, further comprising: An aluminum-based layer is disposed between the titanium-based layer and a semiconductor substrate, in particular a silicon substrate. 11 . The semiconductor device as claimed in claim 10 , wherein the aluminum-based layer has a thickness of between 100 nm and 500 nm, in particular between 200 nm and 400 nm.

12. The semiconductor device according to any one of the preceding claims, further comprising: A nickel silicon based layer is disposed between the titanium based layer and a semiconductor substrate, in particular a silicon carbide substrate. 13 . The semiconductor device as claimed in claim 12 , wherein the nickel silicon based layer has a thickness between 20 nm and 200 nm, in particular between 30 nm and 80 nm.

14. The semiconductor device according to any of the preceding claims, wherein the sinterable electrical contact does not comprise a nickel vanadium based layer and / or a tin based layer.

15. A semiconductor device according to any of the preceding claims, wherein the sinterable electrical contact is or forms part of a backside metallization and / or a frontside metallization of the semiconductor device. 16 . A system comprising a semiconductor device according to claim 1 and a device carrier comprising a contact pad, wherein the sinterable electrical contact is bonded to the contact pad by a sintered bond connection. The system of claim 16 , wherein the sintered bond connection comprises silver-based sintered particles.

18. The system of claim 17, wherein the final functional layer is a silver-based layer.

19. The system of claim 16, wherein the sintered bond connection comprises copper-based sintered particles.

20. The system of claim 19, wherein the final functional layer is a copper based layer.

21. A method of forming a sinterable electrical contact on a semiconductor substrate, the method comprising: depositing a titanium-based layer on a semiconductor substrate; and A copper-based layer is formed on the titanium-based layer, the copper-based layer having a thickness between 50 nm and 1000 nm, wherein The final functional layer for joining the sinterable electrical contact by sintering is a copper-based layer; or A silver-based layer is formed on the copper-based layer, wherein the final functional layer for joining the sinterable electrical contact by sintering is the silver-based layer.

22. The method according to claim 21, wherein the semiconductor substrate is a silicon substrate, the method further comprising: Prior to depositing the titanium based layer, an aluminum based layer is deposited on the silicon substrate, wherein the silicon substrate is heated to a temperature between 200° C. and 400° C. during deposition of the aluminum based layer.

23. The method according to claim 21, wherein the semiconductor substrate is a silicon carbide substrate, the method further comprising: depositing a nickel silicon based layer on the silicon carbide substrate before depositing the titanium based layer, and The silicon carbide substrate and the nickel silicon based layer are annealed.

24. The method according to any one of claims 21 to 23, wherein the copper-based layer is formed by sputtering or by electroplating.

25. A method of attaching a semiconductor device according to any one of claims 1 to 15 to a device carrier comprising contact pads, the method comprising: A sinterable electrical contact is sintered to the contact pad.

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