Semiconductor structure and thin film transistor

Abstract

The invention provides a semiconductor structure and a thin film transistor. The semiconductor structure comprises a first oxide layer and a second oxide layer which are arranged in a laminated mode. Wherein the content of the indium element in the first oxide layer is greater than or equal to the content of the indium element in the second oxide layer, and the content of the gallium element in the second oxide layer is greater than or equal to the content of the gallium element in the first oxide layer. The oxide layer with high mobility and the oxide layer with low mobility are laminated, so that a semiconductor structure with a high-mobility channel and a stable threshold voltage (Vth) is formed, and the stability of the thin film transistor is further improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor devices, in particular to a semiconductor structure and a thin film transistor. Background Art

[0002] The array substrate is an important component in the display panel, which is provided with a pixel driving circuit that can be used to drive the light-emitting elements to emit light. At least some of the thin film transistors (TFTs) in the pixel driving circuit can be oxide thin film transistors. Oxide thin film transistors have advantages such as low leakage current and good uniformity, which can enable the display panel to maintain a good display effect. Therefore, oxide thin film transistors are used in wearable device products.

[0003] However, the electrical properties of the semiconductor in the existing oxide thin film transistors are not stable, which may easily lead to high power consumption of the array substrate. Summary of the Invention

[0004] The object of the present invention is to provide a semiconductor structure and a thin film transistor to solve the problem of electrical instability in the prior art oxide thin film transistor.

[0005] To achieve the above objectives, the present invention provides a semiconductor structure comprising a first oxide layer and a second oxide layer. The second oxide layer is disposed on the first oxide layer. The first oxide layer has an indium content greater than or equal to the indium content in the second oxide layer, and the second oxide layer has a gallium content greater than or equal to the gallium content in the first oxide layer.

[0006] Furthermore, the semiconductor structure further includes a third oxide layer, the third oxide layer being disposed on a surface of the second oxide layer remote from the first oxide layer. The indium content of the third oxide layer is greater than or equal to the indium content of the second oxide layer and less than or equal to the indium content of the first oxide layer; and the gallium content of the third oxide layer is greater than or equal to the gallium content of the first oxide layer and less than or equal to the gallium content of the second oxide layer.

[0007] Furthermore, the semiconductor structure further includes a fourth oxide layer, the fourth oxide layer being disposed on a surface of the third oxide layer remote from the second oxide layer. The fourth oxide layer has an indium content greater than or equal to that of the second oxide layer and less than or equal to that of the third oxide layer; and the fourth oxide layer has a gallium content greater than or equal to that of the third oxide layer and less than or equal to that of the second oxide layer.

[0008] Furthermore, the number of the second oxide layer is at least two, and the at least two second oxide layers are respectively provided on both sides of the first oxide layer. Preferably, the number of the third oxide layer is at least two, and the at least two third oxide layers are respectively provided on the side of the second oxide layer away from the first oxide layer. Preferably, the number of the fourth oxide layer is at least two, and the at least two fourth oxide layers are respectively provided on the side of the third oxide layer away from the second oxide layer.

[0009] Furthermore, at least one of the first oxide layer, the second oxide layer, the third oxide layer, and the fourth oxide layer further comprises zinc. Preferably, in the first oxide layer, the content of zinc is less than or equal to 40%; in the second oxide layer, the content of zinc is less than or equal to 40%; in the third oxide layer, the content of zinc is less than or equal to 40% and greater than or equal to 10%; and in the fourth oxide layer, the content of zinc is less than or equal to 30%.

[0010] Furthermore, at least one of the first oxide layer, the second oxide layer, the third oxide layer, and the fourth oxide layer further comprises at least one of tin, iron, and praseodymium. Preferably, the tin content is less than or equal to 30%, the iron content is less than or equal to 10%, and the praseodymium content is less than or equal to 10%.

[0011] Furthermore, in the first oxide layer, the content of indium is less than or equal to 90%, and the content of gallium is less than or equal to 30%. In the second oxide layer, the content of indium is less than or equal to 70%, and the content of gallium is less than or equal to 60%.

[0012] Furthermore, in the third oxide layer, the content of the indium element is less than or equal to 70% and greater than or equal to 10%; the content of the gallium element is less than or equal to 60% and greater than or equal to 10%.

[0013] Furthermore, in the fourth oxide layer, the content of the indium element is less than or equal to 30%, and the content of the gallium element is less than or equal to 60% and greater than or equal to 30%.

[0014] The present invention also provides a thin film transistor, which includes the semiconductor structure as described above, a gate insulated on one side or both sides of the semiconductor structure, and a source and drain insulated on the gate and electrically connected to both ends of the semiconductor structure.

[0015] The advantages of the present invention are: a semiconductor structure and a thin film transistor of the present invention stack a high-mobility oxide layer and a low-mobility oxide layer, transport electrons through the oxide film layer with higher mobility, and supplement oxygen to the oxide film layer with higher mobility through the oxide film layer with a larger bandgap width, thereby forming a semiconductor structure with a high-mobility channel and a stable threshold voltage (Vth), thereby increasing the stability of the thin film transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 Schematic diagram of the layered structure of the thin film transistor in Example 1 of the present invention;

[0018] Figure 2 Schematic diagram of the layered structure of the semiconductor structure in Example 1 of the present invention;

[0019] Figure 3 Schematic diagram of the energy band structure of the semiconductor structure in Example 1 of the present invention;

[0020] Figure 4 Schematic diagram of the structure of the energy band of the semiconductor structure under the influence of the electric field in Example 1 of the present invention;

[0021] Figure 5 Schematic diagram of the layered structure of a semiconductor structure having five film layers in Example 2 of the present invention;

[0022] Figure 6 Schematic diagram of the layered structure of a semiconductor structure having three film layers in Example 2 of the present invention;

[0023] Figure 7 Schematic diagram of the layered structure of a semiconductor structure having three film layers in Example 3 of the present invention;

[0024] Figure 8 Schematic diagram of the layered structure of a semiconductor structure with two film layers in Example 3 of the present invention.

[0025] The components in the figure are shown as follows:

[0026] Thin film transistor 100; Flexible layer 10;

[0027] Blocking layer 20; Bottom gate 30;

[0028] bottom gate insulating layer 40; semiconductor structure 50;

[0029] A first oxide layer 51; A second oxide layer 52;

[0030] a third oxide layer 53; a fourth oxide layer 54;

[0031] Top gate insulating layer 60; Top gate 70;

[0032] Interlayer dielectric layer 80; Source and drain 90. DETAILED DESCRIPTION

[0033] The following describes preferred embodiments of the present invention with reference to the accompanying drawings to demonstrate that the present invention can be implemented. These embodiments will fully introduce the present invention to those skilled in the art, making the technical content clearer and easier to understand. The present invention can be embodied in many different forms of embodiments, and the scope of protection of the present invention is not limited to the embodiments described herein.

[0034] In the drawings, components with identical structures are denoted by the same reference numerals, and components with similar structures or functions are denoted by similar reference numerals. The size and thickness of each component shown in the drawings are arbitrary and are not limited by the present invention. For clarity, the thickness of components in some places in the drawings is appropriately exaggerated.

[0035] In addition, the following descriptions of the various embodiments of the invention are made with reference to the attached diagrams to illustrate specific embodiments of the invention in which the present invention may be implemented. The directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", "inner", "outer", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the present invention, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0036] When some components are described as being "on" another component, the component may be directly placed on the other component; there may also be an intermediate component with the component placed on the intermediate component, and the intermediate component placed on the other component. When a component is described as being "mounted to" or "connected to" another component, the two can be understood to be directly "mounted" or "connected" or indirectly "mounted to" or "connected to" the other component through an intermediate component.

[0037] Example 1

[0038] In an embodiment of the present invention, a thin film transistor 100 is provided, such as Figure 1 As shown, the thin film transistor 100 includes a semiconductor structure 50, a top gate 70, a bottom gate 30, a source and drain 90, an insulating module and a substrate module.

[0039] The substrate module includes a stacked flexible layer 10 and a barrier layer 20. The flexible layer 10 can be a single or double-layer polyimide (PI) film layer, which is used to achieve a flexible and bendable display. The barrier layer 20 is an inorganic film layer that blocks water and oxygen, protecting the conductive structure of the thin-film transistor 100.

[0040] The insulating film layer includes a bottom gate insulating layer 40, a top gate insulating layer 60 and an interlayer dielectric layer 80. The insulating module is used to insulate and protect the conductive structure in the thin film transistor 100 to prevent short circuits between wirings.

[0041] The bottom gate 30 is disposed on a surface of the barrier layer 20 away from the flexible layer 10. The bottom gate insulating layer 40 is disposed on the barrier layer 20 and covers the bottom gate 30. The semiconductor structure 50 is disposed on a surface of the bottom gate insulating layer 40 away from the bottom gate 30. The top gate insulating layer 60 is disposed on a surface of the semiconductor structure 50 away from the bottom gate 30. The top gate 70 is disposed on a surface of the top gate insulating layer 60 away from the semiconductor structure 50. The interlayer dielectric layer 80 covers the semiconductor structure 50 and the top gate 70. The source and drain electrodes 90 are disposed on the interlayer dielectric layer 80 and pass through the interlayer dielectric layer 80 to connect to both ends of the semiconductor structure 50. In this embodiment of the present invention, the thin film transistor 100 has a combined top-gate and bottom-gate structure. However, in other embodiments of the present invention, the structure of the thin film transistor 100 is not limited and may also be a bottom-gate type, a top-gate type, a dual-gate type, or the like.

[0042] like Figure 2As shown, the semiconductor structure 50 is made of an oxide material and includes a first oxide layer 51, two second oxide layers 52, two third oxide layers 53, and two fourth oxide layers 54. The two second oxide layers 52 are disposed on the upper and lower surfaces of the first oxide layer 51, respectively. A third oxide layer 53 is disposed on each surface of the two second oxide layers 52 away from the first oxide layer 51, and two fourth oxide layers 54 are disposed on each surface of the two third oxide layers 53 away from the second oxide layer 52. The total thickness of the semiconductor structure 50 is less than or equal to 140 nanometers, with the total thickness of the semiconductor structure 50 being 70 nanometers and 105 nanometers. The thicknesses of the first oxide layer 51, the second oxide layer 52, the third oxide layer 53, and the fourth oxide layer 54 are all between 1 nanometer and 20 nanometers, for example, the thicknesses of the first oxide layer 51, the second oxide layer 52, the third oxide layer 53, and the fourth oxide layer 54 are all 10 nanometers and 15 nanometers.

[0043] The oxide material includes indium, gallium and zinc. Among them, in the atomic ratio of each metal element in the oxide material, the higher the content of indium, the higher the carrier concentration, and thus the higher the mobility of the corresponding film layer, but it is easy to cause the threshold voltage (Vth) in the semiconductor structure to be negatively biased, which in turn easily causes the electrical instability of the thin film transistor. The higher the atomic ratio of gallium in the oxide material, the larger the band gap, which will make the threshold voltage of the semiconductor structure more positive, but will suppress the carrier concentration and mobility. (The contents described below are all atomic ratio contents)

[0044] Based on the above, in an embodiment of the present invention, the content of indium in the first oxide layer 51 and the third oxide layer 53 is greater than or equal to the content of indium in the second oxide layer 52 and the fourth oxide layer 54, and the content of gallium in the second oxide layer 52 and the fourth oxide layer 54 is greater than or equal to the content of gallium in the first oxide layer 51 and the third oxide layer 53, thereby promoting the mobility of the first oxide layer 51 and the third oxide layer 53 to be greater than or equal to the mobility of the second oxide layer 52 and the fourth oxide layer 54, and also making the band gap width of the second oxide layer 52 and the fourth oxide layer 54 greater than or equal to the band gap width of the first oxide layer 51 and the third oxide layer 53, thereby making the first oxide layer 51 and the third oxide layer 53 become high-mobility channels in the semiconductor structure 50, thereby forming a multi-channel semiconductor structure with high mobility.

[0045] Specifically, the relationship between the indium content in the first oxide layer 51, the second oxide layer 52, the third oxide layer 53, and the fourth oxide layer 54 is as shown in Formula 1, and the relationship between the gallium content in the first oxide layer 51, the second oxide layer 52, the third oxide layer 53, and the fourth oxide layer 54 is as shown in Formula 2:

[0046] Formula 1: The indium content in the first oxide layer 51 ≥ the indium content in the third oxide layer 53 ≥ the indium content in the fourth oxide layer 54 ≥ the indium content in the second oxide layer 52;

[0047] Formula 2: Gallium content in the first oxide layer 51 ≤ Gallium content in the third oxide layer 53 ≤ Gallium content in the fourth oxide layer 54 ≤ Gallium content in the second oxide layer 52 .

[0048] Preferably, the relationship between the indium content in the first oxide layer 51, the second oxide layer 52, the third oxide layer 53, and the fourth oxide layer 54 is as shown in Formula 3, and the relationship between the gallium content in the first oxide layer 51, the second oxide layer 52, the third oxide layer 53, and the fourth oxide layer 54 is as shown in Formula 4:

[0049] Formula 3: Indium content in the first oxide layer 51 > Indium content in the third oxide layer 53 > Indium content in the fourth oxide layer 54 > Indium content in the second oxide layer 52;

[0050] Formula 4: Gallium content in the first oxide layer 51 < Gallium content in the third oxide layer 53 < Gallium content in the fourth oxide layer 54 < Gallium content in the second oxide layer 52 .

[0051] According to the relationship between the content of indium and gallium in each film layer in Formula 3 and Formula 4, it can be seen that the mobility relationship of the first oxide layer 51, the second oxide layer 52, the third oxide layer 53 and the fourth oxide layer 54 in this embodiment is shown in Formula 5, and the band gap relationship is shown in Formula 6:

[0052] Formula 5: mobility of the first oxide layer 51 > mobility of the third oxide layer 53 > mobility of the fourth oxide layer 54 > mobility in the second oxide layer 52;

[0053] Formula 6: The bandgap width of the first oxide layer 51 is less than the bandgap width of the third oxide layer 53, and the bandgap width of the fourth oxide layer 54 is less than the bandgap width of the second oxide layer 52. (The bandgap widths between the layers in the semiconductor structure are as follows: Figure 3 and Figure 4 As shown in , the energy between the lowest energy level of the conduction band and the highest energy level of the valence band is the band gap)

[0054] The first oxide layer 51, with the highest mobility, serves as the primary channel in the multi-channel semiconductor structure 50. Located at the center of the semiconductor structure 50, it is farthest from the insulating module in the thin-film transistor 100 and is least affected by the electric field, enabling high mobility and serving as electron transport. Because the third oxide layer 53 has a mobility greater than that of the second oxide layer 52 and the fourth oxide layer 54, and less than that of the first oxide layer 51, it serves as a secondary channel in the multi-channel semiconductor structure 50 and also serves as electron transport. The second oxide layer 52, with the largest bandgap, is located between the first oxide layer 51 and the third oxide layer 53. It can simultaneously replenish oxygen atoms in the first and third oxide layers 51, 53, reducing oxygen vacancies in the semiconductor structure 50. This can regulate the carrier concentrations in the first and third oxide layers 51, 53, and prevent unstable carrier motion. This, in turn, prevents negative threshold voltage bias in the semiconductor structure 50, thereby improving the electrical stability of the thin-film transistor 100. Since the band gap width of the fourth oxide layer 54 is greater than that of the third oxide layer 53 and it is located at the outermost side of the entire semiconductor structure 50, it can also supplement oxygen atoms for the third oxide layer 53 and regulate the carrier concentration in the third oxide layer 53. At the same time, it can also block the infiltration of impurities in the insulating module in the thin film transistor 100, thereby further improving the stability of the semiconductor structure 50.

[0055] Furthermore, in the first oxide layer 51 and the third oxide layer 53, the indium content is 30%-90%, for example, 50% and 80% respectively; the gallium content is 0%-40%, for example, 15% and 30% respectively; and the zinc content is 0%-40%, for example, 10% and 35% respectively. In the second oxide layer 52 and the fourth oxide layer 54, the indium content is 0%-40%, for example, 10% and 30% respectively; the gallium content is 30%-60%, for example, 35% and 40% respectively; and the zinc content is 0%-40%, for example, 15% and 35% respectively.

[0056] Preferably, in the first oxide layer 51, the content of indium element is 50%-90%, for example, the content of indium element can be 55% or 75%, the content of gallium element is 0%-30%, for example, the content of gallium element can be 20% or 25%, the content of zinc element is 0%-40%, and the content of zinc element can be 5% or 25%; in the third oxide layer 53, the content of indium element is 30%-70%, for example, the content of indium element can be 10% or 20%, the content of gallium element is 10%-40%, for example, the content of gallium element can be 20% or 35%, the content of zinc element is 10%-40%, for example, the content of zinc element can be 15% or 20%. In the second oxide layer 52, the content of indium element is 0%-30%, for example, the content of indium element can be 5% or 15%, the content of gallium element is 30%-60%, for example, the content of gallium element can be 45% or 55%, and the content of zinc element is 0%-30%, for example, the content of zinc element can be 5% or 10%; in the fourth oxide layer 54, the content of indium element is 10%-40%, for example, the content of indium element can be 25% or 35%, the content of gallium element is 30%-60%, for example, the content of gallium element can be 45% or 50%, and the content of zinc element is 10%-40%, for example, the content of zinc element can be 20% or 30%.

[0057] For example, the first oxide layer 51 may contain 70% indium, 10% gallium, and 20% zinc. The third oxide layer 53 may contain 50% indium, 25% gallium, and 25% zinc. The second oxide layer 52 may contain 20% indium, 55% gallium, and 25% zinc. The fourth oxide layer 54 may contain 25% indium, 50% gallium, and 25% zinc.

[0058] Furthermore, the semiconductor structure 50 can be prepared by an atomic layer deposition (ALD) process. Specifically, during the preparation of the semiconductor structure 50, the atomic layer deposition process can adjust the film-forming atomic ratio of each film layer according to the atomic ratio requirements of each film layer in the semiconductor structure 50, thereby forming a multi-layer oxide stacked semiconductor structure 50 with different atomic ratios of indium, gallium, and zinc. At least one oxide layer in the semiconductor structure 50 can also contain at least one doping element such as tin, iron, and praseodymium. The content of the tin element is 0%-30%, for example, the content of the tin element can be 10% or 20%, the content of the iron element is 0%-10%, for example, the content of the iron element can be 5% or 8%, and the content of the praseodymium element is 0%-10%, for example, the content of the praseodymium element can be 5% or 8%.

[0059] For example, the first oxide layer 51 may contain 60% indium, 5% gallium, 15% zinc, and 20% tin. The third oxide layer 53 may contain 45% indium, 20% gallium, 30% zinc, and 5% iron. The second oxide layer 52 may contain 15% indium, 55% gallium, 25% zinc, and 5% praseodymium. The fourth oxide layer 54 may contain 20% indium, 45% gallium, 20% zinc, and 15% tin.

[0060] It is worth noting that the above percentages are the content percentages of different metal elements in each oxide layer, and other elements in the oxide layer (such as oxygen) are not included in the calculation range of the above content percentages.

[0061] In an embodiment of the present invention, a semiconductor structure having multiple channels is formed by alternating multiple layers of high-mobility oxide film layers and multiple layers of low-mobility oxide film layers. Electrons are transported through the oxide film layers with higher mobility, and at the same time, the oxide film layers with higher mobility are oxygenated through the oxide film layers with larger bandgap width, thereby regulating the threshold voltage in the semiconductor structure, thereby increasing the stability of the thin film transistor while achieving high mobility.

[0062] Example 2

[0063] A thin film transistor is provided in an embodiment of the present invention. The thin film transistor provided in the embodiment of the present invention differs from the thin film transistor provided in Example 1 in that the layered structure of semiconductor structure 50 is different. Apart from these differences, the thin film transistor provided in the embodiment of the present invention is similar to the thin film transistor provided in Example 1 and is therefore not described in detail here.

[0064] like Figure 5 As shown, the semiconductor structure 50 is made of an oxide material that includes indium, gallium, and zinc. The semiconductor structure 50 comprises five layers: a first oxide layer 51, two second oxide layers 52, and two third oxide layers 53. The two second oxide layers 52 are disposed on the upper and lower surfaces of the first oxide layer 51, respectively. A third oxide layer 53 is disposed on a surface of each of the two second oxide layers 52 that is distal from the first oxide layer 51. The total thickness of the semiconductor structure 50 is less than or equal to 140 nanometers, for example, 25 nanometers or 75 nanometers. The first oxide layer 51, the second oxide layer 52, and the third oxide layer 53 each have a thickness of 1 nanometer to 20 nanometers, for example, 5 nanometers or 15 nanometers. For example, the total thickness of the semiconductor structure 50 is 50 nanometers, and the first oxide layer 51, the second oxide layer 52, and the third oxide layer 53 each have a thickness of 10 nanometers.

[0065] In an embodiment of the present invention, the content of indium in the first oxide layer 51 and the third oxide layer 53 is greater than or equal to the content of indium in the second oxide layer 52, and the content of gallium in the second oxide layer 52 is greater than or equal to the content of gallium in the first oxide layer 51 and the third oxide layer 53, thereby promoting the mobility of the first oxide layer 51 and the third oxide layer 53 to be greater than or equal to the mobility of the second oxide layer 52, and at the same time promoting the band gap width of the second oxide layer 52 to be greater than or equal to the band gap width of the first oxide layer 51 and the third oxide layer 53, thereby making the first oxide layer 51 and the third oxide layer 53 become high-mobility channels in the semiconductor structure 50, thereby forming a multi-channel semiconductor structure with high mobility.

[0066] Specifically, the relationship between the indium content in the first oxide layer 51, the second oxide layer 52, and the third oxide layer 53 is as shown in Formula 7, and the relationship between the gallium content is as shown in Formula 8:

[0067] Formula 7: The indium content in the first oxide layer 51 ≥ the indium content in the third oxide layer 53 ≥ the indium content in the second oxide layer 52;

[0068] Formula 8: The gallium content in the first oxide layer 51 ≤ the gallium content in the third oxide layer 53 ≤ the gallium content in the second oxide layer 52 .

[0069] Preferably, the relationship between the indium content in the first oxide layer 51, the second oxide layer 52, and the third oxide layer 53 is as shown in Formula 9, and the relationship between the gallium content is as shown in Formula 10:

[0070] Formula 9: Indium content in the first oxide layer 51 > Indium content in the third oxide layer 53 > Indium content in the second oxide layer 52;

[0071] Formula 10: Gallium content in the first oxide layer 51 < Gallium content in the third oxide layer 53 < Gallium content in the second oxide layer 52 .

[0072] According to the relationship between the content of indium and gallium in each film layer in equations 9 and 10, the relationship between the mobility of the first oxide layer 51, the second oxide layer 52, and the third oxide layer 53 in this embodiment is shown in equation 11, and the relationship between the band gap widths is shown in equation 12:

[0073] Formula 11: The mobility of the first oxide layer 51 > the mobility of the third oxide layer 53 > the mobility in the second oxide layer 52;

[0074] Formula 12: The band gap width of the first oxide layer 51 is less than the band gap width of the third oxide layer 53 and less than the band gap width of the second oxide layer 52 .

[0075] The first oxide layer 51, with the highest mobility, serves as the primary channel in the multi-channel semiconductor structure 50. Located at the center of the semiconductor structure 50, it is farthest from the insulating module in the thin-film transistor and is least affected by the electric field, enabling high mobility and serving as electron transport. Because the third oxide layer 53 has a mobility greater than that of the second oxide layer 52 but less than that of the first oxide layer 51, it also serves as a secondary channel in the multi-channel semiconductor structure 50 and serves as electron transport. The second oxide layer 52, with the largest bandgap, is located between the first oxide layer 51 and the third oxide layer 53 and can simultaneously replenish oxygen atoms in both the first oxide layer 51 and the third oxide layer 53, reducing oxygen vacancies in the semiconductor structure 50. This regulates the carrier concentrations in the first oxide layer 51 and the third oxide layer 53, preventing unstable carrier motion and, consequently, preventing a negative bias in the threshold voltage of the semiconductor structure 50, thereby improving the electrical stability of the thin-film transistor.

[0076] Furthermore, in the first oxide layer 51 and the third oxide layer 53, the indium content is 10%-90%, for example, 15% and 25%; the gallium content is 0%-60%, for example, 45% and 50%; and the zinc content is 0%-40%, for example, 5% and 30%. In the second oxide layer 52, the indium content is 0%-40%, for example, 25% and 37%; the gallium content is 30%-60%, for example, 47% and 57%; and the zinc content is 0%-40%, for example, 7% and 17%.

[0077] Preferably, in the first oxide layer 51, the content of indium element is 50%-90%, for example, the content of indium element can be 65% or 85%, the content of gallium element is 0%-30%, for example, the content of gallium element can be 17% or 27%, and the content of zinc element is 0%-40%, for example, the content of zinc element can be 7% or 27%; in the third oxide layer 53, the content of indium element is 10%-70%, for example, the content of indium element can be 30% or 50%, the content of gallium element is 10%-60%, for example, the content of gallium element can be 37% or 55%, and the content of zinc element is 10%-40%, for example, the content of zinc element can be 17% or 27%.

[0078] For example, in the first oxide layer 51, the indium content is 80%, the gallium content is 15%, and the zinc content is 5%. In the third oxide layer 53, the indium content is 40%, the gallium content is 40%, and the zinc content is 20%. In the second oxide layer 52, the indium content is 35%, the gallium content is 45%, and the zinc content is 20%.

[0079] Furthermore, at least one oxide layer in the semiconductor structure 50 may further include at least one doping element selected from the group consisting of tin, iron, and praseodymium. The tin content is 0%-30%, for example, 7% or 27%, the iron content is 0%-10%, for example, 2% or 4%, and the praseodymium content is 0%-10%, for example, 2% or 4%.

[0080] For example, in the first oxide layer 51, the indium content is 60%, the gallium content is 20%, the zinc content is 13%, and the iron or praseodymium content is 7%. In the third oxide layer 53, the indium content is 35%, the gallium content is 30%, the zinc content is 25%, and the tin content is 10%. In the second oxide layer 52, the indium content is 10%, the gallium content is 50%, the zinc content is 37%, and the iron or praseodymium content is 3%.

[0081] It is worth noting that the above percentages are the content percentages of different metal elements in each oxide layer, and other elements (such as oxygen) in the oxide layer are not within the statistical range of the above content percentages.

[0082] Furthermore, in other embodiments of the present invention, there is also provided Figure 6 The semiconductor structure with three film layers shown in FIG. This semiconductor structure with three film layers only includes a first oxide layer 51, a second oxide layer 52, and a third oxide layer 53 stacked in sequence. The atomic ratio of the metal elements in each film layer is similar to that of the semiconductor structure provided in this embodiment, so it will not be described in detail here. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of this application.

[0083] In an embodiment of the present invention, a semiconductor structure with multiple channels is formed by alternating multiple layers of high-mobility oxide film layers and low-mobility oxide film layers. Electrons are transported through the oxide film layers with higher mobility, and at the same time, the oxide film layers with higher mobility are oxygenated through the oxide film layers with larger bandgap width, thereby regulating the threshold voltage in the semiconductor structure, thereby increasing the stability of the thin film transistor while achieving high mobility.

[0084] Example 3

[0085] A thin film transistor is provided in an embodiment of the present invention. The thin film transistor provided in the embodiment of the present invention differs from the thin film transistor provided in Example 1 in that the layered structure of semiconductor structure 50 is different. Aside from these differences, the thin film transistor provided in the embodiment of the present invention is similar to the thin film transistor provided in Example 1 and is therefore not described in detail here.

[0086] like Figure 7As shown, the semiconductor structure 50 is made of an oxide material, and the oxide material includes indium, gallium, and zinc. The semiconductor structure 50 has three film layers, namely a first oxide layer 51 and two second oxide layers 52, and the two second oxide layers 52 are respectively disposed on the upper and lower surfaces of the first oxide layer 51. The total thickness of the semiconductor structure 50 is less than or equal to 60 nanometers, for example, the total thickness of the semiconductor structure 50 is 21 nanometers and 36 nanometers; the film thickness of the first oxide layer 51 and the second oxide layer 52 are both 1 nanometer to 20 nanometers, for example, the film thickness of the first oxide layer 51 and the second oxide layer 52 are both 7 nanometers and 12 nanometers.

[0087] In an embodiment of the present invention, the indium content in the first oxide layer 51 is greater than or equal to the indium content in the second oxide layer 52, and the gallium content in the second oxide layer 52 is greater than or equal to the gallium content in the first oxide layer 51. Preferably, the indium content in the first oxide layer 51 is greater than the indium content in the second oxide layer 52, and the gallium content in the second oxide layer 52 is greater than the gallium content in the first oxide layer 51, thereby promoting the mobility of the first oxide layer 51 to be greater than the mobility of the second oxide layer 52, and simultaneously promoting the band gap of the second oxide layer 52 to be greater than the band gap of the first oxide layer 51, thereby making the first oxide layer 51 a channel with high mobility in the semiconductor structure 50.

[0088] The first oxide layer 51, with the highest mobility, serves as the channel in the multi-channel semiconductor structure 50. It is located at the center of the semiconductor structure 50, furthest from the insulating structure in the thin-film transistor and least affected by the electric field, enabling high mobility and electron transport. The second oxide layer 52, with the largest bandgap, is located on either side of the first oxide layer 51. It is used to supplement oxygen atoms in the first oxide layer 51, reducing oxygen vacancies in the semiconductor structure 50, thereby regulating the carrier concentration in the first oxide layer 51 and preventing unstable carrier motion, thereby preventing the threshold voltage of the semiconductor structure 50 from being negatively biased. It also blocks impurities from penetrating the insulating module of the thin-film transistor, improving the electrical stability of the thin-film transistor.

[0089] Furthermore, in the first oxide layer 51, the indium content is 30%-90%, for example, 35% or 45%; the gallium content is 0%-40%, for example, 17% or 35%; and the zinc content is 0%-40%, for example, 7% or 17%. In the second oxide layer 52, the indium content is 0%-70%, for example, 40% or 60%; the gallium content is 10%-60%, for example, 15% or 25%; and the zinc content is 0%-40%, for example, 27% or 37%.

[0090] For example, in the first oxide layer 51, the content of indium is 50%, the content of gallium is 30%, and the content of zinc is 20%. In the second oxide layer 52, the content of indium is 30%, the content of gallium is 50%, and the content of zinc is 20%.

[0091] Furthermore, at least one oxide layer in the semiconductor structure 50 may further include at least one doping element selected from the group consisting of tin, iron, and praseodymium. The tin content is 0%-30%, for example, 15% or 25%. The iron content is 0%-10%, for example, 6% or 9%. The praseodymium content is 0%-10%, for example, 6% or 9%.

[0092] For example, the first oxide layer 51 contains 40% indium, 25% gallium, 30% zinc, and 5% iron or praseodymium. The second oxide layer 52 contains 10% indium, 55% gallium, 30% zinc, and 5% tin.

[0093] It is worth noting that the above percentages are the content percentages of different metal elements in each oxide layer, and other elements (such as oxygen) in the oxide layer are not within the statistical range of the above content percentages.

[0094] Furthermore, in other embodiments of the present invention, there is also provided Figure 8 The semiconductor structure shown in FIG has only two film layers. This semiconductor structure having only two film layers only includes a first oxide layer 51 and a second oxide layer 52 stacked in sequence. The atomic ratio of the metal elements in each film layer is the same as that of the semiconductor structure provided in this embodiment, so it will not be described in detail here. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of this application.

[0095] In an embodiment of the present invention, a semiconductor structure with a high-mobility channel is formed by stacking a high-mobility oxide film layer and a low-mobility oxide film layer. Electrons are transported through the oxide film layer with higher mobility, and at the same time, the oxide film layer with higher mobility is oxygenated through the oxide film layer with a larger bandgap width, thereby regulating the threshold voltage in the semiconductor structure, thereby increasing the stability of the thin film transistor while achieving high mobility.

[0096] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the invention. It should be understood that many modifications may be made to the illustrative embodiments, and that other arrangements may be devised, without departing from the spirit and scope of the invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in ways other than those described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be employed in conjunction with other described embodiments.

Claims

1. A semiconductor structure, characterized in that include: The first oxide layer, a second oxide layer disposed on the first oxide layer; Wherein, the content of indium in the first oxide layer is greater than or equal to the content of indium in the second oxide layer; The content of gallium in the second oxide layer is greater than or equal to the content of gallium in the first oxide layer.

2. The semiconductor structure according to claim 1, wherein Also includes: a third oxide layer disposed on a surface of the second oxide layer away from the first oxide layer; The content of indium in the third oxide layer is greater than or equal to the content of indium in the second oxide layer, and less than or equal to the content of indium in the first oxide layer; The content of gallium in the third oxide layer is greater than or equal to the content of gallium in the first oxide layer, and less than or equal to the content of gallium in the second oxide layer.

3. The semiconductor structure according to claim 2, wherein: Also includes: a fourth oxide layer disposed on a surface of the third oxide layer away from the second oxide layer; The content of indium in the fourth oxide layer is greater than or equal to the content of indium in the second oxide layer, and less than or equal to the content of indium in the third oxide layer; The content of gallium in the fourth oxide layer is greater than or equal to the content of gallium in the third oxide layer, and less than or equal to the content of gallium in the second oxide layer.

4. The semiconductor structure according to claim 3, wherein: The number of the second oxide layer is at least two, and the at least two second oxide layers are respectively provided on both sides of the first oxide layer; Preferably, the number of the third oxide layers is at least two, and the at least two third oxide layers are respectively provided on a side of the second oxide away from the first oxide; Preferably, the number of the fourth oxide layers is at least two, and the at least two fourth oxide layers are respectively provided on a side of the third oxide away from the second oxide.

5. The semiconductor structure according to claim 3, wherein: At least one of the first oxide layer, the second oxide layer, the third oxide layer, and the fourth oxide layer further comprises zinc; Preferably, in the first oxide layer, the content of the zinc element is less than or equal to 40%; Preferably, in the second oxide layer, the content of the zinc element is less than or equal to 40%; Preferably, in the third oxide layer, the content of the zinc element is less than or equal to 40% and greater than or equal to 10%; In the fourth oxide layer, the content of the zinc element is less than or equal to 30%.

6. The semiconductor structure according to claim 3, wherein: At least one of the first oxide layer, the second oxide layer, the third oxide layer, and the fourth oxide layer further comprises at least one of tin, iron, and praseodymium; Preferably, the content of the tin element is less than or equal to 30%, the content of the iron element is less than or equal to 10%, and the content of the praseodymium element is less than or equal to 10%.

7. The semiconductor structure according to claim 1, wherein In the first oxide layer: The content of the indium element is less than or equal to 90%; The gallium content is less than or equal to 40%; In the second oxide layer: The content of the indium element is less than or equal to 70%; The content of the gallium element is less than or equal to 60%.

8. The semiconductor structure according to claim 2, wherein: In the third oxide layer: The content of the indium element is less than or equal to 70% and greater than or equal to 10%; The content of the gallium element is less than or equal to 60% and greater than or equal to 10%.

9. The semiconductor structure according to claim 3, wherein: In the fourth oxide layer: The content of the indium element is less than or equal to 30%; The content of the gallium element is less than or equal to 60% and greater than or equal to 30%.

10. A thin film transistor, characterized in that: include: The semiconductor structure according to any one of claims 1 to 9; a gate, insulated and arranged on one side or both sides of the semiconductor structure; The source and drain electrodes are insulated and arranged on the gate electrode and are electrically connected to the two ends of the semiconductor structure.

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