Front-end detection circuit of box-type transformer

Abstract

The front-end detection circuit comprises a main control unit, the main control unit comprises a plurality of field-effect tubes, a plurality of diodes, a plurality of resistors, a capacitor, a phase inverter and a counter, a grid electrode of a field-effect tube Q1 in the plurality of field-effect tubes is connected with a grid electrode of a field-effect tube Q2 and an IN-7 end, a source electrode of the field-effect tube Q1 in the plurality of field-effect tubes is connected with a drain electrode of a field-effect tube Q3 and an anode of a diode D2, the drain electrode is connected with the drain electrode of the field effect transistor Q2 and one end of the capacitor C1; the source electrode of the field effect transistor Q2 is connected with one end of a resistor R11; the first pin of the counter U2 and the other end of the resistor R11 are connected with a power supply, the second pin is connected with the cathode of the diode D1, the cathode of the diode D2 and one end of the resistor R4, the ninth pin is connected with the output end of the phase inverter U1 and one end of the resistor R5, and the third pin, the fourth pin, the fifth pin, the sixth pin, the tenth pin, the eleventh pin, the twelfth pin and the thirteenth pin are connected with the input end of the row resistor R6; a grid electrode of the field effect transistor Q3 is connected with a third pin of the counter U2; the input end of the phase inverter U1 is connected with one end of a resistor R12 and the IN-6 end.

Description

Technical Field

[0001] The present invention relates to the technical field of transformer front-end detection, and in particular to a front-end detection circuit of a box-type transformer. Background Art

[0002] In order to meet the needs of intensive industrial loads, multiple box-type transformers will be deployed in clusters. Since transformers of different specifications have differentiated cooling requirements, their cooling methods and cooling parameter settings are also different. In the existing technology, when dealing with temperature detection of multiple box-type transformers deployed in a cluster, the detection circuit will be separately configured according to the set cooling parameters to prevent the transformer temperature from being too high. This method will increase the redundancy of the lower-level circuit. Therefore, a front-end detection circuit of a box-type transformer is proposed, which can cyclically feedback target detection signals of multiple targets for cyclic detection, and feedback its own cooling parameters to the detection unit when any target obtains the target detection signal, so as to achieve the purpose of multiple targets sharing the detection unit and reduce the redundant settings of the lower-level circuit. Summary of the Invention

[0003] In view of the above technical problems, the purpose of the present invention is to provide a front-end detection circuit of a box-type transformer, including a main control unit, which includes a plurality of field-effect transistors, a plurality of diodes, a plurality of resistors, a capacitor, an inverter, and a counter. The gate of the field-effect transistor Q1 in the plurality of field-effect transistors is connected to the gate of the field-effect transistor Q2 and the IN-7 terminal, the source is connected to the drain of the field-effect transistor Q3 and the anode of the diode D2, and the drain is connected to the drain of the field-effect transistor Q2 and one end of the capacitor C1; the source of the field-effect transistor Q2 is connected to one end of the resistor R11; the first pin of the counter U2 and the other end of the resistor R11 are connected to the power supply, and the second pin is connected to the diode D1 The cathode, cathode of diode D2, one end of resistor R4, the ninth pin is connected to the output end of inverter U1 and one end of resistor R5, the third pin, fourth pin, fifth pin, sixth pin, tenth pin, eleventh pin, twelfth pin, and thirteenth pin are connected to the input end of resistor exclusion R6; the gate of field effect transistor Q3 is connected to the third pin of counter U2; the input end of inverter U1 is connected to one end of resistor R12 and IN-6; the anode of diode D1 is connected to IN-10; the other end of capacitor C1, the source of field effect transistor Q3, the other end of resistor R4, the other end of resistor R5, the other end of resistor R12, and the output end of resistor exclusion R6 are grounded.

[0004] Furthermore, it also includes a feedback unit, which includes several switches, several resistors, a diode, and a trigger. Among the several switches, one end of switch S1 is connected to the IN-8 terminal, the other end is connected to the OUT-1 terminal, and the positive pole is connected to the positive pole of switch S2, the positive pole of switch S3, the positive pole of switch S4, the anode of diode D5, one end of resistor R1, one end of resistor R3, one end of resistor R13, and IN-9 terminal; one end of switch S2 is connected to the other end of resistor R13, and the other end is connected to OUT-3 terminal; one end of switch S3 is connected to the other end of resistor R1, and the other end is connected to OUT-2 terminal; one end of switch S4 is connected to the third pin of trigger U3, one end of resistor R15, and the other end is connected to IN-4 terminal; the first pin and the fourth pin of trigger U3 are connected to the power supply; the cathode of diode D5 is connected to OUT-5 terminal; the negative pole of switch S1, the negative pole of switch S2, the negative pole of switch S3, the negative pole of switch S4, the other end of resistor R3, and the other end of resistor R15 are grounded.

[0005] Furthermore, it also includes a detection unit, which includes several operational amplifiers, several resistors, several diodes, field effect transistors, and capacitors. Among the several operational amplifiers, the operational amplifier U4 is connected to one end of the resistor R8 and the IN-1 end in the same phase, and the inverting end is connected to the output end, the non-inverting end of the operational amplifier U7, and the inverting end of the operational amplifier U8 in the opposite phase; the operational amplifier U5 is connected to one end of the resistor R2 and the IN-2 end in the same phase, and the inverting end is connected to the output end and the inverting end of the operational amplifier U7; the operational amplifier U6 is connected to one end of the resistor R14 and the IN-3 end in the same phase, and the inverting end is connected to the output end and the non-inverting end of the operational amplifier U8; the output end of the operational amplifier U7 is connected to the anode of the diode D3; the output end of the operational amplifier U8 is connected to the anode of the diode D4; the gate of the field effect transistor Q4 is connected to the IN-5 end, and the source is connected to the cathode of the diode D3, the cathode of the diode D4, one end of the capacitor C2, and the OUT-4 end; the other end of the resistor R2, the other end of the resistor R8, the other end of the resistor R14, the other end of the capacitor C2, and the drain of the field effect transistor Q4 are grounded.

[0006] Furthermore, the main control unit further includes a resistor, one end of the resistor R7 is connected to the gate of the field effect transistor Q1, and the other end is grounded.

[0007] Furthermore, the feedback unit also includes several resistors, one end of the resistor R10 among the several resistors is connected to the fifth pin of the trigger U3; one end of the resistor R16 is connected to the second pin and the sixth pin of the trigger U3; the other end of the resistor R10 and the other end of the resistor R16 are grounded.

[0008] Furthermore, the detection unit further includes a resistor, one end of the resistor R9 is connected to the gate of the field effect transistor Q4, and the other end is grounded.

[0009] Furthermore, the resistor R4 is an adjustable resistor.

[0010] Furthermore, the resistor R1 and the resistor R13 are adjustable resistors.

[0011] The beneficial effects of the present invention compared with the prior art are:

[0012] The present invention can perform cyclic detection on multiple targets by cyclically feeding back target detection signals, and feed back its own cooling parameters to the detection unit when any target obtains the target detection signal, thereby achieving the purpose of multiple targets sharing the detection unit and reducing the redundant settings of the lower-level circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, a brief introduction is given below to the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0014] Figure 1 This is a structural diagram of the main control unit provided by the present invention.

[0015] Figure 2 This is a structural diagram of the feedback unit provided by the present invention.

[0016] Figure 3 This is a schematic diagram of the detection unit structure provided by the present invention. DETAILED DESCRIPTION

[0017] In order to make the objects and advantages of the present invention more clearly understood, the present invention is described in detail below with reference to the embodiments. It should be understood that the following text is only used to describe one or several specific implementation methods of the present invention and does not strictly limit the scope of protection specifically requested by the present invention.

[0018] The present invention discloses a front-end detection circuit of a box-type transformer, such as Figure 1As shown, it includes a main control unit, which includes several field effect tubes, several diodes, several resistors, capacitors, inverters, and counters. The gate of the field effect tube Q1 in the field effect tubes is connected to the gate of the field effect tube Q2 and the IN-7 terminal, the source is connected to the drain of the field effect tube Q3 and the anode of the diode D2, and the drain is connected to the drain of the field effect tube Q2 and one end of the capacitor C1; the source of the field effect tube Q2 is connected to one end of the resistor R11; the first pin of the counter U2 and the other end of the resistor R11 are connected to the power supply, and the second pin is connected to the cathode of the diode D1, the cathode of the diode D2, and the resistor R4 One end, the ninth pin is connected to the output end of the inverter U1 and one end of the resistor R5, the third pin, the fourth pin, the fifth pin, the sixth pin, the tenth pin, the eleventh pin, the twelfth pin, and the thirteenth pin are connected to the input end of the resistor R6; the gate of the field effect transistor Q3 is connected to the third pin of the counter U2; the input end of the inverter U1 is connected to one end of the resistor R12 and the IN-6 terminal; the anode of the diode D1 is connected to the IN-10 terminal; the other end of the capacitor C1, the source of the field effect transistor Q3, the other end of the resistor R4, the other end of the resistor R5, the other end of the resistor R12, and the output end of the resistor R6 are grounded.

[0019] like Figure 2 As shown, specifically, it also includes a feedback unit, which includes a plurality of switches, a plurality of resistors, a diode, and a trigger. Among the plurality of switches, one end of switch S1 is connected to the IN-8 terminal, the other end is connected to the OUT-1 terminal, and the positive pole is connected to the positive pole of switch S2, the positive pole of switch S3, the positive pole of switch S4, the anode of diode D5, one end of resistor R1, one end of resistor R3, one end of resistor R13, and IN-9 terminal; one end of switch S2 is connected to the other end of resistor R13, and the other end is connected to OUT-3 terminal; one end of switch S3 is connected to the other end of resistor R1, and the other end is connected to OUT-2 terminal; one end of switch S4 is connected to the third pin of trigger U3, one end of resistor R15, and the other end is connected to IN-4 terminal; the first pin and the fourth pin of trigger U3 are connected to the power supply; the cathode of diode D5 is connected to OUT-5 terminal; the cathode of switch S1, the cathode of switch S2, the cathode of switch S3, the cathode of switch S4, the other end of resistor R3, and the other end of resistor R15 are grounded.

[0020] like Figure 3As shown, specifically, it also includes a detection unit, which includes several operational amplifiers, several resistors, several diodes, field effect transistors, and capacitors. Among the several operational amplifiers, the operational amplifier U4 is connected to one end of the resistor R8 and the IN-1 end in the same phase, and the inverting end is connected to the output end, the non-inverting end of the operational amplifier U7, and the inverting end of the operational amplifier U8 in the opposite phase; the operational amplifier U5 is connected to one end of the resistor R2 and the IN-2 end in the same phase, and the inverting end is connected to the output end and the inverting end of the operational amplifier U7; the operational amplifier U6 is connected to one end of the resistor R14 and the IN-3 end in the same phase, and the inverting end is connected to the output end and the non-inverting end of the operational amplifier U8; the output end of the operational amplifier U7 is connected to the anode of the diode D3; the output end of the operational amplifier U8 is connected to the anode of the diode D4; the gate of the field effect transistor Q4 is connected to the IN-5 end, and the source is connected to the cathode of the diode D3, the cathode of the diode D4, one end of the capacitor C2, and the OUT-4 end; the other end of the resistor R2, the other end of the resistor R8, the other end of the resistor R14, the other end of the capacitor C2, and the drain of the field effect transistor Q4 are grounded.

[0021] like Figure 1 As shown, specifically, the main control unit further includes a resistor, one end of the resistor R7 is connected to the gate of the field effect transistor Q1, and the other end is grounded.

[0022] like Figure 2 As shown, specifically, the feedback unit also includes several resistors, one end of the resistor R10 among the several resistors is connected to the fifth pin of the trigger U3; one end of the resistor R16 is connected to the second pin and the sixth pin of the trigger U3; the other end of the resistor R10 and the other end of the resistor R16 are grounded.

[0023] like Figure 3 As shown, specifically, the detection unit further includes a resistor, one end of the resistor R9 is connected to the gate of the field effect tube Q4, and the other end is grounded.

[0024] like Figure 1 As shown, specifically, the resistor R4 is an adjustable resistor.

[0025] like Figure 2 As shown, specifically, the resistor R1 and the resistor R13 are adjustable resistors.

[0026] See Figure 1IN-7 inputs the start detection signal, and IN-6 inputs the reset signal of the main control unit. The start detection signal and reset signal are fed back by the terminal or manually. After the circuit is powered on, the power signal passes through resistor R11, the source of FET Q2, and the drain of FET Q2, so that the capacitor C1 has a certain potential. The signal at IN-7 is synchronously fed back to the gate of FET Q1 and the gate of FET Q2. Resistor R7 is used to discharge the parasitic capacitance of the gate of FET Q1 and the gate of FET Q2. When IN-7 receives the start detection signal, the voltage difference between the gate of FET Q2 and the source of FET Q2 exceeds the conduction threshold, and FET Q2 is cut off. The voltage difference between the gate of FET Q1 and the source of FET Q2 exceeds the conduction threshold, and FET Q1 is turned on. Capacitor The signal at the C1 end passes through the drain of the field effect tube Q1, the source of the field effect tube Q1, the diode D2, and the resistor R4 to the ground end, making the resistor R4 end high level, the potential of the capacitor C1 end decreases, and the signal at the resistor R4 end is fed back to the 2 pin of the counter U2. The 8 pin of the counter U2 obtains the clock signal. When the clock signal is at a rising edge each time, the 3 pin of the counter U2 obtains the 2 pin end signal of the counter U2. At the same time, the 3, 4, 5, 6, 10, 11, and 12 pin end signals of the counter U2 are all shifted downward. The resistance value of the resistor R4 is adjusted so that the potential drop speed of the capacitor C1 end after the field effect tube Q1 is turned on is maintained within one cycle of the clock signal. The signal at the resistor R4 end is still high level. In this way, after IN-7 obtains the start detection signal and the clock signal is at a rising edge, At the rising edge of the clock signal, pin 3 of counter U2 obtains the signal from pin 2 of counter U2, so that pin 3 of trigger U3 outputs a high level. At the same time, the signal from pin 3 of counter U2 is fed back to the gate of FET Q3. The voltage difference between the gate of FET Q3 and the source of FET Q3 is higher than the conduction threshold, FET Q3 is turned on, and the signal from capacitor C1 passes through the drain of FET Q1, the source of FET Q1, the drain of FET Q3, and the source of FET Q3 to the ground terminal, making the resistor R4 terminal low level. Thereafter, each time the clock signal is at a rising edge, pins 4, 5, 6, 10, 11, 12, and 13 of counter U2 output a high level in turn. If any of pins 3, 4, 5, 6, 10, 11, 12, and 13 of counter U2 is high When the level is high, the signal at this pin is the target detection signal. The signal loop end is set according to the target number of the loop detection (the number of transformers). The signal at the signal loop end is synchronously fed back to IN-10. The target number of the loop detection ranges from 2 to 8. The settings of the signal loop end correspond to pins 4, 5, 6, 10, 11, 12, and 13 of the counter U2. If the target number of the loop detection is 8, the signal loop end is set at pin 13 of the counter U2, so that the signal at pin 13 of the counter U2 can be synchronously fed back to the IN-10 end. When pin 13 of the counter U2 outputs a high level (that is, when the target detection signal is output), the signal passes through diode D1 and resistor R4 to the ground end, and the signal at the resistor R4 end is fed back to pin 2 of the counter U2.When the clock signal is on the rising edge again, pin 3 of counter U2 obtains the signal from pin 2 of counter U2 again to complete the cycle detection. When a reset is required, the feedback of the start detection signal is stopped, so that IN-6 obtains the reset signal feedback. The reset signal is fed back to the input of inverter U1. Resistor R12 is a pull-down resistor at the input of inverter U1. Inverter U1 is cut off. Resistor R5 is a pull-down resistor at the output of inverter U1 and pin 9 of counter U2. Pin 9 of counter U2 is low, and the main control unit is reset. This enables the main control unit to feedback the target detection signal to multiple targets based on the set signal loop end for cycle detection, reducing the redundant settings of the lower-level circuit.

[0027] See Figure 2 、 Figure 3, set the number of feedback units according to the number of targets detected in the cycle. Each target detection signal is input to the corresponding feedback unit IN-9, and IN-8 inputs the temperature signal fed back by the temperature sensor. The signals of OUT-1, OUT-2, OUT-3, and OUT-5 of each feedback unit are input to IN-1, IN-2, IN-3, and IN-5 of the detection unit. When any feedback unit obtains the target detection signal, the signal is connected to the ground terminal through resistor R3. At the same time, the positive poles of switches S1, S2, S3, and S4 obtain the signal feedback synchronously. Switches S1, S2, S3, When switch S4 is closed, the temperature signal is fed back to the detection unit IN-1 through switch S1 and OUT-1. Resistor R8 is the pull-down resistor of the in-phase terminal of op amp U4. The target detection signal is fed back to the detection unit IN-2 through resistor R1, switch S3, and OUT-2. The IN-2 terminal signal is grounded through resistor R2. The other path is fed back to the detection unit IN-3 through resistor R13, switch S2, and OUT-3. The IN-3 terminal signal is grounded through resistor R14. Adjust resistor R1 to set the cooling start signal, and adjust the resistance value of resistor R13 to set the cooling stop signal. Adjust each as needed according to the cooling method of the detection target. The resistance values of resistors R1 and R13 of the feedback unit, IN-4 inputs the temperature over-limit signal. When IN-4 obtains the temperature over-limit signal, the signal is fed back to pin 3 of trigger U3 through switch S4. Resistor R15 is the pull-down resistor of pin 3 of trigger U3. Pin 5 of trigger U3 feeds back a high level. When pin 5 of trigger U3 is high, pin 6 of trigger U3 is low. Resistor R10 is the pull-down resistor of pin 5 of trigger U3. Resistor R16 is the pull-down resistor of pin 6 of trigger U3. When IN-4 obtains the temperature over-limit signal again, pin 5 of trigger U3 and pin 6 of trigger U3 are pulled down. Pin level replacement, that is, when pin 5 of trigger U3 is at a low level, pin 6 of trigger U3 is at a high level. The signal acquisition of pin 5 of trigger U3 / pin 6 of trigger U3 is selected according to the control type of the corresponding actuator control signal. When there is an upper connection or control, the pull-down resistor is enabled. When there is no upper connection or control, it is pulled down through resistors R10 and R16. In this way, when any feedback unit obtains the target detection signal, its own cooling reference signal is fed back to the detection unit, so as to achieve the purpose of sharing the detection unit by multiple detection targets, and at the same time allow each feedback unit to make an independent selection according to the control type of its corresponding actuator control signal.

[0028] See Figure 3, IN-1 inputs the temperature signal of the transformer, IN-2 inputs the cooling start signal, IN-3 inputs the cooling stop signal, the cooling reference signal can be fed back by the power supply signal, when the cooling reference signal is fed back by the power supply signal, resistor R2 is the pull-down resistor of the in-phase terminal of the op amp U5, and resistor R14 is the pull-down resistor of the in-phase terminal of the op amp U6. When these two signals are fed back by the feedback unit, resistors R2 and R14 are the voltage divider resistors of the target detection signal. The cooling start signal and cooling stop signal are set by adjusting the resistance values of resistors R1 and R13 in the feedback unit. The inverting terminal of the op amp U5 and the output terminal of the op amp U5 are negatively feedback connected. The op amp U5 follows the cooling start signal, and the op amp U6 follows the cooling start signal. The inverting terminal of op amp U6 is connected to the negative feedback of the output terminal of op amp U6, and op amp U6 follows the cooling stop signal. The inverting terminal of op amp U4 is connected to the negative feedback of the output terminal of op amp U4, and op amp U4 follows the temperature signal of the transformer. The output terminal signal of op amp U4 is synchronously fed back to the non-inverting terminal of op amp U7 and the inverting terminal of op amp U8. The output terminal signal of op amp U5 is fed back to the inverting terminal of op amp U7, and the output terminal signal of op amp U6 is fed back to the non-inverting terminal of op amp U8. When the temperature of the transformer is higher than the set cooling start signal, op amp U7 outputs. When the temperature of the transformer is lower than the set cooling stop signal, op amp U8 outputs. In order to prevent IN-1, IN-2, and IN-3 from having no signal input, op amp U 7 / Operation amplifier U8 outputs incorrectly due to signal interference. The output signal of op amp U7 passes through diode D3, source of field effect transistor Q4, and drain of field effect transistor Q4 to ground. The output signal of op amp U8 passes through diode D4, source of field effect transistor Q4, and drain of field effect transistor Q4 to ground. When op amp U7 / op amp U8 outputs incorrectly due to signal interference, the source of field effect transistor Q4 is at a low level. When any feedback unit obtains the target detection signal, IN-2, IN-3, and IN-5 on the detection unit obtain signal feedback. The signal at IN-5 is fed back to the gate of field effect transistor Q4. The voltage difference between the gate of field effect transistor Q4 and the source of field effect transistor Q4 is higher than the conduction threshold. Field effect transistor Q 4 is cut off, and resistor R9 is used to discharge the parasitic capacitance of the gate of the field effect tube Q4. At this time, when the amplitude of the transformer temperature signal is higher than the amplitude of the cooling start signal or lower than the amplitude of the cooling stop signal, resulting in the output of op amp U7 / op amp U8, the source extreme signal of the field effect tube Q4 is high, and capacitor C2 is used to prevent the source extreme signal of the field effect tube Q4 from changing suddenly. The source extreme signal of the field effect tube Q4 is a temperature over-limit signal, which is output to the feedback unit IN-4 through OUT-4. In this way, when any feedback unit obtains the target detection signal, it detects the transformer temperature based on its feedback cooling reference signal and feeds back a temperature over-limit signal, so that the corresponding actuator performs a cooling operation.

[0029] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be encompassed therein. Any reference in a claim should not be construed as limiting the claim to which it relates.

Claims

1. A front-end detection circuit for a box-type transformer, characterized in that: The main control unit includes a plurality of field effect tubes, a plurality of diodes, a plurality of resistors, a capacitor, an inverter, and a counter. The gate of the field effect tube Q1 in the plurality of field effect tubes is connected to the gate of the field effect tube Q2 and the IN-7 terminal, the source is connected to the drain of the field effect tube Q3 and the anode of the diode D2, and the drain is connected to the drain of the field effect tube Q2 and one end of the capacitor C1; the source of the field effect tube Q2 is connected to one end of the resistor R11; the first pin of the counter U2 and the other end of the resistor R11 are connected to the power supply, and the second pin is connected to the cathode of the diode D1, the cathode of the diode D2, and the resistor R4. The ninth pin is connected to the output of inverter U1 and one end of resistor R5; the third, fourth, fifth, sixth, tenth, eleventh, twelfth and thirteenth pins are connected to the input of resistor R6; the gate of field effect transistor Q3 is connected to the third pin of counter U2; the input of inverter U1 is connected to one end of resistor R12 and terminal IN-6; the anode of diode D1 is connected to terminal IN-10; the other end of capacitor C1, the source of field effect transistor Q3, the other end of resistor R4, the other end of resistor R5, the other end of resistor R12 and the output of resistor R6 are grounded.

2. The front-end detection circuit of the box-type transformer according to claim 1, characterized in that: It also includes a feedback unit, which includes several switches, several resistors, a diode, and a trigger. Among the several switches, one end of switch S1 is connected to the IN-8 terminal, the other end is connected to the OUT-1 terminal, and the positive pole is connected to the positive pole of switch S2, the positive pole of switch S3, the positive pole of switch S4, the anode of diode D5, one end of resistor R1, one end of resistor R3, one end of resistor R13, and the IN-9 terminal; one end of switch S2 is connected to the other end of resistor R13, and the other end is connected to the OUT-3 terminal; one end of switch S3 is connected to the other end of resistor R1, and the other end is connected to the OUT-2 terminal; one end of switch S4 is connected to the third pin of trigger U3, one end of resistor R15, and the other end is connected to the IN-4 terminal; the first and fourth pins of trigger U3 are connected to the power supply; the cathode of diode D5 is connected to the OUT-5 terminal; the cathode of switch S1, the cathode of switch S2, the cathode of switch S3, the cathode of switch S4, the other end of resistor R3, and the other end of resistor R15 are grounded.

3. The front-end detection circuit of the box-type transformer according to claim 2, characterized in that: It also includes a detection unit, which includes several operational amplifiers, several resistors, several diodes, field effect transistors, and capacitors. Among the several operational amplifiers, the operational amplifier U4 is connected to one end of the resistor R8 and the IN-1 end in the same phase, and the inverting end is connected to the output end, the non-inverting end of the operational amplifier U7, and the inverting end of the operational amplifier U8 in the opposite phase; the operational amplifier U5 is connected to one end of the resistor R2 and the IN-2 end in the same phase, and the inverting end is connected to the output end and the inverting end of the operational amplifier U7; the operational amplifier U6 is connected to one end of the resistor R14 and the IN-3 end in the same phase, and the inverting end is connected to the output end and the non-inverting end of the operational amplifier U8; the output end of the operational amplifier U7 is connected to the anode of the diode D3; the output end of the operational amplifier U8 is connected to the anode of the diode D4; the gate of the field effect transistor Q4 is connected to the IN-5 end, and the source is connected to the cathode of the diode D3, the cathode of the diode D4, one end of the capacitor C2, and the OUT-4 end; the other end of the resistor R2, the other end of the resistor R8, the other end of the resistor R14, the other end of the capacitor C2, and the drain of the field effect transistor Q4 are grounded.

4. The front-end detection circuit of the box-type transformer according to claim 1, characterized in that: The main control unit further includes a resistor, one end of the resistor R7 is connected to the gate of the field effect transistor Q1, and the other end is grounded.

5. The front-end detection circuit of the box-type transformer according to claim 2, characterized in that: The feedback unit further includes a plurality of resistors, wherein one end of the resistor R10 is connected to the fifth pin of the trigger U3; one end of the resistor R16 is connected to the second pin and the sixth pin of the trigger U3; the other end of the resistor R10 and the other end of the resistor R16 are grounded.

6. The front-end detection circuit of the box-type transformer according to claim 3, characterized in that: The detection unit further includes a resistor, one end of the resistor R9 is connected to the gate of the field effect transistor Q4, and the other end is grounded.

7. The front-end detection circuit of the box-type transformer according to claim 1, characterized in that: The resistor R4 is an adjustable resistor.

8. The front-end detection circuit of the box-type transformer according to claim 2, characterized in that: The resistor R1 and the resistor R13 are adjustable resistors.

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