A half-wave reconstruction and polarity enhancement series arc fault detection method and system

Abstract

This invention relates to a method and system for detecting series arc faults using half-wave reconstruction and polarity enhancement. The method includes: continuously sampling the target line current signal within a given time period to obtain a sequence of N sampling points; where N is a positive integer and represents the duration of a single power frequency cycle; identifying zero points in the current signal and recording the zero-crossing times corresponding to each zero-crossing point; reconstructing the sampled signal into a 2N-segment half-wave sampling point sequence based on the zero-crossing times; performing half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; constructing an asymmetric fault feature set by performing feature calculations on the 2N-segment full-wave sampling point sequence; and inputting the asymmetric fault feature set into a trained classifier to obtain the detection result for the target line. This invention improves the effectiveness and generalization of series arc fault detection through half-wave reconstruction and extraction of asymmetric current features.

Description

Technical Field

[0001] This invention belongs to the field of power distribution network fault detection technology, specifically relating to a method and system for detecting series arc faults with half-wave reconstruction and polarity enhancement. Background Technology

[0002] Low-voltage distribution networks are the final link in the electrical energy interaction of new power systems and are directly related to people's lives and property safety. However, in recent years, as the electrical loads of low-voltage distribution networks have become increasingly diversified, dispersed, and operated for longer periods, the operating conditions of distribution lines have become increasingly complex, exhibiting characteristics such as variable electrical parameters, complex branch lines, and extreme susceptibility to insulation aging, which can easily lead to line faults.

[0003] Series arc faults are a common type of line fault in low-voltage distribution networks, usually caused by line connection failure or insulation failure. Unlike parallel arc faults such as short-circuit arc faults and grounding arc faults, series arc faults are equivalent to a single series low-impedance element. The fault current changes little, is transient, and has a high latency, making traditional overcurrent protection systems unable to detect and interrupt such faults. Since the arc tip temperature can reach over 3000℃, if the fault is not detected in time, the arc can easily cause an electrical fire, threatening life and property. Therefore, effective methods for detecting series arc faults are urgently needed.

[0004] The foundation of series arc fault detection methods lies in extracting highly effective and generalizable fault features. In current distribution network environments with complex loads, existing methods extract high-frequency current features from full-cycle current signals. However, in practice, with widely used power electronic loads, the extracted high-frequency fault features are easily confused with normal load current features, resulting in low overall effectiveness and generalization. Considering that the positive and negative half-wave waveforms of normal load current are usually symmetrical, while the breakdown process in series arc faults occurs randomly within the positive and negative half-cycles, the fault current's positive and negative half-waves are asymmetrical, clearly distinguishing it from the normal current of any AC load in the distribution network. Therefore, research is needed on detection methods for asymmetrical positive and negative half-wave currents. Summary of the Invention

[0005] To improve the effectiveness and generalization of series arc fault detection, a first aspect of the present invention provides a half-wave reconstruction and polarity enhancement method for series arc fault detection, comprising: in The target line current signal is continuously sampled within a time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle is defined. Zero-point identification is performed on the current signal, and one or more zero-crossing moments corresponding to the current zero-crossing point are recorded. Each zero-crossing moment is used as the boundary moment between the positive and negative half-waves, and the sampled signal is reconstructed into a 2N-segment half-wave sampling point sequence based on the boundary moment. The 2N-segment half-wave sampling point sequence is then extended by half-wave extension to obtain a 2N-segment full-wave sampling point sequence. An asymmetric fault feature set is constructed by performing feature calculations on the 2N-segment full-wave sampling point sequence. This asymmetric fault feature set is then input into a trained classifier to obtain the detection result of the target line.

[0006] In some embodiments of the present invention, the step of reconstructing the sampled signal into a 2N-segment half-wave sampling point sequence according to the boundary time includes: dividing the sampled signal into a 2N+1-segment sampling point sequence according to the boundary time; performing a circular splicing of the first and last segments of the 2N+1-segment sampling point sequence to obtain a spliced ​​sequence; and reconstructing the spliced ​​sequence and the remaining 2N-1-segment sampling point sequence into a 2N-segment half-wave sampling point sequence.

[0007] Furthermore, the current polarities of two adjacent sampling point sequences in the 2N-segment half-wave sampling point sequence are opposite.

[0008] In some embodiments of the present invention, the step of constructing an asymmetric fault feature set by performing feature calculations on the 2N full-wave sampling point sequence includes: constructing a feature matrix by performing feature calculations on each segment of the full-wave sampling point sequence; performing asymmetric enhancement on the feature matrix; and constructing an asymmetric fault feature set based on the asymmetric enhanced feature matrix.

[0009] Furthermore, the feature calculation includes: time-domain feature calculation, frequency-domain feature calculation, and time-frequency-domain feature calculation.

[0010] Furthermore, the asymmetric enhancement of the feature matrix includes: calculating each element in the asymmetric fault feature set by using a difference maximization search function and the feature matrix.

[0011] A second aspect of the present invention provides a series arc fault detection system with half-wave reconstruction and polarity enhancement, comprising: a sampling module for detecting... The target line current signal is continuously sampled within a time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle is defined as follows: A reconstruction module is used to identify zero points in the current signal and record one or more zero-crossing moments corresponding to the current zero-crossing point; each zero-crossing moment is used as the boundary moment between the positive and negative half-waves, and the sampled signal is reconstructed into a 2N-segment half-wave sampling point sequence based on the boundary moment; a construction module is used to perform half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; an asymmetric fault feature set is constructed by performing feature calculation on the 2N-segment full-wave sampling point sequence; and a detection module is used to input the asymmetric fault feature set into a trained classifier to obtain the detection result of the target line.

[0012] A third aspect of the present invention provides an electronic device comprising: one or more processors; and a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the half-wave reconstruction and polarity enhancement series arc fault detection method provided in the first aspect of the present invention.

[0013] In a fourth aspect, the present invention provides a computer-readable medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the half-wave reconstruction and polarity enhancement series arc fault detection method provided in the first aspect of the present invention.

[0014] The beneficial effects of this invention are:

[0015] Half-wave reconstruction is performed on the fault current to form positive and negative full-wave current sampling sequence sets corresponding to the positive and negative half-waves. This allows for richer time-domain, frequency-domain, and time-frequency-domain feature extraction operations on the corresponding positive and negative half-waves. For the positive and negative full-wave current sampling sequence sets, an asymmetric fault feature set is constructed through a difference maximization function. This maximizes the utilization of the highly asymmetric positive and negative half-waves within a single sampling window, thereby enhancing asymmetry. The asymmetric current characteristics can reflect the arcing nature of series arc faults, showing a significant difference from the normal symmetrical current of most AC loads in the distribution network. This makes the series fault arc detection method highly effective and generalizable even in unknown scenarios. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the basic process of the series arc fault detection method with half-wave reconstruction and polarity enhancement in some embodiments of the present invention.

[0017] Figure 2 This is a schematic diagram illustrating the specific process of the series arc fault detection method with half-wave reconstruction and polarity enhancement in some embodiments of the present invention.

[0018] Figure 3These are waveform diagrams illustrating the zero-crossing identification, half-wave boundary, and half-wave extension processes in some embodiments of the present invention.

[0019] Figure 4 This is a spectrum diagram of the sampled current signal in some embodiments of the present invention;

[0020] Figure 5 This is a schematic diagram of the structure of a series arc fault detection system in some embodiments of the present invention;

[0021] Figure 6 This is a schematic diagram of the structure of a series arc fault detection system with half-wave reconstruction and polarity enhancement in some embodiments of the present invention.

[0022] Figure 7 This is a schematic diagram of the structure of an electronic device in some embodiments of the present invention. Detailed Implementation

[0023] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention.

[0024] refer to Figures 1 to 3 In a first aspect of the invention, a method for detecting series arc faults with half-wave reconstruction and polarity enhancement is provided, comprising: S100. In The target line current signal is continuously sampled within a time period to obtain... N A sequence of sampling points; among which, N It is a positive integer. S200. The current signal is zero-point identified, and one or more zero-crossing moments corresponding to the current zero-crossing point are recorded; each zero-crossing moment is used as the boundary moment between the positive half-wave and the negative half-wave, and the sampled signal is reconstructed into a 2N-segment half-wave sampling point sequence according to the boundary moment; S300. The 2N-segment half-wave sampling point sequence is half-wave extended to obtain a 2N-segment full-wave sampling point sequence; an asymmetric fault feature set is constructed by performing feature calculation on the 2N-segment full-wave sampling point sequence; S400. The asymmetric fault feature set is input into the trained classifier to obtain the detection result of the target line.

[0025] In step S100 of some embodiments of the present invention, The target line current signal is continuously sampled within a time period to obtain... N A sequence of sampling points; among which, N It is a positive integer. The duration of a single power frequency cycle;

[0026] Specifically, the series arc fault detection device continuously samples and processes the line current in real time, with a sampling rate of [missing information]. The minimum window duration for the device to process the line current sampling signal is set to... Let the sampled current signal within the minimum processing window be denoted as . The for A sequence of discrete sampling points ,in, It is a positive integer. The duration of a single power frequency cycle, the time value corresponding to the sampling point sequence. , , The power frequency. .

[0027] In step S200 of some embodiments of the present invention, the current signal is zero-point identified and one or more zero-crossing times corresponding to the current zero-crossing point are recorded; each zero-crossing time is used as the boundary time between the positive half-wave and the negative half-wave.

[0028] Specifically, regarding the sampled current signal Perform Fast Fourier Transform (FFT) processing to obtain spectral information and construct the power frequency current signal. Regarding the power frequency current signal Zero point identification was performed, and the record was made. The zero-crossing points of the current and the corresponding zero-crossing times are as follows: The sampling current signal corresponding to the zero-crossing moment of the current. Sampling points in ,in, This is the amplitude corresponding to the power frequency. This is the initial phase corresponding to the power frequency. , It is the power frequency angular frequency. ; Sampling point sequence All include Number of sampling points, sampling point sequence and the pre-reconstruction sampling sequence The sum of the number of sampling points equals .

[0029] Without loss of generality, power frequency current signal It is a cosine wave, containing For each power frequency cycle, the zero-crossing point identification in step S200 is calculated. Corresponding The discrete time points contain a total of A zero-crossing point, i.e. The difference between two adjacent time points is half a power frequency cycle. .

[0030] refer to Figure 3 and Figure 4 In step S200 of some embodiments of the present invention, reconstructing the sampled signal into a 2N-segment half-wave sampling point sequence according to the boundary time includes:

[0031] S201. Divide the sampled signal into 2N+1 sampling point sequences according to the boundary time; perform circular splicing of the first and last segments of the 2N+1 sampling point sequences to obtain a spliced ​​sequence;

[0032] S202. Reconstruct the spliced ​​sequence and the remaining 2N-1 sampling point sequences into a 2N-segment half-wave sampling point sequence.

[0033] Specifically, the aforementioned The zero-crossing time of the current is taken as the The boundary time between the positive and negative half-waves is determined, and then the sampled current signal is analyzed based on the time when the current crosses zero. Divided into Segment sampling point sequence: , , ... , The sampling point sequence fragment and Perform the first and last parts to merge and reconstruct the fragment. , and thus form Half-wave sampling point sequence: , wherein the fragment and Given a sequence of half-wave sampling points with opposite polarities, assume... If it is a positive half-wave sampling point sequence, then This is a negative half-wave sampling point sequence. It is an odd number.

[0034] In step S300 of some embodiments of the present invention, the 2N-segment half-wave sampling point sequence is subjected to half-wave extension to obtain the 2N-segment full-wave sampling point sequence.

[0035] Specifically, targeting The half-wave sampling point sequence is extended by half-wave to form Full-wave sampling point sequence: , will the The full-wave sampling point sequence is divided into positive polarity full-wave sampling point sequence groups. and negative polarity full-wave sampling point sequence group ;

[0036] Half-wave extension is a signal processing procedure that extends a half-wave signal into a full-wave signal, using a sequence of positive half-wave sampling points. and negative half-wave sampling point sequence For example, Formed after half-wave extension , Formed after half-wave extension .

[0037] In step S300 of some embodiments of the present invention, the step of constructing an asymmetric fault feature set by performing feature calculation on the 2N full-wave sampling point sequence includes:

[0038] S301. Construct a feature matrix by performing feature calculations on each full-wave sampling point sequence;

[0039] S302. Perform asymmetric enhancement on the feature matrix; construct an asymmetric fault feature set based on the asymmetric enhanced feature matrix.

[0040] Specifically, for the aforementioned and Feature calculations were performed on sequence fragments from each full-wave sampling point, totaling... Class features, and then construct feature matrix and For each type of feature, asymmetric enhancement is performed to construct an asymmetric fault feature set. ;

[0041] It should be noted that feature computation includes, but is not limited to, time-domain feature computation, frequency-domain feature computation, and time-frequency-domain feature computation. For example, Full-wave sampling point sequence fragment Obtained through feature calculation The sequence of class feature values, i.e. .

[0042] It is calculated by the difference maximization search function, i.e. ,in, .

[0043] It is understandable that, in addition to the difference maximization search function, asymmetric enhancement of the feature matrix can also be achieved through wavelet transform and adversarial generative networks.

[0044] In step S400 of some embodiments of the present invention, the asymmetric fault feature set is input into the trained classifier to obtain the detection result of the target line.

[0045] Specifically, the asymmetric fault feature set The input is given to a classifier, which outputs a sampled current signal. The status detection results include "a series arc fault has occurred in the line" and "the line is normal". Optionally, the classifier is a machine learning model trained based on historical data.

[0046] In one specific embodiment of the present invention, a current sampling waveform comprising four power frequency cycles is used. For example, the process of zero-point identification, half-wave boundary, and half-wave extension has been described in detail.

[0047] like Figure 4 As shown, for the sampled current signal Perform Fast Fourier Transform (FFT) processing to obtain spectral information (see...). Figure 4 The amplitude of the power frequency is 1.29 and the phase is 127.04°, thus constructing the power frequency current signal. Regarding the power frequency current signal Zero point identification was performed, and the record was made. The zero-crossing points of the current and the corresponding zero-crossing times are as follows: The sampling current signal corresponding to the zero-crossing moment of the current. Sampling points in ;

[0048] The The zero-crossing time of the current is taken as the The boundary time between the positive and negative half-waves is determined, and then the sampled current signal is analyzed based on the time when the current crosses zero. Divided into Segment sampling point sequence: , , ... , The sampling point sequence fragment and Perform the first and last parts to merge and reconstruct the fragment. ,like Figure 3 As shown in part b, it further forms Half-wave sampling point sequence: , wherein the fragment and It is a sequence of half-wave sampling points with opposite polarities, where, It is a sequence of positive half-wave sampling points. This is a negative half-wave sampling point sequence. ;

[0049] against Half-wave extension of the half-wave sampling point sequence, such as... Figure 3 As shown in part c, the dashed line in the figure represents the extended portion, forming... Full-wave sampling point sequence: , will the The full-wave sampling point sequence is divided into positive polarity full-wave sampling point sequence groups. and negative polarity full-wave sampling point sequence group .

[0050] Example 2

[0051] refer to Figure 6 A second aspect of the present invention provides a series arc fault detection system with half-wave reconstruction and polarity enhancement, comprising: a sampling module for detecting... The target line current signal is continuously sampled within a time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle is defined as follows: A reconstruction module is used to identify zero points in the current signal and record one or more zero-crossing moments corresponding to the current zero-crossing point; each zero-crossing moment is used as the boundary moment between the positive and negative half-waves, and the sampled signal is reconstructed into a 2N-segment half-wave sampling point sequence based on the boundary moment; a construction module is used to perform half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; an asymmetric fault feature set is constructed by performing feature calculation on the 2N-segment full-wave sampling point sequence; and a detection module is used to input the asymmetric fault feature set into a trained classifier to obtain the detection result of the target line.

[0052] Furthermore, the reconstruction module includes: a division unit, used to divide the sampled signal into 2N+1 segments of sampling point sequence according to the boundary time; a splicing unit, used to perform circular splicing of the first segment and the last segment of the 2N+1 segments of sampling point sequence to obtain a spliced ​​sequence; and a reconstruction unit, used to reconstruct the spliced ​​sequence and the remaining 2N-1 segments of sampling point sequence into a 2N-segment half-wave sampling point sequence.

[0053] like Figure 2 and Figure 5 As shown, in a specific embodiment, the arc fault detection system with half-wave reconstruction and asymmetry enhancement includes a current acquisition module 1, an analog-to-digital conversion module 2, a signal processing module 3, a classifier module 4, and a line disconnector module 5. The current acquisition module 1 samples the current signal of line 6 in real time and inputs it to the analog-to-digital conversion module 2. The analog-to-digital conversion module 2 converts the analog signal into a digital signal and inputs it to the signal processing module 3. The signal processing module 3 includes a zero-crossing identification submodule 7, a half-wave boundary submodule 8, a half-wave extension submodule 9, and a feature calculation submodule 10, which respectively execute... Figure 2The steps S2, S3, S4, and S5 described above output an asymmetric fault feature set. The classifier module 4 is equipped with a classifier model trained based on historical data. It outputs the state detection result of the sampled current signal according to the input asymmetric fault feature set and inputs it to the line disconnector module 5. If the detection result is "line normal", the line disconnector module 5 keeps the line closed and continues to wait for the state detection result of the next sampling window. If the detection result is "line series arc fault", the line disconnector module 5 activates the disconnection function and disconnects the faulty line.

[0054] Example 3

[0055] refer to Figure 7 A third aspect of the present invention provides an electronic device comprising: one or more processors; and a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the half-wave reconstruction and polarity enhancement series arc fault detection method of the first aspect of the present invention.

[0056] Electronic device 500 may include a processing unit (e.g., a central processing unit, a graphics processing unit, etc.) 501, which can perform various appropriate actions and processes according to a program stored in read-only memory (ROM) 502 or a program loaded from storage device 508 into random access memory (RAM) 503. The RAM 503 also stores various programs and data required for the operation of electronic device 500. The processing unit 501, ROM 502, and RAM 503 are interconnected via bus 504. An input / output (I / O) interface 505 is also connected to bus 504.

[0057] Typically, the following devices can be connected to I / O interface 505: input devices 506 including, for example, touchscreens, touchpads, keyboards, mice, cameras, microphones, accelerometers, gyroscopes, etc.; output devices 507 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 508 including, for example, hard disks; and communication devices 509. Communication device 509 allows electronic device 500 to communicate wirelessly or wiredly with other devices to exchange data. Although Figure 7 An electronic device 500 with various devices is shown; however, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively. Figure 7 Each box shown can represent a device or multiple devices as needed.

[0058] Specifically, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device 509, or installed from a storage device 508, or installed from a ROM 502. When the computer program is executed by a processing device 501, it performs the functions defined in the methods of embodiments of this disclosure. It should be noted that the computer-readable medium described in embodiments of this disclosure can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In embodiments of this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus, or device. In embodiments of this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (radio frequency), etc., or any suitable combination thereof.

[0059] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device. The aforementioned computer-readable medium carries one or more computer programs, which, when executed by the electronic device, cause the electronic device to:

[0060] Computer program code for performing the operations of embodiments of this disclosure can be written in one or more programming languages ​​or a combination thereof. Programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, C++, and Python—and conventional procedural programming languages—such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0061] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0062] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for detecting series arc faults with half-wave reconstruction and polarity enhancement, characterized in that, include: exist The target line current signal is continuously sampled within a time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle; Zero-point identification is performed on the current signal, and one or more zero-crossing moments corresponding to the current zero-crossing points are recorded. Each zero-crossing moment is used as the boundary moment between the positive and negative half-waves, and the sampled signal is reconstructed into a 2N-segment half-wave sampling point sequence based on the boundary moment. The sampled signal is then divided into 2N+1 segments of sampling point sequence based on the boundary moment. The first and last segments of the 2N+1 segments of sampling point sequence are then circularly spliced ​​to obtain a spliced ​​sequence. The spliced ​​sequence and the remaining 2N-1 segments of sampling point sequence are reconstructed into a 2N-segment half-wave sampling point sequence. The current polarities of adjacent sampling point sequences in the 2N-segment half-wave sampling point sequence are opposite. Half-wave extension is performed on the 2N-segment half-wave sampling point sequence to obtain the 2N-segment full-wave sampling point sequence; by performing feature calculations on the 2N-segment full-wave sampling point sequence, an asymmetric fault feature set is constructed. The asymmetric fault feature set is input into the trained classifier to obtain the detection result of the target line.

2. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 1, characterized in that, The construction of an asymmetric fault feature set by performing feature calculations on the 2N full-wave sampling point sequence includes: A feature matrix is ​​constructed by performing feature calculations on each full-wave sampling point sequence; The feature matrix is ​​asymmetrically enhanced; based on the asymmetrically enhanced feature matrix, an asymmetric fault feature set is constructed.

3. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 2, characterized in that, The feature calculation includes: time-domain feature calculation, frequency-domain feature calculation, and time-frequency-domain feature calculation.

4. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 2, characterized in that, The asymmetric enhancement of the feature matrix includes: Each element in the asymmetric fault feature set is computed by using the difference maximization search function and the feature matrix.

5. A series arc fault detection system with half-wave reconstruction and polarity enhancement, characterized in that, include: The sampling module is used for... The target line current signal is continuously sampled within a time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle; The reconstruction module is used to identify zero points in the current signal and record one or more zero-crossing moments corresponding to the current zero-crossing points; each zero-crossing moment is used as the boundary moment between the positive and negative half-waves, and the sampled signal is reconstructed into a 2N-segment half-wave sampling point sequence based on the boundary moment; the sampled signal is divided into 2N+1 segments of sampling point sequence based on the boundary moment; the first and last segments of the 2N+1 segments of sampling point sequence are circularly spliced ​​to obtain a spliced ​​sequence; the spliced ​​sequence and the remaining 2N-1 segments of sampling point sequence are reconstructed into a 2N-segment half-wave sampling point sequence; the current polarity of adjacent sampling point sequences in the 2N-segment half-wave sampling point sequence is opposite. A module is constructed to perform half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; and an asymmetric fault feature set is constructed by performing feature calculations on the 2N-segment full-wave sampling point sequence. The detection module is used to input the asymmetric fault feature set into the trained classifier to obtain the detection result of the target line.

6. An electronic device, comprising: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the half-wave reconstruction and polarity enhancement series arc fault detection method as described in any one of claims 1 to 4.

7. A computer-readable medium having a computer program stored thereon, wherein, When the computer program is executed by the processor, it implements the series arc fault detection method with half-wave reconstruction and polarity enhancement as described in any one of claims 1 to 4.

Images