Server start-up method and program product, storage medium, server
By detecting the status of the memory slot address pins through the baseboard management controller, the target memory installation location is determined and compared with the actual memory installation location. This solves the problem of the server failing to boot normally due to memory installation errors, and improves the maintainability and reliability of the server.
Patent Information
- Application Number
- CN202510987619.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-17
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2045-07-17
AI Technical Summary
In existing technologies, server boot failures caused by memory installation errors are difficult for maintenance personnel to identify, impacting business operations and user experience. Furthermore, the errors are not obvious and only appear after prolonged operation, making maintenance inconvenient.
The baseboard management controller detects the address pin status of the memory slots, determines the target memory installation location based on the information from the central processing unit, and compares it with the actual installation location. Only when they match is the server allowed to start normally; otherwise, startup is prevented and error information is recorded.
To ensure the server is running normally, it is convenient for maintenance personnel to quickly locate the cause of the fault, improve the maintainability and reliability of the server, and avoid system failures and performance degradation caused by memory installation errors.
Smart Images

Figure CN120492046B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of server starting, in particular to a server starting method and program product, a storage medium and a server. BACKGROUND
[0002] With the development of CPU (Central Processing Unit) chip manufacturers, the number of memory channels supported by the CPU is increasing, and the number of memories supported by each channel is also increasing. If the memory installation method does not meet the requirements of the CPU chip manufacturer, it will often cause some difficult problems, such as low performance, CPU downtime, abnormal memory quantity detection, data loss, etc.
[0003] In the above-mentioned case, the corresponding server may not start normally, and such problems often take a long time for R&D personnel and operation and maintenance personnel to find and solve. The related art generally relies on the CPU main chip to detect, and through the data channel and the I2C (Inter-Integrated Circuit) channel, the memory installation method can be known. Some serious memory installation methods will cause the CPU to be down, and the specific performance is that the CPU does not start. However, for maintenance personnel, there are many reasons for the non-starting condition, and it is impossible to judge whether the non-starting condition is caused by the memory installation error, and it is impossible to effectively identify the error. It is not convenient to maintain. The second problem is that only long-time running can report an error for some memory installation methods, and the error performance is not a memory installation exception. Maintenance personnel cannot correctly identify the error cause and cannot effectively maintain. That is, only long-time running can report an error for the memory, which will affect the business running, so the memory installation error will affect the product quality, cause the server to fail to start, and reduce the user experience. SUMMARY
[0004] The present application provides a server starting method and program product, a storage medium and a server to at least solve the problem in the related art that the CPU does not immediately reflect the error installation of the memory, only long-time running can report an error, affects the business running, and causes the server to fail to start normally, etc. The server can be ensured to start normally, the maintenance personnel can directly find the cause of the server starting failure, and the maintainability of the server is increased.
[0005] The present application provides a server starting method, characterized in that it is applied to a baseboard management controller, the baseboard management controller is configured in a server, the server includes at least one central processing unit and at least one memory, and the method includes:
[0006] In response to a server starting instruction, the address pin state of the memory slot is detected.
[0007] determining a target memory installation position of the memory based on the first basic information of the central processor;
[0008] determining a current actual memory installation position of the memory based on the address pin state and a channel number corresponding to each memory when communicating with the central processor based on a preset communication channel;
[0009] comparing the target memory installation position and the actual memory installation position, so as to control the server to start normally in the case that the target memory installation position is the same as the actual memory installation position.
[0010] The application further provides a computer program product, comprising computer programs / instructions, which are executed by a processor to implement the server starting method.
[0011] The application further provides a non-volatile computer readable storage medium, which stores programs, and the programs are executed by a processor to implement the server starting method.
[0012] The application further provides a server, comprising a memory, a processor and programs stored in the memory and executable on the processor, and the processor executes the programs to implement the server starting method.
[0013] According to the application, in response to a server starting instruction, the address pin state of a memory slot is detected, the target memory installation position of the memory is determined based on the first basic information of the central processor, the current actual memory installation position of the memory is determined based on the address pin state and the channel number corresponding to each memory when communicating with the central processor based on a preset communication channel, and the target memory installation position and the actual memory installation position are compared, so as to control the server to start normally in the case that the target memory installation position is the same as the actual memory installation position. Thus, the method can ensure the normal starting of the server, and the maintenance personnel can directly find the starting failure reason of the server, thereby increasing the maintainability of the server. BRIEF DESCRIPTION OF DRAWINGS
[0014] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort.
[0015] Figure 1 a flow chart of the server starting method according to an embodiment of the application;
[0016] Figure 2This is a schematic diagram of a server structure according to an embodiment of this application;
[0017] Figure 3 A flowchart of a specific example of a server startup method according to this application;
[0018] Figure 4 This is a block diagram of a server according to an embodiment of this application.
[0019] Reference numerals: 200 - server, 210 - memory, 220 - processor. Detailed Implementation
[0020] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.
[0021] The following description, with reference to the accompanying drawings, outlines a server startup method, a computer program product, a non-volatile computer-readable storage medium, and a server according to embodiments of this application.
[0022] Figure 1 This is a flowchart of a server startup method according to an embodiment of this application.
[0023] like Figure 1 As shown, the server startup method in this application embodiment may include the following steps:
[0024] S1 responds to the server start command and detects the address pin status of the memory slot.
[0025] S2 determines the target memory installation location based on the first basic information from the central processing unit.
[0026] S3 determines the current actual memory installation location of the memory based on the address pin status and the channel number corresponding to each memory when communicating with the central processing unit based on a preset communication channel.
[0027] S4 compares the target memory installation location with the actual memory installation location to ensure the server starts normally if the target memory installation location and the actual memory installation location are the same.
[0028] Specifically, in the server startup of the embodiments of the present application, control can be performed by means of a BMC (Baseboard Management Controller), which is integrated on the server motherboard, and the start-up operation of the BMC is not affected by abnormal memory installation. Even if the memory installation is incorrect, the BMC can still start up normally and detect the memory status.
[0029] First, the baseboard management controller responds to the server start-up instruction and detects the address pin state of the memory slot. For example, the response to the server start-up instruction can include both automatic response and passive response. Automatic response is usually used to improve the automation and reliability of the system, such as timed start, remote wake-up, hardware event triggering, and system failure recovery. Passive response requires explicit instructions from the user or administrator, such as local manual start, remote manual start, and start through scripts or programs. These methods can be flexibly selected according to actual needs to ensure efficient operation and management of the server. When the server receives the start-up instruction, the baseboard management controller starts working. The baseboard management controller can detect the address pin state of each memory slot through a hardware interface, and the address pin state can be used to identify the local address of the memory slot. For example, the address pins (such as SA0, SA1, SA2, etc.) of the memory slot are connected to the power supply or ground through pull-up or pull-down resistors to ensure that the pins are in a known state when there is no memory inserted. When the memory is inserted into the slot, the pin state will change according to the physical connection of the memory.
[0030] Next, the target memory installation position of the memory is determined according to the first basic information of the central processor. The first basic information can include the number of memory channels supported by the central processor, the number of memories supported by each channel, and the recommended memory installation position. This memory installation position can be the best installation method in terms of performance and function after long-term detection by the CPU chip manufacturer, i.e., the baseboard management controller pre-constructs a target memory installation position table according to this information.
[0031] After detecting the address pin state, the current actual memory installation position of the memory can be determined according to the address pin state and the channel number corresponding to each memory based on the preset communication channel when communicating with the central processor. That is, each memory can communicate with the central processor based on a preset communication channel (such as an I2C bus), and each memory can correspond to a respective communication channel. The baseboard management controller can read the information of each memory through the preset communication channel and determine the corresponding memory channel number. Thus, the current actual memory installation position of the memory can be determined according to the address pin state and the channel number. For example, according to the address pin state, it is determined that the corresponding address of memory A is 000 and the corresponding channel number is 0, and it is determined that the corresponding address of memory B is 010 and the corresponding channel number is 1. Thus, the actual installation position of the current memory can be determined based on the channel number and the address.
[0032] After determining the actual memory installation position, the actual memory installation position can be compared with the target memory installation position. If the two are consistent, it means that the memory is installed correctly, and the baseboard management controller allows the server to start normally. If the two are not consistent, it means that the memory is installed incorrectly, and the baseboard management controller can trigger an alarm mechanism to prevent the server from starting and inform the user to check. For example, assuming that the target memory installation position table is as follows: the number of supported memories: 2, the recommended memory slot position: channel 0, slot 1 (as corresponding to pin state 000); channel 1, slot 3 (as corresponding to pin state 010), the BMC compares the actual memory installation position and the target memory installation position, the actual installation position: channel 0, slot 1; channel 1, slot 3, the target installation position: channel 0, slot 1; channel 1, slot 3, the two are consistent, and the baseboard management controller allows the server to start normally.
[0033] Therefore, by this method, the memory installation error problem in the operation process of the test personnel and the production line production personnel can be effectively prevented, the normal start of the server can be ensured, the server start failure reason can be directly found by the maintenance personnel, and the maintainability of the server is increased.
[0034] According to an embodiment of the present application, the actual memory installation position of the memory is determined based on the address pin state and the channel number corresponding to the preset communication channel of each memory when communicating with the central processor, and comprises: determining the local address corresponding to the memory based on the pin state; determining the actual memory installation position based on the local address and the channel number.
[0035] Specifically, each memory slot has a plurality of address pins (such as SA0, SA1, SA2, etc.), and the state (such as high level or low level) of these pins is used to identify the local address of the memory slot. By detecting the state of these pins, the specific slot position of each memory can be determined. For example, the address pins of each memory slot are connected to the power supply or ground through pull-up or pull-down resistors to ensure that the pins are in a known state when no memory is inserted. The baseboard management controller reads the state of the address pins through the GPIO (General Purpose Input / Output, general purpose input / output interface) or other special interfaces, and determines the local address of the memory slot according to the state combination of the address pins. For example, 3 address pins can be combined to form 8 states, corresponding to 8 different slots.
[0036] After determining the local address, the actual memory installation position can be determined according to the local address and the channel number. That is, each memory communicates with the central processor through a preset communication channel (such as an I2C bus), reads the information of the memory, obtains the local address and the channel number of the memory, and combines the local address and the channel number to determine the actual installation position of the memory.
[0037] Thus, by combining the address pin state and the channel number, the baseboard management controller can accurately determine the actual installation position of each memory, which helps to quickly locate memory installation errors or failures, ensures that the memory is installed in the optimal configuration, and improves system performance.
[0038] According to one embodiment of the present application, determining the local address corresponding to the memory based on the pin state comprises: determining the local address according to the pin state and a first preset mapping relationship, wherein the first preset mapping relationship is used to indicate the relationship between the pin state and the local address.
[0039] Specifically, when determining the local address corresponding to the memory according to the pin state, the local address can be determined according to the pin state and the first preset mapping relationship. That is, the first preset mapping relationship is a predefined table or rule used to indicate the corresponding relationship between the address pin state and the local address. Through this mapping relationship, the baseboard management controller can convert the detected pin state into a specific local address.
[0040] Suppose there are 8 memory slots on the server motherboard, each slot has 3 address pins (SA0, SA1, SA2), and the address pins are connected to the power supply or ground through pull-up or pull-down resistors. Suppose the first preset mapping relationship is as follows: SA2: 0, SA1: 0, SA0: 0, corresponding to the local address 000; SA2: 0, SA1: 0, SA0: 1, corresponding to the local address 001; SA2: 0, SA1: 1, SA0: 0, corresponding to the local address 010; SA2: 0, SA1: 1, SA0: 1, corresponding to the local address 011; SA2: 1, SA1: 0, SA0: 0, corresponding to the local address 100; SA2: 1, SA1: 0, SA0: 1, corresponding to the local address 101; SA2: 1, SA1: 1, SA0: 0, corresponding to the local address 110; SA2: 1, SA1: 1, SA0: 1, corresponding to the local address 111. Thus, when the BMC detects that the pin state of a certain slot is SA2=0, SA1=1, SA0=0, it can determine the local address of the slot as 010 by looking up the first preset mapping relationship.
[0041] Thus, by detecting the address pin state and combining the first preset mapping relationship, the BMC can accurately determine the local address of each memory slot, automatically detect the address pin state and determine the local address without human intervention, which helps to quickly locate errors or failures of the memory slot.
[0042] According to one embodiment of the present application, the actual memory installation position is determined based on the local address and the channel number, comprising: determining the actual memory installation position according to the local address, the channel number and a second preset mapping relationship, wherein the second preset mapping relationship is used to indicate the relationship between the local address, the channel number and the actual memory installation position, and the actual memory installation position is represented by the physical address of the memory slot.
[0043] Specifically, when determining the actual memory installation position according to the local address and the channel number, the actual memory installation position can be determined according to the local address, the channel number and the second preset mapping relationship. The second preset mapping relationship is a predefined table or rule, which is used to indicate the corresponding relationship between the local address, the channel number and the actual memory installation position. The actual memory installation position is represented by the physical address of the memory slot, and the physical address is the actual position identifier of the memory slot on the mainboard. When the BMC detects the local address and the channel number of the memory, the actual installation position of the memory is determined by looking up the second preset mapping relationship.
[0044] Suppose there are 8 memory slots on the server mainboard, and each slot has 3 address pins (SA0, SA1, SA2), which are connected to the power supply or ground through pull-up or pull-down resistors. Suppose the second preset mapping relationship is as follows: local address: 000, channel number: 0, actual installation position: channel 0, slot 1; local address: 001, channel number: 0, actual installation position: channel 0, slot 2; local address: 010, channel number: 1, actual installation position: channel 1, slot 3; local address: 011, channel number: 1, actual installation position: channel 1, slot 4; local address: 100, channel number: 2, actual installation position: channel 2, slot 5; local address: 101, channel number: 2, actual installation position: channel 2, slot 6; local address: 110, channel number: 3, actual installation position: channel 3, slot 7; local address: 111, channel number: 3, actual installation position: channel 3, slot 8. Thus, in the case of determining that the local address of the memory is 000 and the channel number is 0, the actual installation position can be determined as "channel 0, slot 1" by looking up the mapping relationship.
[0045] Thus, by combining the local address, the channel number and the second preset mapping relationship, the BMC can accurately determine the actual installation position of each memory. The BMC can automatically detect the local address and the channel number and determine the actual installation position without human intervention, which helps to quickly locate the error or failure of the memory, ensures that the memory is installed in the correct slot position, and improves the performance of the system.
[0046] According to one embodiment of the present application, detecting address pin states of a memory slot comprises: obtaining resistance configurations corresponding to connections of address pins of the memory slot; and determining the address pin states based on the resistance configurations.
[0047] Specifically, when detecting the address pin states of the memory slot, the resistance configurations corresponding to the connections of the address pins of the memory slot can be obtained, and the states of the address pins can be set by pull-up or pull-down resistors. These resistors are connected to a power supply (VCC) or ground (GND) to ensure that the pins are in a known state when no memory is inserted, i.e., when the memory is inserted into the slot, the state of the pin will change according to the physical connection of the memory. Connecting the address pin to the power supply makes the pin default to a high level, and connecting the address pin to the ground makes the pin default to a low level. The resistance configuration of each address pin determines its default state. For example, the SA0 pin can be connected to the power supply by a pull-up resistor, making it default to a high level; and connected to the ground by a pull-down resistor, making it default to a low level.
[0048] In the hardware design phase, the resistance configuration of the address pin has been determined and recorded in the hardware design document, and the BMC can obtain the resistance configuration of each address pin by reading the hardware design document or through hardware detection circuit. Assuming that the address pin configuration of the memory slot is as follows: SA0: pull-up resistor connected to VCC (default high level), SA1: pull-down resistor connected to GND (default low level), SA2: pull-up resistor connected to VCC (default high level), these configuration information is stored in the hardware design document, and the BMC can obtain it by reading these documents or through hardware detection circuit. Thus, the address pin state can be determined based on the resistance configuration. That is, according to the obtained resistance configuration, the BMC can determine the state (high level or low level) of each address pin, and the state of the address pin is usually represented in binary form, for example, the states of SA2, SA1 and SA0 can be combined into a 3-bit binary number.
[0049] Thus, by obtaining the resistance configuration and detecting the address pin state, the BMC can accurately determine the local address of each memory slot, and the BMC can automatically detect the address pin state without human intervention, which helps to quickly locate the error or fault of the memory slot, ensures that the memory is installed in the correct slot position, and improves the system performance.
[0050] According to one embodiment of the present application, determining the address pin states based on the resistance configurations comprises: determining corresponding level states based on the resistance configurations; and determining the address pin states based on the level states.
[0051] Specifically, when determining the address pin state according to the resistance configuration, the corresponding level state can be determined according to the resistance configuration, that is, the actual level state can be read by a hardware detection circuit (such as a GPIO) to confirm whether the state of the pin is changed by the memory. Each address pin is connected to the power supply or ground through a pull-up or pull-down resistor, for example, the SA0 pin is connected to VCC through a 10kΩ pull-up resistor, so that it defaults to a high level. The BMC reads the level state of each address pin through the GPIO interface. If the pin is connected to VCC through a pull-up resistor, its default state is high (1), and if the pin is connected to GND through a pull-down resistor, its default state is low (0).
[0052] Thus, the address pin state can be determined according to the level state. That is, according to the detected level state, the actual state (high level or low level) of each address pin is determined. The state of the address pin is usually represented in binary form, for example, the states of SA2, SA1 and SA0 can be combined into a 3-bit binary number. If the detected level state is consistent with the default state, it means that the memory has not changed the state of the pin. If the detected level state is different from the default state, it means that the memory has changed the state of the pin.
[0053] Therefore, the BMC can accurately determine the address pin state of each memory slot, thereby quickly locating the error or failure of the memory slot, ensuring that the memory is installed in the correct slot position, and improving system performance.
[0054] According to an embodiment of the present application, the first basic information includes the model of the central processor, and determining the target memory installation position of the memory based on the first basic information of the central processor includes: determining the target memory installation position according to the model and a third preset mapping relationship, wherein the third preset mapping relationship is used to indicate the relationship between the model and the target memory installation position.
[0055] Specifically, the first basic information can include the model of the central processor, and when determining the target memory installation position of the memory according to the first basic information of the central processor, the target memory installation position can be determined according to the model and a third preset mapping relationship. That is, different models of central processors support different numbers of memory channels and different numbers of memories. For example, a central processor can support 8 channels, each channel supports two memories, and a total of 16 memories can be supported. The central processor chip manufacturer will recommend the optimal memory installation method according to different memory quantities and business scenarios. These optimal installation methods are determined based on the characteristics of the central processor model and the memory quantity. For example, if one memory is installed, it needs to be installed in the 000 memory slot, if two memories are installed, it needs to be installed in the 000 and 040 memory slots, etc.
[0056] The third preset mapping relationship is a predefined table or rule indicating the correspondence between the central processor model and the target memory installation position. Through this mapping relationship, the BMC can determine the optimal installation position of the memory according to the model of the central processor. That is, the central processor chip manufacturer will define a memory installation mode table for each model of central processor according to the test results, and the table lists the optimal installation position under different memory quantities in detail. When the server or computer is started, the BMC can obtain the currently installed memory information (including the memory quantity and the installation position) from the central processor through the I2C channel, and then compare these information with the preset mapping relationship to determine whether the memory is installed in the recommended manner.
[0057] Therefore, through the above steps, the BMC can accurately determine the target installation position of the memory based on the CPU model and the third preset mapping relationship. This method not only improves the reliability and performance of the system, but also simplifies the maintenance and fault diagnosis process.
[0058] According to an embodiment of the present application, the third preset mapping relationship includes the memory installation quantity supported by different models of central processors and the target installation position corresponding to each memory installation quantity, wherein the target installation position is represented by the physical address of the memory slot.
[0059] Specifically, the third preset mapping relationship is a predefined table or rule indicating the memory installation quantity supported by different models of CPUs and the target installation position corresponding to each memory installation quantity. The target installation position is represented by the physical address of the memory slot, and the physical address is the actual position identifier of the memory slot on the motherboard. The mapping relationship includes different models of CPUs, the maximum memory quantity supported by each CPU model, the actual installed memory quantity, the recommended memory installation position represented by the physical address of the memory slot, and the physical address of the memory slot is a unique identifier, such as "channel 0, slot 1" or "channel 1, slot 3".
[0060] Therefore, the BMC can accurately determine the target installation position of the memory based on the CPU model and the actual installed memory quantity in combination with the third preset mapping relationship. This method not only improves the reliability and performance of the system, but also simplifies the maintenance and fault diagnosis process.
[0061] According to an embodiment of the present application, as Figure 2As shown, the server also includes a programmable logic control module (CPLD in the figure), and in response to the server start instruction, the server start method further includes: sending the server start instruction to the programmable logic control module, so that the programmable logic control module generates multiple power supply enable signals based on the preset timing logic.
[0062] Specifically, the server also includes a programmable logic control module, such as a CPLD, a programmable digital logic integrated circuit used to implement complex logic functions and timing control. In the server, the CPLD is usually used to manage the enable signals of the power supply, to ensure that the power supply is turned on and off in the correct timing, to avoid hardware conflicts or damage. The preset timing logic is a set of predefined timing rules used to control the generation of power supply enable signals. These rules ensure that the various hardware components of the server are started in the correct order to avoid hardware conflicts or damage. The timing logic is usually stored in the non-volatile memory of the CPLD and can be configured and updated by software.
[0063] When the user or system issues a server start instruction, the BMC receives the instruction. The start instruction can be triggered in various ways, such as the user pressing the power button, the remote management tool sending a start command, or the timing start mechanism. The BMC forwards the received server start instruction to the programmable logic control module, and the communication method can be through a dedicated hardware interface (such as I2C). The CPLD reads the preset timing logic rules from its non-volatile memory, which define the generation order and time interval of the power supply enable signals. According to the preset timing logic, the CPLD generates multiple power supply enable signals, which are used to control the various power supply modules of the server, to ensure that the power supply is started in the correct order.
[0064] The power supply enable signals are sent to the power supply modules of the server, causing the power supply modules to start in the preset timing. For example, the CPLD may first enable the CPU power supply, then the memory power supply, and finally the hard disk power supply. After receiving the enable signals, the power supply modules start in the preset timing. The various hardware components of the server (such as CPU, memory, hard disk, etc.) receive power supply in turn and start to start, and after all hardware components start, the server enters normal operation state.
[0065] Thus, through the preset timing logic generated by the CPLD, the power supply is turned on and off in the correct order to avoid hardware conflicts or damage, and the various hardware components of the server are started in the correct order to improve the stability and reliability of the system.
[0066] According to one embodiment of the present application, as Figure 2As shown, the memory is installed with a serial presence detection module, and the serial presence detection module stores second basic information of the memory. After the control server is normally started, the server starting method further comprises: recording the memory installation position normal information, the second basic information and the actual memory installation position to a non-volatile log storage area.
[0067] Specifically, the memory is installed with a serial presence detection module (SPD, Serial Presence Detect), which is a small electrically erasable programmable read-only memory installed on the memory and used to store detailed specification information of the memory. The information (second basic information) stored in the SPD module can include the capacity, speed, manufacturer, timing parameter, working voltage and the like of the memory. These information is used to configure the memory controller during system startup to ensure that the memory can work correctly.
[0068] After the control server is normally started, the memory installation position normal information, the second basic information and the actual memory installation position can also be recorded to a non-volatile log storage area. That is, the non-volatile log storage area is a storage area located in the BMC or a dedicated non-volatile memory, used to record important information and logs during system operation, and the recorded information will not be lost after the system is powered off, facilitating subsequent fault diagnosis and maintenance.
[0069] Therefore, when the server is started, the BMC communicates with the SPD module of the memory through the I2C bus, reads the information in the SPD module, and the read information includes the capacity, speed, manufacturer, timing parameter, working voltage and the like of the memory. The BMC stores the read second basic information in the memory installation position table for subsequent use. Moreover, the BMC compares the actual memory installation position with the target memory installation position. If they are consistent, it means that the memory is installed correctly, and the memory installation position normal information is generated. The BMC stores the memory installation position normal information in the memory installation position table, and records the actual memory installation position normal information to the non-volatile log storage area. These information includes the physical address, channel number and the like of the memory.
[0070] For example, the memory 1: installation position normal, the memory 2: installation position normal, the memory 1: capacity 16GB, speed 3200MHz, manufacturer Kingston, timing parameter CL16, working voltage 1.2V, the memory 2: capacity 16GB, speed 3200MHz, manufacturer Kingston, timing parameter CL16, working voltage 1.2V, actual memory installation position: memory 1: channel 0, slot 1, memory 2: channel 1, slot 3.
[0071] Thus, the information recorded by the non-volatile log storage area will not be lost after the system is powered off, facilitating subsequent system maintenance and troubleshooting. Maintenance personnel can understand the detailed information and installation status of the memory module by reading the log record, thereby quickly solving the problem. By recording the normal memory installation position information, the second basic information, and the actual memory installation position, the BMC can quickly locate the installation error or failure of the memory module. For example, if the installation position of a certain memory module is incorrect, the BMC can quickly discover the problem and notify the user through the log record.
[0072] According to an embodiment of the present application, the server startup method further comprises: in the case where the target memory installation position and the actual memory installation position are not the same, controlling the server to stop starting and executing a shutdown command.
[0073] Specifically, the baseboard management controller compares the target installation position with the actual installation position to verify whether the memory is installed at the correct position. If the target memory installation position and the actual memory installation position are inconsistent, the baseboard management controller will take measures to prevent the server from continuing to start and execute a shutdown command to prevent the system from running in an unstable configuration.
[0074] For example, the BMC reads the target installation position and the actual installation position. Memory 1: target position is channel 0, slot 1; actual position is channel 0, slot 1. Memory 2: target position is channel 1, slot 3; actual position is channel 2, slot 5. The BMC compares the target installation position and the actual installation position. Memory 1: the positions are consistent, continue to start, memory 2: the positions are inconsistent, proceed to the next step. The BMC controls the server to stop starting and executes a shutdown command. The BMC prevents the server from continuing to start and sends a shutdown command to the power management module to ensure that the server is safely closed. This mechanism can effectively avoid system failure or performance degradation caused by incorrect memory installation.
[0075] Thus, by detecting the memory installation position during the startup process and preventing the startup of an incorrect configuration, system failure or performance problems caused by incorrect memory installation can be effectively prevented, and the memory module can be ensured to be installed at the correct position, thereby improving the stability and reliability of the system.
[0076] According to an embodiment of the present application, the server startup method further comprises: recording the memory installation position abnormality information and the actual memory installation position to a non-volatile log storage area.
[0077] Specifically, when the target memory installation position and the actual memory installation position are inconsistent, the BMC generates error information, which is used to describe the abnormality of the memory module installation position. The abnormality information can include the number of the memory module and the error type (such as “installation position mismatch”).
[0078] For example, the BMC reads the target installation location and the actual installation location. Memory 1: target location is channel 0, slot 1; actual location is channel 0, slot 1, memory 2: target location is channel 1, slot 3; actual location is channel 2, slot 5. The BMC compares the target installation location and the actual installation location. Memory 1: the locations are consistent, continue to start. Memory 2: the locations are inconsistent, generate an exception information. The BMC generates the memory installation location exception information and the actual memory installation location and records them to the non-volatile log storage area. For example, the exception information: memory number: 2, target installation location: channel 1, slot 3, actual installation location: channel 2, slot 5, error type: installation location mismatch, which can be recorded to the non-volatile log storage area accordingly.
[0079] Thus, the information recorded by the non-volatile log storage area will not be lost after the system is powered off, facilitating subsequent system maintenance and troubleshooting. Maintenance personnel can understand the detailed information and installation state of the memory module by reading the log record, thereby quickly solving the problem. By recording the memory installation location exception information and the actual memory installation location, the BMC can quickly locate the installation error or failure of the memory module, which helps to improve the overall reliability and stability of the system.
[0080] According to an embodiment of the present application, the programmable logic control module is connected with the alarm device, and the server starting method further comprises: sending an alarm instruction to the programmable logic control module, so that the programmable logic control module controls the alarm device to execute the alarm instruction after receiving the alarm instruction.
[0081] Specifically, the programmable logic control module is also connected with the alarm device, and the alarm device is a device for notifying the user of the server running state, such as an indicator light, a buzzer, a display screen, etc. The alarm device can convey the state information of the server to the user in different ways (such as flashing, sound, display information). During the server starting process, the BMC detects memory installation location exceptions or other hardware problems. For example, the BMC finds that the actual installation location of the memory module is inconsistent with the target installation location. The BMC generates an alarm information, including the specific content of the exception and the recommended solution. For example, the alarm information can be: “Memory module 2 installation location error, please check.” After receiving the alarm instruction sent by the BMC, the programmable logic control module parses the instruction content and prepares to execute the corresponding alarm operation. The CPLD controls the alarm device to execute the corresponding alarm operation according to the received alarm instruction.
[0082] Thus, the user can quickly locate and solve the problem by conveying the problem in the server startup process to the user through the alarm device. By timely informing the user of the hardware installation error or other problems, the system can be prevented from running in an unstable or erroneous configuration, the overall reliability of the system is improved, and through the intuitive information provided by the alarm device, the maintenance personnel can quickly understand the problem, reducing maintenance time and cost.
[0083] According to one embodiment of the present application, as shown in Figure 2 The alarm device is an indicator light, and the control of the alarm device to execute the alarm instruction includes: controlling the indicator light to operate in a constant light mode according to a preset color or in a flashing mode according to a preset frequency based on the alarm instruction. The preset flashing frequency can be determined according to actual conditions.
[0084] Specifically, the alarm device is an indicator light, and when the alarm device is controlled to execute the alarm instruction, the indicator light can be controlled to operate in a constant light mode according to a preset color or in a flashing mode according to a preset frequency based on the alarm instruction. The indicator light can display multiple colors (such as red, yellow, and green) and support constant light or flashing mode. Different colors are used to represent different types of alarms or states. For example, red usually represents a serious error, yellow represents a warning, and green represents normal operation, and the flashing mode (such as flashing frequency) is used to further refine the alarm information. For example, fast flashing can represent an urgent error, and slow flashing can represent a general warning.
[0085] That is, during the server startup process, the BMC (baseboard management controller) detects an abnormal memory installation position or other hardware problems. For example, the BMC finds that the actual installation position of the memory module does not match the target installation position. The BMC generates alarm information, including the specific content of the abnormality and the recommended solution. For example, the alarm information can be: "Memory module 2 installation position error, please check." The BMC generates specific alarm instructions according to the alarm information, including the color and flashing mode of the indicator light. For example, the alarm instruction can be: "red indicator light fast flashing." After the CPLD receives the alarm instruction, the indicator light is controlled to execute the alarm operation, and the CPLD can control the red indicator light to flash at a frequency of 3 times per second.
[0086] Thus, through the different colors and flashing modes of the indicator light, the user can quickly identify the state or alarm information of the server and take timely measures. The user can be timely informed of the hardware installation error or other problems, the system can be prevented from running in an unstable or erroneous configuration, and the overall reliability of the system is improved.
[0087] According to one embodiment of the present application, the server startup method further includes: pre-storing the target memory installation position into the baseboard management controller.
[0088] In particular, the target memory installation position refers to the recommended memory installation position according to the hardware design of the server and the memory configuration supported by the CPU. These positions are usually derived by the hardware manufacturer based on performance optimization and compatibility testing. The target installation position includes the physical address of the memory (such as channel number and slot number), and the BMC can store and manage the memory installation position information to ensure that the memory module is installed in the correct position. During server initialization or maintenance, the administrator can manually input the target memory installation position information through the management interface of the BMC. Alternatively, use a dedicated management software tool to import the target memory installation position information into the memory of the BMC.
[0089] In this way, by pre-storing the target memory installation position information, the BMC can verify the installation position of the memory module at system startup, ensuring that the hardware configuration is correct and avoiding system instability or performance problems caused by installation errors. Memory installation position errors can be detected and notified in a timely manner, and the system can be prevented from running under incorrect configuration, improving the overall reliability of the system.
[0090] According to an embodiment of the present application, the second basic information includes at least one of the temperature, voltage, read / write speed and error rate of the memory in operation, and the server startup method further includes: determining the performance and server state of the memory based on the temperature, voltage, read / write speed and error rate in the case that the address pin state is determined to exist that the memory is inserted into the memory slot or the memory is removed from the memory slot; updating the target memory installation position based on the performance and server state.
[0091] In particular, the second basic information refers to the state information of the memory module in operation, including temperature, voltage, read / write speed and error rate, etc. These information are used to evaluate the performance and health status of the memory. The temperature is the temperature of the memory in operation, and excessively high or low temperature may affect the performance and life. The voltage is the power supply voltage of the memory, and unstable voltage may cause performance degradation or failure. The read / write speed is the data read / write speed of the memory, which directly affects the system performance. The error rate is the error rate of the memory, and high error rate may indicate that the memory has a fault.
[0092] During the operation of the server, the insertion or removal of the memory module may cause the system configuration to change. By monitoring the running state of the memory module in real time, the target memory installation position can be dynamically adjusted to ensure system performance and reliability. The baseboard management controller determines whether a memory module is inserted or removed by detecting the address pin state of the memory slot. Changes in the address pin state (such as from high level to low level or vice versa) indicate the insertion or removal of the memory module, and the baseboard management controller records the insertion or removal event of the memory module, including the number of the memory module and the slot position.
[0093] The BMC reads the runtime status information of the memory modules from the SPD module of the memory through the I2C bus or other communication interfaces, including temperature, voltage, read / write speed, and error rate. For example, the second basic information read is: memory number 1, temperature 55 degrees Celsius, voltage 1.2v, read / write speed 3200MB / s, error rate 0.01%; memory number 2, temperature 60 degrees Celsius, voltage 1.2v, read / write speed 3100MB / s, error rate 0.02%. The BMC evaluates the performance of the memory modules and the overall status of the server according to the second basic information read. For example, if the temperature or error rate of a certain memory module is too high, it may indicate that the module has a fault or performance degradation. The BMC determines whether to update the target memory installation location according to the evaluation result. For example, if the performance of a certain memory module decreases, it may need to be moved from a high-load channel to a low-load channel to optimize system performance.
[0094] The BMC updates the target memory installation location table, adjusting the recommended installation location of the memory module to a location more suitable for its current performance and status. For example, moving memory module 2 from channel 1, slot 3 to channel 2, slot 5. The BMC records the updated target memory installation location information in the non-volatile memory for subsequent use.
[0095] In this way, by monitoring the running status of the memory modules in real time, the BMC can dynamically adjust the memory installation location, optimize system performance and resource allocation, and maintenance personnel can reduce manual intervention and improve maintenance efficiency by automatically updating the target memory installation location.
[0096] In addition, in an embodiment of the present application, the memory installation location can also be optimized in combination with the server operating environment (such as room temperature, humidity, etc.). The installation location of the memory module can be adjusted according to the environmental conditions (such as temperature, humidity) of the computer room. For example, in a high-temperature environment, move the memory module to a channel with better heat dissipation; in a high-humidity environment, move the memory module to a slot with better moisture-proof performance.
[0097] According to an embodiment of the present application, the server startup method further comprises: presenting the updated target memory installation location to the user through a user interface to make optimization suggestions.
[0098] Specifically, presenting the updated target memory installation location to the user through a user interface to make optimization suggestions is an important link in the server startup method, aiming to convey optimization suggestions for memory installation location to the user through an intuitive user interface, helping the user to better manage and maintain the server.
[0099] The user interface is the interface through which the user interacts with the server management system, and can include a graphical interface or a command line interface. The user interface is used to display system status, configuration information, alarm information, and optimization suggestions, etc., to help the user manage and maintain the system. Based on the current running state and hardware configuration of the server, suggestions are generated to help the user optimize system performance and reliability. The purpose of displaying optimization suggestions is to enable the user to understand the rationality of the current memory installation location and provide improvement schemes to ensure that the system runs in an optimal state.
[0100] Assuming that the server detects that the actual installation location of memory module 2 does not match the target installation location during the startup process, the BMC generates an optimization suggestion. On the "optimization suggestion" page of the user interface, the following is displayed: target installation location: channel 1, slot 3, actual installation location: channel 2, slot 5, optimization suggestion: move memory module 2 from channel 2, slot 5 to channel 1, slot 3 to optimize system performance. In this way, the optimization suggestion is displayed through an intuitive user interface, the user can quickly understand the system status and improvement scheme, the user's satisfaction with the system is improved, and the user can quickly perform optimization operations according to the suggestion to ensure that the server runs in an optimal state. This method not only improves the performance and reliability of the system, but also simplifies the maintenance and fault diagnosis process.
[0101] The method of the present application will be described below in conjunction with Figure 3 .
[0102] As a specific example, the server startup method of the present application can include the following steps:
[0103] S101, in response to a server start instruction, and obtaining the resistance configuration connected by the address pin of the memory slot.
[0104] S102, determining the corresponding level state based on the resistance configuration, to determine the address pin state based on the level state.
[0105] S103, determining the local address corresponding to the memory based on the pin state, and determining the actual memory installation location based on the local address and the channel number corresponding to each memory when communicating with the central processing unit based on the preset communication channel.
[0106] S104, determining the target memory installation location according to the model of the central processing unit and the third preset mapping relationship, wherein the third preset mapping relationship is used to indicate the relationship between the model and the target memory installation location.
[0107] S105, determining whether the target memory installation location and the actual memory installation location are the same. If yes, step S106 is executed; if no, step S107 is executed.
[0108] S106, the control server normally starts, and records the memory installation position normal information, the basic information of the memory and the actual memory installation position to the non-volatile log storage area.
[0109] S107, the control server stops starting, executes the shutdown command, and records the memory installation position abnormal information and the actual memory installation position to the non-volatile log storage area.
[0110] S108, sends an alarm instruction to the programmable logic control module, so that the alarm device executes the alarm instruction after receiving the alarm instruction.
[0111] In summary, in response to the server start instruction, the address pin state of the memory slot is detected, the target memory installation position of the memory is determined based on the first basic information of the central processor, the actual memory installation position of the memory is determined based on the address pin state and the channel number corresponding to each memory based on the preset communication channel and the central processor, the target memory installation position and the actual memory installation position are compared, and in the case that the target memory installation position and the actual memory installation position are the same, the server is controlled to normally start. Therefore, the method can ensure that the server normally starts and runs, the maintenance personnel can directly find the server start failure reason, and the maintainability of the server is increased.
[0112] Corresponding to the above embodiment, the application also provides a computer program product.
[0113] The computer program product of the embodiment of the application comprises computer programs / instructions, which are executed by the processor to implement the above-mentioned server start method.
[0114] According to the computer program product of the embodiment of the application, by executing the above-mentioned server start method, the server can be ensured to normally start and run, the maintenance personnel can directly find the server start failure reason, and the maintainability of the server is increased.
[0115] Corresponding to the above embodiment, the application also provides a non-volatile computer readable storage medium.
[0116] The non-volatile computer readable storage medium of the embodiment of the application has a program stored thereon, which is executed by the processor to implement the above-mentioned server start method.
[0117] According to the non-volatile computer readable storage medium of the embodiment of the application, by executing the above-mentioned server start method, the server can be ensured to normally start and run, the maintenance personnel can directly find the server start failure reason, and the maintainability of the server is increased.
[0118] Corresponding to the above embodiment, the application also provides a server.
[0119] As Figure 4 shown, the server 200 of the embodiments of the present application can include a memory 210, a processor 220, and a program stored on the memory 210 and executable on the processor 220, and the processor 220 implements the server starting method described above when executing the program.
[0120] According to the server of the embodiments of the present application, by executing the server starting method described above, the server can be ensured to start normally, and the maintenance personnel can directly find the reason for the server starting failure, thereby increasing the maintainability of the server.
[0121] It should be noted that the logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as a list of executable instructions for implementing logic functions, and can be specifically embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus or device, such as a computer-based system, a system including a processor, or other system that can fetch the instructions from the instruction execution system, apparatus or device and execute the instructions, or in conjunction with these instruction execution systems, apparatus or devices. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transport a program for use by or in connection with an instruction execution system, apparatus or device, or in conjunction with these instruction execution systems, apparatus or devices. More specific examples (non-exhaustive list) of computer-readable medium include the following: electrical connections having one or more wires (electronic devices), portable computer diskette (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), fiber optic devices, and portable compact disc read-only memory (CD ROM). In addition, the computer-readable medium can even be paper or other suitable medium on which the program can be printed, as the program can be electronically obtained, for example, by optical scanning of the paper or other medium, followed by electronic conversion, interpretation or processing, if necessary, in other suitable manner, and then stored in a computer memory.
[0122] It should be understood that parts of the present application can be implemented in hardware, software, firmware or a combination thereof. In the above-described embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, and as in another embodiment, it can be implemented by any one or a combination of the following technologies known in the art: discrete logic circuit with logic gates for implementing logical functions on data signals, application specific integrated circuit with suitable combination logic gates, programmable gate array (PGA), field programmable gate array (FPGA), etc.
[0123] In the description of the specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the description of the specification, the illustrative description of the above terms does not necessarily mean the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0124] In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified and limited.
[0125] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection", "fixing" and other terms should be understood in a broad sense, for example, can be fixedly connected, can also be detachably connected, or integrated; can be mechanically connected, can also be electrically connected; can be directly connected, can also be indirectly connected through an intermediate medium, can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0126] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present application.
Claims
1. A server start-up method, characterized by, The application is applied to a substrate management controller, which is arranged in a server, and the server comprises at least one central processor and at least one memory, and the method comprises the following steps: In response to a server starting instruction, the address pin state of a memory slot is detected; Based on the first basic information of the central processor, the target memory installation position of the memory is determined; Based on the address pin state and the channel number corresponding to each memory when it communicates with the central processor based on a preset communication channel, the current actual memory installation position of the memory is determined; The target memory installation position and the actual memory installation position are compared, so that in the case that the target memory installation position and the actual memory installation position are the same, the server is controlled to start normally; The first basic information comprises the model of the central processor, and the determination of the target memory installation position based on the first basic information of the central processor comprises the following steps: The target memory installation position is determined according to the model and a third preset mapping relationship, wherein the third preset mapping relationship is used to indicate the relationship between the model and the target memory installation position, and the third preset mapping relationship comprises the memory installation quantity supported by different models of central processors and the target installation position corresponding to each memory installation quantity, wherein the target installation position is represented by the physical address of the memory slot; The server further comprises a programmable logic control module, and after the server starting instruction is responded, the method further comprises the following steps: The server starting instruction is sent to the programmable logic control module, so that the programmable logic control module generates a multipath power supply enable signal based on a preset timing logic; The method further comprises the following steps: The target memory installation position is pre-stored in the substrate management controller; The second basic information comprises at least one of the temperature, voltage, read-write speed and error rate of the memory during operation, and the method further comprises the following steps: In the case that it is determined based on the address pin state that the memory is inserted into the memory slot or the memory is removed from the memory slot, the performance and server state of the memory are determined based on the temperature, voltage, read-write speed and error rate; The target memory installation position is updated based on the performance and server state; The method further comprises the following steps: The running environment data of the server is acquired, and the target memory position is adjusted according to the running environment data of the server.
2. The server booting method according to claim 1, wherein The current actual memory installation position of the memory is determined based on the address pin state and the channel number corresponding to each memory when it communicates with the central processor based on a preset communication channel, and the method comprises the following steps: The local address corresponding to the memory is determined based on the pin state; The actual memory installation position is determined based on the local address and the channel number.
3. The server booting method according to claim 2, wherein The local address corresponding to the memory is determined based on the pin state, and the method comprises the following steps: The local address is determined according to the pin state and a first preset mapping relationship, wherein the first preset mapping relationship is used to indicate the relationship between the pin state and the local address.
4. The server booting method according to claim 3, wherein The determining the actual memory installation position based on the local address and the channel number comprises: determining the actual memory installation position according to the local address, the channel number and a second preset mapping relationship, wherein the second preset mapping relationship is used to indicate the relationship among the local address, the channel number and the actual memory installation position, and the actual memory installation position is represented by a physical address of a memory slot.
5. The method of claim 1, wherein, The detecting the address pin state of the memory slot comprises: obtaining a resistance configuration corresponding to the address pin of the memory slot; determining the address pin state based on the resistance configuration.
6. The server booting method of claim 5, wherein, The determining the address pin state based on the resistance configuration comprises: determining a corresponding level state based on the resistance configuration; determining the address pin state based on the level state.
7. The method of claim 1, wherein the server initiates the method by, The memory is installed with a serial presence detection module, the serial presence detection module stores second basic information of the memory, and after the server is normally started, the method further comprises: recording memory installation position normal information, the second basic information and the actual memory installation position to a non-volatile log storage area.
8. The server booting method of claim 7, wherein, The method further comprises: in a case where the target memory installation position and the actual memory installation position are different, controlling the server to stop starting and executing a shutdown command.
9. The server booting method of claim 8, wherein, The method further comprises: recording memory installation position abnormal information and the actual memory installation position to the non-volatile log storage area.
10. The server booting method of claim 9, wherein, The programmable logic control module is connected with an alarm device, and the method further comprises: sending an alarm instruction to the programmable logic control module, so as to control the alarm device to execute the alarm instruction after the programmable logic control module receives the alarm instruction.
11. The server booting method of claim 10, wherein, The alarm device is an indicator light, and the controlling the alarm device to execute the alarm instruction comprises: controlling the indicator light to operate in a preset color in a constant light mode or in a preset frequency flashing mode based on the alarm instruction.
12. The method of claim 1, wherein, The method further comprises: showing an optimization suggestion of the updated target memory installation position to a user through a user interface.
13. A computer program product comprising computer programs / instructions, characterized in that, The computer program / instruction is executed by a processor to realize the server starting method according to any one of claims 1-12.
14. A non-transitory computer readable storage medium, comprising: A computer program product, which has a program stored thereon, the program being executed by a processor to realize the server starting method according to any one of claims 1-12.
15. A server, characterized by comprises: a memory, a processor and a program stored on the memory and executable on the processor, and the processor executes the program to realize the server starting method according to any one of claims 1-12.
Citation Information
Patent Citations
Fault memory positioning method and device
CN113010341A
Server memory deployment method and server
CN115687021A
Server memory detection method and device, electronic equipment and storage medium
CN115827376A