A method, apparatus, device, and medium for switching extended device topologies.

Abstract

This invention relates to the field of computer technology, specifically to a method, apparatus, device, and medium for switching extended device topologies. The embodiments of this application completely revolutionize the manual topology switching mode through a fully automated process and flexible hardware configuration. Users only need to trigger a request, and the system can automatically complete driver flashing, interface status updates, and topology switching, eliminating the need for manual disassembly and assembly of equipment and cable adjustments, greatly reducing operational complexity and minimizing manpower and time costs. The switch board supports dynamic port connections, and combined with precise control of registers and drivers, it avoids the risks of errors that can occur with manual wiring. Simultaneously, the new topology is automatically applied after a server restart, avoiding switching failures due to manual operation errors, significantly improving development efficiency, reducing additional development costs caused by topology switching failures, and achieving efficient switching of server peripheral topologies.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and more specifically to a method, apparatus, device, and medium for switching extended device topologies. Background Technology

[0002] In the current server hardware architecture, components such as switch boards, represented by GPU adapters, exhibit proprietary and fixed characteristics in their Upstream and Downstream interfaces. Specifically, once an upstream interface is connected via cable, at the hardware link level, it can only establish a connection with one or more specific downstream ports. This fixed connection design pattern presents a significant challenge to changing the server's peripheral topology. Taking a large server as an example, if its topology is configured according to a specific interrupt device at the factory, changing the topology requires manual cable replacement, a highly cumbersome process. First, the machine must be disassembled, internal devices removed, cables added or removed, and connection methods changed, before the equipment is reassembled and the machine closed.

[0003] For today's clusters, often comprising hundreds, thousands, or even tens of thousands of servers, typically deployed in data centers, manually performing topology changes on each machine would not only require a significant investment of manpower but also be extremely time-consuming. More importantly, this complex and tedious operation is highly prone to errors. During development, this situation also presents numerous challenges; a failed topology switch can impact the functionality of both the underlying and upper-level software, leading to additional development costs. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a method, apparatus, device and medium for switching extended device topology, in order to solve the technical problems of complex operation, high cost, error-proneness and impact on R&D efficiency in the switching of peripheral topology architecture of servers in the prior art.

[0005] In a first aspect, embodiments of the present invention provide a method for switching extended device topology, the method comprising:

[0006] Obtain a topology switching request triggered by a user, wherein the topology switching request includes the topology type of the peripheral switching network in the server, and the peripheral switching network includes switch cards, central processing unit and peripherals;

[0007] The driver program for the switch board is flashed based on the topology type, wherein each uplink interface of the switch board forms a path with all or some downlink interfaces, the uplink interface is used to connect to the central processing unit, and the downlink interface is used to connect to peripherals.

[0008] Update the on / off state of the target expansion interface in the central processing unit according to the topology type, so that the updated target expansion interface is connected to the uplink interface of the switch board.

[0009] Control the server to perform a restart operation so that after restarting, the server switches the topology of the peripheral switching network based on the target extended interface and driver.

[0010] Furthermore, obtaining the topology switching request triggered by the user includes:

[0011] When the basic input / output system detects a topology type selection operation triggered by the user on the settings page, it triggers the event handling mechanism.

[0012] The topology type and topology configuration information selected by the user are obtained through the event handling mechanism.

[0013] A topology switching request is generated based on the topology type and the topology configuration information, and the topology switching request is sent to the baseboard management controller.

[0014] Furthermore, the step of flashing the driver program for the switch board based on the topology type includes:

[0015] The mapping relationship between the preset topology type and the driver is obtained through the baseboard management controller;

[0016] Based on the mapping relationship, the baseboard management controller loads the driver corresponding to the topology type;

[0017] Based on the communication link between the baseboard management controller and the switch board, the driver is flashed to the non-volatile memory in the switch board.

[0018] Furthermore, updating the open / closed state of the target extended interface in the central processing unit according to the topology type includes:

[0019] The interface list associated with the topology type is obtained through the baseboard management controller, wherein the interface list includes target extended interfaces in the central processing unit that need to be enabled or disabled;

[0020] The baseboard management controller sends control commands to the basic input / output system, wherein the control commands are used to adjust the opening and closing state of the target expansion interface;

[0021] The basic input / output system modifies the command register bits of the target expansion interface according to the control instructions to enable or disable the target expansion interface, wherein different command register bits correspond to different states of the target expansion interface.

[0022] Furthermore, obtaining the interface list associated with the topology type through the baseboard management controller includes:

[0023] The interface configuration list corresponding to the topology type is obtained through the baseboard management controller;

[0024] Obtain the mounted peripherals and their corresponding expansion interfaces, and generate a protection list based on the expansion interfaces of the mounted peripherals;

[0025] Obtain the server's load status and predict potential operational risks caused by the current configuration based on the load status;

[0026] Based on the aforementioned operational risks and the protection list, the interface configuration list is optimized to obtain the interface list.

[0027] Furthermore, after modifying the command register bits of the target extended interface according to the control instructions via the basic input / output system, the method further includes:

[0028] The interface configuration result of the target extended interface is obtained through the basic input / output system, and the interface configuration result is sent to the baseboard management controller;

[0029] If the interface configuration result is verified by the baseboard management controller to meet the topology requirements, then the server restart step is executed.

[0030] Furthermore, controlling the server to perform a restart operation, so that the server switches the topology of the peripheral switching network based on the target extended interface and driver after restarting, includes:

[0031] A restart command is generated through the baseboard management controller;

[0032] The server is restarted based on the restart command. During the restart process, the driver program of the switch board is loaded through the basic input / output system, and the physical connection of the peripheral switching network is initialized according to the open / closed state of the target expansion interface.

[0033] After the server restarts, the basic input / output system works in conjunction with the driver to complete the topology switch of the peripheral switching network.

[0034] Secondly, embodiments of the present invention provide a switching device for expanding device topology, the device comprising:

[0035] The acquisition module is used to acquire a topology switching request triggered by a user, wherein the topology switching request includes the topology type of the peripheral switching network in the server, and the peripheral switching network includes switch cards, central processing unit and peripherals;

[0036] A flashing module is used to flash the driver program of the switch board based on the topology type, wherein each uplink interface of the switch board forms a path with all or some downlink interfaces, the uplink interface is used to connect to the central processing unit, and the downlink interface is used to connect to peripherals;

[0037] An execution module is used to update the open / closed state of the target expansion interface in the central processing unit according to the topology type, so that the updated target expansion interface is connected to the uplink interface of the switch board.

[0038] The control module is used to control the server to perform a restart operation, so that the server switches the topology of the peripheral switching network based on the target extended interface and driver after restarting.

[0039] Thirdly, embodiments of the present invention provide a computer device, including: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the method described in the first aspect or any corresponding embodiment thereof.

[0040] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing computer instructions that cause a computer to perform the method described in the first aspect or any of its corresponding embodiments.

[0041] This application's embodiments completely revolutionize the manual topology switching mode through a fully automated process and flexible hardware configuration. Users only need to trigger a request, and the system can automatically complete driver flashing, interface status updates, and topology switching, eliminating the need for manual disassembly and assembly of equipment and cable adjustments, greatly reducing operational complexity and minimizing manpower and time costs. The switch board supports dynamic port connections, and combined with precise control of registers and drivers, it avoids the risks of errors that can occur with manual wiring. Simultaneously, the new topology is automatically applied after a server restart, preventing switching failures due to manual operation errors, significantly improving development efficiency, reducing additional development costs caused by topology switching failures, and achieving efficient switching of server peripheral topology architecture. Attached Figure Description

[0042] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0043] Figure 1 This is a flowchart of a method for switching an extended device topology according to some embodiments of the present invention;

[0044] Figure 2 This is a schematic diagram illustrating the relationship between the uplink interface and the downlink interface according to some embodiments of the present invention;

[0045] Figure 3 This is an interactive schematic diagram of the system framework according to some embodiments of the present invention;

[0046] Figure 4 This is a flowchart of a method for switching an extended device topology according to some embodiments of the present invention;

[0047] Figure 5 This is a structural block diagram of a switching device for an extended device topology according to an embodiment of the present invention;

[0048] Figure 6 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0050] According to embodiments of the present invention, a method, apparatus, device, and medium for switching extended device topologies are provided. It should be noted that the steps shown in the flowcharts in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowcharts, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0051] Based on this, this embodiment provides a method for switching extended device topology. Figure 1 This is a flowchart of a method for switching an extended device topology according to an embodiment of the present invention, such as... Figure 1As shown, the process includes the following steps:

[0052] Step S101: Obtain the topology switching request triggered by the user. The topology switching request includes the topology type of the peripheral switching network in the server. The peripheral switching network includes switch cards, central processing unit and peripherals.

[0053] In this embodiment of the application, the peripheral switching network is a data transmission and interaction network inside the server, which is composed of switch boards, central processing unit and peripherals. The switch boards realize data exchange and routing between the central processing unit and peripherals, ensuring efficient communication between the various components of the server.

[0054] Topology type refers to the layout and connection method of the peripheral switching network in the server, such as Common, Balance, Cascade, etc. Different topology types correspond to different switch board port connection rules, data transmission paths and resource allocation strategies to adapt to diverse business needs.

[0055] As a key component of peripheral switching networks, switch boards are equipped with uplink and downlink ports to connect the central processing unit and peripherals. Through driver and register configuration, they enable data exchange, routing and forwarding between different devices, and support adjusting port connection relationships according to topology type.

[0056] The core computing unit of the central processing unit server is connected to the uplink port of the switch board through the PCIe root port. It is responsible for processing and scheduling various data and instructions in the system. During topology switching, it adapts to the data transmission requirements under different topologies by opening or closing the corresponding root ports.

[0057] Peripherals refer to various external devices connected to the downstream ports of a switch board, such as GPUs, network cards, and solid-state drives (SSDs). They interact with the central processing unit through the switch board to provide specific functional support for the server (such as graphics processing, network communication, data storage, etc.).

[0058] In this embodiment of the application, obtaining a topology switching request triggered by a user includes the following steps A1-A3:

[0059] Step A1: When the basic input / output system detects a topology type selection operation triggered by the user on the settings page, it triggers the event handling mechanism.

[0060] Specifically, when the Basic Input / Output System (BIOS) detects a user selecting a topology type (such as Common / Balance / Cascade) in the BIOS Setup page via keyboard, mouse, or other input devices during startup, it immediately triggers a pre-registered event hook function. This function interrupts the current BIOS initialization process, calls the event handling module and passes in the identifier of the topology type selection event (such as TOPOLOGY_CHANGE_EVENT), and encapsulates the user's operation context (such as cursor position and key sequence) into an event object, which is then passed to subsequent processing flows.

[0061] Step A2: Obtain the topology type and topology configuration information selected by the user through the event handling mechanism.

[0062] Specifically, after the step event handling mechanism is triggered, the BIOS's internal topology configuration parser is first invoked to extract the topology type string (such as "Balance") from the user-selected UI elements (such as drop-down menus and radio button groups). Then, based on the preset mapping relationship between topology types and configuration parameters, detailed parameters of the corresponding topology (such as the number of uplink ports, downlink port connection rules, bandwidth allocation strategies, etc.) are read from the configuration area of ​​the BIOS Flash. These parameters are stored in a temporary data structure in key-value pairs, forming complete topology configuration information.

[0063] Step A3: Generate a topology switching request based on the topology type and topology configuration information, and send the topology switching request to the baseboard management controller.

[0064] Specifically, based on the extracted topology type and configuration information, the BIOS calls the System Management Interface (SMI) processor to generate a standardized topology switching request. This request is first encapsulated in an IPMI message format (NetFn=0x2C, CMD=0x05), containing a topology type code (e.g., 0x01 represents Common) and TLV (Type-Length-Value) encoding of the configuration parameters. Subsequently, the message is sent to the BMC's IPMI interface via the System Management Bus (SMBus). Simultaneously, the BIOS writes the topology configuration information to a shared memory region (e.g., address 0xFED00000) as a backup and sets a status flag to notify the BMC to read it. Upon receiving the request, the BMC returns an acknowledgment message (e.g., IPMICompletionCode0x00), completing the request sending and receiving process.

[0065] In this embodiment, firstly, the BIOS monitors user operations in real time and triggers an event handling mechanism to ensure that the topology type selection action can be accurately identified, avoiding misjudgments and delays caused by manual intervention. Secondly, the event handling mechanism automatically extracts the topology type and configuration information, transforming the user's topology selection into a standardized data structure that the system can recognize, providing accurate parameter support for subsequent operations. Finally, a topology switching request is generated based on the standardized data and sent to the BMC, establishing a topology information synchronization channel between the BIOS and the BMC. This allows the topology configuration in the BIOS interface to be quickly and reliably transmitted to the BMC, laying the foundation for subsequent BMC driver flashing and port configuration operations. This achieves full automation of the topology switching process from user operation to system execution, significantly improving the efficiency and reliability of topology switching, avoiding errors that may be caused by manual operation, and providing a key information transmission link for remote automatic topology switching of server peripheral switching networks.

[0066] Step S102: Write the driver program for the switch board based on the topology type. Each uplink interface in the switch board forms a path with all or some downlink interfaces. The uplink interface is used to connect to the central processing unit, and the downlink interface is used to connect to peripherals.

[0067] In this embodiment, the uplink interface of the switch board primarily serves to connect to the central processing unit (CPU), acting as a bridge between CPU data output and input, transmitting data from the CPU's PCIe root port to the switch board. The downlink interface connects various peripherals, such as GPUs, network cards, and solid-state drives, providing a channel for data interaction. Each uplink interface can, based on topology switching requirements, establish a hardware path with all downlink interfaces to enable free data transmission between different paths; alternatively, considering cost and functional requirements, it can form a path only with some downlink interfaces to specifically meet particular business scenarios.

[0068] Meanwhile, downlink interfaces can form link paths according to rules such as continuity and interval. In this way, when an uplink interface establishes a connection with any downlink port on the link, it can automatically establish a connection with all downlink ports on the link, which greatly enhances the flexibility and diversity of data transmission.

[0069] As an example, such as Figure 2As shown, the switch board has m uplink interfaces and n downlink interfaces. The uplink interfaces are dedicated to connecting to the CPU's PCIe root interface, serving as the entry point for data to flow from the CPU into the switch board. The downlink interfaces are used to connect to various peripherals such as GPUs, network cards, and solid-state drives. Theoretically, each uplink interface can establish a complete hardware path with the n downlink interfaces, enabling free data transmission and routing. However, in practical applications, for cost considerations, adjustments can be made flexibly based on topology switching requirements, allowing only the uplink interfaces to form paths with some necessary downlink interfaces. For example, in a Balance topology architecture, specific downlink interfaces can be selectively connected to uplink interfaces to balance data traffic load. Simultaneously, the n downlink interfaces support link construction according to various rules, such as forming a group of two adjacent interfaces, cascading every three interfaces, or forming a link every other interface. When an uplink interface establishes a connection with any downlink interface on a link, it automatically establishes connections with all downlink interfaces on that link. In a Cascade topology scenario, this link construction method can efficiently achieve cascading data transmission among multiple peripherals.

[0070] In this embodiment of the application, writing the driver for the switch board based on the topology type includes the following steps B1-B3:

[0071] Step B1: Obtain the mapping relationship between the preset topology type and the driver through the baseboard management controller.

[0072] Specifically, when the Baseboard Management Controller (BMC) starts up, it reads a preset topology type-driver mapping table from the configuration partition stored in local Flash memory. This table is stored in key-value pairs. Upon receiving a topology switch request, the BMC parses the topology type field (such as "Balance") in the request, quickly locates the corresponding driver version number through a hash lookup, and temporarily stores the mapping relationship in a circular buffer in memory for subsequent operations. If the mapping table needs to be updated due to hardware upgrades, the BMC supports remotely loading the new mapping configuration file via the Redfish interface.

[0073] Step B2: Based on the mapping relationship, the baseboard management controller loads the driver corresponding to the topology type.

[0074] Specifically, after determining the target driver version based on the mapping relationship, BMC first checks whether the driver exists in its local cache. If the cache is hit (e.g., the driver has been downloaded to BMC's RAM disk), it is loaded directly from the cache.

[0075] If a driver is not found, the BMC will perform a loading operation based on the driver storage path: In manual loading mode, the BMC receives the driver file uploaded by the user via WebUI or CLI; in automatic loading mode, the BMC reads the driver binary data from a specified partition of the preset storage chip. During the loading process, the BMC performs a CRC32 check on the driver file, and if the check fails, an error retransmission mechanism is triggered.

[0076] Step B3: Based on the communication link between the baseboard management controller and the switch board, the driver is flashed to the non-volatile memory in the switch board.

[0077] Specifically, the BMC establishes a communication link with the switch board via the I2C / SPI bus or PCIe out-of-band management channel, first sending a device identification command to confirm target hardware compatibility. After confirmation, the flashing process begins: the driver is divided into fixed-size data blocks by page and sent block by block to the board's firmware controller via the bus protocol. After receiving the data, the board first writes it to the on-chip cache, and then programs it to the specified address area of ​​non-volatile memory (such as NOR Flash) through the internal timing controller. During the flashing process, the BMC monitors the bus ACK signal in real time; if no acknowledgment is received within a timeout period, the data block is resent.

[0078] After the flashing process is complete, the BMC sends a verification command to read the driver data in the Flash memory and compares it byte by byte with the original data to ensure the integrity of the flashing operation.

[0079] Step S103: Update the open / closed state of the target expansion interface in the central processing unit according to the topology type, so that the updated target expansion interface is connected to the uplink interface of the switch board.

[0080] In this embodiment of the application, the target extended interface in the control central processing unit performs opening and closing operations according to the topology type, including the following steps C1-C3:

[0081] Step C1: Obtain the interface list associated with the topology type through the baseboard management controller. The interface list includes the target extended interfaces in the central processing unit that need to be enabled or disabled.

[0082] Specifically, the Baseboard Management Controller (BMC) first retrieves the basic interface configuration template corresponding to the current topology type (e.g., Cascade / Common / Balance) from a predefined topology-interface mapping database. This template contains standard CPU PCIe rootport enable / disable policies (e.g., only one uplink port is enabled in a Cascade topology). Next, the BMC queries the server's current hardware status via the Redfish protocol or IPMI commands to obtain real-time information on all PCIe root ports in the CPU (including port ID, connected device type, current bandwidth usage, etc.) and cross-validates it against the preset template. Then, the BMC dynamically adjusts the interface list based on system load monitoring data (e.g., CPU temperature, peripheral communication traffic). For example, root ports in high-temperature areas are prioritized for disabling, and root ports corresponding to critical business devices are automatically added to the protection list. Finally, a target extended interface list is generated, containing precise port numbers, open / closed status, and priority markers, ensuring that the interface configuration conforms to both the topology type requirements and the current hardware operating status.

[0083] Step C2: Send control commands to the basic input / output system through the baseboard management controller. The control commands are used to adjust the opening and closing state of the target expansion interface.

[0084] Specifically, the BMC converts the target extended interface list into a standardized set of control instructions. This set is encapsulated using IPMI command format (e.g., NetFn=0x30, CMD=0x01) or System Management Bus (SMBus) message protocol, and includes parameters such as root port number, target status (enabled / disabled), and operation priority. For servers supporting out-of-band management, the BMC sends instructions directly through a separate management channel (e.g., the IPMI interface); for in-band management scenarios, instructions are injected into the shared data area of ​​system memory (e.g., the BIOS communication buffer) via the PCIe link.

[0085] Before sending a command, the BMC encrypts and verifies the data (e.g., by adding an HMAC checksum) to prevent data tampering or loss during transmission. After transmission, the BMC initiates a timeout retransmission mechanism. If it does not receive an acknowledgment (ACK) response from the BIOS within a specified time (e.g., 50ms), it retransmits the command until successful.

[0086] Step C3 involves modifying the command register bits of the target expansion interface according to control instructions through the basic input / output system, so as to enable or disable the target expansion interface. Different command register bits correspond to different states of the target expansion interface.

[0087] Specifically, after receiving the control command, the Basic Input / Output System (BIOS) parses the root port number and target state that need to be adjusted. During the PCIe initialization process at system startup, it programs the command register (CMDRegister) of the target root port by accessing the PCIe Configuration Space. Specifically, the BIOS calculates the combination of register bits to be modified based on the target state: if the port needs to be enabled, the BusMasterEnable bit (bit 2) and the MemorySpaceEnable bit (bit 0) are set to 1; if the port needs to be disabled, these bits are set to 0. During modification, the BIOS first reads the current register value, updates the target bits through bitwise AND or OR operations, and then writes the new value to the register. After the operation is complete, the BIOS monitors the port state changes through the PCIe LinkStateMachine to confirm that the register modification has taken effect (e.g., the link state changes from DOWN to UP or vice versa), and feeds back the final state to the BMC to ensure that the open / closed state of the root port is completely consistent with the topology requirements.

[0088] This application's embodiment first uses the BMC to dynamically generate an interface list based on topology type and hardware status, transforming abstract topology requirements into specific CPU root port operation instructions. This ensures that interface configurations not only meet topology requirements but also adapt to the server's real-time operating status (e.g., avoiding high-temperature ports and protecting critical device links), avoiding the blindness and inefficiency of traditional manual configuration. Second, the BMC sends control commands to the BIOS through a standardized protocol, establishing a reliable communication link between the management end and the system end. This enables remote automated operation of interface status adjustments, allowing port opening and closing to be completed without manual hardware contact, significantly reducing maintenance costs and operational risks. Finally, the BIOS precisely controls port status by modifying command register bits. Utilizing the underlying hardware control mechanism of the PCIe architecture, it ensures the accuracy and real-time nature of interface status switching. Combinations of different register bits can achieve fine-grained adjustments to port functions (e.g., disabling only active transmission or completely cutting off communication), providing precise hardware-level support for topology switching of peripheral switching networks. This process deeply integrates topology logic, hardware status, and underlying control, forming a complete automated link from requirement analysis to hardware execution.

[0089] Step S104: Control the server to perform a restart operation so that the server switches the topology of the peripheral switching network based on the target extended interface and driver after restarting.

[0090] In this embodiment of the application, the control server performs a restart operation so that after restarting, the server switches the topology of the peripheral switching network based on the target extended interface and the driver, including the following steps D1-D3:

[0091] Step D1: Generate a restart command through the baseboard management controller.

[0092] Specifically, after the Baseboard Management Controller (BMC) completes the driver flashing to the switch board, sends the CPU root port status adjustment command to the Basic Input / Output System (BIOS), and confirms the successful operation, it generates a standardized reboot command according to the overall topology switching process logic. This command is encapsulated using the IPMI protocol format or the Redfish API interface and includes reboot type parameters (such as cold reboot or warm reboot, here usually a cold reboot to ensure a complete hardware state refresh), reboot reason identifier (such as "TopologySwitchCompleted"), and operation priority.

[0093] After generating the command, the BMC sends it to the server's power management module via the System Management Bus (SMBus) or network management channel. At the same time, it records the generation time and parameters of the restart command in the local log for subsequent auditing and troubleshooting.

[0094] Step D2: Perform a restart operation on the server based on the restart command. During the restart process, load the switch board driver through the basic input / output system and initialize the physical connection of the peripheral switching network according to the open / closed state of the target expansion interface.

[0095] Specifically, upon receiving the reboot command from the BMC, the server power management module immediately cuts off the system power, triggering a cold reboot process. During the reboot phase, the BIOS first performs a Power-On Self-Test (POST). After confirming that the hardware is functioning correctly, it reads the latest flashed driver from the non-volatile memory of the switch board. Based on the target expansion interface open / close status information sent by the BMC (stored in the BIOS's dedicated configuration register or shared memory area), the BIOS initializes the CPU's PCIe root ports: enabling root ports marked "Enabled" in the list by modifying command register bits to grant them bus master and memory access permissions; and disabling root ports marked "Disabled" by cutting off their data transmission paths.

[0096] At the same time, the BIOS and the switch board driver work together to establish physical connections between the CPU, switch board and peripherals according to the preset topology connection rules (such as port link mapping table) in the driver, and complete the basic architecture of the peripheral switching network.

[0097] Step D3: After the server restarts, the peripheral switching network topology is switched through the collaboration of the basic input / output system and the driver.

[0098] Specifically, after the server operating system is loaded, the BIOS transfers system control to the operating system. At this time, the BIOS and the switch board driver continue to work together. Based on the initialized hardware connection, the driver further configures the internal registers of the switch board (such as port forwarding rules and QoS policies) and optimizes the data transmission path according to the target topology type (such as Common, Balance, Cascade).

[0099] The BIOS monitors the PCIe link status and device enumeration results to verify whether the connections of each component meet the topology requirements. If it detects abnormal port connections or devices that are not properly recognized, the BIOS will trigger an error handling mechanism, send a status alarm message to the BMC, and attempt to reinitialize the relevant ports. When all hardware connections and configurations conform to the target topology design, the peripheral switching network completes the topology switch, enabling efficient data transmission between the CPU and peripherals according to the new topology rules. At the same time, the BMC updates the system status monitoring interface, displaying the current topology type and the connection status of each component for real-time viewing and management by maintenance personnel.

[0100] In this embodiment of the application, after modifying the command register bits of the target extended interface according to the control instructions via the basic input / output system, the method further includes the following steps E1-E2:

[0101] Step E1: Obtain the interface configuration result of the target extended interface through the basic input / output system, and send the interface configuration result to the baseboard management controller.

[0102] Step E2: If the interface configuration result is verified by the baseboard management controller to meet the topology requirements, then the server restart step is executed.

[0103] This application's embodiments completely revolutionize the manual topology switching mode through a fully automated process and flexible hardware configuration. Users only need to trigger a request, and the system can automatically complete driver flashing, interface status updates, and topology switching, eliminating the need for manual disassembly and assembly of equipment and cable adjustments, greatly reducing operational complexity and minimizing manpower and time costs. The switch board supports dynamic port connections, and combined with precise control of registers and drivers, it avoids the risks of errors that can occur with manual wiring. Simultaneously, the new topology is automatically applied after a server restart, preventing switching failures due to manual operation errors, significantly improving development efficiency, reducing additional development costs caused by topology switching failures, and achieving efficient switching of server peripheral topology architecture.

[0104] like Figure 3As shown, in the server topology switching process, the user triggers a switching request through the operating system, which includes the topology type of the peripheral switching network. This network consists of switch cards, CPU, and peripherals. Subsequently, based on the topology type, the operating system, with the help of the server's BIOS and BMC, sends instructions to the registers to flash the switch card driver, enabling the card's uplink interface (connecting to the CPU) to form a path with some or all of its downlink interfaces (connecting to peripherals) as needed. Simultaneously, according to the topology type, the BIOS updates the on / off status of the target expansion interface in the CPU to ensure it is compatible with the card's uplink interface. Finally, the operating system controls the server to restart. After restarting, the CPU, through the configured target expansion interface, works with the flashed switch card to complete the switching of the peripheral switching network topology. The entire process relies on the interaction of various components in the server hardware architecture to achieve flexible topology adjustment.

[0105] Figure 4 This is a flowchart of a method for switching an extended device topology according to an embodiment of the present invention, such as... Figure 4 As shown, the process includes the following steps:

[0106] Step S201: Obtain the interface configuration list corresponding to the topology type through the baseboard management controller.

[0107] In this embodiment, the Baseboard Management Controller (BMC) first extracts the basic interface configuration template corresponding to the target topology type (e.g., Common / Balance / Cascade) from the topology configuration database stored in local Flash memory. This template is stored in XML format and contains preset CPU PCIe root port enable / disable policies (e.g., Cascade topology requires one uplink port and two downlink ports to be enabled). The BMC queries the current system's PCIe device tree via the Redfish API to obtain the physical location of all available root ports (e.g., CPU0_PCIe Port03) and their supported link width / speed. Subsequently, the BMC cross-validates the basic template with the actual hardware configuration, filtering out non-existent or incompatible ports to generate an initial interface configuration list. For example, if the template requires enabling Port05 of CPU1, but this port does not exist in the actual hardware, it is automatically replaced with an available port of the same type. Finally, each entry in the list is accompanied by a priority marker (e.g., core service ports are enabled first) and timing parameters (e.g., port opening delay time) to ensure the orderly execution of subsequent configuration operations.

[0108] Step S202: Obtain the mounted peripherals and their corresponding expansion interfaces, and generate a protection list based on the expansion interfaces of the mounted peripherals.

[0109] In this embodiment, the BMC polls the PCIe bus via IPMI commands to identify all currently mounted peripherals (such as GPUs, network cards, and SSD arrays) and their corresponding expansion interfaces. For critical devices (such as NVMe SSDs hosting database services), the BMC further queries the device's FRU information to obtain the device serial number, manufacturer, and functional description.

[0110] Based on preset protection rules (such as "the root port corresponding to all RAID controllers must not be disabled"), the BMC automatically adds the expansion interfaces corresponding to critical devices to the protection list. Simultaneously, the BMC analyzes the dependencies between devices; for example, if network card A depends on switch port B for network connectivity, then port B is also included in the protection list. The protection list employs a dual-copy storage mechanism: the primary copy is stored in the BMC's volatile memory, and the secondary copy is written to the BIOS's dedicated registers via SMBus, ensuring that protection information is not lost during system restarts.

[0111] Step S203: Obtain the server load status and predict potential operational risks caused by the current configuration based on the load status.

[0112] In this embodiment, the BMC invokes its built-in system health monitoring module to collect key indicators in real time, such as CPU temperature (accurate to ±0.5°C), memory bandwidth utilization (sampling frequency 10ms), and PCIe link error count, using sensors. Simultaneously, it analyzes historical load data from the past 30 minutes to identify periodic peaks and abnormal fluctuations.

[0113] Using a lightweight machine learning model, BMC predicts system resource usage trends for the next 30 minutes, such as predicting that the bandwidth utilization of a certain PCIe path will exceed the 85% threshold. Based on the prediction results, the system automatically generates a report of operational risks, such as "PCIe Gen4x16 link (CPU0_Port02) is expected to become congested in 15 minutes; it is recommended to use an alternative path." Each risk in the report includes a risk level (high / medium / low) and an assessment of the scope of impact (e.g., affecting only a specific application or causing system crash).

[0114] Step S204: Based on operational risks and the protection list, optimize the interface configuration list to obtain the interface list.

[0115] In this embodiment, the BMC first adjusts the initial interface configuration list based on the acquired operational risks (such as congestion risk on a certain link due to excessive load) and the protection list (including immutable extended interfaces corresponding to critical peripherals). For links with congestion risks, the BMC automatically increases their bandwidth allocation or enables redundant links to offload traffic; for critical interfaces in the protection list, their enabled state is forcibly retained to avoid affecting the operation of critical peripherals due to adjustments. At the same time, the BMC continuously evaluates the impact of the adjustment actions on the overall topology, such as whether adding links causes overload on other paths. After multiple rounds of verification and correction, an optimized interface list is finally generated that takes into account risk avoidance, critical interface protection, and adapts to the server hardware architecture (CPU, BIOS, BMC, registers, and Switch board collaboration).

[0116] This application embodiment directly obtains the interface configuration list corresponding to the topology type through the baseboard management controller, replacing manual planning and reducing operational complexity. Secondly, it generates a protection list based on the already mounted peripherals to avoid connection interruptions of critical devices, prevent link errors caused by human error, and improve switching accuracy. Furthermore, it predicts potential operational problems by monitoring server load in real time, adjusts interface configurations in advance, prevents performance bottlenecks, reduces system failures caused by unreasonable topologies, and lowers maintenance costs. Finally, it optimizes the interface list by comprehensively considering potential problems and protection requirements, ensuring that topology switching meets both business performance requirements and equipment stability, significantly improving operational efficiency. At the same time, it provides reliable automated topology adjustment capabilities for the R&D process, accelerates development iteration, and reduces additional development costs caused by topology issues.

[0117] This embodiment also provides a switching device for expanding the device topology, which is used to implement the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0118] This embodiment provides a switching device for expanding device topology, such as Figure 5 As shown, it includes:

[0119] The acquisition module 501 is used to acquire a topology switching request triggered by a user, wherein the topology switching request includes the topology type of the peripheral switching network in the server, and the peripheral switching network includes switch boards, central processing unit and peripherals.

[0120] The flashing module 502 is used to flash the driver program of the switch board based on the topology type, wherein each uplink interface of the switch board forms a path with all or some downlink interfaces, the uplink interface is used to connect to the central processing unit, and the downlink interface is used to connect to peripherals.

[0121] The execution module 503 is used to update the open / closed state of the target expansion interface in the central processing unit according to the topology type, so that the updated target expansion interface is connected to the uplink interface of the switch board.

[0122] The control module 504 is used to control the server to perform a restart operation so that the server switches the topology of the peripheral switching network based on the target extended interface and the driver after restarting.

[0123] In this embodiment of the application, the acquisition module 501 is used to trigger an event handling mechanism when the basic input / output system detects that the user has triggered a topology type selection operation on the settings page; to acquire the topology type and topology configuration information selected by the user through the event handling mechanism; to generate a topology switching request based on the topology type and topology configuration information; and to send the topology switching request to the baseboard management controller.

[0124] In this embodiment, the flashing module 502 is used to obtain the mapping relationship between the preset topology type and the driver through the baseboard management controller; based on the mapping relationship, the baseboard management controller loads the driver corresponding to the topology type; and based on the communication link between the baseboard management controller and the switch board, flashes the driver to the non-volatile memory in the switch board.

[0125] In this embodiment, the execution module 503 is configured to obtain a list of interfaces associated with the topology type through the baseboard management controller, wherein the interface list includes target expansion interfaces in the central processing unit that need to be enabled or disabled; send control instructions to the basic input / output system through the baseboard management controller, wherein the control instructions are used to adjust the open / closed state of the target expansion interfaces; and modify the command register bits of the target expansion interfaces through the basic input / output system according to the control instructions, so as to enable or disable the target expansion interfaces, wherein different command register bits correspond to different states of the target expansion interfaces.

[0126] In this embodiment of the application, the execution module 503 is used to obtain the interface configuration list corresponding to the topology type through the baseboard management controller; obtain the mounted peripherals and the corresponding expansion interfaces of the mounted peripherals, and generate a protection list based on the expansion interfaces of the mounted peripherals; obtain the server load status, and predict the operational risks caused by the current configuration based on the load status; and optimize the interface configuration list based on the operational risks and the protection list to obtain the interface list.

[0127] In this embodiment of the application, the device further includes: a verification module, configured to obtain the interface configuration result of the target extended interface through the basic input / output system, and send the interface configuration result to the baseboard management controller; and to verify whether the interface configuration result meets the topology requirements through the baseboard management controller, and then execute the server restart step.

[0128] In this embodiment, the control module 504 is used to generate a restart command through the baseboard management controller; perform a restart operation on the server based on the restart command; and during the restart process, load the driver program of the switch board through the basic input / output system, initialize the physical connection of the peripheral switching network according to the open / closed state of the target expansion interface; and after the server restart is completed, complete the topology switching of the peripheral switching network by working together with the driver program through the basic input / output system.

[0129] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of the present invention, such as... Figure 6 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system).

[0130] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.

[0131] The memory 20 stores instructions executable by at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0132] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device as shown by a landing page for an app. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, which can be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0133] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0134] The computer device also includes a communication interface 30 for communicating with other devices or communication networks.

[0135] This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0136] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A method for switching extended device topology, characterized in that, The method includes: Obtain a topology switching request triggered by a user, wherein the topology switching request includes the topology type of the peripheral switching network in the server, and the peripheral switching network includes switch cards, central processing unit and peripherals; The driver program for the switch board is flashed based on the topology type, wherein each uplink interface of the switch board forms a path with all or some downlink interfaces, the uplink interface is used to connect to the central processing unit, and the downlink interface is used to connect to peripherals. Update the on / off state of the target expansion interface in the central processing unit according to the topology type, so that the updated target expansion interface is connected to the uplink interface of the switch board. Control the server to perform a restart operation so that the server switches the topology of the peripheral switching network based on the target extended interface and driver after restarting; The step of updating the open / closed state of the target expansion interface in the central processing unit according to the topology type includes: obtaining an interface list associated with the topology type through the baseboard management controller, wherein the interface list includes target expansion interfaces in the central processing unit that need to be enabled or disabled; sending control instructions to the basic input / output system through the baseboard management controller, wherein the control instructions are used to adjust the open / closed state of the target expansion interface; and modifying the command register bits of the target expansion interface according to the control instructions through the basic input / output system to enable or disable the target expansion interface, wherein different command register bits correspond to different states of the target expansion interface. The step of obtaining the interface list associated with the topology type through the baseboard management controller includes: obtaining the interface configuration list corresponding to the topology type through the baseboard management controller; obtaining the mounted peripherals and their corresponding expansion interfaces, and generating a protection list based on the expansion interfaces of the mounted peripherals; obtaining the server's load status, and predicting operational risks caused by the current configuration based on the load status; optimizing the interface configuration list based on the operational risks and the protection list to obtain the interface list, wherein optimizing the interface configuration list based on the operational risks and the protection list to obtain the interface list includes: automatically increasing the bandwidth allocation of links with congestion risks, or enabling redundant links for traffic diversion; for critical interfaces in the protection list, forcibly retaining their enabled state to avoid affecting the operation of critical peripherals due to adjustments; continuously evaluating the impact of adjustments on the overall topology, and generating an optimized interface list that balances risk avoidance, critical interface protection, and adapts to the server hardware architecture after multiple rounds of verification and correction.

2. The method according to claim 1, characterized in that, The process of obtaining the topology switch request triggered by the user includes: When the basic input / output system detects a topology type selection operation triggered by the user on the settings page, it triggers the event handling mechanism. The topology type and topology configuration information selected by the user are obtained through the event handling mechanism. A topology switching request is generated based on the topology type and the topology configuration information, and the topology switching request is sent to the baseboard management controller.

3. The method according to claim 1, characterized in that, The process of flashing the driver program for the switch board based on the topology type includes: The mapping relationship between the preset topology type and the driver is obtained through the baseboard management controller; Based on the mapping relationship, the baseboard management controller loads the driver corresponding to the topology type; Based on the communication link between the baseboard management controller and the switch board, the driver is flashed to the non-volatile memory in the switch board.

4. The method according to claim 1, characterized in that, After modifying the command register bits of the target extended interface according to the control instructions via the basic input / output system, the method further includes: The interface configuration result of the target extended interface is obtained through the basic input / output system, and the interface configuration result is sent to the baseboard management controller; If the interface configuration result is verified by the baseboard management controller to meet the topology requirements, then the server restart step is executed.

5. The method according to claim 1, characterized in that, The step of controlling the server to perform a restart operation, so that the server switches the topology of the peripheral switching network based on the target extended interface and driver after restarting, includes: A restart command is generated via the baseboard management controller; The server is restarted based on the restart command. During the restart process, the driver program of the switch board is loaded through the basic input / output system, and the physical connection of the peripheral switching network is initialized according to the open / closed state of the target expansion interface. After the server restarts, the basic input / output system works in conjunction with the driver to complete the topology switch of the peripheral switching network.

6. A switching device for expanding device topology, characterized in that, The device includes, The acquisition module is used to acquire a topology switching request triggered by a user, wherein the topology switching request includes the topology type of the peripheral switching network in the server, and the peripheral switching network includes switch cards, central processing unit and peripherals; A flashing module is used to flash the driver program of the switch board based on the topology type, wherein each uplink interface of the switch board forms a path with all or some downlink interfaces, the uplink interface is used to connect to the central processing unit, and the downlink interface is used to connect to peripherals; An execution module is used to update the open / closed state of the target expansion interface in the central processing unit according to the topology type, so that the updated target expansion interface is connected to the uplink interface of the switch board. The control module is used to control the server to perform a restart operation, so that the server switches the topology of the peripheral switching network based on the target extended interface and the driver after restarting; The execution module is configured to obtain an interface list associated with the topology type through the baseboard management controller, wherein the interface list includes target expansion interfaces in the central processing unit that need to be enabled or disabled; send control commands to the basic input / output system through the baseboard management controller, wherein the control commands are used to adjust the on / off state of the target expansion interfaces; and modify the command register bits of the target expansion interfaces according to the control commands through the basic input / output system to enable or disable the target expansion interfaces, wherein different command register bits correspond to different states of the target expansion interfaces. The execution module is configured to: obtain the interface configuration list corresponding to the topology type through the baseboard management controller; obtain the mounted peripherals and their corresponding expansion interfaces, and generate a protection list based on the expansion interfaces of the mounted peripherals; obtain the server load status and predict operational risks caused by the current configuration based on the load status; optimize the interface configuration list based on the operational risks and the protection list to obtain the interface list, wherein optimizing the interface configuration list based on the operational risks and the protection list to obtain the interface list includes: automatically increasing the bandwidth allocation of links with congestion risks, or enabling redundant links for traffic diversion; for critical interfaces in the protection list, forcibly retaining their enabled state to avoid affecting the operation of critical peripherals due to adjustments; continuously evaluating the impact of adjustments on the overall topology, and generating an optimized interface list that balances risk avoidance, critical interface protection, and adapts to the server hardware architecture after multiple rounds of verification and correction.

7. A computer device, characterized in that, include: A memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, the processor executing the computer instructions to perform the method of any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing a computer to perform the method of any one of claims 1 to 5.

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