Video memory management method and device, graphic processing unit, storage medium and terminal equipment

Abstract

The invention provides a video memory management method, a graphic processing unit, a storage medium and terminal equipment. The video memory management method comprises the following steps: acquiring a plurality of graphic commands; iteratively executing the following steps until the plurality of graphic commands are all stored in the video memory: acquiring a first video memory block; and storing at least one part of the plurality of graphic commands into the first video memory block. According to the method and the device, unnecessary copying operation during storing and sending of the graphic command can be reduced, and the efficiency of a CPU (Central Processing Unit) is improved.

Description

Technical Field

[0001] The present application relates to the field of graphics processing technology, and in particular to a video memory management method and apparatus, a graphics processing unit, a storage medium, and a terminal device. Background Art

[0002] With the widespread adoption of 3D graphics technology in various fields, including industrial software, film production, online games, and virtual reality, the demand for realistic 3D images is growing. The 3D graphics technology required for highly realistic images is often highly complex, placing higher demands on the processing speed of the graphics processing unit (GPU) hardware. 3D graphics technology is generally implemented by sending graphics commands to the GPU hardware. The more complex the 3D graphics technology, the greater the number of graphics commands used. The task of storing and sending graphics commands is typically handled by the central processing unit (CPU). With the increasing complexity of 3D graphics technology, how to store and send these graphics commands to the GPU hardware has become a thorny issue.

[0003] In the prior art, a large temporary memory block is usually allocated first, usually large enough to hold the graphics commands for a single task. The graphics commands are then placed into the temporary memory, and the required video memory size is calculated. Then, a request is made to allocate video memory, and the graphics commands temporarily stored in the temporary memory are copied to the video memory.

[0004] However, a problem in the prior art is that when copying the graphics commands temporarily stored in the temporary memory to the video memory, the extra copy operation will bring about extra CPU overhead and memory bandwidth overhead. Summary of the Invention

[0005] The technical problem to be solved by this application is how to reduce unnecessary copy operations when saving and sending graphics commands and improve CPU efficiency.

[0006] In order to achieve the above objectives, this application provides the following technical solutions:

[0007] In a first aspect, the present application provides a video memory management method, which includes: obtaining multiple graphics commands; iteratively executing the following steps until all of the multiple graphics commands are stored in the video memory: obtaining a first video memory block; and storing at least a portion of the multiple graphics commands in the first video memory block.

[0008] Optionally, the obtaining of the first video memory block includes: applying for the first video memory block from a central processing unit; and obtaining information of the first video memory block allocated by the central processing unit.

[0009] Optionally, obtaining the first video memory block includes: obtaining the first video memory block from a video memory pool, the video memory pool includes a plurality of first video memory blocks, and storage addresses of the plurality of first video memory blocks are continuous.

[0010] Optionally, before obtaining the first video memory block, the method further includes: applying for the video memory pool from a central processing unit; and obtaining information of the video memory pool allocated from the central processing unit.

[0011] Optionally, the acquiring of multiple graphics commands includes: acquiring the multiple graphics commands and a context command; the video memory management method further includes: acquiring at least two second video memory blocks, and storing the context command in the at least two second video memory blocks.

[0012] Optionally, the context command includes a restore context command and a save context command, and storing the context command in the second video memory block includes: storing the restore context command in a first second video memory block, and storing the save context command in a second second video memory block.

[0013] Optionally, the storage address of the first second video memory block is located before the first first video memory block, and the second second video memory block is located after the last first video memory block. In other words, when the video memory block sequence includes the first video memory block and two second video memory blocks, the storage address of the first second video memory block is located at the beginning of the video memory block sequence, and the second second video memory block is located at the end of the video memory block sequence.

[0014] Optionally, the video memory management method further includes: sending attribute information of the first video memory block and attribute information of the second video memory block, wherein the attribute information includes a storage address and a size.

[0015] In a second aspect, the present application also discloses a graphics processing unit, which includes: a communication module for receiving attribute information of a first video memory block, the attribute information of the first video memory block including the storage address and size of the first video memory block, the first video memory block being obtained by adopting the following steps: iteratively executing the following steps until multiple graphics commands are all stored in the video memory: obtaining the first video memory block; storing at least a portion of the multiple graphics commands in the first video memory block; a processing module for reading the multiple graphics commands from the first video memory block according to the attribute information of the first video memory block.

[0016] Optionally, the communication module is also used to receive attribute information of the second video memory block, and the attribute information of the second video memory block includes the storage address and size of the second video memory block; the processing module reads the restore context command and the save context command from the second video memory block according to the attribute information of the second video memory block.

[0017] In a third aspect, the present application also discloses a video memory management device, which includes: an acquisition module for acquiring multiple graphics commands; a management module for iteratively executing the following steps until all of the multiple graphics commands are stored in the video memory: acquiring a first video memory block; and storing at least a portion of the multiple graphics commands in the first video memory block.

[0018] In a third aspect, the present application provides a terminal device comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the steps of the video memory management method, or comprises the graphics processing unit.

[0019] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, and the computer program executes the steps of the video memory management method when executed by a processor.

[0020] Compared with the existing technology, the technical solution of this application has the following beneficial effects:

[0021] In the technical solution of the present application, multiple graphics commands are obtained; the following steps are iteratively performed until all the multiple graphics commands are stored in the video memory: obtaining a first video memory block; storing at least a portion of the multiple graphics commands in the first video memory block. The technical solution of the present application continuously and dynamically obtains video memory blocks and stores graphics commands in the video memory blocks. This allows direct writing to the video memory without knowing the size of the space occupied by the graphics commands, thus avoiding unnecessary copy operations from the main memory to the video memory, reducing CPU overhead and memory bandwidth overhead; in addition, multiple graphics commands are continuously written to multiple first video memory blocks, eliminating the need to segment the multiple graphics commands, ensuring the continuity and correctness of the graphics commands, and improving the effects of subsequent graphics technologies.

[0022] Furthermore, the technical solution of the present application obtains a first video memory block from a video memory pool, which includes multiple first video memory blocks, and the storage addresses of the multiple first video memory blocks are continuous. In the technical solution of the present application, by pre-allocating a video memory pool with continuous storage addresses, on the one hand, it can reduce unnecessary video memory allocation requests and improve operating efficiency; on the other hand, it can facilitate recycling and reuse of the video memory pool after use, and can also avoid video memory fragmentation and improve video memory utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a flowchart of a video memory management method provided by an embodiment of the present application;

[0024] Figure 2 This is a schematic diagram of a video memory management system architecture provided by an embodiment of the present application;

[0025] Figure 3This is a flowchart of another video memory management method provided by an embodiment of the present application;

[0026] Figure 4 This is a flowchart of another video memory management method provided by an embodiment of the present application;

[0027] Figure 5 is a schematic diagram of a video memory block provided in an embodiment of the present application;

[0028] Figure 6 is a structural diagram of a graphics processing unit provided in an embodiment of the present application;

[0029] Figure 7 This is a structural diagram of a video memory management device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0030] As described in the background art, copying the graphics commands temporarily stored in the temporary memory to the video memory involves an extra copy operation that will incur extra CPU overhead and memory bandwidth overhead.

[0031] The technical solution of the present application continuously and dynamically obtains video memory blocks and stores graphics commands in the video memory blocks. It can directly write to the video memory without knowing the size of the space occupied by the graphics commands, avoiding unnecessary copy operations from the internal memory to the video memory, reducing CPU overhead and memory bandwidth overhead; in addition, multiple graphics commands are continuously written to multiple first video memory blocks, eliminating the need to split the multiple graphics commands, ensuring the continuity and correctness of the graphics commands, and improving the effects of subsequent graphics technologies.

[0032] The graphics commands referred to in this application are commands in graphics technology (such as three-dimensional graphics technology) that instruct graphics processing. For example, graphics commands instruct the calculation of the position and size of geometric figures, or instruct the enlargement and reduction of geometric figures.

[0033] The video memory block referred to in this application refers to a storage space obtained by dividing the video memory according to a preset size. For example, the size of the video memory block can be 1024, 2048, 4096, 8192 bytes, etc.

[0034] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0035] See also Figure 1 The execution subject of the video memory management method is a driver, which can be a user-mode driver. That is, the user-mode driver executes the following steps. Of course, it is understandable that the video memory management method can also be executed by any other appropriate subject.

[0036] Specifically, the video memory management method may include the following steps:

[0037] Step 101: Obtain multiple graphics commands.

[0038] Step 102 and step 103 are iteratively performed until all the graphics commands are stored in the first video memory block.

[0039] Step 102: Obtain a first video memory block;

[0040] Step 103: Storing at least a portion of the plurality of graphics commands into the first video memory block.

[0041] It is understood that, in a specific implementation, each step of the above method can be implemented using a software program that runs on a processor integrated within a chip or chip module. The method can also be implemented using a combination of software and hardware, which is not limited in this application.

[0042] In the specific implementation of step 101, a plurality of graphics commands may be generated by a user-mode driver. Specifically, the user-mode driver may generate corresponding graphics commands according to the requirements of the user terminal.

[0043] In the specific implementation of steps 102 and 103, each time the user-mode driver obtains a first memory block, it stores (writes or fills) the graphics commands into the first memory block. If the storage space of the first memory block is full and unstored graphics commands still exist, steps 102 and 103 are continued until all graphics commands are stored in the first memory block.

[0044] In actual applications, the size of the video memory block (the first video memory block and the second video memory block) can be set based on calculations and experience. Preferably, the size of the video memory block can be 4096 bytes.

[0045] In a specific embodiment, the size of each video memory block may be set to be the same.

[0046] In another specific embodiment, different video memory blocks may be configured to have different sizes. For example, if multiple graphics commands are generated for different applications, and the size of each of the multiple graphics commands may be different, then different video memory blocks may be configured for different applications.

[0047] Furthermore, the user-mode driver sends the attribute information of the first video memory block to the kernel-mode driver, where the attribute information of the first video memory block includes the storage address and size of the first video memory block.

[0048] Specifically, the user-mode driver packages the attribute information of each first video memory block to form a video memory block sequence, and sends the sequence to the kernel-mode driver. The kernel-mode driver schedules the graphics processing unit to execute the graphics commands stored in the first video memory block.

[0049] Figure 2 The system architecture of the video memory management of this application is shown in FIG. Figure 2 As shown, the driver 201 generates graphics commands and passes Figure 1 Each step of the video memory management method is to store the graphics commands in the video memory 202. Specifically, the graphics commands are stored in each video memory block in the video memory 202.

[0050] The driver 201 schedules the graphics processing unit 203 to execute graphics commands stored in the video memory 202 .

[0051] Compared to the prior art method of first storing graphics commands in temporary memory and then copying the temporarily stored graphics commands to video memory, the present application continuously and dynamically obtains video memory blocks and stores the graphics commands there. This allows direct writing to video memory without knowing the size of the space occupied by the graphics commands, avoiding unnecessary copy operations from internal memory to video memory, reducing CPU overhead and memory bandwidth overhead. In addition, multiple graphics commands are continuously written to multiple first video memory blocks, eliminating the need to segment the multiple graphics commands, ensuring the continuity and correctness of the graphics commands, and improving the effectiveness of subsequent graphics technologies.

[0052] The first video memory block may be obtained in at least one of the following two ways.

[0053] Method 1: The driver requests the first video memory block from the CPU.

[0054] In response to the application, the central processing unit allocates a first video memory block to the driver. The driver obtains information about the first video memory block allocated by the central processing unit, such as the location of the first video memory block.

[0055] Specifically, the driver may indicate the size of the first video memory block when requesting the first video memory block from the central processing unit. For example, the driver may request a video memory block of 4096 bytes from the central processing unit.

[0056] Alternatively, the size of the first video memory block may be pre-configured and agreed upon. In this case, the driver does not need to carry the information of the size of the video memory block when requesting the first video memory block from the CPU.

[0057] Method 2: The driver obtains the first video memory block from the video memory pool.

[0058] Please refer to the Figure 3 In step 301, the driver requests a video memory pool from the CPU and obtains information about the video memory pool allocated by the CPU. The video memory pool includes multiple first video memory blocks, each with a consecutive storage address. In this case, the video memory pool information may include the storage addresses of the multiple video memory blocks; the video memory pool information may also include the number and size of the video memory blocks.

[0059] This means that the driver can obtain multiple video memory blocks through a single request, that is, a single interaction with the CPU. The first video memory block used to store graphics commands is obtained from the video memory pool, which can reduce the number of interactions between the driver and the CPU.

[0060] In step 302 , the driver obtains a first video memory block from a video memory pool.

[0061] In step 303, at least a portion of the plurality of graphics commands is stored in the first video memory block. Steps 302 and 303 are iteratively executed until all graphics commands are stored in the video memory.

[0062] In the embodiment of the present application, by allocating a video memory pool with continuous storage addresses in advance, on the one hand, unnecessary video memory allocation requests can be reduced and operating efficiency can be improved; on the other hand, the video memory pool can be easily recycled and reused after use, and video memory fragmentation can be avoided, thereby improving video memory utilization.

[0063] In actual applications, if the memory blocks in the video memory pool are exhausted and unstored graphics commands still exist, the driver can request the CPU to expand the video memory pool. Preferably, the size of the expanded video memory pool is twice the size of the original memory pool. For example, if the original video memory pool includes 64 4096-byte video memory blocks, the expanded video memory pool will include 128 4096-byte video memory blocks.

[0064] In a non-limiting embodiment, when multiple applications are using a graphics processing unit (GPU) simultaneously, the GPU needs to switch contexts between different applications. Context here primarily refers to the register state of the GPU hardware after executing commands. To facilitate convenient context switching for the GPU, the present application may also place context-related commands in a video memory block.

[0065] Please refer to the Figure 4 In step 401, the driver obtains multiple graphics commands and context commands. Specifically, the driver may generate multiple graphics commands, as well as restore context commands and save context commands. The restore context command is used to instruct the execution of a restore context operation, and the save context command is used to instruct the execution of a save context operation.

[0066] In a specific example, the restore context command may include one or more of the following commands:

[0067] The first restore command is used to restore the command processor (CP) register status;

[0068] The second restore command is used to restore the execution unit (Shader Core) register state;

[0069] The third restore command is used to restore the color output unit register state;

[0070] The fourth restore command is used to restore the texture mapping unit (TMU) register state;

[0071] The fifth restore command is used to restore the cache unit register state.

[0072] The command parsing unit (CPU) is a functional module within the GPU that receives and parses graphics commands (such as OpenGL / Vulkan / DirectX commands) from the CPU or driver, converting them into micro-operations executable within the GPU. CPU registers store data related to the CPU, such as its operating status (high-speed or low-speed mode). These registers include command queue registers, which store the address and status of command streams to be parsed, and instruction cache registers, which temporarily cache decoded micro-instructions.

[0073] The execution unit is a functional module within the GPU that executes shader programs (such as vertex shaders, pixel shaders, and compute shaders) and performs mathematical operations and logical processing. The execution unit registers store data related to the execution unit. These include general-purpose registers (GPRs) for storing temporary variables and intermediate calculation results in shader programs; predicate registers for conditional branching (such as if-else logic); and thread state registers for recording the execution status of the current thread (such as the active thread mask).

[0074] The color output unit is a functional module in the GPU that processes the final color output of pixels, including blending, anti-aliasing (MSAA), depth / stencil testing, etc. The color output unit registers are used to store relevant data for the color output unit. Specifically, they include blending control registers for configuring color blending formulas (such as alpha blending); multisampling registers for storing anti-aliasing modes and sampling point locations; and depth / stencil registers for controlling depth testing and stencil buffer operations.

[0075] The texture sampling unit is a functional module in the GPU that reads texture data from video memory and performs filtering (such as bilinear / anisotropic filtering) and coordinate mapping. The texture sampling unit registers store data related to the texture sampling unit. Specifically, they include texture descriptor registers for storing the texture format, size, and addressing mode (wrap / clamp); and sampler registers for configuring filtering methods and level of detail calculation rules.

[0076] The cache unit is a functional module within the GPU that manages the GPU's multi-level cache (such as the L1 / L2 cache) and reduces access latency to video memory. Cache unit registers store cache unit-related data, including cache policy registers for controlling cache replacement algorithms and cache line tag registers for recording cache line validity and address mapping.

[0077] Accordingly, the save context command may include one or more of the following commands:

[0078] The first save command is used to save the command parsing unit register state;

[0079] A second save command is used to save the execution unit register state;

[0080] The third save command is used to save the color output unit register state;

[0081] The fourth save command is used to save the texture sampling unit register state;

[0082] The fifth save command is used to save the cache unit register state.

[0083] It should be noted that the restore context command and the save context command can also be adaptively set according to the actual application scenario, and this application does not impose any restrictions on this.

[0084] Continue to refer to Figure 4 In step 402, the driver applies for a video memory pool from the central processing unit and obtains information about the video memory pool allocated by the central processing unit. The video memory pool includes a plurality of first video memory blocks and a plurality of second video memory blocks, and the storage addresses of the plurality of video memory blocks are continuous.

[0085] In step 403, the driver obtains the first video memory block from the video memory pool.

[0086] In step 404, the driver stores at least a portion of the plurality of graphics commands into the first video memory block. Steps 403 and 404 are iteratively executed until all graphics commands are stored in the video memory.

[0087] In step 405 , the driver obtains a second video memory block from the video memory pool, stores the restore context command in the first second video memory block, and stores the save context command in the second second video memory block.

[0088] Furthermore, the storage address of the first second video memory block is located before the first first video memory block, and the second second video memory block is located after the last first video memory block. In other words, when the video memory block sequence includes the first video memory block and two second video memory blocks, the storage address of the first second video memory block is located at the beginning of the video memory block sequence, and the second second video memory block is located at the end of the video memory block sequence. This means that the restore context command is stored at the front position of the continuous storage address, and the save context command is stored at the back position of the continuous storage address. This is related to the functions of the above two commands, because the graphics processing unit needs to restore the context before executing the graphics command, and needs to save the context after completing the execution of the graphics command.

[0089] It should be noted that, when the number of the first video memory block is one, the first first video memory block and the last first video memory block are the same video memory block.

[0090] The position relationship of each memory block can be referred to Figure 5 . Figure 5 , two second video memory blocks and N first video memory blocks are shown, where N is a positive integer.

[0091] Second memory block 1 stores restore context commands, and second memory block 2 stores save context commands. First memory blocks 1 through N store graphics commands. This configuration ensures that the next time an application obtains GPU resources, it can continue with the previous task, improving operational efficiency.

[0092] Furthermore, the driver sends the attribute information of the first video memory block and the attribute information of the second video memory block. The attribute information includes a storage address and may also include a size. Specifically, the user-mode driver packages the attribute information of the first video memory block and the attribute information of the second video memory block into a video memory block sequence, and sends it to the kernel-mode driver.

[0093] Please refer to Table 1 for details. Figure 5 Taking the memory blocks shown in FIG. 1 as an example, the information sent by the driver is shown in Table 1.

[0094] Table 1

[0095]

[0096] For more specific implementations of this embodiment, please refer to the aforementioned embodiments and will not be repeated here.

[0097] Please refer to Figure 6, the present application also discloses a graphics processing unit 60. The graphics processing unit 60 may include:

[0098] The communication module 601 is configured to receive attribute information of a first video memory block.

[0099] The processing module 602 is configured to read the plurality of graphics commands from the first video memory block according to the attribute information of the first video memory block.

[0100] Furthermore, the communication module 601 is further configured to receive attribute information of the second video memory block, where the attribute information of the second video memory block includes the storage address and size of the second video memory block. Accordingly, the processing module 602 reads the restore context command and the save context command from the second video memory block based on the attribute information of the second video memory block.

[0101] Furthermore, the processing module 602 executes the restore context command, the multiple graphics commands, and the save context command according to the scheduling order of the driver.

[0102] Please refer to Figure 7 The present application also discloses a video memory management device 70, which includes:

[0103] An acquisition module 701 is used to acquire multiple graphics commands;

[0104] The management module 702 is configured to iteratively execute the following steps until all of the plurality of graphics commands are stored in the video memory: obtaining a first video memory block; and storing at least a portion of the plurality of graphics commands in the first video memory block.

[0105] Furthermore, the acquisition module 701 acquires the first video memory block from a video memory pool, where the video memory pool includes a plurality of first video memory blocks, and the storage addresses of the plurality of first video memory blocks are continuous.

[0106] Furthermore, the management module 702 stores the restore context command into the first second video memory block, and stores the save context command into the second second video memory block.

[0107] Furthermore, the management module 702 sends the attribute information of the first video memory block and the attribute information of the second video memory block.

[0108] Regarding the various modules / units contained in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or partly software modules / units and partly hardware modules / units. For example, for various devices and products applied to or integrated into a chip, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, or at least part of the modules / units can be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated into a chip module, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component of the chip module (such as a chip, circuit module, etc.) or in different components, or at least part of the modules / units can be implemented in the form of software programs. It is implemented in the form of a software program, which runs on the processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in the terminal equipment, the various modules / units contained therein can be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or different components in the terminal equipment, or at least some modules / units can be implemented in the form of a software program, which runs on the processor integrated inside the terminal equipment, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits.

[0109] The present application also discloses a storage medium, which is a computer-readable storage medium having a computer program stored thereon. When the computer program is executed, the steps of the method described in the aforementioned embodiment can be executed. The storage medium may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk. The storage medium may also include a non-volatile memory or a non-transitory memory.

[0110] An embodiment of the present application also discloses a terminal device, which includes the aforementioned graphics processing unit; or, the terminal device includes a memory and a processor, the memory stores a computer program that can be run on the processor, and the processor executes the steps of the aforementioned instruction compilation method when running the computer program.

[0111] The term "plurality" used in the embodiments of the present application refers to two or more.

[0112] The first, second, etc. descriptions appearing in the embodiments of this application are only for illustration and distinction of the description objects. There is no order, nor does it indicate any special limitation on the number of devices in the embodiments of this application, and cannot constitute any limitation on the embodiments of this application.

[0113] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired or wireless means.

[0114] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0115] In the several embodiments provided in this application, it should be understood that the disclosed methods, devices, and systems can be implemented in other ways. For example, the device embodiments described above are merely schematic; for example, the division of the units is merely a logical function division, and there may be other division methods in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, indirect coupling or communication connection of devices or units, which may be electrical, mechanical, or other forms.

[0116] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0117] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may be physically included separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0118] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit stored in a storage medium includes a number of instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to perform some steps of the method described in various embodiments of the present application.

[0119] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims.

Claims

1. A video memory management method, characterized in that: include: Get multiple graphics commands; Iteratively perform the following steps until all of the graphics commands are stored in the video memory: Get the first video memory block; At least a portion of the plurality of graphics commands is stored in the first video memory block.

2. The video memory management method according to claim 1, wherein: The obtaining of the first video memory block comprises: Applying for the first video memory block from the central processing unit; Acquire information of the first video memory block allocated from the central processing unit.

3. The video memory management method according to claim 1, wherein: The obtaining of the first video memory block comprises: The first video memory block is obtained from a video memory pool, where the video memory pool includes a plurality of first video memory blocks, and storage addresses of the plurality of first video memory blocks are continuous.

4. The video memory management method according to claim 3, wherein: Before obtaining the first video memory block, the method further includes: Applying for the video memory pool from the central processing unit; Acquire information of the video memory pool allocated from the central processing unit.

5. The video memory management method according to claim 1, wherein: The obtaining of multiple graphics commands comprises: Obtaining the plurality of graphics commands and context commands; The video memory management method further includes: At least two second video memory blocks are acquired, and the context command is stored in the at least two second video memory blocks.

6. The video memory management method according to claim 5, characterized in that: The context command includes a restore context command and a save context command, and storing the context command in the second display memory block includes: The restore context command is stored in the first second video memory block, and the save context command is stored in the second second video memory block.

7. The video memory management method according to claim 6, wherein: The storage address of the first second video memory block is located before the first first video memory block, and the storage address of the second second video memory block is located after the last first video memory block.

8. The video memory management method according to claim 5, wherein: Also includes: The attribute information of the first video memory block and the attribute information of the second video memory block are sent out, wherein the attribute information includes a storage address and a size.

9. A graphics processing unit, characterized in that: include: The communication module is configured to receive attribute information of a first video memory block, wherein the attribute information of the first video memory block includes a storage address and a size of the first video memory block, wherein the first video memory block is obtained by iteratively performing the following steps until all of the plurality of graphics commands are stored in the video memory: obtaining the first video memory block; storing at least a portion of the plurality of graphics commands in the first video memory block; A processing module is configured to read the plurality of graphics commands from the first video memory block according to the attribute information of the first video memory block.

10. The graphics processing unit according to claim 9, wherein: The communication module is further configured to receive attribute information of the second video memory block, where the attribute information of the second video memory block includes a storage address and a size of the second video memory block; The processing module reads a restore context command and a save context command from the second video memory block according to the attribute information of the second video memory block.

11. A video memory management device, characterized in that: include: Acquisition module, used to obtain multiple graphics commands; The management module is configured to iteratively execute the following steps until all of the plurality of graphics commands are stored in the video memory: Get the first video memory block; At least a portion of the plurality of graphics commands is stored in the first video memory block.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the video memory management method according to any one of claims 1 to 8 are executed.

13. A terminal device, characterized in that: It comprises a memory and a processor, wherein a computer program is stored on the memory, and is characterized in that the processor executes the steps of the video memory management method described in any one of claims 1 to 8, or comprises the graphics processing unit described in claim 9 or 10.

Images