Switch control device and motor system

By adjusting the PWM duty cycle of the brushless DC motor, a stable pulse signal is generated to drive the inverter circuit, the long-term stable driving problem of the brushless DC motor is solved, the inrush current and insulation pressure are suppressed, and the stable operation of the motor is achieved.

CN120500804APending Publication Date: 2025-08-15ROHM CO LTD
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Patent Information

Application Number
CN202380084150.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-12-14
Filing Date
2023-10-13
Publication Date
2025-08-15

AI Technical Summary

Technical Problem

The prior art is difficult to stably drive a brushless DC motor for a long time, and there are problems of high inrush current and insulation pressure.

Method used

By adjusting the three-phase PWM duty cycle, a pulse signal is generated to drive the switching element in the inverter circuit, short-term switching of the switching element is suppressed, and inrush current and insulation pressure are prevented.

Benefits of technology

It realizes long-term stable operation of brushless DC motor, suppresses inrush current, reduces switching losses, and protects motor insulation.

✦ Generated by Eureka AI based on patent content.

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Abstract

A switching control device includes: a PWM duty conversion unit that converts a three-phase voltage command signal to a PWM duty; a PWM duty ratio adjustment unit that simultaneously adjusts the PWM duty ratios of the three phases at the same time using the same adjustment value; a pulse generation unit that generates a pulse signal on the basis of the PWM duty adjusted by the PWM duty adjustment unit; and an inverter circuit including a plurality of switching elements driven by the pulse signal generated by the pulse generation unit.
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Description

Technical Field

[0001] The invention disclosed in this specification relates to a switch control device and also to a motor system using the switch control device. Background Art

[0002] Generally, among motor drive devices that drive a brushless DC motor, there is a motor drive device that drives the motor by PWM (Pulse Width Modulation) based on a speed command signal (for example, Patent Document 1).

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2022-104708 Summary of the Invention

[0006] Problems to be solved by the invention

[0007] There is an increasing demand for switching control devices and motor systems that can drive brushless DC motors capable of stable operation for long periods of time.

[0008] Means for solving problems

[0009] In order to achieve the above-mentioned objectives, the present disclosure provides a switching control device, including: a PWM duty cycle conversion unit, configured to convert a three-phase voltage command signal into a PWM duty cycle; a PWM duty cycle adjustment unit, configured to simultaneously adjust the PWM duty cycle of the three phases using the same adjustment value; a pulse generation unit, configured to generate a pulse signal according to the PWM duty cycle adjusted by the PWM duty cycle adjustment unit; and an inverter circuit, configured to include multiple switching elements driven by the pulse signal generated by the pulse generation unit.

[0010] Effects of the Invention

[0011] According to the present disclosure, a switching control device and a motor system can be provided, which can drive a brushless DC motor capable of stable operation for a long time. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a schematic configuration diagram of the motor system.

[0013] Figure 2 is a diagram showing an ideal voltage signal and a PWM waveform when a motor is driven.

[0014] Figure 3 It is a diagram showing the waveform of the PWM duty ratio.

[0015] Figure 4 is a flow chart illustrating a process for adjusting the PWM duty cycle.

[0016] Figure 5 FIG. 4 is an enlarged view of the waveform of the PWM duty cycle, illustrating the process for adjusting the PWM duty cycle.

[0017] Figure 6 : is a diagram showing the waveform of the PWM duty ratio after adjustment.

[0018] Figure 7 This is a diagram showing the waveform of the line voltage of the brushless DC motor.

[0019] Figure 8 It is a diagram showing the waveform of the PWM duty ratio.

[0020] Figure 9 is a flowchart illustrating a process for performing line modulation on a voltage command signal.

[0021] Figure 10 FIG. 4 is an enlarged view of the waveform of the PWM duty cycle, illustrating the process for adjusting the PWM duty cycle.

[0022] Figure 11 : is a diagram showing the waveform of the PWM duty ratio after adjustment.

[0023] Figure 12 This is a diagram showing the waveform of the line voltage of the motor.

[0024] Figure 13 is a schematic configuration diagram of a motor system in a second modification.

[0025] Figure 14 is a diagram illustrating an example of an operation for inserting a dead time.

[0026] Figure 15 is a diagram showing a waveform of a PWM duty cycle on which line-to-line modulation and dead time compensation have been performed.

[0027] Figure 16 FIG. 4 is an enlarged view of the waveform of the PWM duty cycle, illustrating the process for adjusting the PWM duty cycle.

[0028] Figure 17 : is a diagram showing the waveform of the PWM duty ratio after adjustment.

[0029] Figure 18 This is a diagram showing the waveform of the line voltage of the motor.

[0030] Figure 19 is a flowchart showing a procedure for adjusting the PWM duty ratio in the third modification.

[0031] Figure 20 is used Figure 19 The flowchart shown is an enlarged view of the waveform during the process of adjusting the PWM duty cycle. DETAILED DESCRIPTION

[0032] In this specification, a MOS (metal oxide semiconductor) field effect transistor refers to a transistor in which a gate structure includes at least three layers: "a layer made of a conductor or semiconductor with a low resistance value (such as polysilicon)", "an insulating layer", and "a P-channel, N-channel, or intrinsic semiconductor layer". In other words, the gate structure of a MOS field effect transistor is not limited to a three-layer structure of metal, oxide, and semiconductor.

[0033] The following describes embodiments with reference to the accompanying drawings. In this specification, "elements connected to each other" includes not only mechanical connection but also electrical connection, i.e., current flow. Therefore, "they are connected" includes "they are electrically connected."

[0034] <Motor system 100>

[0035] Figure 1 is a schematic configuration diagram of the motor system 100 . Figure 2 is a diagram showing an ideal voltage wavelength and a PWM waveform when a motor is driven. Figure 1 The motor system 100 shown includes a motor 200 and a switching control device 300. The motor 200 is a brushless DC motor. The motor 200 includes a U-phase coil 201, a V-phase coil 202, and a W-phase coil 203. Appropriate voltages are applied to each of the U-phase coil 201, the V-phase coil 202, and the W-phase coil 203 at appropriate timings, thereby rotating the motor 200 at a desired rotational speed.

[0036] A speed command signal for the motor 200 is supplied from an external drive control unit (not shown) to the switch control device 300. The speed command signal includes information indicating the rotational speed of the motor 200 and information for starting and stopping the motor 200. In other words, the switch control device 300 receives the speed command signal to drive the motor 200 at the speed specified by the speed command signal.

[0037] The switch control device 300 includes a voltage command calculation unit 1, a PWM duty cycle conversion unit 2, a PWM duty cycle adjustment unit 3, a pulse generation unit 4, and an inverter circuit 5. In the switch control device 300 according to the present embodiment, the voltage command calculation unit 1, the PWM duty cycle conversion unit 2, the PWM duty cycle adjustment unit 3, and the pulse generation unit 4 are digital processing units that perform digital processing. However, the present disclosure is not limited to this configuration, and the voltage command calculation unit 1, the PWM duty cycle conversion unit 2, the PWM duty cycle adjustment unit 3, and the pulse generation unit 4 can be analog processing units. These processing units can be configured with a single processing circuit, or can be configured by a combination of different processing circuits. They can be provided as programs that can perform processing using a calculation circuit.

[0038] The voltage command calculation unit 1 receives the speed control command from the drive control unit. The voltage command calculation unit 1 calculates the frequency and amplitude of the voltage applied to each of the coils 201 to 203 of each phase in the motor 200 based on the speed control command. The voltage command calculation unit 1 sends the voltage command signal of each phase to the PWM duty ratio conversion unit 2. The voltage command signal includes the voltage command signal equivalent to Figure 2 The digital information of the sinusoidal voltage signal is shown. Assume that the voltage command signal is the voltage command signal VL_U of the U phase, the voltage command signal VL_V of the V phase, and the voltage command signal VL_W of the W phase. The amplitude of the voltage command signal is represented by Vd.

[0039] The PWM duty ratio conversion unit 2 receives the voltage command signal from the voltage command calculation unit 1 and the PWM cycle for conversion into a PWM signal. The PWM cycle corresponds to Figure 2 The PWM carrier signal is shown in Figure 1. In other words, the PWM period is the reference period when generating the PWM signal.

[0040] like Figure 2 As shown in FIG. 1 , the PWM duty ratio conversion unit 2 compares the voltage command signal and the PWM carrier signal to determine the PWM duty ratio. Figure 2 As shown, the PWM duty cycle is generated so that when the voltage command signal is greater than the PWM carrier signal, it is set to on, and when the PWM carrier signal is greater than the voltage command signal, it is set to off. The PWM duty cycle can be determined by another method.

[0041] The PWM duty ratio conversion unit 2 generates a PWM signal based on the voltage command signal and the PWM period, and sends the PWM signal to the PWM duty ratio adjustment unit 3. The PWM signal is generated for the three-phase voltage command signals VL_U, VL_V, and VL_W.

[0042] The PWM duty ratio adjustment unit 3 obtains the PWM duty ratio of the three phases based on the PWM signal sent from the PWM duty ratio conversion unit 2. The PWM duty ratio adjustment unit 3 includes a minimum duty ratio determination unit 31. The minimum duty ratio determination unit 31 determines whether the width of the on period or the off period of the PWM signal is greater than a predetermined width based on the PWM duty ratio.

[0043] The PWM duty ratio adjustment unit 3 adjusts the PWM duty ratio to be converted based on the determination performed by the minimum duty ratio determination unit 31. The details of the adjustment of the PWM duty ratio will be described later. The PWM duty ratio adjustment unit 3 generates a PWM duty ratio and sends the PWM duty ratio to the pulse generation unit 4.

[0044] The pulse generating unit 4 generates three-phase pulse signals based on the PWM duty ratio from the PWM duty ratio adjusting unit 3. The pulse signal generated in the pulse generating unit 4 is a voltage signal for driving the inverter circuit 5 and is an analog signal.

[0045] The inverter circuit 5 is a circuit that applies voltage to the U-phase coil 201, the V-phase coil 202, and the W-phase coil 203 of the motor 200. Figure 1 As shown, the inverter circuit 5 includes an inverter main circuit 51 and a switch drive circuit 52 .

[0046] The inverter main circuit 51 is a three-phase full-bridge circuit comprising a U-phase branch, a V-phase branch, and a W-phase branch. In each branch of each phase, the first end of the upper arm is configured to be supplied with a voltage. The second end of the upper arm is connected in series with the first end of the lower arm. The second end of the lower arm is configured to be connectable to ground potential.

[0047] The U-phase coil 201 is connected to the portion where the upper and lower arms of the U-phase arm are connected. The V-phase coil 202 is connected to the portion where the upper and lower arms of the V-phase arm are connected. Furthermore, the W-phase coil 203 is connected to the portion where the upper and lower arms of the W-phase arm are connected.

[0048] The upper and lower arms include switching elements 511 to 516 such as bipolar transistors, MOS field effect transistors, or IGBTs (insulated gate bipolar transistors) and freewheeling diodes 501 to 506 connected in parallel with the switching elements. In the inverter circuit 5 of this embodiment, IGBTs are used as the switching elements 511 to 516.

[0049] When MOS field effect transistors are used as the switching elements 511 to 516, the body diodes added to the MOS field effect transistors can also be used as freewheeling diodes. In this way, the freewheeling diodes can be omitted.

[0050] The pulse signal generated in the pulse generating unit 4 is input to the switch driving circuit 52. As described above, the pulse signal is a voltage signal, and the switch driving circuit 52 amplifies the input voltage signal to generate a switching signal, for example, and inputs the switching signal to the control node (in this embodiment, the gate of the IGBT) of the switching elements 511 to 516. In this way, the switching elements 511 to 516 are controlled to be turned on.

[0051] The pulse generating section 4 may provide voltage signals indicating voltages of the U-phase, the V-phase, and the W-phase, or may provide six pulse signals for driving the switching elements 511 to 516 .

[0052] <Operation of Inverter Circuit 5>

[0053] The operation of the inverter circuit 5 will be described with reference to the drawings. Figure 2 The voltage waveform of the voltage applied from the inverter circuit 5 to the motor 200 and the PWM signal for driving the switching elements 511 to 516 are shown.

[0054] like Figure 2 As shown in FIG, the waveforms of the U-phase voltage Vu, the V-phase voltage Vv, and the W-phase voltage Vw are sine waves with a phase shift of 120 degrees. By comparing these voltage waveforms with the waveform of the carrier signal formed by the triangular wave, a PWM signal is generated. Figure 2 In the example, when the voltage waveform is greater than the carrier signal, switching elements 511, 512, and 513 in the upper arms of the U-phase leg, the V-phase leg, and the W-phase leg are controlled to be on. Switching elements 514, 515, and 516 in the lower arms of the U-phase leg, the V-phase leg, and the W-phase leg respectively operate complementarily to switching elements 511, 512, and 513 in the upper arms. Here, "complementarily" refers to a state in which the switching elements in the upper arms of the leg and the switching elements in the lower arms of the leg are alternately turned on and off.

[0055] In other words, a sine wave voltage signal is PWM-modulated using a triangular wave carrier signal to generate a PWM signal. Figure 2 In the example, the PWM duty cycle varies greatly over time, i.e., changes in a step-like manner. The frequency of the carrier signal increases, and therefore the variation of the PWM duty cycle over time becomes finer, resulting in a PWM duty cycle that is closer to a sine wave. Therefore, here, the variation of the PWM duty cycle over time is shown as a sine wave with an amplitude of 1, as shown in FIG. Figure 3 shown. Figure 3 It is a diagram showing the waveform of the PWM duty ratio.

[0056] When Figure 3In the waveform of the PWM duty cycle in FIG, the PWM duty cycle is a positive value, the on-period of the switching elements 511 to 513 in the upper arm of the phase leg is long, and the on-period of the switching elements 514 to 516 in the lower arm is short. When the PWM duty cycle is "0", the on-period of the switching elements 511 to 513 in the upper arm of the phase leg is 50%, and the on-period of the switching elements 514 to 516 in the lower arm is 50%. When the PWM duty cycle is "1", the switching elements in the upper arm are controlled to be continuously on (the on-period is 100%), and when the PWM duty cycle is "-1", the switching elements in the upper arm are controlled to be continuously off (the on-period is 0%).

[0057] When current is supplied to the motor, the inverter circuit 5 turns on and off the switching elements 511 to 516 to output a voltage of an AC component (in the form of a sine wave). The frequency of the on / off switching of the switching elements 511 to 516 increases, thereby increasing switching losses. When the on / off switching time of the switching elements 511 to 516 is short, a surge current several times larger than the current flowing through the inverter circuit 5 flows through the phase coils 201 to 203 of the motor 200, resulting in a significant stress on the insulation of the motor 200.

[0058] Therefore, the inverter circuit 5 performs control for turning on and off the switching elements 511 to 516 for a time longer than a predetermined limit time, so that the switching loss as described above is suppressed and a large stress on the insulation of the motor 200 is prevented.

[0059] In the inverter circuit 5, the PWM duty ratio adjustment unit 3 adjusts the PWM duty ratio so as to prevent the on / off switching time of the switching elements 511 to 516 from being shorter than the limit time.

[0060] The PWM duty cycle and on / off switching time will be described. As the PWM duty cycle increases, the off period of the switching element decreases. Similarly, as the PWM duty cycle decreases, the on period of the switching element decreases. In other words, the on / off switching time decreases.

[0061] Therefore, to allow motor 200 to rotate stably for a long period of time, PWM duty cycle adjustment unit 3 sets an allowable range for the PWM duty cycle so as to prevent the on / off switching width from becoming narrower than a predetermined width. Minimum duty cycle determination unit 31 sets the upper limit of the allowable range to an allowable upper limit D_UL. Minimum duty cycle determination unit 31 sets the lower limit of the allowable range to an allowable lower limit D_LL. When the PWM duty cycle is equal to or less than the allowable lower limit D_LL or equal to or greater than the allowable upper limit D_UL, minimum duty cycle determination unit 31 determines that adjustment is necessary.

[0062] Here, a process for adjusting the PWM duty ratio will be described with reference to the accompanying drawings. Figure 4 1 is a flowchart showing a process for adjusting the PWM duty cycle. Voltages having different phases and the same voltage waveform are applied to each of the coils 201 to 203 of the phase in the motor 200. Therefore, the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W have only different phases but the same waveform (see Figure 3 ).

[0063] The PWM duty ratio adjustment unit 3 and the minimum duty ratio determination unit 31 have already acquired the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W. Figure 4 As shown, the minimum duty ratio determination unit 31 determines whether at least one of the U-phase duty ratio Du_U, the V-phase duty ratio Du_V and the W-phase duty ratio Du_W is greater than the allowable upper limit D_UL and less than "1", or whether at least one of the U-phase duty ratio Du_U, the V-phase duty ratio Du_V and the W-phase duty ratio Du_W is less than the allowable lower limit D_LL and greater than "-1" (step S101).

[0064] In step S101, it is determined whether at least one of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W is outside the aforementioned allowable range, and whether at least one of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W is less than "1" or greater than "-1." This can also be said to be a determination of whether all of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W are within the allowable range.

[0065] If the minimum duty ratio determination unit 31 determines that all of the U-phase duty ratio Du_U, V-phase duty ratio Du_V, and W-phase duty ratio Du_W are within the allowable range (No in step S101), the PWM duty ratio adjustment unit 3 outputs the U-phase duty ratio Du_U, V-phase duty ratio Du_V, and W-phase duty ratio Du_W as the current duty ratios to the pulse generation unit 4 (step S105). After outputting the PWM duty ratios of the phases, the process returns to step S101 and the process is repeated. In other words, when the U-phase duty ratio Du_U, V-phase duty ratio Du_V, and W-phase duty ratio Du_W are within the allowable range, the PWM duty ratios are not adjusted.

[0066] When at least one of the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W is outside the allowable range, the PWM duty ratio adjustment section 3 adjusts the PWM duty ratio.

[0067] Therefore, when the minimum duty cycle determination unit 31 determines that at least one of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V and the W-phase duty cycle Du_W is greater than the allowable upper limit D_UL and less than "1" or at least one of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V and the W-phase duty cycle Du_W is less than the allowable lower limit D_LL and greater than "-1" (yes in step S101), the processing is transferred to step S102.

[0068] In step S102, the minimum duty cycle determination unit 31 determines whether the difference between the maximum value D_max and the minimum value D_min of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W is less than the difference between the upper limit D_UL and the lower limit D_LL of the allowable duty cycle. This determination is made, and it is therefore determined whether the duty cycle of each phase after adjustment is outside the allowable range. Further description will be given. In this process, when the duty cycle of all phases after adjustment is within the allowable range, control is performed so that the duty cycle of all phases is adjusted. In this process, when the duty cycle after adjustment is outside the allowable range, only the portion currently outside the allowable range is adjusted.

[0069] When minimum duty ratio determination section 31 determines that the difference between maximum value D_max and minimum value D_min is smaller than the difference between allowable upper limit D_UL and allowable lower limit D_LL (YES in step S102 ), the process shifts to step S103 .

[0070] In step S103, if maximum value D_max is greater than upper limit D_UL, PWM duty ratio adjustment unit 3 sets shift amount D_Sh to the value obtained by subtracting upper limit D_UL from maximum value D_max. If minimum value D_min is less than lower limit D_LL, shift amount D_Sh is set to the value obtained by subtracting lower limit D_LL from minimum value D_min. The process then moves to step S104.

[0071] In step S104, the PWM duty ratio adjustment unit 3 sets the values obtained by subtracting the shift amount D_Sh from each of the current U-phase duty ratio Du_U, V-phase duty ratio Du_V, and W-phase duty ratio Du_W as new duty ratios. The process then moves to step S105.

[0072] When the difference between the maximum value D_max and the minimum value D_min is smaller than the difference between the upper limit D_UL and the lower limit D_LL, as shown in step S104, the adjusted U-phase duty cycle Du_U, V-phase duty cycle Du_V and W-phase duty cycle Du_W are within the allowable range.

[0073] In step S105 , the PWM duty ratio adjustment unit 3 outputs the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W to the pulse generation unit 4 .

[0074] When minimum duty ratio determination section 31 determines that the difference between maximum value D_max and minimum value D_min is equal to or greater than the difference between allowable upper limit D_UL and allowable lower limit D_LL (No in step S102 ), the process shifts to step S106 .

[0075] When the difference between the maximum value D_max and the minimum value D_min is equal to or greater than the difference between the allowable upper limit D_UL and the allowable lower limit D_LL, if adjustment is performed as shown in step S104, at least one of the U-phase duty cycle Du_U, the V-phase duty cycle Du_V and the W-phase duty cycle Du_W is outside the allowable range.

[0076] Therefore, in step S106, among the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W, the duty cycle that is greater than the allowable upper limit D_UL and less than "1" is adjusted to the allowable upper limit D_UL. In addition, among the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W, the duty cycle that is less than the allowable lower limit D_LL and greater than "-1" is adjusted to the allowable lower limit D_LL. In step S105, the duty cycle within the allowable range is not adjusted. Thereafter, the processing transfers to step S105. The processing in step S105 is as described above.

[0077] In the inverter circuit 5, the duty ratio is adjusted as described above, so that the on / off switching of the switching elements 511 to 516 can be suppressed from being shorter than the limit time. In this way, the rotation of the motor 200 can be stably controlled for a long time.

[0078] The adjustment of the PWM duty ratio will be described in detail below with reference to the accompanying drawings. Figure 5 FIG. 4 is an enlarged view of the waveform of the PWM duty cycle, illustrating the process for adjusting the PWM duty cycle. Figure 6 : is a diagram showing the waveform of the PWM duty ratio after adjustment. Figure 7 1 is a diagram showing the waveform of the line voltage of brushless DC motor 200 .

[0079] In the inverter circuit 5, the PWM duty ratio conversion unit 2 outputs the following Figure 3 Here, the portion where the U-phase duty ratio Du_U is greater than the upper limit will be described ( Figure 5 Between time t1 and time t2) and the portion where the W-phase duty ratio Du_W is less than the allowable lower limit ( Figure 5Since the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W are repeated periodically, they are adjusted by the same operation.

[0080] The PWM duty ratio adjustment section 3 determines that the maximum value D_max is the U-phase duty ratio Du_U and the minimum value D_min is the V-phase duty ratio Du_V between time t1 and time t2 (see Figure 3 ).

[0081] like Figure 5 As shown, the minimum duty ratio determination unit 31 determines that the U-phase duty ratio Du_U is greater than the allowable upper limit D_UL and less than "1" between time t1 and time t2 (Yes in step S101). Then, the minimum duty ratio determination unit 31 determines that the difference between the maximum value D_max and the minimum value D_min is less than the difference between the allowable upper limit D_UL and the allowable lower limit D_LL between time t1 and time t2 (Yes in step S102).

[0082] like Figure 5 As shown, between time t1 and time t2, the difference between maximum value D_max and minimum value D_min is less than the difference between allowable upper limit D_UL and allowable lower limit D_LL. Therefore, the shift amount D_Sh is set to the value obtained by subtracting allowable upper limit D_UL from maximum value D_max (Du_U) (step S103). Then, PWM duty ratio adjustment unit 3 outputs the adjusted U-phase duty ratio Du_U, V-phase duty ratio Du_V, and W-phase duty ratio Du_W (step S105).

[0083] As described above, the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W are adjusted, so the PWM duty cycle between time t1 and time t2 has Figure 5 and Figure 6 In other words, the U-phase duty ratio Du_U is fixed to the allowable upper limit D_UL, and the V-phase duty ratio Du_V and the W-phase duty ratio Du_W have waveforms that have been shifted downward by the shift amount D_Sh.

[0084] Between time t2 and time t3, the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W are within the allowable range (No in step S101). Therefore, the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W are used without being processed, and Figure 5 and Figure 6 The PWM duty cycle waveform shown is Figure 3 The waveforms of the PWM duty cycles shown are the same.

[0085] Then, between time t3 and time t4, the W-phase duty ratio Du_W is greater than "-1" and greater than the allowable lower limit D_LL. Then, the difference between the maximum value D_max and the minimum value D_min is smaller than the difference between the allowable upper limit D_UL and the allowable lower limit D_LL. Therefore, the shift amount D_Sh is set to a value obtained by subtracting the allowable lower limit D_LL from the minimum value D_min (Du_W) ( Figure 4 Then, a value obtained by subtracting the shift amount D_Sh from each of the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W is set as the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W after adjustment (step S104).

[0086] Between time t3 and time t4, the shift amount D_Sh is a negative value. Therefore, between time t3 and time t4, the W-phase duty ratio Du_W is fixed to the allowable lower limit D_LL, and the U-phase duty ratio Du_U and the V-phase duty ratio Du_V have waveforms that have been shifted upward by the shift amount D_Sh (see Figure 5 and Figure 6 ).

[0087] When Figure 5 and Figure 6 When the PWM duty cycle is adjusted as shown, the difference between the PWM duty cycles (such as the difference between the U-phase duty cycle Du_U and the V-phase duty cycle Du_V) does not change before and after the adjustment. The waveform of the PWM signal corresponds to the voltage waveform of the voltage applied from the switching control device 300 to the motor 200. Therefore, the voltage waveforms of the U-phase, V-phase, and W-phase voltages are the same as the waveforms of the PWM signal.

[0088] The line voltage between the U-phase voltage and the V-phase voltage (hereinafter referred to as the U_V line voltage Vu_v), the line voltage between the V-phase voltage and the W-phase voltage (hereinafter referred to as the V_W line voltage Vv_w), and the line voltage between the W-phase voltage and the U-phase voltage (hereinafter referred to as the W_U line voltage Vw_u) are output from the inverter circuit 5 driven by the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W, and are the same as the line voltages before the PWM duty cycle is adjusted (see Figure 7 In this way, the PWM duty cycle is adjusted, and thus short-term on / off switching is suppressed without changing the line voltage, resulting in suppressing inrush current. Therefore, the motor 200 can be stably driven to rotate for a long time.

[0089] When the PWM duty ratio adjustment unit 3 performs adjustment in step S106 , the inrush current can be suppressed despite the change in the line voltage. Therefore, although the rotation accuracy of the motor 200 may be reduced, the motor 200 can be stably driven for a long period of time.

[0090] <First Modification>

[0091] A first modification of the motor system will be described with reference to the accompanying drawings. In this modification, the motor system 100 has Figure 1 Therefore, the description of the configuration of the motor system 100 is omitted. Figure 8 It is a diagram showing the waveform of the PWM duty ratio.

[0092] In the above description, the PWM duty cycle may be outside the allowable range. Figure 8 As shown in Figure 1, when the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W are small, inrush current is likely to occur. Even when the PWM duty cycle of each phase changes, the line voltage does not change as long as the difference between the duty cycles of each phase is the same.

[0093] Therefore, in motor system 100, voltage command calculation unit 1 performs line-to-line modulation to increase or decrease voltage command signals VL_U, VL_V, and VL_W, generating line-to-line modulated voltage command signals. PWM duty ratio conversion unit 2 then generates a PWM duty ratio based on the line-to-line modulated voltage command signals, thereby suppressing the occurrence of inrush current in motor system 100.

[0094] The modulated voltage command signals of the respective phases are referred to as a modulated U-phase voltage command signal Mv_U, a modulated V-phase voltage command signal Mv_V, and a modulated W-phase voltage command signal Mv_W.

[0095] First, inter-line modulation will be described. Figure 9 2 is a flowchart illustrating a process for performing line-to-line modulation on a voltage command signal. The voltage command calculation unit 1 first obtains the maximum value V_max and the minimum value V_min from the voltage command signals VL_U, VL_V, and VL_W of each phase at a specific time (step S201). A determination is made as to whether the absolute value Va_max of the maximum value is greater than the absolute value Va_min of the minimum value (step S202). When the absolute value Va_max of the maximum value is greater than the absolute value Va_min of the minimum value (yes in step 202), the voltage command calculation unit 1 sets the maximum value of the voltage that can be supplied to the shift amount V_Sh, which in this case is obtained by subtracting the maximum value V_max from the amplitude "Vd" of the voltage command signal (step S203).

[0096] Thereafter, the voltage command calculation unit 1 adds the shift amount V_Sh to each of the U-phase voltage command signal VL_U, the V-phase voltage command signal VL_V and the W-phase voltage command signal VL_W to generate a modulated U-phase voltage command signal Mv_U, a modulated V-phase voltage command signal Mv_V and a modulated W-phase voltage command signal Mv_W (step S204).

[0097] Then, the voltage command calculation section 1 outputs the modulated U-phase voltage command signal Mv_U, the modulated V-phase voltage command signal Mv_V, and the modulated W-phase voltage command signal Mv_W to the PWM duty ratio conversion section 2 (step S205 ).

[0098] If the absolute value Va_min of the minimum voltage is greater than the absolute value Va_max of the maximum voltage (No in step S202), the voltage command calculation unit 1 sets the minimum value of the voltage that can be supplied to the shift amount V_Sh. In this case, the shift amount V_Sh is the value obtained by subtracting the minimum value V_min from "-Vd" (step S206). Thereafter, the process transfers to step S204. The process in step S204 is the same as the process described previously.

[0099] The PWM duty ratio conversion unit 2 determines the PWM duty ratio based on the voltage command signal subjected to line modulation through the above-described process. The modulated PWM duty ratios of the phases are referred to as the modulated U-phase duty ratio Md_U, the modulated V-phase duty ratio Md_V, and the modulated W-phase duty ratio Md_W.

[0100] Figure 8 shows the waveform of the PWM duty ratio obtained by conversion from the voltage command signal subjected to line modulation. Among the PWM duty ratios obtained by conversion from the voltage command signal subjected to line modulation, the PWM duty ratio at a fraction of the maximum value (Vd) or minimum value (-Vd) of the voltage provided by the voltage command signal is "1" or "-1."

[0101] The PWM duty ratio adjustment section 3 adjusts the modulated U-phase duty ratio Md_U, the modulated V-phase duty ratio Md_V, and the modulated W-phase duty ratio Md_W. The adjustment of the modulated U-phase duty ratio Md_U, the modulated V-phase duty ratio Md_V, and the modulated W-phase duty ratio Md_W will be described below with reference to the drawings.

[0102] Figure 10 FIG. 4 is an enlarged view of the waveform of the PWM duty cycle, illustrating the process for adjusting the PWM duty cycle. Figure 11 : is a diagram showing the waveform of the PWM duty ratio after adjustment. Figure 12 Graphs showing waveforms of line voltages in motor 200 .

[0103] according to Figure 4 The flow chart shown in the figure performs the adjustment of the duty cycle. Figure 10 The PWM duty cycle waveform shown is based on Figure 4 The flowchart shown is given in FIG. Figure 10 The waveform of the PWM duty cycle shown in FIG. 1 changes from time s1 to time s7. Figure 4 , the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W are replaced by the modulated U-phase duty cycle Md_U, the modulated V-phase duty cycle Md_V, and the modulated W-phase duty cycle Md_W, respectively.

[0104] like Figure 10 As shown, between time s1 and time s2 and between time s3 and time s4, the minimum duty ratio determination unit 31 determines that the modulated U-phase duty ratio Md_U is the maximum value D_max, and here, the maximum value D_max is "1". The minimum duty ratio determination unit 31 determines that the minimum value D_min is the modulated V-phase duty ratio Md_V (between time s1 and time s2), and the minimum value D_min is the modulated W-phase duty ratio Md_W (between time s3 and time s4). Then, the minimum duty ratio determination unit 31 determines that the modulated W-phase duty ratio Md_W (between time s1 and time s2) or the modulated V-phase duty ratio Md_V (between time s3 and time s4) is greater than the allowable upper limit D_UL and less than "1" (Yes in step S101).

[0105] Minimum duty ratio determination unit 31 determines that the difference between maximum value D_max and minimum value D_min is smaller than the difference between allowable upper limit D_UL and allowable lower limit D_LL (YES in step S102 ), and the process proceeds to step S103 .

[0106] Since the maximum value D_max is greater than the upper limit D_UL, the PWM duty ratio adjustment unit 3 sets the value obtained by subtracting the upper limit D_UL from the maximum value D_max as the shift amount D_Sh (step S103). The PWM duty ratio adjustment unit 3 then sets the value obtained by subtracting the shift amount D_Sh from each of the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the current duty ratios, as the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the new duty ratios (step S104). The PWM duty ratio adjustment unit 3 then outputs the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the new duty ratios, to the pulse generation unit 4 (step S105).

[0107] As previously described, when the PWM duty cycle is "1", the on-period of the switching element in the upper arm is 100% (the on-period of the switching element in the lower arm is 0%). In other words, the switching element is not switched on and off, and therefore the switching element is not affected by the switching action for a short time. Therefore, when the PWM duty cycle is "1", the PWM duty cycle can be used without adjustment. Between time s2 and time s3, the modulated V-phase duty cycle Md_V and the modulated W-phase duty cycle Md_W are less than the allowable upper limit D_UL. Therefore, the PWM duty cycle adjustment unit 3 determines that no adjustment is required, and outputs the modulated U-phase duty cycle Md_U, the modulated V-phase duty cycle Md_V, and the modulated W-phase duty cycle Md_W as the current duty cycle to the pulse generation unit 4 (step S105).

[0108] like Figure 10 As shown, between time s4 and time s5 and between time s6 and time s7, the minimum duty ratio determination unit 31 determines that the modulated W-phase duty ratio Md_W is the minimum value D_min, and here, the minimum value D_min is "1". The minimum duty ratio determination unit 31 determines that the modulated U-phase duty ratio Md_U (between time s4 and time s5) and the modulated V-phase duty ratio Md_V (between time s6 and time s7) are the same. Then, the minimum duty ratio determination unit 31 determines that the modulated V-phase duty ratio Md_V (between time s4 and time s5) or the modulated U-phase duty ratio Md_U (between time s6 and time s7) is less than the allowable lower limit D_LL and greater than "-1" (yes in step S101).

[0109] Minimum duty ratio determination unit 31 determines that the difference between maximum value D_max and minimum value D_min is smaller than the difference between allowable upper limit D_UL and allowable lower limit D_LL (YES in step S102 ), and the process proceeds to step S103 .

[0110] Since minimum value D_min is less than allowable lower limit D_LL, PWM duty ratio adjustment unit 3 sets the value obtained by subtracting allowable upper limit D_UL from minimum value D_min as shift amount D_Sh (step S103). PWM duty ratio adjustment unit 3 then sets the value obtained by subtracting shift amount D_Sh from each of the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the current duty ratios, as the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the new duty ratios (step S104). PWM duty ratio adjustment unit 3 then outputs the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the new duty ratios, to pulse generation unit 4 (step S105).

[0111] As previously described, when the PWM duty cycle is "-1", the on-period of the switching element in the upper arm is 0% (the on-period of the switching element in the lower arm is 100%). In other words, the switching element is not switched on and off, and therefore the switching element is not affected by the switching action for a short time. Therefore, when the PWM duty cycle is "-1", the PWM duty cycle can be used without adjustment. Between time s5 and time s6, the modulated V-phase duty cycle Md_V and the modulated W-phase duty cycle Md_W are less than the allowable upper limit D_UL. Therefore, the PWM duty cycle adjustment unit 3 determines that no adjustment is required, and outputs the modulated U-phase duty cycle Md_U, the modulated V-phase duty cycle Md_V and the modulated W-phase duty cycle Md_W as the current duty cycle to the pulse generation unit 4 (step S105).

[0112] As described above, the PWM duty ratio adjustment section 3 adjusts the duty ratios so that the modulated U-phase duty ratio Md_U, the modulated V-phase duty ratio Md_V, and the modulated W-phase duty ratio Md_W have the following values: Figure 11 The waveform shown.

[0113] As described above, the PWM duty ratio of each phase is adjusted, and thus short-time on / off switching is suppressed without changing the line voltage (see Figure 12 ), and as a result, the inrush current can be suppressed. Therefore, the motor 200 can be stably driven to rotate for a long time.

[0114] <Second Modification>

[0115] A second modification of the motor system will be described with reference to the drawings. Figure 13 100A is a schematic configuration diagram of a motor system 100A in a second modification. Figure 14 is a diagram illustrating an example of an operation for inserting a dead time. Figure 15is a diagram showing a waveform of a PWM duty cycle on which line-to-line modulation and dead time compensation have been performed.

[0116] Figure 13 The motor system 100A shown is Figure 1 The illustrated motor system 100 is different in that the PWM duty ratio adjustment unit 3A of the switching control device 300A includes a dead time compensation unit 32. Components other than the PWM duty ratio adjustment unit 3A of the motor system 100A have the same configuration as those of the motor system 100. Therefore, in the motor system 100A, components substantially identical to those of the motor system 100 are identified by the same symbols, and detailed descriptions of the identical components are omitted.

[0117] like Figure 2 As shown, the PWM duty ratio conversion unit 2 generates a PWM duty ratio so that the switching elements 511 (512 and 513) in the upper arm and the switching elements 514 (515 and 516) in the lower arm are turned on and off in a complementary manner. However, in the actual switching elements 511 and 514, a delay occurs after receiving the PWM signal until the actual switching elements 511 and 514 are turned on or off. When this delay occurs, if the actual switching elements 511 and 514 are turned on and off in a complementary manner, the switching elements 511 (512 and 513) and the switching elements 514 (515 and 516) are turned on at the same time, resulting in a short circuit.

[0118] Therefore, the PWM duty ratio conversion section 2 adjusts the PWM signal so that a period in which the switching elements in the upper and lower arms of the arms of each phase are simultaneously turned off occurs at a portion where the operation of the switching elements is switched. Figure 14 1 shows the PWM signals of the switching element 511 in the upper arm and the switching element 514 in the lower arm for the U phase in a certain period of time. For ease of description, Figure 14 FIG shows a stable driving state, in which the switching element 511 switches between a PWM duty cycle of “1” and a PWM duty cycle of “0”. Figure 2 As shown, the PWM duty cycle fluctuates over time.

[0119] exist Figure 14 In the PWM signal shown, when the switching element 514 is controlled to be on, the timing at which the switching element 514 is turned on is shifted to the timing at which the switching element 511 is completely turned off. When the switching element 511 is controlled to be on, the timing at which the switching element 511 is turned on is shifted to the timing at which the switching element 514 is completely turned off.

[0120] In this way, dead time is inserted into the PWM signal, which allows the switching elements in the upper and lower arms to be turned off simultaneously. This dead time prevents the switching elements in the upper and lower arms from being turned on simultaneously in each phase leg, thereby preventing short-circuit current from flowing. Similarly, dead time is inserted in the V-phase leg and the W-phase leg.

[0121] Despite Figure 14 In the waveform shown, the timing at which each switching element rises to the on state is shifted backward, but the present disclosure is not limited to this configuration. The timing at which each switching element falls to the off state can be shifted forward to insert dead time. Alternatively, the timing at which each switching element falls to the off state is shifted forward, and the timing at which each switching element rises to the on state is shifted backward, resulting in the insertion of dead time.

[0122] Dead time is inserted, and thus an error occurs between the voltage actually output to the motor 200 and the voltage command signal. In the PWM duty ratio adjustment section 3A of the motor system 100A, the dead time compensation section 32 adjusts the PWM duty ratio to correct the error between the voltage output to the motor 200 and the voltage command signal.

[0123] In motor system 100A, voltage command calculation unit 1 performs line-to-line modulation on a voltage command signal, and PWM duty ratio conversion unit 2 generates a PWM duty ratio based on the voltage command signal that has undergone line-to-line modulation. Dead time compensation unit 32 of PWM duty ratio adjustment unit 3A then performs dead time compensation on the PWM duty ratio supplied from PWM duty ratio conversion unit 2.

[0124] Figure 15 The waveform of the PWM duty cycle in which inter-line modulation and dead time compensation have been performed is shown. In the PWM duty cycle in which dead time compensation has been performed, a discontinuous portion of "1" or "-1" may be generated in the portion where the PWM duty cycle is modulated to "1" or "-1" by inter-line modulation (see Figure 15 ).

[0125] like Figure 15 As shown, as a result of performing line-to-line modulation and dead time compensation, a portion where the maximum PWM duty cycle exceeds "1" and a portion where the minimum PWM duty cycle is less than "-1" may be generated. In motor system 100A, when the PWM duty cycle exceeds "1," the same operation as when the PWM duty cycle is "1" is effectively performed, that is, the switching element is controlled to be continuously turned on. When the PWM duty cycle drops below "-1," the same operation as when the PWM duty cycle is "-1" is effectively performed, that is, the switching element is controlled to be continuously turned off.

[0126] The PWM duty ratio adjustment unit 3A of the motor system 100A in this modification also includes Figure 4 The process shown has the following Figure 15 The waveform shown and the PWM duty ratio of which line modulation and dead time compensation have been performed are adjusted. The following will describe the adjustment process of the PWM duty ratio of which line modulation and dead time compensation have been performed with reference to the accompanying drawings. Figure 16 FIG. 4 is an enlarged view of the waveform of the PWM duty cycle, which illustrates the process for adjusting the PWM duty cycle. Figure 17 : is a diagram showing the waveform of the PWM duty ratio after adjustment.

[0127] like Figure 16 As shown, the description will be given with reference to the PWM duty cycle between time m1 and time m5. Between time m1 and time m2, minimum duty cycle determination unit 31 determines that modulated U-phase duty cycle Md_U is at maximum value D_max. Minimum duty cycle determination unit 31 determines that minimum value D_min is modulated V-phase duty cycle Md_V. Minimum duty cycle determination unit 31 then determines that modulated U-phase duty cycle Md_U (maximum value D_max) is greater than allowable upper limit D_UL and less than "1" (Yes in step S101).

[0128] Minimum duty ratio determination unit 31 determines that the difference between maximum value D_max and minimum value D_min is smaller than the difference between allowable upper limit D_UL and allowable lower limit D_LL (YES in step S102 ), and the process proceeds to step S103 .

[0129] Since the maximum value D_max is greater than the upper limit D_UL, the PWM duty ratio adjustment unit 3A sets the value obtained by subtracting the upper limit D_UL from the maximum value D_max as the shift amount D_Sh (step S103). The PWM duty ratio adjustment unit 3A then sets the value obtained by subtracting the shift amount D_Sh from each of the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the current duty ratios, as the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the new duty ratios (step S104). The PWM duty ratio adjustment unit 3A then outputs the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W, which are the new duty ratios, to the pulse generator 4 (step S105).

[0130] Between time m2 and time m3, minimum duty ratio determination unit 31 determines that maximum value D_max is greater than "1" (No in step S101). PWM duty ratio adjustment unit 3A outputs the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W as the current duty ratios to pulse generation unit 4 (step S105). When the duty ratios of each phase are output, they can be output after modulated U-phase duty ratio Md_U, which is the maximum value D_max, is adjusted to "1."

[0131] like Figure 16 As shown, between time m3 and time m4, minimum duty ratio determination unit 31 determines that modulated W-phase duty ratio Md_W is at minimum value D_min. Minimum duty ratio determination unit 31 determines that modulated U-phase duty ratio Md_U is at maximum value D_max. Minimum duty ratio determination unit 31 then determines that minimum value D_min (=modulated W-phase duty ratio Md_W) is less than allowable lower limit D_LL and greater than -1 (Yes in step S101).

[0132] Minimum duty ratio determination unit 31 determines that the difference between maximum value D_max and minimum value D_min is smaller than the difference between allowable upper limit D_UL and allowable lower limit D_LL (YES in step S102 ), and the process proceeds to step S103 .

[0133] Since the minimum value D_min is less than the allowable lower limit D_LL, the PWM duty ratio adjustment unit 3A sets the value obtained by subtracting the allowable lower limit D_LL from the minimum value D_min as the shift amount D_Sh (step S103). Then, the PWM duty ratio adjustment unit 3A sets the value obtained by subtracting the shift amount D_Sh from each of the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W as the current duty ratio as the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W as the new duty ratios (step S104). Then, the PWM duty ratio adjustment section 3 outputs the modulated U-phase duty ratio Md_U, the modulated V-phase duty ratio Md_V, and the modulated W-phase duty ratio Md_W as new duty ratios to the pulse generation section 4 (step S105 ).

[0134] Between time m4 and time m5, the minimum duty ratio determination unit 31 determines that the minimum value D_min is less than "-1" (No in step S101). Then, the PWM duty ratio adjustment unit 3A outputs the modulated U-phase duty ratio Md_U, the modulated V-phase duty ratio Md_V, and the modulated W-phase duty ratio Md_W as the current duty ratio to the pulse generation unit 4 (step S105). When the duty ratios of the respective phases are output, they can be output after the modulated W-phase duty ratio Md_W, which is the minimum value D_min, is adjusted to "-1".

[0135] The modulated U-phase duty Md_U, the modulated V-phase duty Md_V, and the modulated W-phase duty Md_W have the same waveform, and their phases are shifted, so the PWM duty adjustment section 3A can adjust the duty through the same process.

[0136] The PWM duty cycle of each phase is adjusted as described above, and thus the following is generated: Figure 17 The PWM duty cycle of the waveform shown is shown. When the PWM signal from the pulse generating unit 4 is used Figure 17 When the PWM duty cycle shown in FIG. 1 drives the inverter main circuit 51, the line voltage of the motor 200 has the following characteristics: Figure 18 The waveform shown. Figure 18 2 is a diagram showing the waveform of the line voltage of the motor 200. Figure 18 While some waveform errors may occur due to dead time compensation, the line voltage maintains a waveform substantially identical to that before adjustment. Short circuits in the upper and lower arm switching elements and short-duration on / off switching are suppressed, thus reducing inrush current. This reduces performance degradation of motor 200, enabling stable, long-term rotation of motor 200.

[0137] <Third Modification>

[0138] A third modification of the motor system will be described with reference to the drawings. Figure 19 is a flowchart showing a procedure for adjusting the PWM duty ratio in the third modification example. Figure 20 is used Figure 19 The flowchart shown is an enlarged view of the waveform during the process of adjusting the PWM duty cycle. Figure 19 The flowchart shown shows the Figure 4 In the flowchart shown, the process branches to the state when the determination is yes in step S101.

[0139] Assumptions Figure 19 The flowchart shown is the same as Figure 4 Steps S102 to S104 or steps S102 and S106 in the illustrated flowchart are processed in parallel. Figure 20The PWM duty cycle shown shows the Figure 19 The process shown in the flowchart is to adjust Figure 16 The PWM duty cycle is shown in the figure. Figure 19 In the embodiment, as in the second embodiment, the U-phase duty cycle Du_U, the V-phase duty cycle Du_V, and the W-phase duty cycle Du_W can be replaced by the modulated U-phase duty cycle Md_U, the modulated V-phase duty cycle Md_V, and the modulated W-phase duty cycle Md_W.

[0140] exist Figure 19 In the process of PWM duty adjustment, when maximum value D_max is greater than allowable upper limit D_UL, PWM duty adjustment unit 3A sets the value obtained by subtracting maximum value D_max from "1" as shift amount D_Sh2. When minimum value D_min is less than allowable lower limit D_LL, PWM duty adjustment unit 3A sets the value obtained by subtracting minimum value D_min from "-1" as shift amount D_Sh2 (step S301).

[0141] Thereafter, the PWM duty adjustment section 3A adds the shift amount D_Sh2 to the U-phase duty Du_U, V-phase duty Du_V, and W-phase duty Du_W as the current duty ratios to generate temporary U-phase duty Du_U2, temporary V-phase duty Du_V2, and temporary W-phase duty Du_W2 (step S302).

[0142] Then, the minimum duty ratio determination unit 31 determines whether at least one of the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 is greater than the allowable upper limit D_UL and less than "1" or less than the allowable lower limit D_LL and greater than "-1" (step S303).

[0143] When in step S303, at least one of the temporary U-phase duty cycle Du_U2, the temporary V-phase duty cycle Du_V2 and the temporary W-phase duty cycle Du_W2 satisfies the above conditions (yes in step S303), the minimum duty cycle determination unit 31 determines that at least one of the temporary U-phase duty cycle Du_U2, the temporary V-phase duty cycle Du_V2 and the temporary W-phase duty cycle Du_W2 is outside the allowable range or is not "1" or "-1".

[0144] Then, the PWM duty ratio adjustment section 3A discards the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 calculated by the processing in steps S301 to S303, and outputs the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2. Figure 4 The U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W calculated in steps S102 to S104 or steps S102 and S106 are calculated (step S105).

[0145] When the temporary U-phase duty cycle Du_U2, the temporary V-phase duty cycle Du_V2 and the temporary W-phase duty cycle Du_W2 do not meet the conditions in step S303 (No in step S303), the minimum duty cycle determination unit 31 determines that the temporary U-phase duty cycle Du_U2, the temporary V-phase duty cycle Du_V2 and the temporary W-phase duty cycle Du_W2 are within the allowable range or are "1" or "-1".

[0146] Then, the PWM duty ratio adjustment unit 3A sets the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 as the new duty ratios, namely, the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W (step S304), and outputs them to the pulse generation unit 4 (step S105). When the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W are generated as the new duty ratios in step S304, the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W generated in steps S102 to S104 or step S106 are discarded.

[0147] By adjusting the PWM duty cycle as described above, the maximum value D_max can be fixed to "1," or the minimum value D_min can be fixed to "-1." This reduces switching losses, and prevents short circuits in the upper and lower arm switching elements, as well as short-duration on / off switching, resulting in reduced inrush current. This reduces the operational degradation of motor 200, allowing motor 200 to be stably driven for extended periods.

[0148] Will refer to Figure 20 Specific description Figure 19 The process for adjusting the PWM duty cycle is shown in FIG. Figure 20 As shown, a description will be given with reference to the PWM duty ratio between time m1 and time m5.

[0149] Between time m1 and time m2, minimum duty ratio determination unit 31 determines that modulated U-phase duty ratio Md_U is at maximum value D_max. Minimum duty ratio determination unit 31 determines that minimum value D_min is modulated V-phase duty ratio Md_V. Minimum duty ratio determination unit 31 then determines that modulated U-phase duty ratio Md_U (maximum value D_max) is greater than allowable upper limit D_UL and less than "1" (Yes in step S101).

[0150] Since the maximum value D_max is greater than the permissible upper limit D_UL, the PWM duty ratio adjustment unit 3A sets the value obtained by subtracting the maximum value D_max from "1" as the shift amount D_Sh2 (step S301). Then, the PWM duty ratio adjustment unit 3A sets the value obtained by adding the offset amount D_Sh2 to each of the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W, which are the current duty ratios, as the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 (step S302).

[0151] Then, the minimum duty ratio determination unit 31 determines that each of the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 does not satisfy the condition that the duty ratio is greater than the allowable upper limit D_UL and less than "1" or the duty ratio is less than the allowable lower limit D_LL and greater than "-1" (No in step S303).

[0152] Then, in step S304, the PWM duty ratio adjustment unit 3A sets the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2 and the temporary W-phase duty ratio Du_W2 to the U-phase duty ratio Du_U, the V-phase duty ratio Du_V and the W-phase duty ratio Du_W (step S304), and outputs them to the pulse generation unit 4 (step S105).

[0153] Between time m2 and time m3, minimum duty ratio determination unit 31 determines that maximum value D_max is greater than "1" (No in step S101). PWM duty ratio adjustment unit 3A outputs the modulated U-phase duty ratio Md_U, modulated V-phase duty ratio Md_V, and modulated W-phase duty ratio Md_W as the current duty ratios to pulse generation unit 4 (step S105). When the duty ratios of each phase are output, they can be output after modulated U-phase duty ratio Md_U, which is the maximum value D_max, is adjusted to "1."

[0154] like Figure 20 As shown, between time m3 and time m4, minimum duty ratio determination unit 31 determines that modulated W-phase duty ratio Md_W is at minimum value D_min. Minimum duty ratio determination unit 31 determines that modulated U-phase duty ratio Md_U is at maximum value D_max. Minimum duty ratio determination unit 31 then determines that minimum value D_min (=modulated W-phase duty ratio Md_W) is less than allowable lower limit D_LL and greater than -1 (Yes in step S101).

[0155] Since the minimum value D_min is less than the allowable lower limit D_LL, the PWM duty ratio adjustment unit 3 sets the value obtained by subtracting the minimum value D_min from "-1" as the shift amount D_Sh2 (step S301). Then, the PWM duty ratio adjustment unit 3 sets the value obtained by adding the offset amount D_Sh2 to each of the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W, which are the current duty ratios, as the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 (step S302).

[0156] Then, the minimum duty ratio determination unit 31 determines that each of the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2, and the temporary W-phase duty ratio Du_W2 does not satisfy the condition that the duty ratio is greater than the allowable upper limit D_UL and less than "1" or the duty ratio is less than the allowable lower limit D_LL and greater than "-1" (No in step S303).

[0157] Then, in step S304, the PWM duty ratio adjustment unit 3A sets the temporary U-phase duty ratio Du_U2, the temporary V-phase duty ratio Du_V2 and the temporary W-phase duty ratio Du_W2 to the U-phase duty ratio Du_U, the V-phase duty ratio Du_V and the W-phase duty ratio Du_W (step S304), and outputs them to the pulse generation unit 4 (step S105).

[0158] Between time m4 and time m5, the minimum duty ratio determination unit 31 determines that the minimum value D_min is less than "-1" (No in step S101). Therefore, the PWM duty ratio adjustment unit 3A outputs the U-phase duty ratio Du_U, the V-phase duty ratio Du_V, and the W-phase duty ratio Du_W as the current duty ratios to the pulse generation unit 4 (step S105). When the duty ratios of the respective phases are output, they can be output after the modulated W-phase duty ratio Md_W, which is the maximum value D_max, is adjusted to "-1".

[0159] The modulated U-phase duty Md_U, the modulated V-phase duty Md_V, and the modulated W-phase duty Md_W have the same waveform, and their phases are shifted, so the PWM duty adjustment section 3A can adjust the duty through the same process.

[0160] By adjusting the PWM duty cycle as described above, the maximum value D_max can be fixed to "1," or the minimum value D_min can be fixed to "-1." This reduces switching losses, and prevents short circuits in the upper and lower arm switching elements, as well as short-duration on / off switching, resulting in reduced inrush current. This reduces the operational degradation of motor 200, allowing motor 200 to be stably driven for extended periods.

[0161] although Figure 19 The flowchart shown is the same as Figure 4 Steps S102 to S104 and S106 in the flowchart shown are processed in parallel, but the present disclosure is not limited to this configuration. Figure 19 In the process shown, if the determination result is No in step S303, the process may be transferred to step S102. Figure 19 The processing in is prioritized, and therefore parallel processing can be reduced. Figure 14 Steps S102 to S104 in the above method can be prioritized. Preferably, in this case, a method for determining Figure 4 The steps shown in step S102 to S104 are steps for determining whether the processing is appropriate. Another criterion may be used to perform determination before and after step S102 to select the processing.

[0162] <Other>

[0163] In the embodiments of the present disclosure, various changes can be made as needed without departing from the technical ideas within the scope of the claims. The various embodiments described above can be combined as needed as long as there is no contradiction. The above embodiments are merely examples of the embodiments of the present disclosure, and the meanings of the terms and components in the present disclosure are not limited to those described in the above embodiments.

[0164] Although the switching control device 300 has been described in the above embodiments as a configuration for driving the brushless DC motor 200, the present disclosure is not limited to these configurations. The present disclosure can be widely used to control an inverter circuit using a switching element.

[0165] The switching control device (300) may include: a PWM duty ratio conversion unit (2) configured to convert voltage command signals of three phases (U, V, and W) into PWM duty ratios; a PWM duty ratio adjustment unit (3) configured to simultaneously adjust the PWM duty ratios of the three phases using the same adjustment value; a pulse generation unit (4) configured to generate a pulse signal according to the PWM duty ratio adjusted by the PWM duty ratio adjustment unit (3); and an inverter circuit (6) configured to include a plurality of switching elements (501 to 506) driven by the pulse signal generated by the pulse generation unit (4) (first configuration).

[0166] In the switch control device of the first configuration, the PWM duty ratio adjustment section (3) can set an adjustment value so that the line voltage has a sine wave that fluctuates with a predetermined period (second configuration).

[0167] In the switch control device of the first configuration or the second configuration, when at least one of the PWM duty cycles exceeds an upper limit (D_UL) of an allowable range, a PWM duty cycle adjustment section (3) can set a difference between a maximum PWM duty cycle of the PWM duty cycles exceeding the upper limit (D_UL) and the upper limit (D_UL) of the allowable range as an adjustment value (third configuration).

[0168] In a switching control device of any one of the first to third configurations, when at least one of the PWM duty ratios falls below a lower limit (D_LL) of an allowable range, a PWM duty ratio adjustment section (3) can set a difference between a minimum PWM duty ratio among the PWM duty ratios that fall below the lower limit (D_LL) of the allowable range and the lower limit (D_LL) of the allowable range as an adjustment value (fourth configuration).

[0169] The switch control device of the first configuration or the second configuration further includes: a voltage command calculation unit (1) configured to perform line-to-line modulation to set the voltage command signal of the largest phase within a predetermined period to the maximum value (Vd) of the voltage that can be supplied. A PWM duty ratio conversion unit (2) can generate a PWM duty ratio so that when the voltage command signal is the maximum value (Vd) of the voltage that can be supplied, the PWM duty ratio is "1", and when the PWM duty ratio of the phase other than "1" exceeds the upper limit (D_UL) of the allowable range, a PWM duty ratio adjustment unit (3) can set the difference between the PWM duty ratio exceeding the upper limit of the allowable range and "1" as an adjustment value (fifth configuration).

[0170] The switching control device of any one of the first, second, and fifth configurations further includes: a voltage command calculation section (1) configured to perform line-to-line modulation to set the voltage command signal of the minimum phase to the minimum value (-Vd) of the voltage that can be supplied within a predetermined period. The PWM duty ratio conversion section (2) can generate a PWM duty ratio so that when the voltage command signal is the minimum value (-Vd) of the voltage that can be supplied, the PWM duty ratio is "-1", and when the PWM duty ratio of the phase other than "-1" falls below the lower limit (D_LL) of the allowable range, the PWM duty ratio adjustment section (3) can set the difference between the PWM duty ratio that falls below the lower limit (D_LL) of the allowable range and "-1" as the adjustment value (sixth configuration).

[0171] In the switching control device of any one of the first to sixth configurations, the PWM duty ratio adjustment section (3) can adjust the PWM duty ratio of the adjustable phase only within the adjustable range (seventh configuration).

[0172] The switch control device of any one of the first to fifth configurations may further include a dead time compensation section (32) configured to perform a process of compensating for the dead time of the PWM duty ratio before adjustment by the PWM duty ratio adjustment section (3) (eighth configuration).

[0173] In the switching control device of any one of the first to eighth configurations, for each of the three phases, the inverter circuit (5) may include a branch including a switching element (501 to 503) in an upper arm and a switching element (504 to 506) in a lower arm (ninth configuration).

[0174] The motor system (100) may include: a switch control device (300) of a ninth configuration; and a motor (200) (a tenth configuration) configured to be controlled by the switch control device (300).

[0175] Description of Reference Signs

[0176] 1 Voltage command calculation unit

[0177] 2 PWM duty cycle conversion unit

[0178] 3. 3A PWM duty cycle adjustment unit

[0179] 4 Pulse generation unit

[0180] 5 Inverter circuit

[0181] 31 Minimum duty ratio determination unit

[0182] 32 Dead time compensation unit

[0183] 51 Inverter main circuit

[0184] 52 switch drive circuit

[0185] 100, 100A motor system

[0186] 200 brushless DC motor

[0187] 201U phase coil

[0188] 202V phase coil

[0189] 203W phase coil

[0190] 300 switch control device

[0191] 501 to 506 freewheeling diodes

[0192] Switching elements 511 to 516.

Claims

1. A switch control device, comprising: a PWM duty ratio conversion unit configured to convert the three-phase voltage command signals into a PWM duty ratio; a PWM duty cycle adjustment unit configured to simultaneously adjust the PWM duty cycles of the three phases at the same time using the same adjustment value; a pulse generating unit configured to generate a pulse signal according to the PWM duty ratio adjusted by the PWM duty ratio adjusting unit; as well as An inverter circuit is configured to include a plurality of switching elements driven by the pulse signal generated by the pulse generating section.

2. The switch control device according to claim 1, in, The PWM duty ratio adjustment section sets the adjustment value so that the line voltage has a sine wave that fluctuates with a predetermined period.

3. The switch control device according to claim 1 or 2, in, When at least one of the PWM duties exceeds an upper limit of an allowable range, the PWM duty adjustment section sets a difference between a maximum PWM duty among the PWM duties exceeding the upper limit and the upper limit of the allowable range as the adjustment value.

4. The switch control device according to any one of claims 1 to 3, in, When at least one of the PWM duties falls below a lower limit of an allowable range, the PWM duty adjustment section sets a difference between a minimum PWM duty among the plurality of PWM duties falling below the lower limit and the lower limit of the allowable range as the adjustment value.

5. The switch control device according to claim 1 or 2, further comprising: a voltage command calculation section configured to perform line-to-line modulation to set the voltage command signal of the maximum phase within a predetermined period to a maximum value of a voltage that can be supplied, wherein the PWM duty ratio conversion unit generates a PWM duty ratio such that when the voltage command signal is a maximum value of a voltage that can be supplied, the PWM duty ratio is "1", and When the PWM duty of a phase other than "1" exceeds an upper limit of an allowable range, the PWM duty adjustment section sets a difference between the PWM duty exceeding the upper limit of the allowable range and "1" as the adjustment value.

6. The switch control device according to any one of claims 1, 2 or 5, further comprising: a voltage command calculation section configured to perform line-to-line modulation to set a voltage command signal of a minimum phase within a predetermined period to a minimum value of a voltage that can be supplied, wherein the PWM duty ratio conversion unit generates a PWM duty ratio such that when the voltage command signal is the minimum value of the voltage that can be supplied, the PWM duty ratio is "-1", and When the PWM duty of a phase other than "-1" falls below a lower limit of an allowable range, the PWM duty adjustment section sets a difference between the PWM duty falling below the lower limit of the allowable range and "-1" as the adjustment value.

7. The switch control device according to any one of claims 1 to 6, in, The PWM duty ratio adjustment unit adjusts the PWM duty ratio of the adjustable phase only within the adjustable range.

8. The switch control device according to any one of claims 1 to 7, further comprising: The dead time compensating unit is configured to: perform a process of compensating for the dead time of the PWM duty cycle before the PWM duty cycle is adjusted by the PWM duty cycle adjusting unit.

9. The switch control device according to any one of claims 1 to 8, in, The inverter circuit includes a branch for each of the three phases, the branch including a switching element in an upper arm and a switching element in a lower arm.

10. A motor system comprising: The switch control device according to claim 9; as well as A motor is configured to be controlled by the switch control device.

Citation Information

Patent Citations

  • Motor drive device

    JP2022104708A