Semiconductor device

Abstract

A semiconductor device including a transistor having a large on-state current is provided. The semiconductor device includes a first transistor, a first insulating layer, and a second insulating layer. The second insulating layer is provided in contact with a portion of the top surface of the first insulating layer. The first transistor includes a metal oxide layer, a third insulating layer and a first conductive layer. The metal oxide layer is in contact with a top surface of the first insulating layer and a top surface and a side surface of the second insulating layer. The third insulating layer is in contact with a top surface and a side surface of the metal oxide layer, a top surface of the first insulating layer, and a top surface and a side surface of the second insulating layer. The first conductive layer has a region overlapping a side surface of the second insulating layer with the third insulating layer and the metal oxide layer therebetween. The second insulating layer comprises a fourth insulating layer and a fifth insulating layer on the fourth insulating layer. The first insulating layer and the fifth insulating layer each contain nitrogen. The fourth insulating layer contains oxygen.

Description

Technical Field

[0001] One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the same. Another embodiment of the present invention relates to a transistor and a method for manufacturing the same. Another embodiment of the present invention relates to a display device including a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the aforementioned technical field. Examples of the technical fields of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), and methods for driving or manufacturing such devices.

[0003] Note that in this specification and other documents, a semiconductor device refers to a device that utilizes semiconductor characteristics, a circuit that includes a semiconductor element (transistor, diode, photodiode, etc.), and a device that includes such a circuit. Furthermore, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. For example, examples of semiconductor devices include integrated circuits, chips that include integrated circuits, and electronic components that contain chips in packages. Furthermore, storage devices, display devices, light-emitting devices, lighting devices, and electronic devices themselves are semiconductor devices, and sometimes all include semiconductor devices. Background Art

[0004] Semiconductor devices including transistors are widely used in electronic devices. In recent years, the uses of display devices have continued to diversify. For example, display devices are used in portable information terminals, television devices (also called television receivers), digital signage (digital signage), and PIDs (public information displays). Examples of display devices include those including organic EL (electroluminescence) elements or light-emitting diodes (LEDs), those including liquid crystal elements, and electronic paper that uses electrophoretic display.

[0005] In display devices, reducing the area occupied by transistors allows for smaller pixel sizes, thereby improving resolution. Furthermore, reducing the area occupied by transistors allows for higher aperture ratios. Consequently, miniaturized transistors are becoming increasingly popular.

[0006] As devices requiring high-definition display devices, the development of devices for virtual reality (VR), augmented reality (AR), substitute reality (SR), and mixed reality (MR) is active.

[0007] Patent Document 1 discloses a high-definition display device using an organic EL element.

[0008] [Prior technical literature]

[0009] [Patent Document]

[0010] [Patent Document 1] International Patent Application Publication No. 2016 / 038508 Summary of the Invention

[0011] Technical problem to be solved by the invention

[0012] One object of one embodiment of the present invention is to provide a micro transistor. One object of one embodiment of the present invention is to provide a transistor with a short channel length. One object of one embodiment of the present invention is to provide a transistor with a large on-state current. One object of one embodiment of the present invention is to provide a transistor with good electrical characteristics. One object of one embodiment of the present invention is to provide a semiconductor device with a small footprint. One object of one embodiment of the present invention is to provide a semiconductor device with low wiring resistance. One object of one embodiment of the present invention is to provide a semiconductor device or display device with low power consumption. One object of one embodiment of the present invention is to provide a transistor, semiconductor device, or display device with high reliability. One object of one embodiment of the present invention is to provide a high-definition display device. One object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device or display device with high productivity. One object of one embodiment of the present invention is to provide a novel transistor, semiconductor device, display device, or method for manufacturing them.

[0013] Note that the inclusion of these objectives does not preclude the existence of other objectives. One embodiment of the present invention does not necessarily achieve all of the above objectives. Objectives other than the above objectives may be extracted from the description of the specification, drawings, and claims.

[0014] Means of solving technical problems

[0015] One embodiment of the present invention is a semiconductor device comprising a first transistor, a first insulating layer, and a second insulating layer. The second insulating layer is arranged in contact with a portion of the top surface of the first insulating layer. The first transistor comprises a metal oxide layer, a third insulating layer, and a first conductive layer. The metal oxide layer is in contact with the top surface of the first insulating layer and the top and side surfaces of the second insulating layer. The third insulating layer is in contact with the top and side surfaces of the metal oxide layer, the top surface of the first insulating layer, and the top and side surfaces of the second insulating layer. The first conductive layer has a region overlapping the side surfaces of the second insulating layer via the third insulating layer and the metal oxide layer. The second insulating layer comprises a fourth insulating layer and a fifth insulating layer on the fourth insulating layer. The first insulating layer and the fifth insulating layer both contain nitrogen. The fourth insulating layer contains oxygen.

[0016] The semiconductor device preferably further includes a second transistor. The second transistor preferably includes a metal oxide layer, a third insulating layer, and a second conductive layer. The second conductive layer preferably has a region overlapping a side surface of the second insulating layer via the third insulating layer and the metal oxide layer. The first and second transistors preferably share a metal oxide layer in a region in contact with the first insulating layer.

[0017] The semiconductor device preferably further includes a second transistor. The second transistor preferably includes a metal oxide layer, a third insulating layer, and a second conductive layer. The second conductive layer preferably has a region overlapping a side surface of the second insulating layer via the third insulating layer and the metal oxide layer. The first and second transistors preferably share a metal oxide layer in a region in contact with the fifth insulating layer.

[0018] The semiconductor device preferably further includes a capacitor. The capacitor preferably includes a metal oxide layer, a third insulating layer, and a second conductive layer on the third insulating layer. The second conductive layer preferably has a portion overlapping the third insulating layer in a region of the metal oxide layer that contacts the first insulating layer.

[0019] The semiconductor device preferably further includes a capacitor. The capacitor preferably includes a metal oxide layer, a third insulating layer, and a second conductive layer on the third insulating layer. The second conductive layer preferably has a portion overlapping the third insulating layer in a region of the metal oxide layer that contacts the fifth insulating layer.

[0020] In the semiconductor device described above, the second insulating layer preferably includes a sixth insulating layer. The sixth insulating layer is preferably located between the first insulating layer and the fourth insulating layer. The sixth insulating layer preferably contains nitrogen. The first insulating layer preferably has a region having a higher hydrogen concentration than the sixth insulating layer.

[0021] In the semiconductor device described above, the second insulating layer preferably includes a seventh insulating layer. The seventh insulating layer is preferably located between the fourth insulating layer and the fifth insulating layer. The seventh insulating layer preferably contains nitrogen. The fifth insulating layer preferably has a region having a higher hydrogen concentration than the seventh insulating layer.

[0022] In the above semiconductor device, the third insulating layer preferably includes a layer containing aluminum oxide or silicon nitride.

[0023] Effects of the Invention

[0024] According to one embodiment of the present invention, a micro transistor can be provided. According to one embodiment of the present invention, a transistor with a short channel length can be provided. According to one embodiment of the present invention, a transistor with a large on-state current can be provided. According to one embodiment of the present invention, a transistor with excellent electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with a small footprint can be provided. According to one embodiment of the present invention, a semiconductor device with low wiring resistance can be provided. According to one embodiment of the present invention, a semiconductor device or display device with low power consumption can be provided. According to one embodiment of the present invention, a transistor, semiconductor device, or display device with high reliability can be provided. According to one embodiment of the present invention, a high-definition display device can be provided. According to one embodiment of the present invention, a method for manufacturing a semiconductor device or display device with high productivity can be provided. According to one embodiment of the present invention, a novel transistor, semiconductor device, display device, or method for manufacturing them can be provided.

[0025] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above effects can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1A is a plan view showing an example of a semiconductor device. Figure 1B is a cross-sectional view showing an example of a semiconductor device.

[0027] Figure 2A and Figure 2B It is a perspective view showing an example of a semiconductor device.

[0028] Figure 3A and Figure 3B is a cross-sectional view showing an example of a semiconductor device.

[0029] Figure 4A is a plan view showing an example of a semiconductor device. Figure 4B is a cross-sectional view showing an example of a semiconductor device.

[0030] Figure 5A and Figure 5B It is a perspective view showing an example of a semiconductor device.

[0031] Figure 6 is a cross-sectional view showing an example of a semiconductor device.

[0032] Figure 7A and Figure 7B is a cross-sectional view showing an example of a semiconductor device.

[0033] Figure 8 is a cross-sectional view showing an example of a semiconductor device.

[0034] Figure 9A is a cross-sectional view showing an example of a semiconductor device. Figure 9B It is a perspective view showing an example of a semiconductor device.

[0035] Figure 10A and Figure 10B is a cross-sectional view showing an example of a semiconductor device.

[0036] Figure 11A is a plan view showing an example of a semiconductor device. Figure 11B is a cross-sectional view showing an example of a semiconductor device.

[0037] Figure 12A and Figure 12B is a cross-sectional view showing an example of a semiconductor device.

[0038] Figure 13A is a plan view showing an example of a semiconductor device. Figure 13B It is a perspective view showing an example of a semiconductor device.

[0039] Figure 14A is a plan view showing an example of a semiconductor device. Figure 14B It is a perspective view showing an example of a semiconductor device.

[0040] Figure 15A is a plan view showing an example of a semiconductor device. Figure 15B is a cross-sectional view showing an example of a semiconductor device.

[0041] Figure 16A and Figure 16B It is a perspective view showing an example of a semiconductor device.

[0042] Figure 17A is a plan view showing an example of a semiconductor device. Figure 17B is a cross-sectional view showing an example of a semiconductor device.

[0043] Figure 18is a plan view showing an example of a semiconductor device.

[0044] Figure 19A and Figure 19B is a cross-sectional view showing an example of a semiconductor device.

[0045] Figure 20 It is a perspective view showing an example of a semiconductor device.

[0046] Figure 21A is a plan view showing an example of a semiconductor device. Figure 21B is a cross-sectional view showing an example of a semiconductor device.

[0047] Figure 22 It is a perspective view showing an example of a semiconductor device.

[0048] Figure 23 is a plan view showing an example of a semiconductor device.

[0049] Figure 24 It is a perspective view showing an example of a semiconductor device.

[0050] Figures 25A to 25E is a circuit diagram showing an example of a semiconductor device.

[0051] Figure 26 is a plan view showing an example of a semiconductor device.

[0052] Figure 27 is a cross-sectional view showing an example of a semiconductor device.

[0053] Figure 28A and Figure 28B It is a perspective view showing an example of a semiconductor device.

[0054] Figure 29 is a cross-sectional view showing an example of a semiconductor device.

[0055] Figure 30 is a plan view showing an example of a semiconductor device.

[0056] Figure 31 is a plan view showing an example of a semiconductor device.

[0057] Figure 32 is a cross-sectional view showing an example of a semiconductor device.

[0058] Figure 33A and Figure 33B It is a perspective view showing an example of a semiconductor device.

[0059] Figure 34Ais a plan view showing an example of a semiconductor device. Figure 34B It is a perspective view showing an example of a semiconductor device.

[0060] Figure 35A and Figure 35B It is a perspective view showing an example of a semiconductor device.

[0061] Figure 36A is a plan view showing an example of a semiconductor device. Figure 36B It is a perspective view showing an example of a semiconductor device.

[0062] Figure 37A and Figure 37B It is a perspective view showing an example of a semiconductor device.

[0063] Figure 38 is a plan view showing an example of a semiconductor device.

[0064] Figure 39A and Figure 39B is a cross-sectional view showing an example of a semiconductor device.

[0065] Figure 40 It is a perspective view showing an example of a semiconductor device.

[0066] Figure 41 is a plan view showing an example of a semiconductor device.

[0067] Figure 42A and Figure 42B is a cross-sectional view showing an example of a semiconductor device.

[0068] Figure 43 is a plan view showing an example of a semiconductor device.

[0069] Figure 44A and Figure 44B is a cross-sectional view showing an example of a semiconductor device.

[0070] Figure 45A and Figure 45B It is an equivalent circuit diagram of a semiconductor device. Figure 45C is a plan view showing an example of a semiconductor device.

[0071] Figure 46 is a cross-sectional view showing an example of a semiconductor device.

[0072] Figure 47A and Figure 47B It is a perspective view showing an example of a semiconductor device.

[0073] Figures 48A to 48EThis is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device.

[0074] Figures 49A to 49D This is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device.

[0075] Figure 50 It is a perspective view showing an example of a display device.

[0076] Figure 51A and Figure 51B is a cross-sectional view showing an example of a display device.

[0077] Figure 52 is a cross-sectional view showing an example of a display device.

[0078] Figures 53A to 53C is a cross-sectional view showing an example of a display device.

[0079] Figure 54A and Figure 54B is a cross-sectional view showing an example of a display device.

[0080] Figure 55 is a cross-sectional view showing an example of a display device.

[0081] Figure 56 is a cross-sectional view showing an example of a display device.

[0082] Figure 57 is a cross-sectional view showing an example of a display device.

[0083] Figure 58 is a cross-sectional view showing an example of a display device.

[0084] Figure 59 is a cross-sectional view showing an example of a display device.

[0085] Figures 60A to 60F This is a cross-sectional view illustrating an example of a method for manufacturing a display device.

[0086] Figures 61A to 61D is a diagram illustrating an example of an electronic device.

[0087] Figures 62A to 62F is a diagram illustrating an example of an electronic device.

[0088] Figures 63A to 63G is a diagram illustrating an example of an electronic device. DETAILED DESCRIPTION

[0089] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and those skilled in the art will readily appreciate that the embodiments and details can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited solely to the embodiments described below.

[0090] Note that in the invention structure described below, the same symbols are used to show the same parts or parts with the same function in different drawings, and repeated descriptions are omitted. In addition, when showing parts with the same function, the same hatching is sometimes used without adding special symbols.

[0091] In this specification, etc., when the same reference numeral is used for multiple elements and it is necessary to distinguish them, the reference numeral may be described with an identification code such as "_1," "[n]," or "[m,n]" appended thereto. Furthermore, when a reference numeral is described with an identification code such as "_1," "[n]," or "[m,n]" appended thereto in the drawings and the like and it is not necessary to distinguish them in this specification, the identification code may not be described.

[0092] Furthermore, for ease of understanding, the positions, sizes, and ranges of various components shown in the drawings may not necessarily reflect their actual positions, sizes, and ranges. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, and ranges disclosed in the drawings.

[0093] Note that in this specification and other documents, ordinal numbers such as "first" and "second" are used for convenience, but these numbers do not limit the number of components or the order of the components (for example, the order of steps or the order of stacking). In addition, the ordinal numbers assigned to components in one part of this specification may not be consistent with the ordinal numbers assigned to the same components in other parts of this specification or in the claims.

[0094] In addition, depending on the situation or state, the terms "film" and "layer" can be interchanged. For example, "conductive layer" can be replaced with "conductive film." Also, "insulating film" can be replaced with "insulating layer."

[0095] A transistor is a type of semiconductor element that can amplify current or voltage, control conduction or non-conduction, etc. Transistors in this specification include IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs).

[0096] The functions of "source" and "drain" may be interchanged when using transistors with different polarities or when the direction of current changes during circuit operation. Therefore, in this specification, "source" and "drain" may be used interchangeably. Note that the source and drain of a transistor may be appropriately referred to as "source terminal" and "drain terminal" or "source electrode" and "drain electrode," depending on the application.

[0097] Throughout this specification, "electrically connected" includes connection via "an element having some electrical function." This "element having some electrical function" is not particularly limited as long as it enables transmission and reception of electrical signals between the connected elements. For example, "element having some electrical function" includes switching elements such as transistors, resistors, coils, and other components with various functions, in addition to electrodes and wiring.

[0098] In this specification, unless otherwise specified, the off-state current refers to the leakage current between the source and the drain when the transistor is in the off state (also called the non-conducting state or the blocking state). In an n-channel transistor, the off-state refers to the voltage V between the gate and the source. gs Below the threshold voltage V th (In a p-channel transistor, V gs Higher than V th ) status.

[0099] In this specification, etc., "top surface shapes are generally consistent" means that at least a portion of the edges of each layer in the stack overlap. This includes, for example, the case where the upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, in practice, there are cases where the edges do not overlap and the upper layer is located inside or outside the lower layer. In these cases, "top surface shapes are generally consistent." When the top surface shapes are consistent or generally consistent, the ends can also be said to be aligned or generally aligned.

[0100] In this specification, etc., a tapered shape refers to a shape in which at least a portion of the side surface of a component is inclined relative to the substrate surface or the formed surface. For example, it is preferred that the angle formed between the inclined side surface and the substrate surface or the formed surface (also known as the taper angle) is less than 90 degrees. Here, the side surface, substrate surface, and formed surface of a component do not necessarily need to be completely flat; they may also be approximately planar with a slight curvature or approximately planar with micro-concavities and convexities.

[0101] In this specification, etc., a device manufactured using a metal mask or FMM (Fine Metal Mask) is sometimes referred to as a device having an MM (Metal Mask) structure. In addition, in this specification, etc., a device manufactured without using a metal mask or FMM is sometimes referred to as a device having an MML (Metal Mask Less) structure. Note that since a device with an MML structure can be manufactured without using a metal mask, the upper limit of the clarity caused by the alignment accuracy of the metal mask can be exceeded. In addition, a device with an MML structure does not require the equipment required for the manufacture of a metal mask and the metal mask washing process. In addition, a device with an MML structure can reduce manufacturing costs and is therefore suitable for mass production.

[0102] In this specification and other publications, a structure in which light-emitting elements (also called light-emitting devices) with different emission wavelengths have separate light-emitting layers is sometimes referred to as an SBS (Side-by-Side) structure. The SBS structure allows for optimization of materials and structures for each light-emitting element, increasing the freedom of material and structure selection and facilitating improvements in brightness and reliability.

[0103] In this specification, holes or electrons are sometimes referred to as "carriers." Specifically, a hole injection layer or electron injection layer is sometimes referred to as a "carrier injection layer," a hole transport layer or electron transport layer is sometimes referred to as a "carrier transport layer," and a hole blocking layer or electron blocking layer is sometimes referred to as a "carrier blocking layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer are sometimes not clearly distinguishable based on their cross-sectional shape or characteristics. Furthermore, a single layer may have the functions of two or all of the three.

[0104] In this specification, etc., a light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as layers included in the EL layer (also referred to as functional layers), a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer) and a carrier blocking layer (hole blocking layer and electron blocking layer) can be cited. In this specification, etc., a light-receiving element (also referred to as a light-receiving device) includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes. In this specification, etc., one of a pair of electrodes is sometimes referred to as a pixel electrode, and the other as a common electrode.

[0105] In this specification, etc., a sacrificial layer (also referred to as a mask layer) is located at least above the light-emitting layer (more specifically, a layer processed into an island shape among the layers constituting the EL layer) and has the function of protecting the light-emitting layer during the manufacturing process.

[0106] In this specification and the like, disconnection refers to a phenomenon in which a layer, a film, or an electrode is disconnected due to the shape of the surface on which it is formed (for example, a step, etc.).

[0107] (Implementation 1)

[0108] In this embodiment, a semiconductor device which is one embodiment of the present invention is described with reference to FIG. 1 to FIG. 47 .

[0109] One embodiment of the present invention is a semiconductor device including a transistor, a first insulating layer, and a second insulating layer. The second insulating layer is provided in contact with a portion of the top surface of the first insulating layer. The transistor includes a metal oxide layer, a third insulating layer, and a first conductive layer. The metal oxide layer is in contact with the top surface of the first insulating layer and the top and side surfaces of the second insulating layer. The third insulating layer serves as a gate insulating layer of the transistor and is in contact with the top and side surfaces of the metal oxide layer, the top surface of the first insulating layer, and the top and side surfaces of the second insulating layer. The first conductive layer serves as a gate electrode of the transistor and has a region overlapping the side surfaces of the second insulating layer via the third insulating layer and the metal oxide layer. The second insulating layer includes a fourth insulating layer and a fifth insulating layer on the fourth insulating layer. The first insulating layer and the fifth insulating layer both contain nitrogen. The fourth insulating layer contains oxygen.

[0110] The region of the metal oxide layer in contact with the fourth insulating layer serves as the channel formation region of the transistor. The channel formation region is arranged along the side of the fourth insulating layer. The channel length of the transistor, viewed in cross-section, corresponds to the length of the side of the fourth insulating layer in contact with the metal oxide layer. This allows the channel length to be smaller than the resolution limit of the exposure device, enabling the realization of miniaturized transistors. Consequently, transistors with high on-state current can be realized.

[0111] By supplying impurities from the first insulating layer and increasing its carrier concentration, the conductivity of the region of the metal oxide layer in contact with the first insulating layer is improved. Therefore, this region serves as one of the source and drain electrodes of the transistor. Similarly, by supplying impurities from the fifth insulating layer and increasing its carrier concentration, the conductivity of the region of the metal oxide layer in contact with the fifth insulating layer is improved. Therefore, this region serves as the other of the source and drain electrodes of the transistor. Since the metal oxide layer has a region serving as the source electrode and a region serving as the drain electrode, there is no need to provide a separate source and drain electrode from the metal oxide layer, thereby reducing the footprint of the semiconductor device.

[0112] <Structure Example 1>

[0113] [Structure Example 1-1]

[0114] Figure 1A This is a top view (also referred to as a plan view) of a semiconductor device 10 according to one embodiment of the present invention. Figure 1B It is along Figure 1A The cross-sectional view of the section along the dotted line A1-A2 is shown. Figure 1A A portion of the components of the semiconductor device 10 (gate insulating layer, etc.) is omitted in the figure. Figure 1A Similarly, some components are omitted.

[0115] Figure 2A is a perspective view of the semiconductor device 10. Figure 2A The insulating layer is shown in perspective in FIG. 1 , wherein its outline is indicated by a dotted line.

[0116] Semiconductor device 10 includes transistor 100, insulating layer 109, and insulating layer 110. Insulating layer 109 is provided on substrate 102, and insulating layer 110 is provided on insulating layer 109. Insulating layer 110 is provided in contact with a portion of the top surface of insulating layer 109, with an end portion of insulating layer 110 in contact with the top surface of insulating layer 109. Semiconductor device 10 can also be said to have a region where insulating layer 110 is provided and a region where insulating layer 110 is not provided. Transistor 100 is provided on insulating layer 109 and insulating layer 110. Transistor 100 is provided so as to straddle the region where insulating layer 110 is provided and the region where insulating layer 110 is not provided.

[0117] Transistor 100 includes a conductive layer 104, an insulating layer 106, and a layer 108. Layer 108 includes a semiconductor material. Layer 108 includes a channel formation region, a region serving as a source electrode, and a region serving as a drain electrode. A portion of insulating layer 106 serves as a gate insulating layer (also referred to as a first gate insulating layer) of transistor 100, and conductive layer 104 serves as a gate electrode (also referred to as a first gate electrode).

[0118] Figure 2B 1 is a perspective view of an extract of substrate 102, insulating layer 109, insulating layer 110 and layer 108. Figure 1A 、 Figure 1B 、 Figure 2A and Figure 2B As shown, layer 108 is provided so as to span both the region where insulating layer 110 is provided and the region where insulating layer 110 is not provided. Alternatively, layer 108 can be said to have regions that overlap with insulating layer 110 and regions that do not overlap with insulating layer 110. Layer 108 is provided along a step resulting from the region where insulating layer 110 is provided and the region where insulating layer 110 is not provided. Layer 108 has regions that contact the top and side surfaces of insulating layer 110 and the top surface of insulating layer 109. Layer 108 has a shape that conforms to the top and side surfaces of insulating layer 110 and the top surface of insulating layer 109.

[0119] Insulating layer 106 is provided on layers 108, 109, and 110. Insulating layer 106 has regions in contact with the top and side surfaces of layer 108, the top surface of insulating layer 109, and the top and side surfaces of insulating layer 110. Insulating layer 106 has a shape that follows the shapes of the top and side surfaces of layer 108, the top surface of insulating layer 109, and the top surface of insulating layer 110.

[0120] Conductive layer 104 is provided on insulating layer 106 and has a region in contact with the top surface of insulating layer 106. Conductive layer 104 is provided along a step resulting from a region provided with insulating layer 110 and a region not provided with insulating layer 110. Conductive layer 104 has a region that overlaps with the side surface of insulating layer 110 via insulating layer 106 and layer 108.

[0121] There are no particular limitations on the semiconductor material used for layer 108. For example, a semiconductor composed of a single element or a compound semiconductor can be used. Examples of semiconductors composed of a single element include silicon or germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. In addition, examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may also contain impurities as dopants.

[0122] There are no particular restrictions on the crystallinity of the semiconductor material used for the layer 108. An amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than a single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a partially crystalline region) can be used. Using a single crystal semiconductor or a crystalline semiconductor is preferred because it can suppress degradation of transistor characteristics.

[0123] Silicon can be used for layer 108. Examples of silicon include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polycrystalline silicon (LTPS). Transistors using amorphous silicon as channel formation regions can be formed on a large glass substrate and can be manufactured at low cost. Transistors using polycrystalline silicon as channel formation regions have high field effect mobility and can operate at high speed. In addition, transistors using microcrystalline silicon as channel formation regions have higher field effect mobility than transistors using amorphous silicon and can operate at high speed.

[0124] The layer 108 preferably includes a metal oxide exhibiting semiconductor properties (also referred to as an oxide semiconductor). When a metal oxide is used for the layer 108, the layer 108 can be referred to as a metal oxide layer.

[0125] The band gap of the metal oxide used for the semiconductor layer 108 is preferably 2.0 eV or more, more preferably 2.5 eV or more.

[0126] Compared to transistors using amorphous silicon, transistors using oxide semiconductors (hereinafter referred to as OS transistors) have significantly higher field-effect mobility. Furthermore, OS transistors have extremely low off-state current, allowing them to retain charge stored in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of OS transistors can reduce power consumption in semiconductor devices.

[0127] The insulating layer 110 and the insulating layer 109 preferably each include one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride. Examples of oxynitrides include silicon oxynitride and aluminum oxynitride. The insulating layer 110 and the insulating layer 109 may be made of the same material or different materials.

[0128] Note that in this specification and the like, an oxynitride refers to a material containing more oxygen than nitrogen in its composition, and an oxynitride refers to a material containing more nitrogen than oxygen in its composition.

[0129] In this specification and the like, different materials refer to materials having different constituent elements in part or in whole, or materials having the same constituent elements but different compositions.

[0130] The insulating layer 110 has a region in contact with the layer 108. When a metal oxide is used as the layer 108, at least a portion of the region of the insulating layer 110 in contact with the layer 108 preferably contains oxygen in order to improve the interface characteristics between the layer 108 and the insulating layer 110. Specifically, the portion of the insulating layer 110 in contact with the channel formation region of the layer 108 preferably contains oxygen. The portion of the insulating layer 110 in contact with the channel formation region of the layer 108 can be made of one or more of an oxide and an oxynitride, as appropriate.

[0131] The insulating layer 110 preferably has a stacked structure. Figure 1B , etc. show an example in which insulating layer 110 includes insulating layer 110a and insulating layer 110b on insulating layer 110a. Insulating layer 110a and insulating layer 110b can use materials that can be used for insulating layer 110 and insulating layer 109, respectively. Layer 108 is in contact with the top surface of insulating layer 109, the side surfaces of insulating layer 110a, and the top and side surfaces of insulating layer 110b.

[0132] like Figure 3AAs shown, layer 108 includes a region 108C in contact with insulating layer 110a. Region 108C serves as a channel formation region for transistor 100. Layer 108 is in contact with the side surfaces of insulating layer 110a, so that region 108C is provided in the portion of layer 108 that contacts the side surfaces of insulating layer 110a. In other words, the channel formation region is provided along the side surfaces of insulating layer 110a. Conductive layer 104, which functions as a gate electrode, includes a region that overlaps with region 108C via insulating layer 106, which functions as a gate insulating layer. Furthermore, conductive layer 104 includes a region that overlaps with the side surfaces of insulating layer 110a via insulating layer 106 and layer 108.

[0133] The insulating layer 110a is preferably made of one or more of the above-mentioned oxides and oxynitrides. Specifically, the insulating layer 110a can be made of one or both of silicon oxide and silicon oxynitride as appropriate.

[0134] The insulating layer 110a is preferably a film that releases oxygen by heating. Since the insulating layer 110a releases oxygen due to heat applied during the manufacturing process of the transistor 100, oxygen can be supplied to the layer 108. By supplying oxygen from the insulating layer 110a to the layer 108, particularly to the region 108C serving as the channel formation region, oxygen vacancies (V O :Oxygen Vacancy), which can reduce oxygen vacancies (V O ). As a result, a transistor with good electrical characteristics and high reliability can be realized.

[0135] For example, oxygen can be supplied to the insulating layer 110a by performing a heat treatment or plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen can be supplied by forming an oxide film on the top surface of the insulating layer 110a by sputtering in an oxygen-containing atmosphere. This oxide film can then be removed. An example of forming a metal oxide layer 130 to supply oxygen to the insulating layer 110a will be described in Embodiment 2, which will be described later.

[0136] The insulating layer 110a is preferably formed using a deposition method such as sputtering or plasma-enhanced chemical vapor deposition (PECVD). In particular, by using sputtering without using a hydrogen-containing gas as the deposition gas, a film with an extremely low hydrogen content can be formed. This prevents hydrogen from being supplied to the region 108C, thereby stabilizing the electrical characteristics of the transistor 100.

[0137] Here, by using a material with high conductivity for layer 108, a transistor with a large on-state current can be realized. However, when a material with high conductivity is used, oxygen vacancies (V O ) and the oxygen vacancies in the channel formation region (VO ) increases, the threshold voltage of the transistor may drift, and the drain current (hereinafter also referred to as off-state current) flowing when the gate voltage is 0V may increase. For example, in an n-channel transistor, when the threshold voltage drifts to the negative side, the off-state current may increase. By providing the insulating layer 110a, oxygen is supplied to at least the region 108C of the layer 108 that contacts the insulating layer 110a, that is, the channel formation region, thereby reducing oxygen vacancies (V O ). This can suppress threshold voltage drift, thereby realizing a transistor with low off-state current and high on-state current. This can realize a low-power, high-performance semiconductor device.

[0138] Layer 108 includes a region 108P in contact with the uppermost layer of insulating layer 110 (here, insulating layer 110b). Region 108P serves as one of the source electrode and the drain electrode of transistor 100. Layer 108 also includes a region 108Q in contact with insulating layer 109. Region 108Q serves as the other of the source electrode and the drain electrode of transistor 100.

[0139] The insulating layer 110b in contact with the region 108P preferably uses a material that releases impurities. When a metal oxide is used for the layer 108, as the element contained in the impurity (hereinafter also referred to as the impurity element), one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon and a noble gas can be used. Typical examples of noble gases include helium, neon, argon, krypton and xenon. The impurity element is preferably one or more of hydrogen, boron, phosphorus, aluminum, magnesium and silicon, and hydrogen is particularly preferred. Specifically, the insulating layer 110b preferably uses a material that releases one or both of hydrogen and water. Note that in this specification, hydrogen is sometimes used as an example of the impurity.

[0140] Oxygen and hydrogen bonded to metal atoms in metal oxides react to form water, forming oxygen vacancies (V O ). Moreover, when hydrogen enters the oxygen vacancy defect (hereinafter referred to as V O H) is used as a donor to generate electrons as carriers. In addition, since part of the hydrogen is bonded to the oxygen bonded to the metal atom, electrons as carriers are generated. Therefore, the metal oxide exhibits conductivity and can be used as a conductor. In addition, the metal oxide used as a conductor can be called an oxide conductor (OC: Oxide Conductor). Generally speaking, since the band gap of metal oxides is large, they transmit visible light (it can also be said that they are translucent to visible light). In addition, oxide conductors are metal oxides that have a donor energy level near the conduction band. Therefore, in oxide conductors, the influence of absorption due to the donor energy level is small, and they have a translucency to visible light that is roughly the same as that of metal oxides.

[0141] Impurities released from insulating layer 110b diffuse into region 108P, increasing the carrier concentration in region 108P and improving conductivity. Thus, region 108P functions as a conductor, and in transistor 100, region 108P can function as either a source electrode or a drain electrode.

[0142] The region 108P contains an element (impurity element) among impurities released from the insulating layer 110 b. Specifically, when a material that releases one or both of hydrogen and water from the insulating layer 110 b is used, the region 108P contains hydrogen as the impurity element.

[0143] The insulating layer 109 in contact with the region 108Q is preferably made of a material that releases impurities. The elements (impurity elements) contained in these impurities can be found in the description regarding the insulating layer 110d. Note that the impurities released from the insulating layer 110d may be the same as or different from the impurities released from the insulating layer 109.

[0144] Impurities released from the insulating layer 109 diffuse into the region 108Q, increasing the carrier concentration in the region 108Q and improving conductivity. Thus, the region 108Q functions as a conductor, and in the transistor 100 , the region 108Q can function as either a source electrode or a drain electrode.

[0145] The region 108Q contains an element (impurity element) among impurities released from the insulating layer 109. Specifically, when a material that releases one or both of hydrogen and water from the insulating layer 109 is used, the region 108Q contains hydrogen as the impurity element.

[0146] In the transistor 100, a region 108C in the layer 108 that is in contact with the insulating layer 110a is used as a channel formation region, and oxygen vacancies (V O ). This allows for a transistor with excellent electrical characteristics. Meanwhile, since the conductivity of the insulating layer 110 b is improved by supplying impurities thereto, the region 108P in the layer 108 that is in contact with the insulating layer 110 b can be used as either a source electrode or a drain electrode. Since the conductivity of the insulating layer 109 is improved by supplying impurities thereto, the region 108Q in the layer 108 that is in contact with the insulating layer 109 can be used as the other of the source electrode and the drain electrode.

[0147] Since a portion of layer 108 (here, region 108P and region 108Q) is used as the source and drain electrodes, there is no need to provide separate source and drain electrodes from layer 108, thereby reducing the area occupied by the semiconductor device. Furthermore, the manufacturing process of the semiconductor device is simplified, thereby reducing manufacturing costs and improving the yield of the semiconductor device.

[0148] Region 108P serving as one of the source and drain electrodes and region 108Q serving as the other preferably include a region having a higher impurity element concentration than region 108C serving as a channel formation region. Specifically, region 108P and region 108Q preferably each include a portion having a higher hydrogen concentration than region 108C. The impurity concentration of region 108P and the impurity concentration of region 108Q may be the same or different.

[0149] The thickness T108P of the region 108P and the thickness T108Q of the region 108Q in the layer 108 are preferably, for example, 5 nm or more and 500 nm or less, more preferably 10 nm or more and 300 nm or less, more preferably 15 nm or more and 200 nm or less, more preferably 20 nm or more and 150 nm or less, more preferably 20 nm or more and 120 nm or less, and more preferably 20 nm or more and 100 nm or less. Figure 3B As shown, thickness T108P can be the shortest distance between the top surface of insulating layer 110 (specifically, the top surface of insulating layer 110b) and the top surface of layer 108 when viewed in cross section. Thickness T108Q can be the shortest distance between the top surface of insulating layer 109 and the top surface of layer 108 when viewed in cross section. Note that thickness T108P and thickness T108Q can be the same or different.

[0150] When the thickness T108P is thin, the resistance of the region 108P serving as one of the source and drain electrodes may increase. Similarly, when the thickness T108Q of the region 108Q is thin, the resistance of the region 108Q serving as the other of the source and drain electrodes may increase. On the other hand, when the thicknesses T108P and T108Q are thick, the thickness of the region 108C also increases, and oxygen vacancies (V O By setting the thickness T108P and the thickness T108Q within the above range, a transistor having good electrical characteristics can be realized while reducing the resistance of the source electrode and the drain electrode.

[0151] The sheet resistance (also known as surface resistivity or area resistivity) of both region 108P and region 108Q is preferably 1000 Ω / □ (also denoted as Ω / sq) or less, more preferably 500 Ω / □ or less, more preferably 300 Ω / □ or less, more preferably 200 Ω / □ or less, and still more preferably 100 Ω / □ or less. Note that the resistance of regions 108P and 108Q is preferably low, so there is no limit to the lower limit of the sheet resistance. The sheet resistance of region 108P and region 108Q may be the same or different.

[0152] As described above, the insulating layer 110 b in contact with the region 108P and the insulating layer 109 in contact with the region 108Q are preferably made of a material that releases impurities. Any one or more of the aforementioned oxides, oxynitrides, nitrides, and oxynitrides can be used for both the insulating layer 110 b and the insulating layer 109. Both the insulating layer 110 b and the insulating layer 109 preferably contain nitrogen, and any one or more of the aforementioned nitrides and oxynitrides are also preferably used. Specifically, silicon nitride or silicon oxynitride can be suitably used for both the insulating layer 110 b and the insulating layer 109. The insulating layer 110 b and the insulating layer 109 can be made of the same material or different materials.

[0153] The amount of impurities released from the insulating layer 110b can be adjusted by the thickness of the insulating layer 110b. Specifically, when the thickness of the insulating layer 110b is increased, the amount of impurities released from the insulating layer 110b increases, thereby reducing the resistivity of the region 108P. Similarly, the amount of impurities released from the insulating layer 109 can be adjusted by the thickness of the insulating layer 109. Figure 3B As shown, the thickness T110b of the insulating layer 110b can be the shortest distance between the formed surface of the insulating layer 110b (here, the top surface of the insulating layer 110a) and the bottom surface of the layer 108 when viewed in cross section. The thickness T109 of the insulating layer 109 can be the shortest distance between the formed surface of the insulating layer 109 (here, the top surface of the substrate 102) and the bottom surface of the layer 108 when viewed in cross section. The thickness T110b of the insulating layer 110b and the thickness T109 of the insulating layer 109 are preferably, for example, not less than 10 nm and not more than 500 nm, more preferably not less than 20 nm and not more than 400 nm, more preferably not less than 50 nm and not more than 300 nm, more preferably not less than 70 nm and not more than 200 nm, more preferably not less than 70 nm and not more than 150 nm, and more preferably not less than 70 nm and not more than 120 nm. Note that the thickness T110b and the thickness T109 may be the same or different.

[0154] Here, impurities released from the insulating layer 110b may diffuse into the region 108C via the region 108P. Similarly, impurities released from the insulating layer 109 may diffuse into the region 108C via the region 108Q. However, the region 108C is supplied with oxygen from the insulating layer 110a, which reduces oxygen vacancies (V O ), so even if the impurities diffuse into the region 108C, the V O H increases. In addition, even if oxygen vacancies (V O ) and V O H, oxygen vacancies (V O ) and V O H, thus suppressing the oxygen vacancies (VO ) and V O H increases. Consequently, at least region 108C of layer 108 in contact with insulating layer 110a is used as a channel formation region, enabling realization of a transistor exhibiting excellent electrical characteristics and high reliability. Note that the diffusion coefficient of oxygen in layer 108 is smaller than that of hydrogen. Therefore, an increase in resistance in regions 108P and 108Q due to oxygen released from insulating layer 110a is less likely. Consequently, regions 108P and 108Q can maintain low resistance.

[0155] However, when the thickness T110b and the thickness T109 are large and the amount of impurities diffused from the insulating layer 110b through the region 108P to the region 108C and the amount of impurities diffused from the insulating layer 109 through the region 108Q to the region 108C are excessive, oxygen vacancies (V O ) and V O The amount of H is likely to be greater than the oxygen vacancies (V O ) and V O On the other hand, when the thickness T110b is thin, the amount of impurities diffused into the region 108P decreases, and the resistance of the region 108P may increase. Similarly, when the thickness T109 is thin, the amount of impurities diffused into the region 108Q decreases, and the resistance of the region 108Q may increase. By setting the thickness T110b and the thickness T109 within the above range, it is possible to suppress oxygen vacancies (V O ) and V O The increase in H also reduces the resistance of the regions 108P and 108Q.

[0156] The impurity element concentration of the insulating layer 110b and the insulating layer 109 is preferably 1×10 21 atoms / cm 3 Above and 1×10 23 atoms / cm 3 Below, more preferably 1×10 21 atoms / cm 3 Above and 5×10 22 atoms / cm 3 Below, more preferably 5×10 21 atoms / cm 3 Above and 5×10 22 atoms / cm 3 More specifically, the hydrogen concentration of the insulating layer 110b and the insulating layer 109 is preferably 1×10 21 atoms / cm 3 Above and 1×10 23 atoms / cm 3Below, more preferably 1×10 21 atoms / cm 3 Above and 5×10 22 atoms / cm 3 Below, more preferably 5×10 21 atoms / cm 3 Above and 5×10 22 atoms / cm 3 the following.

[0157] Note that the impurity element concentration may vary along the thickness direction of the layer (or have a concentration gradient). When analyzing the impurity element concentration along the thickness direction of the layer, the maximum concentration in the layer is preferably within the above range.

[0158] When the impurity element concentrations of the insulating layer 110b and the insulating layer 109 are high, the amount of impurities diffused from the insulating layer 110b through the region 108P to the region 108C and the amount of impurities diffused from the insulating layer 109 through the region 108Q to the region 108C may be excessive. By setting the impurity element concentrations of the insulating layer 110b and the insulating layer 109 within the above ranges, the resistance of the region 108P and the region 108Q can be reduced while suppressing the generation of oxygen vacancies (V O ) and V O H increases.

[0159] It is preferable that both the insulating layer 110b and the insulating layer 109 are not easily permeable to oxygen. When the insulating layer 110a is sandwiched between the insulating layer 110b and the insulating layer 109, diffusion of oxygen in the insulating layer 110a to the insulating layer 110b side and the insulating layer 109 side is suppressed, so that the amount of oxygen supplied from the insulating layer 110a to the region 108C increases, thereby reducing oxygen vacancies (V O ) and V O H. For example, silicon nitride or silicon nitride oxide can be appropriately used for both the insulating layer 110 b and the insulating layer 109 .

[0160] Here, the insulating layer 110 has a two-layer structure of the insulating layer 110a and the insulating layer 110b, but one embodiment of the present invention is not limited to this. The insulating layer 110 may also have a structure without the insulating layer 110a. The insulating layer 110 preferably includes at least the insulating layer 110a. Alternatively, the insulating layer 110 may have a stacked structure of three or more layers.

[0161] Region 108C serving as a channel formation region of transistor 100 partially overlaps conductive layer 104 serving as a gate electrode via insulating layer 106 serving as a gate insulating layer. Conductive layer 104 is provided to cover side surfaces of insulating layer 110 in the region overlapping with layer 108.

[0162] Note that in Figure 1A In the drawings, the shape of the end portion of the insulating layer 110 is represented by a straight line when viewed from above (also called a plan view), but there is no particular limitation on the shape. For example, the shape of the end portion of the insulating layer 110 when viewed from above may have a curve or an angle. In addition, when the shape of the end portion of the insulating layer 110 has a curve, the layer 108 may be provided at the curved portion, and when the shape of the end portion of the insulating layer 110 has an angle, the layer 108 may be provided at the angle portion. Note that in Figure 1A The top surface of the iso-intermediate layer 108 is rectangular, but there is no particular limitation on the top surface shape.

[0163] An insulating layer 195 is provided to cover transistor 100 and transistor 100a. Insulating layer 195 serves as a protective layer for transistor 100 and transistor 100a. Insulating layer 195 is preferably made of a material that does not readily diffuse impurities. Providing insulating layer 195 effectively suppresses the diffusion of impurities from the outside into transistor 100, thereby improving the reliability of semiconductor device 10. Examples of impurities include water and hydrogen. For example, insulating layer 195 may include one or both of an inorganic insulating layer and an organic insulating layer. Insulating layer 195 may also have a stacked structure of an inorganic insulating layer and an organic insulating layer.

[0164] Examples of materials that can be used for the inorganic insulating film included in the insulating layer 195 include oxides, nitrides, oxynitrides, and oxynitrides. Specific examples of materials that can be used for the inorganic insulating film have been given in the description of the insulating layer 110 and the insulating layer 109. More specifically, the insulating layer 195 can use one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. For example, one or more of an acrylic resin and a polyimide resin can be used for the insulating layer 195 as an organic material.

[0165] Insulating layer 195 and insulating layer 106 include opening 187A that reaches region 108P and opening 187B that reaches region 108Q. Conductive layer 182A is provided so as to cover opening 187A, and in opening 187A, conductive layer 182A is in contact with region 108P. In other words, conductive layer 182A is electrically connected to one of the source and drain electrodes of transistor 100. Conductive layer 182B is provided so as to cover opening 187B, and in opening 187B, conductive layer 182B is in contact with region 108Q. In other words, conductive layer 182B is electrically connected to the other of the source and drain electrodes of transistor 100. Both conductive layer 182A and conductive layer 182B function as wiring.

[0166] Conductive layers 182A and 182B serving as wiring are provided over insulating layer 195 and are in contact with regions 108P and 108Q serving as the source and drain electrodes of transistor 100 through openings 187A and 187B provided in insulating layer 195 and insulating layer 106. Furthermore, conductive layers 182A and 182B are provided in a layer different from conductive layer 104. This allows wiring to be arranged in each layer, improving layout flexibility and reducing the circuit footprint. Note that conductive layers 182A and 182B can also be formed in the same layer as conductive layer 104. For example, openings reaching region 108P and region 108Q are provided in insulating layer 106, and then films that will become conductive layer 104, conductive layer 182A, and conductive layer 182B are formed and processed, thereby forming conductive layer 104, conductive layer 182A, and conductive layer 182B. As a result, the manufacturing process of the semiconductor device can be simplified to reduce the manufacturing cost and improve the yield of the semiconductor device.

[0167] There is no limitation on the top surface shape of openings 187A and 187B. For example, they may be circular, elliptical, triangular, quadrilateral (including rectangle, rhombus, and square), pentagonal, or polygonal with rounded corners. The polygons may also be concave (with at least one interior angle exceeding 180 degrees) or convex (with all interior angles less than 180 degrees).

[0168] Reference Figures 4A to 5B The channel length and channel width of the transistor 100 will be described. Figure 4A It is a top view. Figure 4B yes Figure 1B Magnified image of . Figure 5A yes Figure 2A The enlarged image of Figure 5B yes Figure 2B Note that Figure 5A In the embodiment, the insulating layer 195 is omitted.

[0169] exist Figure 4B and Figure 5BThe double-headed arrow in the figure indicates the channel length L100 of the transistor 100. The channel length L100 of the transistor 100 is equivalent to the length of the side surface of the insulating layer 110a in the area in contact with the layer 108 when viewed from a cross section. That is, the channel length L100 is determined by the thickness T110a of the insulating layer 110a and the angle θ110 formed by the side surface of the insulating layer 110a and the formed surface of the insulating layer 110a (here, the top surface of the insulating layer 109). Therefore, for example, the channel length L100 can be set to a value smaller than the limiting resolution of the exposure device, so that a miniature-sized transistor can be realized. Specifically, a transistor with an extremely short channel length that cannot be achieved by the exposure device used in the mass production of existing flat-panel displays (for example, a minimum line width of about 2μm or 1.5μm) can be realized. In addition, a transistor with a channel length shorter than 10nm can be realized without using the very expensive exposure device used in the most advanced LSI technology.

[0170] The channel length L100 may be, for example, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, or 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 may be set to 100 nm or more and 1 μm or less.

[0171] By shortening the channel length L100, the on-state current of transistor 100 can be increased. By using transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small semiconductor device can be realized. For example, when a semiconductor device according to one embodiment of the present invention is used in a large display device or a high-definition display device, the signal delay of each wiring can be reduced when the number of wirings increases, thereby suppressing display unevenness. In addition, since the area occupied by the circuit can be reduced, the frame of the display device can be reduced.

[0172] By adjusting the thickness T110a and angle θ110 of the insulating layer 110a, the channel length L100 can be controlled. Figure 4B In FIG. 1 , a thickness T110 a of the insulating layer 110 a is indicated by a double-ended arrow.

[0173] The thickness T110a of the insulating layer 110a can be appropriately set in consideration of the desired channel length L100. For example, the thickness T110a of the insulating layer 110a can be 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, or 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.

[0174] Angle θ110 is preferably 90 degrees or less, more preferably less than 90 degrees. By reducing angle θ110, the coverage of layers (e.g., layer 108) formed on insulating layer 110a can be improved. In addition, the smaller the angle θ110, the longer the channel length L100 can be, and the larger the angle θ110, the shorter the channel length L100 can be.

[0175] The angle θ110 may be, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, or 70 degrees or more and 90 degrees or less, 85 degrees or less, or 80 degrees or less. The angle θ110 may also be 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less.

[0176] Note that in Figure 1B In the embodiment shown in FIG. 1 , the side surface of the insulating layer 110a is a straight line when viewed in cross section, but one embodiment of the present invention is not limited thereto. When viewed in cross section, the side surface of the insulating layer 110a may be curved, or may have both straight and curved side surface regions.

[0177] The channel width of the transistor 100 is the width of the region where the layer 108 and the conductive layer 104 overlap in a direction perpendicular to the channel length direction. Figure 4A 、 Figure 5A and Figure 5B In FIG. 1 , the channel width W100 of the transistor 100 is indicated by a solid double arrow.

[0178] Note that the channel width W100 may vary in the depth direction. For example, the average of the widths of the insulating layer 110a at its highest point, lowest point, and midway between them, when viewed in a cross section, may be used as the channel width W100. Alternatively, any one of the widths of the insulating layer 110a at its highest point, lowest point, and midway between them, when viewed in a cross section, may be used as the channel width W100.

[0179] When forming the layer 108 and the conductive layer 104 by photolithography, the channel width W100 is equal to or greater than the limiting resolution of the exposure apparatus. For example, the channel width W100 may be 200 nm or greater, 300 nm or greater, 400 nm or greater, or 500 nm or greater, and less than 5 μm, or 4.5 μm or less, 4 μm or less, 3.5 μm or less, 3 μm or less, 2.5 μm or less, 2 μm or less, 1.5 μm or less, or 1 μm or less.

[0180] Note that when the channel length L100 of the transistor 100 is shortened, the amount of hydrogen released from the insulating layer 110b and the amount of hydrogen released from the insulating layer 109 are preferably reduced. Specifically, the thickness T110b of the insulating layer 110b and the thickness T109 of the insulating layer 109 are preferably thin. For example, when the channel length L100 is 100 nm or less, the thickness T110b and the thickness T109 are preferably 1 nm or more and 50 nm or less, more preferably 3 nm or more and 40 nm or less, more preferably 3 nm or more and 30 nm or less, more preferably 3 nm or more and 20 nm or less, more preferably 3 nm or more and 10 nm or less, and more preferably 5 nm or more and 10 nm or less. This can reduce the amount of hydrogen diffused into the region 108C, and can realize a transistor that exhibits good electrical characteristics and high reliability even when the channel length L100 is short.

[0181] Note that in Figure 1B In the embodiment, the angle θ110 of the insulating layer 110a is less than 90 degrees, but one embodiment of the present invention is not limited thereto. Figure 6 As shown, the angle θ110 may be 90 degrees or approximately 90 degrees. This can shorten the channel length L100 of the transistor 100. In addition, the area occupied by the semiconductor device can be reduced.

[0182] Transistor 100 is a so-called top-gate transistor that includes a gate electrode above region 108C serving as a channel formation region. Furthermore, in transistor 100, the source electrode and drain electrode have different heights relative to the surface of substrate 102, where they are formed. This allows drain current to flow in a direction perpendicular to or approximately perpendicular to the surface of substrate 102. Alternatively, it can be said that in transistor 100, drain current can flow in a vertical direction or a substantially vertical direction. Therefore, the transistor of one embodiment of the present invention can be described as a vertical channel transistor or a VFET (Vertical Field Effect Transistor).

[0183] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 (specifically, the insulating layer 110a). Therefore, a transistor having a channel length shorter than the limiting resolution of the exposure device used to manufacture the transistor can be manufactured with high precision. In addition, the characteristic non-uniformity between the multiple transistors 100 can be reduced. Therefore, the operation of the semiconductor device including the transistor 100 is stable and the reliability can be improved. In addition, when the characteristic non-uniformity is reduced, the circuit design freedom is improved, and the operating voltage of the semiconductor device can also be reduced. As a result, the power consumption of the semiconductor device can be reduced.

[0184] In the transistor according to one embodiment of the present invention, since the layer 108 includes a channel formation region, a region serving as a source electrode, and a region serving as a drain electrode, there is no need to provide a source electrode and a drain electrode separately from the layer 108. This reduces the area occupied by the semiconductor device. Furthermore, since the source and drain electrodes are arranged at different heights and the channel formation region is provided in a region in contact with the side surface of the insulating layer 110 a, the area occupied can be significantly reduced compared to a so-called planar transistor in which a layer having a channel formation region, a source electrode, and a drain electrode are arranged in a planar shape.

[0185] For example, when a semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, thereby realizing a high-definition display device. Furthermore, when a semiconductor device according to one embodiment of the present invention is used in a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, thereby realizing a display device with a narrow frame.

[0186] [Layer 108]

[0187] The metal oxides that can be used for layer 108 are described in detail. Examples of the metal oxides include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium or zinc. Furthermore, the metal oxide preferably contains two or three selected from indium, element M, and zinc. Element M is a metal element or semimetal element with a high bond energy with oxygen, for example, a metal element or semimetal element with a higher bond energy with oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably any one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably one or more selected from gallium and tin. Note that in this specification, etc., metal elements and semimetal elements are sometimes collectively referred to as "metal elements," and the "metal elements" described in this specification, etc. sometimes include semimetal elements.

[0188] The layer 108 may be made of, for example, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide, also referred to as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, also referred to as IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), Indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also referred to as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO, IGZAO, or IAGZO), etc. Alternatively, indium tin oxide (also referred to as ITSO), gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc. containing silicon may be used.

[0189] Increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements in a metal oxide can improve the field-effect mobility of a transistor and also realize a transistor with a large on-state current.

[0190] Note that the metal oxide may also replace indium or contain, in addition to indium, one or more metal elements with a large period number in the periodic table. There is a tendency that the greater the orbital overlap of the metal elements, the greater the carrier conduction in the metal oxide. Therefore, by including a metal element with a large period number, the field effect mobility of the transistor can sometimes be improved. As metal elements with a large period number, metal elements belonging to the 5th period and metal elements belonging to the 6th period can be cited. As such metal elements, specifically, yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium can be cited. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium are called light rare earth elements.

[0191] Metal oxides may also contain one or more non-metallic elements. When a metal oxide contains non-metallic elements, the carrier concentration may increase or the band gap may narrow, thereby improving the field-effect mobility of the transistor. Examples of non-metallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0192] Increasing the ratio of zinc atoms to the total number of metal atoms in a metal oxide increases the crystallinity of the metal oxide, suppressing the diffusion of impurities within the metal oxide. This reduces fluctuations in transistor electrical characteristics and improves reliability.

[0193] When the ratio of the number of atoms of the element M to the total number of atoms of all metal elements in the metal oxide is increased, the formation of oxygen vacancies (V O ). Therefore, it is caused by oxygen vacancies (V O ) is suppressed, making it possible to form a transistor with a low off-state current. In addition, the variation in the electrical characteristics of the transistor is suppressed, thereby improving reliability.

[0194] The electrical characteristics and reliability of the transistor vary depending on the composition of the metal oxide used for the layer 108. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required of the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be achieved.

[0195] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of the element M. Examples of the atomic ratio of the metal elements in such an In-M-Zn oxide include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=10:1:1, In:M:Zn=10:1:3, In:M:Zn=10:1:4, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10, and compositions near these. Furthermore, the near-range compositions fall within a range of ±30% of the desired atomic ratio. Increasing the atomic ratio of indium in the metal oxide can improve the on-state current and field-effect mobility of the transistor.

[0196] The atomic ratio of In in the In-M-Zn oxide may be smaller than the atomic ratio of the element M. Examples of the atomic ratio of the metal elements in such an In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, and compositions close thereto. By increasing the atomic ratio of M in the metal oxide, oxygen vacancies (V O ) is generated.

[0197] Note that when a plurality of metal elements are included as the element M, the total ratio of the number of atoms of the metal elements may be the ratio of the number of atoms of the element M.

[0198] In this specification, etc., the ratio of the number of indium atoms to the total number of atoms of all metal elements contained may be described as the indium content. The same applies to other metal elements.

[0199] By using a material with a high indium content for the layer 108, the on-state current and field-effect mobility of the transistor can be improved. In addition, by including the element M, the generation of oxygen vacancies (V O ). The content of element M (the ratio of the number of atoms of element M to the sum of the number of atoms of all metal elements contained) is preferably not less than 0.1% and not more than 3% or not more than 2%. Thus, a transistor with good electrical characteristics can be realized. For example, it is preferred to use metal oxides of In:M:Zn=40:1:10 and the like. The element M is preferably any one or more of the above-mentioned elements, more preferably one or more selected from aluminum, gallium, tin and yttrium. Specifically, metal oxides of In:Sn:Zn=40:1:10 and the like can be appropriately used. Alternatively, metal oxides of In:Al:Zn=40:1:10 and the like can be appropriately used.

[0200] Here, by using a metal oxide with a polycrystalline structure for layer 108, the grain boundaries become recombination centers and capture carriers, so that the on-state current of the transistor sometimes becomes smaller. When using a metal oxide with a composition that easily forms a polycrystalline structure, it is preferable to contain an element that hinders crystallization. For example, compared with indium tin oxide (ITO), indium tin oxide (ITSO) containing silicon is not easy to form a polycrystalline structure, so it can be appropriately used for layer 108. When using ITSO, the silicon content (the ratio of the number of silicon atoms to the sum of the number of atoms of all metal elements contained) is preferably greater than 1%, greater than 3%, or greater than 5% and less than 20% or less than 15%. Specifically, metal oxides of In:Sn:Si=45:5:4, In:Sn:Si=95:5:8 and their vicinities can be appropriately used.

[0201] In analyzing the composition of layer 108, for example, energy dispersive X-ray spectroscopy (EDX), X-ray photoelectron spectroscopy (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES) can be used. Alternatively, a combination of multiple of the above methods can be used for analysis. Note that elements with low contents may sometimes be affected by the accuracy of the analysis, and the actual contents may differ from the contents obtained by analysis. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content, difficult to quantify, or below the detection limit.

[0202] The metal oxide can be formed using sputtering or atomic layer deposition (ALD) as appropriate. Note that when forming the metal oxide using sputtering, the composition of the formed metal oxide may differ from that of the sputtering target. In particular, the zinc content of the formed metal oxide may be reduced to approximately 50% of that of the sputtering target.

[0203] Layer 108 may also have a stacked structure comprising two or more metal oxide layers. The two or more metal oxide layers included in layer 108 may also have the same or substantially the same composition. By employing a stacked structure comprising metal oxide layers of the same composition, for example, the same sputtering target can be used for formation, thereby reducing manufacturing costs.

[0204] The two or more metal oxide layers included in layer 108 may also have different compositions. For example, a stacked structure may suitably include a first metal oxide layer having an atomic ratio of In:M:Zn = 1:3:4 or a composition thereof, and a second metal oxide layer having an atomic ratio of In:M:Zn = 1:1:1 or a composition thereof disposed on the first metal oxide layer. Gallium, aluminum, or tin is particularly preferred as the element M. The element M in the first and second metal oxide layers may be the same or different. For example, the first and second metal oxide layers may be IGZO layers having different compositions.

[0205] For example, a stacked structure of a first metal oxide layer having a composition of In:Zn=4:1 [atomic ratio] or thereabouts and a second metal oxide layer having a composition of In:M:Zn=1:1:1 [atomic ratio] or thereabouts provided on the first metal oxide layer can be appropriately used.

[0206] For example, a stacked-layer structure selected from any one of indium oxide, indium gallium oxide, and IGZO, and any one of IAZO, IAGZO, and ITZO (registered trademark) may be used.

[0207] Note that when there is a stacked structure having a first metal oxide layer containing a first metal oxide and a second metal oxide layer containing a second metal oxide, and the composition of the first metal oxide is the same as or approximately the same as the composition of the second metal oxide, the boundary (interface) between the first metal oxide layer and the second metal oxide layer may not be clearly confirmed.

[0208] A crystalline metal oxide is preferably used for layer 108. Examples of crystalline metal oxide structures include a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, and a nanocrystalline (nc) structure. Using a crystalline metal oxide for layer 108 can reduce the defect state density in layer 108, thereby achieving a highly reliable semiconductor device.

[0209] Layer 108 preferably uses CAAC-OS or nc-OS.

[0210] CAAC-OS has a plurality of layered crystals. The c-axis of the crystal is oriented in the normal direction of the formed surface. Layer 108 preferably has layered crystals parallel or approximately parallel to the formed surface. For example, it is preferred that layer 108 has layered crystals parallel or approximately parallel to the top surface in the region in contact with the top surface of the insulating layer 110, and has layered crystals parallel or approximately parallel to the side surface in the region in contact with the side surface of the insulating layer 110. In particular, layer 108 preferably has layered crystals parallel or approximately parallel to the side surface of the insulating layer 110a. By adopting this structure, the layered crystals of layer 108b are approximately parallel to the channel length direction of the transistor 100, so a transistor with a large on-state current can be realized.

[0211] Using a highly crystalline metal oxide in the channel formation region can reduce the defect state density in the channel formation region. On the other hand, using a low-crystalline metal oxide can realize a transistor capable of passing a large current.

[0212] The higher the substrate temperature during sputtering, the more crystalline the metal oxide can be. The substrate temperature during formation can be adjusted, for example, based on the temperature of the stage on which the substrate is placed during formation. Furthermore, the higher the flow rate ratio of the oxygen gas relative to the total deposition gas used during formation (hereinafter also referred to as the oxygen flow rate ratio), or the higher the oxygen partial pressure within the processing chamber of the deposition apparatus, the more crystalline the metal oxide can be formed.

[0213] The crystallinity of the layer 108 can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED), or a combination of a plurality of these methods.

[0214] When a metal oxide is used as the layer 108, it is preferable to minimize the V in the region 108C serving as the channel formation region. O H to make it high purity intrinsic or substantially high purity intrinsic. In order to obtain this V O The metal oxide with sufficiently reduced H is mainly: removing impurities such as water and hydrogen from the metal oxide (sometimes described as dehydration or dehydrogenation treatment); and supplying oxygen to the metal oxide to repair oxygen vacancies (V O ). By setting V O Metal oxides with sufficiently reduced impurities such as H are used in the channel formation region of transistors to provide stable electrical characteristics. Note that oxygen is sometimes supplied to the metal oxide to repair oxygen vacancies (V O ) is recorded as oxidation treatment.

[0215] When a metal oxide is used as the layer 108, the carrier concentration of the metal oxide in the region 108C serving as the channel formation region is preferably 1×10 18 cm -3 less than 1×10 17 cm -3 , more preferably less than 1×10 16 cm -3 , more preferably less than 1×10 13 cm -3 , more preferably less than 1×10 12 cm -3 Note that there is no limit on the lower limit of the carrier concentration in the region 108C, and it can be, for example, 1×10 -9 cm -3 .

[0216] OS transistors have little change in electrical characteristics due to exposure to radiation, that is, they have high tolerance to radiation, so they can be appropriately used in environments where radiation may be incident. It can also be said that OS transistors have high reliability against radiation. For example, OS transistors can be appropriately used in pixel circuits of flat-panel detectors for X-rays. In addition, OS transistors can be appropriately used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton radiation, and neutron radiation).

[0217] Layer 108 may also include a layered material that functions as a semiconductor. Layered materials are a general term for a group of materials having a layered crystalline structure. A layered crystalline structure is a structure in which layers formed by covalent or ionic bonds are stacked together through bonds weaker than covalent or ionic bonds, such as van der Waals bonds. Layered materials have high electrical conductivity per layer, that is, high two-dimensional conductivity. By using a material that functions as a semiconductor and has high two-dimensional conductivity in the channel formation region, a transistor with a large on-state current can be provided.

[0218] As the above-mentioned layered substances, for example, graphene, silicene, chalcogenides, etc. can be cited. Chalcogenides are compounds containing oxygen group elements (elements belonging to Group 16). In addition, as chalcogenides, transition metal chalcogenides, Group 13 chalcogenides, etc. can be cited. As transition metal chalcogenides that can be used as the channel formation region of the transistor, specifically molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), etc. can be cited.

[0219] [Conductive layer 104]

[0220] Conductive layer 104 may have a single-layer structure or a stacked structure of two or more layers. Examples of materials that can be used for conductive layer 104 include one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, ruthenium, and niobium, as well as alloys containing one or more of the foregoing metals. Low-resistance conductive materials containing one or more of copper, silver, gold, and aluminum can be suitably used for conductive layer 104. Among these, copper and aluminum are particularly preferred due to their advantages in mass production.

[0221] The conductive layer 104 can use one or more of a conductive metal oxide (oxide conductor) and a metal nitride (nitride conductor). Examples of oxide conductors (OC) include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also known as ITSO), zinc oxide doped with gallium, and In-Ga-Zn oxide. In particular, an oxide conductor containing indium is preferably used because of its high conductivity. Examples of nitride conductors include tantalum nitride, titanium nitride, tungsten nitride, ruthenium nitride, nitrides containing titanium and aluminum, and nitrides containing tantalum and aluminum.

[0222] The conductive layer 104 may have a stacked structure. For example, the conductive layer 104 may have a stacked structure of a conductive film containing the aforementioned oxide conductor (metal oxide) and a conductive film containing a metal or alloy. The use of a conductive film containing a metal or alloy can reduce wiring resistance.

[0223] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can also be used as the conductive layer 104. The use of a Cu-X alloy film allows processing by wet etching, thereby reducing manufacturing costs.

[0224] The conductive layer 182A and the conductive layer 182B can use a material that can be used for the conductive layer 104. The conductive layer 182A and the conductive layer 182B may use the same material as that of the conductive layer 104 or a material different from that of the conductive layer 104.

[0225] [Insulation layer 106]

[0226] The insulating layer 106 can have a single-layer structure or a stacked-layer structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating films include oxides, nitrides, oxynitrides, and oxynitrides. The insulating layer 106 can use the same material that can be used for the insulating layer 110.

[0227] The insulating layer 106 has a region in contact with the layer 108, the insulating layer 109, and the insulating layer 110. When a metal oxide is used for the layer 108, at least the portion of the film constituting the insulating layer 106 that is in contact with the layer 108 is preferably made of any of the aforementioned oxides and oxynitrides. Furthermore, the insulating layer 106 is preferably made of a film that releases oxygen upon heating. Specifically, when the insulating layer 106 has a single-layer structure, silicon oxide, silicon oxynitride, or aluminum oxide is preferably used for the insulating layer 106.

[0228] The insulating layer 106 preferably has a stacked-layer structure. Figure 1B , etc. show a structure in which the insulating layer 106 has a stacked-layer structure of an insulating layer 106 a and an insulating layer 106 b over the insulating layer 106 a .

[0229] When the insulating layer 106 has a stacked-layer structure, the insulating layer in contact with the layer 108 (here, the insulating layer 106a) preferably includes oxide or oxynitride. For example, one or more of silicon oxide, silicon oxynitride, and aluminum oxide can be appropriately used for the insulating layer 106a.

[0230] Furthermore, it is preferable that a layer that is not easily permeable to oxygen be used for one or more of the layers constituting the insulating layer 106. By providing a layer that functions as a barrier film to suppress the diffusion of oxygen, it is possible to suppress the diffusion of oxygen in the insulating layer 110a toward the insulating layer 106 through the region of the insulating layer 110a that is in contact with the insulating layer 106. As a result, the amount of oxygen supplied from the insulating layer 110a to the region 108C increases, and oxygen vacancies (V O ) and V O H. Furthermore, diffusion of oxygen in the insulating layer 110a and the oxygen in the layer 108 through the insulating layer 106 into the conductive layer 104 can be suppressed, thereby suppressing oxidation of the conductive layer 104. Consequently, a transistor exhibiting excellent electrical characteristics and high reliability can be realized. It is preferred that one or more of the above-mentioned nitrides and oxynitrides be used for the layer serving as the oxygen barrier film. Alternatively, one or more of oxides and oxynitrides may be used for this layer; for example, aluminum oxide can be suitably used.

[0231] Note that in this specification, a barrier film refers to a film having barrier properties. Barrier properties refer to either or both the ability to inhibit the diffusion of a target substance (also referred to as low permeability) and the ability to capture or immobilize (also known as gettering) the target substance. For example, an insulating layer having barrier properties may be referred to as a barrier insulating layer.

[0232] When the insulating layer 106 has a stacked-layer structure, for example, silicon oxynitride may be used for the insulating layer 106a and silicon nitride may be used for the insulating layer 106b. Alternatively, silicon oxynitride may be used for the insulating layer 106a and aluminum oxide may be used for the insulating layer 106b. Alternatively, aluminum oxide may be used for the insulating layer 106a and silicon oxynitride may be used for the insulating layer 106b. Alternatively, aluminum oxide may be used for the insulating layer 106a and silicon nitride may be used for the insulating layer 106b.

[0233] Note that in micro transistors, when the thickness of the gate insulating layer is small, leakage current sometimes increases. By using a material with a high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve a low voltage when the transistor is operating while maintaining the physical thickness. Examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0234] [Substrate 102]

[0235] While the material of the substrate 102 is not particularly limited, it must at least have heat resistance sufficient to withstand subsequent heat treatment. For example, the substrate 102 may be a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate. Furthermore, a semiconductor element may be provided on the substrate 102. Note that the semiconductor substrate and the insulating substrate may have a circular or angular shape.

[0236] A flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100 and the like. Providing a release layer allows a portion or all of the semiconductor device to be fabricated on the release layer, then separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like may also be transferred to a substrate with low heat resistance or a flexible substrate.

[0237] The following describes a structural example in which a portion of the structure differs from that of the structural example 1-1. Note that the following description of portions overlapping with those of the structural example 1-1 may be omitted. Furthermore, in the following figures, portions having the same functions as those of the structural example 1-1 are hatched with the same hatching, and may not be assigned a reference numeral.

[0238] [Structure Examples 1-2]

[0239] Figure 7A 1 is a cross-sectional view of a semiconductor device 10A according to one embodiment of the present invention. Figure 1A . Figure 7A It is along Figure 1A The cross-sectional view is a cross-sectional view taken along the dashed line A1-A2.

[0240] The semiconductor device 10 includes a transistor 100A, an insulating layer 109, and an insulating layer 110. Figure 1BThe semiconductor device 10 shown in FIG. 1 is mainly different in that the thickness of the insulating layer 109 in the region in contact with the bottom surface of the layer 108 is different from the thickness in the region not in contact with the layer 108 .

[0241] For the transistor 100A, reference can be made to the description of the transistor 100 .

[0242] like Figure 7A As shown in FIG. 1 and FIG. 2 , the thickness of the insulating layer 109 in a region in contact with the bottom surface of the layer 108 is preferably thinner than the thickness of a region not in contact with the layer 108 .

[0243] Figure 7B Show Figure 7A Magnified image of . Figure 7B 104 is shown as the height H104 from the formed surface of the insulating layer 109 (here, the top surface of the substrate 102) to the lowest position of the bottom surface of the conductive layer 104. In addition, the height H109 is shown as the height H109 from the formed surface of the insulating layer 109 (here, the top surface of the substrate 102) to the highest position of the region where the insulating layer 109 contacts the insulating layer 110a. Figure 7B As shown, a height H104 from the lowest position of the bottom surface of the conductive layer 104 is equal to or lower than a height H109 from the highest position of the region where the insulating layer 109 contacts the insulating layer 110 a .

[0244] By making the height H104 from the lowest point of the bottom surface of the conductive layer 104 equal to or lower than the height H109 from the highest point of the region where the insulating layer 109 contacts the insulating layer 110 a, the electric field at the gate electrode in the channel formation region near the insulating layer 109 can be enhanced, thereby increasing the on-state current of the transistor 100A. Furthermore, the electric field applied to the gate electrode in the channel formation region can be made more uniform.

[0245] Here, if the electric field applied to the gate electrode in the channel formation region is non-uniform, the electrical characteristics when region 108P is used as the source electrode and region 108Q is used as the drain electrode may differ from the electrical characteristics when region 108P is used as the drain electrode and region 108Q is used as the source electrode. By making the electric field applied to the gate electrode in the channel formation region of transistor 100A more uniform, the electrical characteristics can be made equal. Therefore, transistor 100A can be suitably used in circuit structures with alternating source and drain electrodes.

[0246] Note that the thickness of the insulating layer 109 may be appropriately adjusted so that the height H104 is equal to or lower than the height H109 .

[0247] Note that the structure of the insulating layer 109 described in Structural Example 1-2 can also be applied to other structural examples.

[0248] [Structure Examples 1-3]

[0249] Figure 8 This is a cross-sectional view of a semiconductor device 10B according to one embodiment of the present invention. Figure 1A . Figure 8 It is along Figure 1A The cross-sectional view is a cross-sectional view taken along the dashed line A1-A2.

[0250] The semiconductor device 10B includes a transistor 100B, an insulating layer 109, and an insulating layer 110. Figure 1B The main difference between the semiconductor device 10 shown in FIG. 1 and FIG. 2 is that the insulating layer 110 includes an insulating layer 110 c and an insulating layer 110 d .

[0251] For the transistor 100B, reference can be made to the description of the transistor 100 .

[0252] Figure 9A yes Figure 8 In addition, Figure 9B This is a perspective view of an excerpt showing substrate 102, insulating layer 109, insulating layer 110, and layer 108. Insulating layer 110c is provided between insulating layer 109 and insulating layer 110a. Insulating layer 110d is provided between insulating layer 110b and insulating layer 110a. Layer 108 is in contact with the top surface of insulating layer 109, the side surfaces of insulating layer 110c, the side surfaces of insulating layer 110a, the side surfaces of insulating layer 110d, and the top and side surfaces of insulating layer 110b.

[0253] The amount of impurities (for example, hydrogen and water) released from each of the insulating layers 110c and 110d is preferably small. Specifically, the amount of impurities released from the insulating layer 110c is preferably less than the amount of impurities released from the insulating layer 109. The amount of impurities released from the insulating layer 110d is preferably less than the amount of impurities released from the insulating layer 110b. Furthermore, both the insulating layer 110c and the insulating layer 110d are preferably not easily permeable to impurities. Thus, it is possible to suppress the impurities in the insulating layer 109 from diffusing into the region 108C through the insulating layer 110c and the insulating layer 110a. Similarly, it is possible to suppress the impurities in the insulating layer 110b from diffusing into the region 108C through the insulating layer 110d and the insulating layer 110a. Thus, a transistor having good electrical characteristics and high reliability can be realized.

[0254] It is preferable that both insulating layer 110c and insulating layer 110d are not easily permeable to oxygen. This can suppress the diffusion of oxygen in insulating layer 110a through insulating layer 110c to insulating layer 109 and through insulating layer 110d to insulating layer 110b. In addition, the amount of oxygen supplied from insulating layer 110a to region 108C increases, thereby reducing oxygen vacancies (V O ) and V O H.

[0255] The insulating layer 110c and the insulating layer 110d can use the materials that can be used for the insulating layer 109 and the insulating layer 110, respectively. In particular, the insulating layer 110c and the insulating layer 110d can use the materials that can be used for the insulating layer 109 and the insulating layer 110b, respectively. Preferably, the insulating layer 110c and the insulating layer 110d contain nitrogen and contain any one or more of the above-mentioned nitrides and nitride oxides. For example, silicon nitride or silicon nitride oxide can be used as appropriate for the insulating layer 110c and the insulating layer 110d. Alternatively, any one or more of oxides and oxynitrides can be used as appropriate for the insulating layer 110c and the insulating layer 110d. For example, aluminum oxide can be used as appropriate for the insulating layer 110c and the insulating layer 110d. Note that the insulating layer 110b, the insulating layer 110c, the insulating layer 110d, and the insulating layer 109 can use the same material or different materials.

[0256] The thickness T110c of the insulating layer 110c and the thickness T110d of the insulating layer 110d are preferably, for example, 3 nm or more and 500 nm or less, more preferably 5 nm or more and 300 nm or less, further preferably 10 nm or more and 200 nm or less, further preferably 15 nm or more and 150 nm or less, and further preferably 20 nm or more and 100 nm or less. Figure 9A As shown, thickness T110c can be the shortest distance between the formed surface of insulating layer 110c (here, the top surface of insulating layer 109) and the top surface of insulating layer 110c when viewed in cross section. Thickness T110d can be the shortest distance between the formed surface of insulating layer 110d (here, the top surface of insulating layer 110a) and the top surface of insulating layer 110d when viewed in cross section. Note that thickness T110c and thickness T110d can be the same or different.

[0257] When the thickness T110c of insulating layer 110c is thick, the amount of impurities released from insulating layer 110c itself increases. Similarly, when the thickness T110d of insulating layer 110d is thick, the amount of impurities released from insulating layer 110d itself increases, thereby potentially increasing the amount of impurities that diffuse into region 108C. On the other hand, when the thickness T110c is thin, there is a concern that impurities in insulating layer 109 may diffuse into region 108C via insulating layer 110c and insulating layer 110a. When the thickness T110d is thin, there is a concern that impurities in insulating layer 110b may diffuse into region 108C via insulating layer 110d and insulating layer 110a. Furthermore, there is a concern that oxygen in insulating layer 110a may diffuse into insulating layer 109 via insulating layer 110c, and that oxygen may diffuse into insulating layer 110b via insulating layer 110d. By setting the thickness T110c and the thickness T110d within the above ranges, it is possible to suppress the diffusion of impurities into the region 108C while increasing the amount of oxygen supplied to the region 108C, thereby reducing the oxygen vacancies (V O ) and V O H.

[0258] Note that when shortening the channel length L100 of the transistor 100B, the insulating layers 110c and 110d are preferably made of a material that releases less hydrogen. When using a material that releases hydrogen even in small amounts for the insulating layers 110c and 110d, their thickness is preferably thin. For example, when the channel length L100 is 100 nm or less, the thickness T110c of the insulating layer 110c and the thickness T110d of the insulating layer 110d are preferably 1 nm or more and 50 nm or less, more preferably 3 nm or more and 40 nm or less, more preferably 5 nm or more and 30 nm or less, more preferably 5 nm or more and 20 nm or less, more preferably 5 nm or more and 15 nm or less, and more preferably 5 nm or more and 10 nm or less. This can reduce the amount of hydrogen that diffuses into the region 108C, making it possible to realize a transistor that exhibits good electrical characteristics and high reliability even when the channel length L100 is short.

[0259] The insulating layer 109 preferably includes a region having a higher impurity element concentration than the insulating layer 110c. The insulating layer 110b preferably includes a region having a higher impurity element concentration than the insulating layer 110d. Specifically, the insulating layer 109 preferably includes a region having a higher hydrogen concentration than the insulating layer 110c. The insulating layer 110b preferably includes a region having a higher hydrogen concentration than the insulating layer 110d. The impurity element concentrations of the insulating layers can be analyzed using, for example, secondary ion mass spectrometry (SIMS).

[0260] The impurity element concentration of the insulating layer 110c is preferably lower than that of the insulating layer 109. The impurity element concentration of the insulating layer 110d is preferably lower than that of the insulating layer 110b. Furthermore, the impurity element concentrations of the insulating layers 110c and 110d are preferably lower than 1×10 21 atoms / cm 3 Specifically, the hydrogen concentration of the insulating layer 110c and the insulating layer 110d is preferably less than 1×10 21 atoms / cm 3 Note that the impurity element concentrations of the insulating layers 110c and 110d are preferably low, and therefore there is no lower limit on the impurity element concentrations. Note that the impurity element concentrations of the insulating layers 110c and 110d are preferably both low. For example, the carbon concentrations of the insulating layers 110c and 110d are preferably less than 1×10 21 atoms / cm 3 .

[0261] Even when the insulating layer 109 and the insulating layer 110c are made of the same material, the amount of hydrogen released can be adjusted by making the deposition conditions different. Specifically, any one or more of the deposition power (or deposition power density), deposition pressure, deposition gas type, deposition gas flow ratio, deposition temperature, and distance between the substrate and the electrode during formation can be made different between the insulating layer 109 and the insulating layer 110c. For example, by making the deposition power density of the insulating layer 109 smaller than the deposition power density of the insulating layer 110c, the hydrogen content in the insulating layer 109 can be greater than the hydrogen content in the insulating layer 110c. In this way, the amount of hydrogen released from the insulating layer 109 itself due to heating can be increased. The same is true when the insulating layer 110b and the insulating layer 110d are made of the same material. For example, by making the deposition power density of the insulating layer 110b smaller than the deposition power density of the insulating layer 110d, the hydrogen content in the insulating layer 110b can be greater than the hydrogen content in the insulating layer 110d.

[0262] The hydrogen content in the deposition gas used to form the insulating layer 109 is preferably higher than that in the deposition gas used to form the insulating layer 110c. Specifically, when a silicon nitride film or a silicon nitride oxide film is formed as the insulating layer 109 and the insulating layer 110c using the PECVD method, the ratio of the flow rate of ammonia gas to the total flow rate of the deposition gas used to form the insulating layer 109 (hereinafter also referred to as the ammonia flow ratio) is preferably higher than the ammonia flow ratio of the deposition gas used to form the insulating layer 109. By forming the insulating layer 109 under the condition of a high ammonia flow ratio, the hydrogen content in the insulating layer 109 can be increased. In addition, the amount of hydrogen released from the insulating layer 109 itself due to heating can be increased. Similarly, the hydrogen content of the deposition gas used to form the insulating layer 110b is preferably higher than the hydrogen content of the deposition gas used to form the insulating layer 110d.

[0263] The film density of the insulating layer 110c is preferably higher than the film density of the insulating layer 109. This prevents impurities in the insulating layer 109 from diffusing through the insulating layer 110c and the insulating layer 110a to the region 108c. Furthermore, oxygen in the insulating layer 110a can be prevented from diffusing through the insulating layer 110c to the insulating layer 109 side. Similarly, the film density of the insulating layer 110d is preferably higher than the film density of the insulating layer 110b. This prevents impurities in the insulating layer 110b from diffusing through the insulating layer 110d and the insulating layer 110a to the region 108c. Furthermore, oxygen in the insulating layer 110a can be prevented from diffusing through the insulating layer 110d to the insulating layer 110b side. Note that the film density of the insulating layer 110c may be the same as or different from the film density of the insulating layer 110d.

[0264] The film density can be evaluated, for example, using Rutherford Backscattering Spectrometry (RBS) or X-ray reflectivity (XRR). The difference in film density can sometimes be evaluated by a cross-sectional transmission electron microscope (TEM) image. In TEM observation, the higher the film density, the darker the transmission electron (TE) image, and the lower the film density, the lighter the transmission electron (TE) image. Therefore, in the transmission electron (TE) image, the insulating layer 110c sometimes appears as a darker (darker) image compared to the insulating layer 109, and the insulating layer 110d sometimes appears as a darker (darker) image compared to the insulating layer 110b. Note that even if the insulating layer 109 and the insulating layer 110c use the same material, the film density is different, so these boundaries can sometimes be observed as different contrasts in the cross-sectional TEM image. The same applies to the case where the insulating layer 110b and the insulating layer 110d use the same material.

[0265] The amount of impurities released from the insulating layer 110c is preferably smaller than the amount of impurities released from the insulating layer 109. The amount of impurities released from the insulating layer 110d is preferably smaller than the amount of impurities released from the insulating layer 110b.

[0266] The less impurities released from the insulating layer 110c itself, the better. However, sometimes the resistance of the region of layer 108 in contact with the insulating layer 110c is reduced due to the impurities released from the insulating layer 110c. Similarly, the less impurities released from the insulating layer 110d itself, the better. However, sometimes the resistance of the region of layer 108 in contact with the insulating layer 110d is reduced due to the impurities released from the insulating layer 110d. The above-mentioned region (hereinafter also referred to as the low-resistance region) is a region with lower resistance, higher carrier concentration, and higher oxygen vacancy density than region 108C. Furthermore, the above-mentioned region is a region with higher resistance, lower carrier concentration, and lower oxygen vacancy density than region 108P and region 108Q. The low-resistance region located between region 108C serving as a channel formation region and regions 108P and 108Q serving as source and drain electrodes can be used as a buffer region for mitigating the drain electric field. By providing a low-resistance region, a high electric field is less likely to be generated near the drain electrode, thereby suppressing the generation of hot carriers, thereby suppressing transistor degradation. For example, when region 108Q is used as a drain electrode and region 108P is used as a source electrode, by using the region of layer 108 in contact with insulating layer 110d as the low-resistance region, a high electric field is less likely to be generated near the drain electrode, thereby suppressing the generation of hot carriers, thereby suppressing transistor degradation.

[0267] Furthermore, by using a material that releases little impurities for insulating layer 110c, the resistance, carrier concentration, and oxygen vacancy density of the region of layer 108 in contact with insulating layer 110c may be substantially equal to those of region 108c. In this case, the region of layer 108 in contact with insulating layer 110c can be used as a channel formation region together with region 108c in contact with insulating layer 110a. Similarly, the region of layer 108 in contact with insulating layer 110d can also be used as a channel formation region.

[0268] Note that the structure of the insulating layer 110 shown in Structural Examples 1 to 3 can also be applied to other structural examples.

[0269] [Structure Examples 1-4]

[0270] Figure 10A This is a cross-sectional view of a semiconductor device 10C according to one embodiment of the present invention. Figure 1A . Note that in Figure 1A In the embodiment, the insulating layer 109 is omitted. Figure 10A It is along Figure 1A The cross-sectional view is a cross-sectional view taken along the dashed line A1-A2.

[0271] The semiconductor device 10C includes a transistor 100C, an insulating layer 109, and an insulating layer 110. Figure 1BThe semiconductor device 10 shown in FIG. 1 is mainly different in that the side surface of the insulating layer 109 is in contact with the insulating layer 110 .

[0272] For the transistor 100C, reference can be made to the description of the transistor 100 .

[0273] The end portion of the insulating layer 109 is in contact with the top surface of the substrate 102. The insulating layer 110 is provided to cover the substrate 102 and the insulating layer 109 and has a region in contact with the top surface of the substrate 102 and the top surface and side surfaces of the insulating layer 109.

[0274] The insulating layer 109 preferably has a region in contact with the insulating layer 110. In this manner, the region in contact with the insulating layer 109 can be provided continuously with the region in contact with the insulating layer 110 in the layer 108.

[0275] exist Figure 10A In the embodiment, the insulating layer 110 has a two-layer structure of an insulating layer 110 a and an insulating layer 110 b , but the structure of the insulating layer 110 is not particularly limited. Figure 10B Shown with Figure 10A Examples of structures different from those shown. For example, Figure 10B As shown, an insulating layer 110c may also be provided. Providing the insulating layer 110c between the substrate 102 and the insulating layer 110a can prevent impurities in the substrate 102 from diffusing through the insulating layer 110c and the insulating layer 110a to the region 108C. Furthermore, oxygen in the insulating layer 110a can be prevented from diffusing through the insulating layer 110c to the substrate 102 side.

[0276] Note that the structure of the insulating layer 109 shown in Structural Examples 1 to 4 can be applied to other structural examples.

[0277] [Structure Examples 1-5]

[0278] Figure 11A 1 is a top view of a semiconductor device 10D according to one embodiment of the present invention. Figure 11B It is along Figure 11A The cross-sectional view is a cross-sectional view taken along the dashed line A1-A2.

[0279] The semiconductor device 10D includes a transistor 100D, an insulating layer 109, and an insulating layer 110. Figure 1B The transistor 100 shown in FIG. 1 is different from the transistor 100 in that it includes a conductive layer 103 and an insulating layer 107 .

[0280] The transistor 100C includes a conductive layer 103 and an insulating layer 107 between the insulating layer 109 and the insulating layer 110 .

[0281] Conductive layer 103 is located on insulating layer 109. Insulating layer 107 is provided to cover the top and side surfaces of conductive layer 103. Insulating layer 107 is in contact with the top and side surfaces of conductive layer 103 and the top surface of insulating layer 109. Insulating layer 110 is provided on insulating layer 107.

[0282] In the transistor 100C, the layer 108 has a region that overlaps with the conductive layer 104 via the insulating layer 106 and overlaps with the conductive layer 103 via a portion of the insulating layer 110 (particularly, the insulating layer 110a) and the insulating layer 107. In other words, the layer 108 has a region sandwiched between the conductive layer 104 and the conductive layer 103, with the insulating layer 106 sandwiched between the layer 108 and the conductive layer 104 and a portion of the insulating layer 110 (particularly, the insulating layer 110a) and the insulating layer 107 sandwiched between the layer 108 and the conductive layer 103.

[0283] The conductive layer 103 serves as a back gate electrode (also called a second gate electrode) of the transistor 100D. Furthermore, a portion of the insulating layer 110 and the insulating layer 107 serve as a back gate insulating layer (also called a second gate insulating layer) of the transistor 100D. The conductive layer 103 can use a material that can be used for the conductive layer 104. Note that the conductive layer 103 does not necessarily have to be provided.

[0284] By providing a back gate electrode in the transistor 100D, the potential on the back gate side (also referred to as the back channel side) of the layer 108 is fixed, thereby improving the saturation of the Id-Vd characteristic.

[0285] Note that in this specification and other documents, a situation in which a change in current in a saturation region of the Id-Vd characteristics of a transistor is small may be expressed as “high saturation”.

[0286] Because transistor 100D includes a back-gate electrode, it can fix the potential on the back-channel side of layer 108, thereby suppressing threshold voltage drift. When the threshold voltage of the transistor drifts, the drain current (hereinafter also referred to as off-state current) that flows when the gate voltage is 0V may increase. By suppressing threshold voltage drift, a transistor with a low off-state current can be realized. This allows for a semiconductor device with low power consumption.

[0287] The insulating layer 107 can use a material that can be used for the insulating layer 110. The insulating layer 107, which is in contact with the conductive layer 103, is preferably not easily permeable to impurities in the conductive layer 103. Thus, diffusion of impurities in the conductive layer 103 through the insulating layer 107 and the insulating layer 110 into the channel formation region can be suppressed. The insulating layer 107 can use a material that can be used for the insulating layer 110c and the insulating layer 110d as appropriate. For example, silicon nitride or aluminum oxide can be suitably used for the insulating layer 107. Note that while the insulating layer 107 is shown as having a single-layer structure in this embodiment, one embodiment of the present invention is not limited thereto. The insulating layer 107 may also have a stacked-layer structure of two or more layers.

[0288] The conductive layer 103 used as the back gate electrode can also be electrically connected to the region 108P used as one of the source electrode and the drain electrode. For example, by providing an opening that reaches the conductive layer 103 in the insulating layer 110 and the insulating layer 107, the conductive layer 182A is provided in a manner covering the opening, and the conductive layer 182A is in contact with the conductive layer 103. Therefore, the conductive layer 103 and the region 108P can be electrically connected through the conductive layer 182A. By electrically connecting the region 108P used as the source electrode or the drain electrode to the conductive layer 103 used as the back gate electrode, the source electrode or the drain electrode and the back gate electrode can have the same potential. For example, when the region 108P is used as the source electrode, the threshold voltage drift of the transistor 100D can be suppressed. In addition, the reliability of the transistor 100D can be improved. Alternatively, a structure can be adopted in which the conductive layer 103 is electrically connected to the region 108Q used as the other of the source electrode and the drain electrode.

[0289] The conductive layer 103 serving as a back-gate electrode may be electrically connected to the conductive layer 104 serving as a gate electrode. For example, an opening reaching the conductive layer 103 may be provided in the insulating layer 106, the insulating layer 110, and the insulating layer 107, and the conductive layer 104 may be provided so as to cover the opening, so that the conductive layer 104 is in contact with the conductive layer 103. By electrically connecting the conductive layer 104 serving as a gate electrode and the conductive layer 103 serving as a back-gate electrode, the back-gate electrode and the gate electrode can have the same potential, thereby increasing the on-state current of the transistor 100D.

[0290] The thickness of the conductive layer 103 may be greater than that of the insulating layer 110. Thus, the potential on the back channel side of the layer 108 can be fixed over a wide range between the region 108P and the region 108Q in the layer 108.

[0291] The transistor 100D has a region where the conductive layer 103, the insulating layer 107, the insulating layer 110, the layer 108, the insulating layer 106, and the conductive layer 104 are stacked in this order in one direction, with no other layers interposed therebetween. This direction can be perpendicular to the channel length direction. By expanding this region, the potential on the back-channel side of the layer 108 can be more reliably controlled.

[0292] The thickness of the conductive layer 103 may be thicker than the sum of the thickness of the region 108Q in contact with the insulating layer 109 and the thickness of the insulating layer 106 in contact with the region 108Q.

[0293] Figure 12A and Figure 12B Shown with Figure 11B The structures shown are different from the examples of structures shown. Figure 12A As shown, the conductive layer 103 and the insulating layer 107 may also be provided between the substrate 102 and the insulating layer 109. Figure 12B As shown, the insulating layer 107 may not be provided, and the conductive layer 103 may be provided between the substrate 102 and the insulating layer 110 .

[0294] Note that the structures of the conductive layer 103 and the insulating layer 107 described in Structural Examples 1 to 5 can also be applied to other structural examples.

[0295] [Structure Examples 1-6]

[0296] Figure 13A 1 is a top view of a semiconductor device 10E according to one embodiment of the present invention. Figure 13A The cross-sectional views of the sections along the dot-dash line A1-A2 and the dot-dash line A3-A4 can be referred to. Figure 1B . Figure 13B It is a perspective view of a semiconductor device 10E.

[0297] The semiconductor device 10E and Figure 1A The semiconductor device 10 shown in FIG. 1 is mainly different in that it includes a plurality of transistors.

[0298] The semiconductor device 10E includes the transistor 100, the transistor 100a, the insulating layer 109, and the insulating layer 110. The transistor 100a has the same structure as the transistor 100. The transistor 100a can be formed by the same process as the transistor 100.

[0299] Regarding the transistor 100 , reference can be made to the above description, and thus detailed description thereof will be omitted.

[0300] The transistor 100a includes a conductive layer 104a, an insulating layer 106, and a layer 108a.

[0301] Layer 108a has regions in contact with the top and side surfaces of insulating layer 110 and the top surface of insulating layer 109. Alternatively, layer 108a may be said to have regions overlapping with insulating layer 110 and regions not overlapping with insulating layer 110. The region of layer 108a in contact with insulating layer 110b serves as a channel formation region of transistor 100a. For this region, reference may be made to the description of region 108C described above. The region of layer 108a in contact with insulating layer 109 serves as one of the source electrode and drain electrode of transistor 100a, and the region in contact with insulating layer 110b serves as the other of the source electrode and drain electrode. For these regions, reference may be made to the description of regions 108P and 108Q described above. Similar to layer 108, layer 108a has a region serving as a channel formation region, a region serving as a source electrode, and a region serving as a drain electrode.

[0302] Layer 108a includes a semiconductor material and can use the same material as that used for layer 108. Layer 108a can be formed by the same process as layer 108. For example, layers 108 and 108a can be formed by forming films to become layers 108 and 108a and then processing the films.

[0303] A portion of the insulating layer 106 serves as a gate insulating layer for the transistor 100, and another portion serves as a gate insulating layer for the transistor 100a. The insulating layer 106 is provided on the layers 108, 108a, 109, and 110. The insulating layer 106 has regions in contact with the top surface and side surfaces of the layer 108, the top surface and side surfaces of the layer 108a, the top surface of the insulating layer 109, and the top surface and side surfaces of the insulating layer 110.

[0304] The conductive layer 104a serves as a gate electrode of the transistor 100a. The conductive layer 104a is provided on the insulating layer 106 and has a region in contact with the top surface of the insulating layer 106. The conductive layer 104a has a region in contact with the side surface of the insulating layer 110 that overlaps with the layer 108a with the insulating layer 106 interposed therebetween. The conductive layer 104a can use the same material as that used for the conductive layer 104. The conductive layer 104a can be formed by the same process as that used for the conductive layer 104. For example, the conductive layer 104 and the conductive layer 104a can be formed by forming films to become the conductive layer 104 and the conductive layer 104a and then processing the films.

[0305] An insulating layer 195 is provided over the conductive layer 104 and the conductive layer 104a. The insulating layer 195 serves as a protective layer for the transistor 100 and the transistor 100a. The insulating layer 195 includes an opening 187Aa that reaches a region serving as one of the source electrode and the drain electrode of the transistor 100a, and an opening 187Ba that reaches a region serving as the other of the source electrode and the drain electrode. The conductive layer 182Aa is provided so as to cover the opening 187Aa, and the conductive layer 182Aa is electrically connected to one of the source electrode and the drain electrode in the opening 187Aa. The conductive layer 182Ba is provided so as to cover the opening 187Ba, and the conductive layer 182Ba is electrically connected to the other of the source electrode and the drain electrode in the opening 187Ba. Both the conductive layer 182Aa and the conductive layer 182Ba serve as wiring.

[0306] The channel length of the transistor 100a corresponds to the length of the side surface of the insulating layer 110a in the region in contact with the layer 108a when viewed from a cross section. Therefore, the channel length of the transistor 100a is the same as or substantially the same as the channel length L100 of the transistor 100 (see FIG. Figure 4A and Figure 4B ). The channel width of the transistor 100a is the width of the region where the layer 108a and the conductive layer 104a overlap in a direction perpendicular to the channel length direction. Figure 13A In FIG. 1 , the channel width W100 a of the transistor 100 a is indicated by a dotted double arrow.

[0307] Notice, Figure 13A and Figure 13B The channel width W100a of the transistor 100a is shown to be the same as the channel width W100 of the transistor 100, but one embodiment of the present invention is not limited thereto. Figure 14A and Figure 14B As shown, the channel width W100 a of transistor 100 a may be different from the channel width W100 of transistor 100 .

[0308] Figure 14A and Figure 14B The structure shown is that the channel width W100a of the transistor 100a is larger than the channel width W100 of the transistor 100. By increasing the channel width, the on-state current of the transistor can be increased. The channel width can be changed according to the required electrical characteristics of the transistor.

[0309] Note that the structures of the transistors shown in Structural Examples 1 to 6 can also be applied to other Structural Examples.

[0310] [Structure Examples 1-7]

[0311] Figure 15A It is a top view of a semiconductor device 10F according to one embodiment of the present invention. Figure 15B It is along Figure 15AThe cross-sectional view is a cross-sectional view taken along the dashed line A1-A2. Figure 16A It is a perspective view of the semiconductor device 10F. Figure 16B A perspective view of an extract of substrate 102 , insulating layer 109 , insulating layer 110 , and layer 108 is shown.

[0312] The semiconductor device 10F includes a transistor 100F, an insulating layer 109, and an insulating layer 110. The insulating layer 109 is provided on the substrate 102, and the insulating layer 110 is provided on the insulating layer 109. The insulating layer 110 includes a groove 177 that reaches the insulating layer 109.

[0313] For the transistor 100F, reference can be made to the description of the transistor 100 .

[0314] In the groove 177, the layer 108 is provided in such a manner as to cover the side surfaces of the insulating layer 110. Figure 15B and Figure 16B As shown, the layer 108 has a region 108C in contact with the insulating layer 110a, a region 108P in contact with the insulating layer 110b, and a region 108Q in contact with the insulating layer 109. Figure 17A and Figure 17B As shown, layer 108 may also contact two opposing sides of insulating layer 110 in trench 177 .

[0315] exist Figure 17A In the figures, etc., the shape of the end of insulating layer 110 when viewed from above is represented by a straight line, but there is no particular limitation on its shape. For example, the shape of the end of insulating layer 110 when viewed from above may have a curved surface or an angle. Furthermore, if the top surface of groove 177 has a curved surface, layer 108 may be provided on the curved portion, and if it has an angle, layer 108 may be provided on the angled portion.

[0316] In this specification and the like, the top surface shape of groove 177 refers to the shape of the top surface end portion of insulating layer 110 on the groove 177 side.

[0317] Note that the structure of the insulating layer 110 described in Structural Examples 1 to 7 can also be applied to other structural examples.

[0318] [Structure Examples 1-8]

[0319] Figure 18 1 is a top view of a semiconductor device 10G according to one embodiment of the present invention. Figure 19A It is along Figure 18 The cross-sectional view of the section along the dot-dash line A1-A2 is shown. Figure 19B It is a cross-sectional view taken along the dashed-dotted line A3 - A4 . Figure 20 It is a perspective view of the semiconductor device 10G.

[0320] The semiconductor device 10G is Figure 15A The semiconductor device 10F shown in FIG. 1 is mainly different in that it includes a plurality of transistors.

[0321] Semiconductor device 10G includes transistor 100, transistor 100a, transistor 100b, transistor 100c, insulating layer 109, and insulating layer 110. Transistors 100a to 100c have the same structure as transistor 100 and are arranged so as to span a region where insulating layer 110 is provided and a region where insulating layer 110 is not provided. Transistors 100a to 100c can be formed using the same process as transistor 100.

[0322] Regarding the transistor 100 , reference can be made to the above description, and thus detailed description thereof will be omitted.

[0323] The transistor 100a includes a layer 108a, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104a serving as a gate electrode.

[0324] The transistor 100b includes a layer 108b, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104b serving as a gate electrode.

[0325] The transistor 100c includes a layer 108c, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104c serving as a gate electrode.

[0326] The layers 108a, 108b, and 108c can all use the same materials as those used for the layer 108. The layers 108a, 108b, and 108c can all be formed by the same process as that for the layer 108.

[0327] Each of the layers 108, 108a, 108b, and 108c has regions in contact with the top and side surfaces of the insulating layer 110 and the top surface of the insulating layer 109. In other words, each of the layers 108, 108a, 108b, and 108c has regions that overlap with the insulating layer 110 and regions that do not overlap with the insulating layer 110. In the layers 108, 108a, 108b, and 108c, a region in contact with the topmost layer of the insulating layer 110 (here, the insulating layer 110b) serves as one of the source electrode and the drain electrode of each transistor, and a region in contact with the insulating layer 109 serves as the other of the source electrode and the drain electrode.

[0328] Here, the semiconductor device 10G is shown as including four transistors, but one embodiment of the present invention is not limited thereto, and there is no particular limitation on the number of transistors included in the semiconductor device. Figure 18, etc., illustrate a structure in which layers 108 and 108a are provided on one side of the opposing insulating layer 110 in the trench 177, and layers 108b and 108c are provided on the other side. However, one embodiment of the present invention is not limited to this. There is no particular limitation on the number of layers 108 provided on one or the other side of the insulating layer 110. Furthermore, there are no particular limitations on the number of trenches 177 provided in the insulating layer 110, the number of transistors provided in a single trench 177, or the arrangement of the transistors in the trenches 177.

[0329] Figure 18 Schematic diagrams of the conductive layers 182A, 182B, 182Aa, 182Ba, 182Ab, 182Bb, 182Ac, and 182Bc are shown as wiring. The conductive layers 182A and 182B are electrically connected to the source and drain electrodes of the transistor 100 through openings 187A and 187B, respectively. The conductive layers 182Aa and 182Ba are electrically connected to the source and drain electrodes of the transistor 100a through openings 187Aa and 187Ba, respectively. The conductive layers 182Ab and 182Bb are electrically connected to the source and drain electrodes of the transistor 100b through openings 187Ab and 187Bb, respectively. The conductive layers 182Ac and 182Bc are electrically connected to the source and drain electrodes of the transistor 100c through openings 187Ac and 187Bc, respectively.

[0330] Note that the structure of the transistor shown in Structural Examples 1 to 8 can also be applied to other Structural Examples.

[0331] [Structure Examples 1-9]

[0332] Figure 21A A top view of a semiconductor device 10H according to one embodiment of the present invention is shown. Figure 21B It is along Figure 21A The cross-sectional view is a cross-sectional view taken along the dashed line A1-A2. Figure 22 A is a perspective view of the semiconductor device 10H.

[0333] The semiconductor device 10H includes a transistor 100H, an insulating layer 109, and an insulating layer 110. The insulating layer 109 is provided on the substrate 102, and the insulating layer 110 is provided on the insulating layer 109. The insulating layer 110 includes an opening 179 that reaches the insulating layer 109.

[0334] Regarding the transistor 100H, reference can be made to the description of the transistor 100 .

[0335] In opening 179 , layer 108 is provided so as to cover the side surfaces of insulating layer 110 .

[0336] There is no limitation on the top surface shape of the opening 179. For example, it can be a polygon such as a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a rhombus, and a square), a pentagon, or the above polygons with rounded corners. In addition, the polygon can also be a concave polygon (a polygon with at least one internal angle exceeding 180 degrees) or a convex polygon (a polygon with internal angles of less than 180 degrees). Note that in this specification, etc., a circle is not limited to a perfect circle. In addition, when the top surface shape of the opening 179 has a curve, the layer 108 can be provided on the curved portion, and when it has a corner, the layer 108 can be provided on the corner portion.

[0337] In this specification and the like, the top surface shape of opening 179 refers to the shape of the top surface end portion of insulating layer 110 on the side of opening 179 .

[0338] exist Figure 21A , etc., shows a structure in which layer 108 is provided on a portion of the top surface of opening 179 that is a straight line in a plan view. However, one embodiment of the present invention is not limited to this. When the top surface of opening 179 has a curved shape, layer 108 may be provided on the curved portion, or when the top surface of opening 179 has an angle, layer 108 may be provided on the corner portion.

[0339] Note that the structure of the insulating layer 110 described in Structural Examples 1 to 9 can also be applied to other structural examples.

[0340] [Structure Examples 1-10]

[0341] Figure 23 1 is a top view of a semiconductor device 10I according to one embodiment of the present invention. Figure 23 The cross-sectional views along the dot-dash line A1-A2 and the dot-dash line A3-A4 can be referred to. Figure 19A and Figure 19A . Figure 24 It is a perspective view of the semiconductor device 10I.

[0342] The semiconductor device 10I and Figure 21A The semiconductor device 10H shown in FIG. 1 is mainly different in that it includes a plurality of transistors.

[0343] The semiconductor device 101 includes a transistor 100, a transistor 100a, a transistor 100b, a transistor 100c, an insulating layer 109, and an insulating layer 110. The transistors 100a to 100c have the same structure as the transistor 100 and are provided so as to span a region where the insulating layer 110 is provided and a region where the insulating layer 110 is not provided. The transistors 100a to 100c can be formed using the same process as the transistor 100.

[0344] The transistor 100 and the transistors 100a to 100c can refer to the above description, and thus detailed description is omitted.

[0345] exist Figure 23 , etc., shows a structure in which layer 108 and layers 108a to 108c are provided on a portion of the top surface of opening 179 that is a straight line when viewed from above. However, one embodiment of the present invention is not limited to this. One or more of layer 108 and layers 108a to 108c may be provided on a curved portion, or may be provided so as to cover a corner of opening 179.

[0346] While the semiconductor device 101 is shown here as including four transistors, one embodiment of the present invention is not limited thereto. There is no particular limitation on the number of transistors included in the semiconductor device. Furthermore, there are no particular limitations on the number of openings 179 provided in the insulating layer 110, the number of transistors provided in each opening 179, or the arrangement of the transistors in the opening 179.

[0347] Note that the structures of the transistors described in Structural Examples 1 to 10 can also be applied to other Structural Examples.

[0348] <Structure Example 2>

[0349] Figures 25A to 25E This is a circuit diagram of a semiconductor device according to one embodiment of the present invention. Figure 26 FIG44 through FIG45 are top views, cross-sectional views, and perspective views of a semiconductor device according to one embodiment of the present invention. Below, transistor 100 is mainly used as an example of a transistor included in a semiconductor device according to one embodiment of the present invention. A semiconductor device according to one embodiment of the present invention is not limited thereto and may include any one or more of transistors 100 through 100H.

[0350] A semiconductor device according to one embodiment of the present invention includes at least two transistors, wherein any one of the gate, source, and drain of one transistor is electrically connected to any one of the gate, source, and drain of the other transistor. Alternatively, a semiconductor device according to one embodiment of the present invention includes a transistor and a capacitor, wherein any one of the gate, source, and drain of the transistor is electrically connected to one terminal of the capacitor.

[0351] A semiconductor device according to one embodiment of the present invention can be applied to a display device. The display device includes a transistor and a display element. The source or drain of the transistor is electrically connected to a pixel electrode included in the display element.

[0352] [Structure Example 2-1]

[0353] Figure 25A This is an equivalent circuit diagram of a semiconductor device 20 according to one embodiment of the present invention. Figure 262 is a top view of the semiconductor device 20 . Figure 27 It is along Figure 26 The cross-sectional view is a cross-sectional view taken along the dashed line C1-C2. Figure 28A It is a perspective view of the semiconductor device 20 . Figure 28B It is a perspective view of an extract of the substrate 102 , the insulating layer 109 , the insulating layer 110 , and the layer 108 .

[0354] The semiconductor device 20 includes a transistor 100, a transistor 100a, an insulating layer 109, and an insulating layer 110. One of a source and a drain of the transistor 100 is electrically connected to one of a source and a drain of the transistor 100a.

[0355] Transistor 100 includes layer 108, insulating layer 106 serving as a gate insulating layer, and conductive layer 104 serving as a gate electrode. Transistor 100a includes layer 108, insulating layer 106 serving as a gate insulating layer, and conductive layer 104a serving as a gate electrode. Transistor 100a has the same structure as transistor 100. Transistor 100a can be formed using the same process as transistor 100.

[0356] Transistor 100 and transistor 100a share layer 108. Layer 108 includes region 108P in contact with insulating layer 110b, region 108Q and region 108Qa in contact with insulating layer 109, and region 108C and region 108Ca in contact with insulating layer 110a. The portion of region 108Qa in contact with insulating layer 109 is different from the portion of region 108Q in contact with insulating layer 109. The portion of region 108Ca in contact with insulating layer 110a is different from the portion of region 108C in contact with insulating layer 110a.

[0357] The region 108P serves as one of the source and drain electrodes of the transistor 100 and serves as one of the source and drain electrodes of the transistor 100a. The region 108Q serves as the other of the source and drain electrodes of the transistor 100, and the region 108Qa serves as the other of the source and drain electrodes of the transistor 100a. The region 108C serves as a channel formation region of the transistor 100, and the region 108Ca serves as a channel formation region of the transistor 100a.

[0358] When the transistor 100 and the transistor 100 a share the layer 108 , the area occupied by the semiconductor device can be reduced.

[0359] In the semiconductor device 20 , the region 108P can also be said to be used as a wiring for electrically connecting the transistor 100 and the transistor 100 a .

[0360] Here, when an oxide conductor (OC) is used for wiring, the resistance of the wiring may be higher than when a metal or alloy is used. When the distance between the transistor 100 and the transistor 100a is long and the wiring resistance required for the wiring electrically connecting the transistor 100 and the transistor 100a is relatively low, a metal or an alloy can be appropriately used as the wiring. For example, Figure 29 and Figure 30 As shown, the transistor 100 and the transistor 100a may not share the layer 108, but may be configured such that the region 108P of the layer 108 and the region 108Pa of the layer 108a are electrically connected via the conductive layer 182A. The conductive layer 182A can be made of a metal or an alloy as appropriate.

[0361] When the distance between the transistor 100 and the transistor 100a is short and the wiring resistance required for the wiring electrically connecting the transistor 100 and the transistor 100a is relatively high, as in the case of Figure 26 As shown in FIG. 1 and FIG. 2 , a structure can be adopted in which the transistor 100 and the transistor 100a share a region 108P in the layer 108, and the region 108P is used as the wiring, so that one of the source and drain of the transistor 100 is electrically connected to one of the source and drain of the transistor 100a. This can reduce the area occupied by the semiconductor device.

[0362] The electrical connection method between the transistor 100 and the transistor 100a can be determined by the material used for the layer 108 and the wiring resistance required for the wiring that electrically connects the transistor 100 and the transistor 100a.

[0363] Note that the structure of the layer 108 shown in Structural Example 2-1 can also be applied to other structural examples.

[0364] The following describes a structural example in which a portion of the structure differs from that of the structural example 2-1. The description of portions overlapping with those of the structural example 2-1 may be omitted. In the following drawings, portions having the same functions as those of the structural example 2-1 are hatched with the same hatching, and may not be assigned a reference numeral.

[0365] [Structure Example 2-2]

[0366] Figure 25B This is an equivalent circuit diagram of a semiconductor device 20A according to one embodiment of the present invention. Figure 31 It is a top view of the semiconductor device 20A. Figure 32 It is along Figure 31 The cross-sectional view is a cross-sectional view taken along the dashed line C1-C2. Figure 33A It is a perspective view of the semiconductor device 20A. Figure 33BIt is a perspective view of an extract of the substrate 102 , the insulating layer 109 , the insulating layer 110 , and the layer 108 .

[0367] The semiconductor device 20A includes the transistor 100, the transistor 100a, the insulating layer 109, and the insulating layer 110. The other of the source and the drain of the transistor 100 is electrically connected to the other of the source and the drain of the transistor 100a. Figure 26 The semiconductor device 20 shown in FIG. 1 mainly differs from the semiconductor device 20 in the structure of the layer 108 .

[0368] Layer 108 includes regions 108P and 108Pa in contact with insulating layer 110b, region 108Q in contact with insulating layer 109, and regions 108C and 108Ca in contact with insulating layer 110a. The portion of region 108Pa in contact with insulating layer 110b is different from the portion of region 108P in contact with insulating layer 110b.

[0369] Region 108Q serves as the other of the source and drain electrodes of transistor 100 and serves as the other of the source and drain electrodes of transistor 100a. Region 108P serves as one of the source and drain electrodes of transistor 100, and region 108Pa serves as one of the source and drain electrodes of transistor 100a.

[0370] Note that the structure of the layer 108 shown in Structural Example 2-2 can also be applied to other Structural Examples.

[0371] [Structure Example 2-3]

[0372] Figure 34A It is a top view of a semiconductor device 20B according to one embodiment of the present invention. Figure 34A The cross-sectional view along the dot-dash line C1-C2 can be referred to Figure 27 . Figure 34B It is a perspective view of the semiconductor device 20B. Figure 35A and Figure 35B 1 is a perspective view of an extract of the substrate 102, the insulating layer 109, the insulating layer 110, and the layer 108. The equivalent circuit diagram of the semiconductor device 20B can be referred to Figure 25A .

[0373] The semiconductor device 20B includes the transistor 100, the transistor 100a, the insulating layer 109, and the insulating layer 110. One of the source and the drain of the transistor 100 is electrically connected to one of the source and the drain of the transistor 100a.

[0374] The transistor 100 includes a layer 108, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104 serving as a gate electrode. The transistor 100a includes a layer 108, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104a serving as a gate electrode.

[0375] The transistor 100 and the transistor 100a share the layer 108. The layer 108 includes a region 108P in contact with the insulating layer 110b, a region 108Q and a region 108Qa in contact with the insulating layer 109, and a region 108C and a region 108Ca in contact with the insulating layer 110a. Figure 26 The semiconductor device 20 shown in FIG. 1 mainly differs in that the side surface of the insulating layer 110 a that the region 108Ca contacts is different from the side surface of the insulating layer 110 a that the region 108C contacts.

[0376] Note that the structure of the layer 108 shown in Structural Example 2-3 can also be applied to other structural examples.

[0377] [Structure Examples 2-4]

[0378] Figure 36A 1 is a top view of a semiconductor device 20C according to one embodiment of the present invention. Figure 36A The cross-sectional view along the dot-dash line C1-C2 can be referred to Figure 32 . Figure 36B It is a perspective view of the semiconductor device 20C. Figure 37A and Figure 37B 1 is a perspective view of an extract of the substrate 102, the insulating layer 109, the insulating layer 110, and the layer 108. The equivalent circuit diagram of the semiconductor device 20C can be referred to Figure 25B .

[0379] The semiconductor device 20C includes the transistor 100, the transistor 100a, the insulating layer 109, and the insulating layer 110. The other of the source and the drain of the transistor 100 is electrically connected to the other of the source and the drain of the transistor 100a.

[0380] The transistor 100 includes a layer 108, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104 serving as a gate electrode. The transistor 100a includes a layer 108, an insulating layer 106 serving as a gate insulating layer, and a conductive layer 104a serving as a gate electrode.

[0381] The transistor 100 and the transistor 100a share the layer 108. The layer 108 includes a region 108P and a region 108Pa in contact with the insulating layer 110b, a region 108Q in contact with the insulating layer 109, and a region 108C and a region 108Ca in contact with the insulating layer 110a. Figure 31The semiconductor device 20A shown in FIG. 1 mainly differs in that the side surface of the insulating layer 110 a that the region 108Ca contacts is different from the side surface of the insulating layer 110 a that the region 108C contacts.

[0382] Note that the structure of the layer 108 shown in Structural Examples 2 to 4 can also be applied to other structural examples.

[0383] [Structure Examples 2-5]

[0384] Figure 25C This is an equivalent circuit diagram of a semiconductor device 20D according to one embodiment of the present invention. Figure 38 It is a top view of the semiconductor device 20D. Figure 39A It is along Figure 38 The cross-sectional view of the cut surface along the dot-dash line C1-C2 is shown. Figure 39B It is a cross-sectional view taken along the dashed-dotted line C3 - C4 . Figure 40 It is a perspective view of a semiconductor device 20D.

[0385] The semiconductor device 20D includes the transistor 100, the transistor 100a, the insulating layer 109, and the insulating layer 110. The other of the source and the drain of the transistor 100 is electrically connected to the gate of the transistor 100a.

[0386] The transistor 100 includes a layer 108, an insulating layer 106, and a conductive layer 104. The transistor 100a includes a layer 108a, an insulating layer 106, and a conductive layer 104a. An opening 189 is provided in the insulating layer 106, reaching a region 108Q, and the conductive layer 104a is provided so as to cover the opening 189. The conductive layer 104a, which serves as the gate electrode of the transistor 100a, contacts a region 108Q, which serves as the other of the source and drain electrodes of the transistor 100, in the opening 189.

[0387] Note that the structure of the conductive layer 104a described in Structural Examples 2 to 5 can also be applied to other structural examples.

[0388] [Structure Examples 2-6]

[0389] Figure 25D This is an equivalent circuit diagram of a semiconductor device 20E according to one embodiment of the present invention. Figure 41 It is a top view of the semiconductor device 20E. Figure 42A It is along Figure 41 The cross-sectional view is a cross-sectional view taken along the dashed line C1-C2.

[0390] Semiconductor device 20E includes transistor 100, capacitor 190, insulating layer 109, and insulating layer 110. Capacitor 190 includes a pair of electrodes and a dielectric sandwiched between the pair of electrodes. The source or drain of transistor 100 is electrically connected to one of the pair of electrodes of capacitor 190.

[0391] Region 108Q included in layer 108 serves as the other of the source and drain electrodes of transistor 100 and serves as one of a pair of electrodes of capacitor 190. Conductive layer 191, serving as the other of the pair of electrodes of capacitor 190, is provided on insulating layer 106. Conductive layer 191 can be formed, for example, by the same process as that for conductive layer 104 included in transistor 100. The insulating layer 106 in the region sandwiched between region 108Q and conductive layer 191 serves as a dielectric for capacitor 190.

[0392] Here, region 108Q and conductive layer 191 serve as a pair of electrodes of capacitor 190 , and insulating layer 106 sandwiched between the electrodes serves as a dielectric. However, one embodiment of the present invention is not limited thereto. The structure of capacitor 190 is not particularly limited.

[0393] like Figure 42B As shown, conductive layer 191 may also be provided over insulating layer 195. Conductive layer 191 can be formed, for example, by the same process as that for conductive layer 182A included in transistor 100. Insulating layer 106 and insulating layer 195 in the region sandwiched between region 108Q and conductive layer 191 serve as a dielectric for capacitor 190.

[0394] When transistor 100 and capacitor 190 share region 108Q, one of the pair of electrodes of capacitor 190 does not need to be provided separately from layer 108. This simplifies the manufacturing process of the semiconductor device and reduces manufacturing costs. Furthermore, the yield of the semiconductor device can be improved.

[0395] In this example, region 108Q and conductive layer 191 serve as a pair of electrodes of capacitor 190 , and insulating layer 106 and insulating layer 195 sandwiched between the electrodes serve as a dielectric. However, one embodiment of the present invention is not limited to this. The structure of capacitor 190 is not particularly limited.

[0396] Note that the structure of the capacitor 190 shown in Structural Examples 2-6 can also be applied to other structural examples.

[0397] [Structure Examples 2-7]

[0398] Figure 25E This is an equivalent circuit diagram of a semiconductor device 20F according to one embodiment of the present invention. Figure 43 It is a top view of the semiconductor device 20F. Figure 44A It is along Figure 43 The cross-sectional view is a cross-sectional view taken along the dashed line C1-C2.

[0399] Semiconductor device 20F includes transistor 100, capacitor 190, insulating layer 109, and insulating layer 110. Capacitor 190 includes a pair of electrodes and a dielectric material sandwiched between the pair of electrodes. The source or drain of transistor 100 is electrically connected to one of the pair of electrodes of capacitor 190.

[0400] Region 108P included in layer 108 serves as one of the source and drain electrodes of transistor 100 and as one of a pair of electrodes of capacitor 190. Conductive layer 191, serving as the other of the pair of electrodes of capacitor 190, is provided on insulating layer 106. Conductive layer 191 can be formed, for example, by the same process as that for conductive layer 104 included in transistor 100. The insulating layer 106 in the region sandwiched between region 108P and conductive layer 191 serves as a dielectric for capacitor 190.

[0401] Here, region 108P and conductive layer 191 serve as a pair of electrodes of capacitor 190 , and insulating layer 106 sandwiched between the electrodes serves as a dielectric. However, one embodiment of the present invention is not limited thereto. The structure of capacitor 190 is not particularly limited.

[0402] like Figure 44B As shown, conductive layer 191 may also be provided over insulating layer 195. Conductive layer 191 can be formed, for example, by the same process as that for conductive layer 182B included in transistor 100. Insulating layer 106 and insulating layer 195 in the region sandwiched between region 108P and conductive layer 191 serve as a dielectric for capacitor 190.

[0403] When transistor 100 and capacitor 190 share region 108P, one of the pair of electrodes of capacitor 190 does not need to be provided separately from layer 108. This simplifies the manufacturing process of the semiconductor device and reduces manufacturing costs. Furthermore, the yield of the semiconductor device can be improved.

[0404] In this example, region 108P and conductive layer 191 serve as a pair of electrodes of capacitor 190 , and insulating layer 106 and insulating layer 195 sandwiched between the electrodes serve as a dielectric. However, one embodiment of the present invention is not limited to this. The structure of capacitor 190 is not particularly limited.

[0405] Note that the structure of the capacitor 190 shown in Structural Example 2-7 can also be applied to other structural examples.

[0406] [Structure Examples 2-8]

[0407] Figure 45A This is an equivalent circuit diagram of a semiconductor device 30 according to one embodiment of the present invention. The semiconductor device 30 includes transistors 100_1 to 100_r (r is an integer greater than or equal to 2), an insulating layer 109, and an insulating layer 110. Transistors 100_1 to 100_r are connected in series, and the semiconductor device 30 can be considered as a single transistor.

[0408] Note that in Figure 45A 1 to 100_r are n-channel transistors, but one embodiment of the present invention is not limited thereto. The transistors 100_1 to 100_r may be p-channel transistors.

[0409] The case where r is 4 is taken as an example for specific description. Figure 45B This is an equivalent circuit diagram of a semiconductor device 30 according to one embodiment of the present invention. Figure 45C 3 is a top view of the semiconductor device 30 .

[0410] Figure 46 It is along Figure 45C FIG47 is a perspective view of the semiconductor device 30. ...

[0411] Semiconductor device 30 includes transistor 100_1, transistor 100_2, transistor 100_3, transistor 100_4, insulating layer 109, and insulating layer 110. Transistors 100_1 through 100_4 can all adopt the structure of transistor 100 described above. Note that while transistor 100 is used as an example for the description herein, one embodiment of the present invention is not limited thereto. Transistors 100_1 through 100_4 can use any of transistors 100 through 100H.

[0412] exist Figure 45C , etc., the transistors 100_1 to 100_4 are arranged in two rows and two columns, but there is no particular limitation on the arrangement of the transistors. For example, the transistors 100_1 to 100_4 may be arranged in one row and four columns.

[0413] The transistors 100_1 to 100_4 all include the conductive layer 104, the insulating layer 106, and the layer 108. In other words, the transistors 100_1 to 100_4 share the conductive layer 104, the insulating layer 106, and the layer 108.

[0414] Layer 108 includes regions 108P_1, 108P_2, and 108P_3 in contact with insulating layer 110b, regions 108Q_1 and 108Q_2 in contact with insulating layer 109, and regions 108C_1, 108C_2, 108C_3, and 108C_4 in contact with insulating layer 110a. The portion of region 108P_1 in contact with insulating layer 110b, the portion of region 108P_2 in contact with insulating layer 110b, and the portion of region 108P_3 in contact with insulating layer 110b are different from each other. The portion of region 108Q_1 in contact with insulating layer 109 and the portion of region 108Q_2 in contact with insulating layer 109 are different from each other. The portion of the region 108C_1 contacting the insulating layer 110 a , the portion of the region 108C_2 contacting the insulating layer 110 a , the portion of the region 108C_3 contacting the insulating layer 110 a , and the portion of the region 108C_4 contacting the insulating layer 110 a are different from each other.

[0415] In the transistor 100_1 , the region 108P_1 included in the layer 108 is used as one of a source electrode and a drain electrode, and the region 108Q_1 is used as the other of the source electrode and the drain electrode.

[0416] In transistor 100_2, region 108P_2 of layer 108 serves as one of the source and drain electrodes, and region 108Q_1 serves as the other of the source and drain electrodes. Region 108Q_1 is shared by transistors 100_1 and 100_2. Region 108Q_1 serves as the other of the source and drain electrodes of transistor 100_2 and also serves as the other of the source and drain electrodes of transistor 100_1. In other words, the other of the source and drain electrodes of transistor 100_2 is electrically connected to the other of the source and drain electrodes of transistor 100_1.

[0417] In transistor 100_3, region 108P_2 of layer 108 serves as one of the source and drain electrodes, and region 108Q_2 serves as the other of the source and drain electrodes. Region 108P_2 is shared by transistors 100_2 and 100_3. Region 108P_2 serves as one of the source and drain electrodes of transistor 100_3 and also serves as one of the source and drain electrodes of transistor 100_2. In other words, one of the source and drain electrodes of transistor 100_3 is electrically connected to one of the source and drain electrodes of transistor 100_2.

[0418] In transistor 100_4, region 108P_3 of layer 108 serves as one of the source and drain electrodes, and region 108Q_2 serves as the other of the source and drain electrodes. Region 108Q_2 is shared by transistors 100_3 and 100_4. Region 108Q_2 serves as the other of the source and drain electrodes of transistor 100_4 and also serves as the other of the source and drain electrodes of transistor 100_3. In other words, the other of the source and drain electrodes of transistor 100_4 is electrically connected to the other of the source and drain electrodes of transistor 100_3.

[0419] The insulating layer 106 is provided over the layer 108 and serves as a gate insulating layer for the transistors 100_1 to 100_4. The conductive layer 104 is provided over the insulating layer 106 and serves as a gate electrode for the transistors 100_1 to 100_4. The conductive layer 104 has a region that overlaps with each of the regions 108C_1 to 108C_4 with the insulating layer 106 interposed therebetween.

[0420] When the semiconductor device 30 is regarded as a single transistor, the channel length of the transistor is the sum of the channel lengths of the transistors 100_1 to 100_4. For example, when the channel lengths of the transistors 100_1 to 100_4 are each expressed as a channel length L100, the semiconductor device 30 can be regarded as a transistor with a channel length of "L100×4" (see Figure 4B and Figure 5B ). The semiconductor device 30 composed of r transistors can be regarded as a transistor with a channel length of "L100×r". In addition, the semiconductor device 30 can be regarded as a transistor with a channel width of W100 (refer to Figure 4A 、 Figure 5A and Figure 5B By connecting multiple transistors in series, the channel length increases, which can improve saturation. Furthermore, by adjusting the number of transistors connected in series (r), the channel length can be varied. The number of transistors connected in series (r) can be determined to achieve the desired saturation.

[0421] Note that the structure of the semiconductor device 30 shown in Structural Examples 2 to 8 can be applied to other structural examples. For example, the semiconductor device 30 can be applied to one or more transistors included in the above-described semiconductor devices.

[0422] Note that while the structures of a semiconductor device including multiple transistors and a semiconductor device including a transistor and a capacitor are described here, one embodiment of the present invention is not limited thereto. A semiconductor device according to one embodiment of the present invention can be suitably used in a display device. In a display device according to one embodiment of the present invention, the region 108P or the region 108Q included in the transistor can be in contact with a pixel electrode included in a display element. The structure of the display device is described in detail in Embodiment 3.

[0423] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.

[0424] (Implementation Method 2)

[0425] In this embodiment, referring to Figures 48A to 49D A method for manufacturing a display device according to one embodiment of the present invention will be described. Note that regarding the materials and formation methods of the components, parts that are the same as those described in Embodiment 1 may be omitted.

[0426] Figures 48A to 49D Show Figure 1A A cross-sectional view between the dot-dash line A1-A2 is shown.

[0427] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute semiconductor devices can be formed using methods such as sputtering, chemical vapor deposition (CVD), vacuum evaporation, pulsed laser deposition (PLD), ALD, and molecular beam epitaxy (MBE). CVD methods include PECVD and thermal CVD. Furthermore, one thermal CVD method is metal organic chemical vapor deposition (MOCVD).

[0428] Thin films (insulating films, semiconductor films, and conductive films, etc.) that constitute semiconductor devices can be formed using wet deposition methods such as spin coating, dipping, spraying, inkjet, dispenser, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, or doctor blade coating.

[0429] When processing thin films constituting semiconductor devices, photolithography or the like can be used. Alternatively, thin films can be processed using nanoimprinting, sandblasting, lift-off, or the like. Furthermore, island-shaped thin films can be directly formed using a deposition method using a shadow mask such as a metal mask.

[0430] Photolithography typically involves two methods. One involves forming a resist mask on the film to be processed, processing the film by etching, etc., and then removing the resist mask. The other involves depositing a photosensitive film, then exposing it to light and developing it, processing the film into the desired shape.

[0431] In the photolithography method, as the light used for exposure, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm) or a mixture of these lights can be used. In addition, ultraviolet light, KrF laser or ArF laser, etc. can also be used. In addition, exposure can also be performed using liquid immersion exposure technology. In addition, as the light used for exposure, extreme ultraviolet (EUV: Extreme Ultra-violet) light or X-rays can also be used. In addition, an electron beam can also be used instead of the light used for exposure. When extreme ultraviolet light, X-rays or electron beams are used, extremely fine processing can be performed, so it is preferred. Note that when exposure is performed by scanning with a light beam such as an electron beam, a photomask is not required.

[0432] As a method of etching the thin film, one or more of a dry etching method, a wet etching method, and a sandblasting method can be used.

[0433] First, an insulating layer 109 is formed on the substrate 102, and an insulating film 110af (which will become the insulating layer 110a) is formed on the insulating layer 109. Figure 48A ).

[0434] When forming the insulating layer 109 and the insulating film 110af, sputtering or PECVD can be appropriately utilized. Preferably, after forming the insulating layer 109, the insulating film 110af is continuously formed in a vacuum so as not to expose the surface of the insulating layer 109 to the atmosphere. By continuously forming the insulating layer 109 and the insulating film 110af, it is possible to suppress the adhesion of impurities from the atmosphere to the surface of the insulating layer 109. Examples of such impurities include water and organic matter.

[0435] The substrate temperature during formation of the insulating layer 109 and the insulating film 110af is preferably 180°C to 450°C, more preferably 200°C to 450°C, more preferably 250°C to 450°C, more preferably 300°C to 450°C, more preferably 300°C to 400°C, and more preferably 350°C to 400°C. By setting the substrate temperature during formation within the above range, the amount of impurities (e.g., water and hydrogen) released from the insulating layer 110a can be reduced. In particular, diffusion of impurities from the insulating layer 110a to the region 108c can be suppressed. Consequently, a transistor exhibiting excellent electrical characteristics and high reliability can be realized.

[0436] Note that since the insulating layer 109 and the insulating film 110 af are formed first and then the layer 108 is formed, there is no concern that oxygen will be released from the layer 108 due to heat applied when forming the insulating layer 109 and the insulating film 110 af .

[0437] After the insulating film 110af is formed, oxygen may also be supplied to the insulating film 110af. As a method for supplying oxygen, for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment may be used. As a plasma treatment, a device for plasma-forming an oxygen gas with high-frequency power may be appropriately used. As a device for plasma-forming a gas with high-frequency power, for example, a PECVD device, a plasma etching device, and a plasma ashing device may be cited. The plasma treatment is preferably carried out in an oxygen-containing atmosphere. For example, the plasma treatment is preferably carried out in an atmosphere containing one or more of oxygen, nitrous oxide (N2O), nitrogen dioxide (NO2), carbon monoxide, and carbon dioxide.

[0438] Note that this plasma treatment can also be performed continuously in a vacuum without exposing the surface of the insulating film 110af to the atmosphere. For example, when a PECVD apparatus is used to form the insulating film 110af, it is preferable to perform the plasma treatment using the PECVD apparatus. This can improve productivity. Specifically, after the insulating film 110af is formed using the PECVD apparatus, the N2O plasma treatment can be performed continuously in a vacuum.

[0439] Next, it is preferred to form a metal oxide layer 130 ( Figure 48B ). By forming the metal oxide layer 130, oxygen can be supplied to the insulating film 110af.

[0440] There is no limitation on the conductivity of the metal oxide layer 130. The metal oxide layer 130 may be formed of at least one of an insulating film, a semiconductor film, and a conductive film. Examples of the metal oxide layer 130 include aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), and indium tin oxide containing silicon (ITSO).

[0441] As the metal oxide layer 130, an oxide material containing one or more elements identical to those of the layer 108 is preferably used. In particular, a metal oxide material applicable to the layer 108 is preferably used.

[0442] When forming the metal oxide layer 130, a higher oxygen flow rate ratio of the deposition gas introduced into the process chamber of the deposition apparatus or a higher oxygen partial pressure within the process chamber can increase the amount of oxygen supplied to the insulating film 110af. The oxygen flow rate ratio or oxygen partial pressure is, for example, 50% to 100%, preferably 65% to 100%, more preferably 80% to 100%, and even more preferably 90% to 100%. In particular, it is preferable to set the oxygen flow rate ratio to 100% to keep the oxygen partial pressure as close to 100% as possible.

[0443] Thus, by forming the metal oxide layer 130 by sputtering in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110af while preventing oxygen from being released from the insulating film 110af during the formation of the metal oxide layer 130. As a result, a large amount of oxygen can be trapped in the insulating film 110af. Furthermore, a large amount of oxygen can be supplied to the region 108C of the layer 108 by the subsequent heat treatment. As a result, oxygen vacancies and V in the region 108C can be reduced. O H, and a transistor with good electrical characteristics and high reliability can be realized.

[0444] It is preferable to perform heat treatment after forming the metal oxide layer 130. By performing heat treatment after forming the metal oxide layer 130, oxygen can be efficiently supplied from the metal oxide layer 130 to the insulating film 110af.

[0445] The heat treatment temperature is preferably 150°C or higher and lower than the strain point of the substrate, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and more preferably 350°C or higher and 400°C or lower. The heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, and oxygen. Clean dry air (CDA) can also be used as a nitrogen-containing or oxygen-containing atmosphere. Note that the content of hydrogen, oxygen, and the like in this atmosphere is preferably as low as possible. A high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower, is preferably used. Using an atmosphere with minimal hydrogen, water, and the like content minimizes absorption of hydrogen, water, and the like by the insulating layer 109 and the insulating film 110af. This heat treatment can be performed in an oven, a rapid thermal annealing (RTA) apparatus, or the like. Using an RTA apparatus can shorten the heat treatment time.

[0446] After forming the metal oxide layer 130 or after the aforementioned heat treatment, oxygen may be supplied to the insulating film 110af through the metal oxide layer 130. Examples of methods for supplying oxygen include ion implantation, ion doping, plasma immersion ion implantation, and plasma treatment. Regarding the plasma treatment, reference is made to the above description, and a detailed description thereof will be omitted.

[0447] Next, the metal oxide layer 130 is removed. While there are no particular limitations on the method for removing the metal oxide layer 130, wet etching can be appropriately employed. By utilizing wet etching, etching of the insulating film 110 af can be suppressed during the removal of the metal oxide layer 130. Consequently, the thickness of the insulating film 110 af can be suppressed from being reduced, and the thickness of the insulating layer 110 a can be made uniform.

[0448] After removing the metal oxide layer 130, oxygen may be supplied to the insulating film 110af. The method of supplying oxygen may refer to the above description. For example, Figure 48C As shown, a film 139 is formed on the insulating film 110af, and a process of supplying oxygen to the insulating film 110af through the film 139 may be performed. As this process, plasma treatment in an oxygen-containing atmosphere can be used. Figure 48C The arrows schematically indicate the supply of oxygen to the insulating film 110af.

[0449] A conductive film or a semiconductor film is preferably used for the film 139. A metal oxide film, a metal film, or an alloy film can be used for the film 139. Using a metal oxide as the film 139 is preferable because it is formed by sputtering or the like in an oxygen-containing atmosphere because oxygen can be supplied to the insulating film 110af during the formation of the film 139.

[0450] The thickness of the film 139 is preferably thin, preferably greater than 1 nm and less than 20 nm, more preferably greater than 2 nm and less than 20 nm, more preferably greater than 2 nm and less than 15 nm, more preferably greater than 3 nm and less than 15 nm, further preferably greater than 3 nm and less than 10 nm, and typically can be about 5 nm.

[0451] The substrate temperature during formation of the film 139 is preferably 350° C. or lower, more preferably 340° C. or lower, more preferably 330° C. or lower, and further preferably 300° C. or lower. This can increase the amount of oxygen supplied to the insulating film 110 af .

[0452] The film 139 facilitates the attraction of ionized oxygen when a bias voltage is applied between the pair of electrodes while oxygen is being supplied, thereby increasing the amount of oxygen supplied to the insulating film 110af.

[0453] As the oxygen supply processing device, a dry etching device, an ashing device, a PECVD device, etc. can be appropriately used. In particular, an ashing device is preferably used. When a bias voltage is applied between a pair of electrodes included in the processing device, the bias voltage can be set to, for example, 10V or more and 1kV or less. Alternatively, the power density of the bias voltage can be set to, for example, 1W / cm 2 Above 5W / cm 2 The following will do.

[0454] Next, the film 139 is removed. Although there is no particular limitation on the method of removing the film 139, a wet etching method can be appropriately employed.

[0455] The oxygen supply treatment for the insulating film 110af is not limited to the above-described method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions can be supplied to the insulating film 110af using ion doping, ion implantation, or plasma treatment. Alternatively, a film that inhibits oxygen desorption may be formed on the insulating film 110af, and then oxygen may be supplied to the insulating film 110af through the film. Preferably, the film is removed after the oxygen is supplied. As the oxygen desorption-inhibiting film, a conductive film or semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten may be used.

[0456] Next, an insulating film 110bf ( Figure 48D The formation of the insulating film 110bf can refer to the description regarding the formation of the insulating layer 109 and the insulating film 110af, and thus detailed description is omitted.

[0457] Next, a portion of the insulating film 110af and the insulating film 110bf is removed to form the insulating layer 110 ( Figure 48E ). Due to the formation of the insulating layer 110, part of the top surface of the insulating layer 109 is exposed. When forming the insulating layer 110, a dry etching method can be appropriately used. At this time, the thickness of the insulating layer 109 can also be reduced by removing part of the insulating layer 109 in the area that does not overlap with the insulating layer 110 (see Figure 7A and Figure 7B ).

[0458] Next, a metal oxide film 108f ( Figure 49A At this time, the metal oxide film 108f is provided along the step resulting from the region where the insulating layer 110 is provided and the region where the insulating layer 110 is not provided. The metal oxide film 108f is provided so as to be in contact with the top surface and side surfaces of the insulating layer 110 and the top surface of the insulating layer 109.

[0459] The metal oxide film 108f is preferably formed using a sputtering method using a metal oxide target. Alternatively, the metal oxide film 108f is preferably formed using an ALD method. Because of its high coverage, the ALD method can also be appropriately used when forming the metal oxide film 108f provided along the side surfaces of the insulating layer 110. By using the ALD method, a metal oxide film can also be formed with high coverage on the side surfaces of the insulating layer 110. In addition, the ALD method easily controls the deposition rate, thereby enabling the formation of thin films with a high yield.

[0460] The metal oxide film 108f is preferably a dense film with as few defects as possible. In addition, the metal oxide film 108f is preferably a high-purity film with as little hydrogen impurities as possible. In particular, a crystalline metal oxide film is preferably used as the metal oxide film 108f.

[0461] When forming the metal oxide film 108f, an oxygen gas is preferably used. By using an oxygen gas, oxygen can be appropriately supplied to the insulating layer 110. For example, when oxide or oxynitride is used for the insulating layer 110a, oxygen can be appropriately supplied to the insulating layer 110a.

[0462] By supplying oxygen to the insulating layer 110a, oxygen can be supplied to the channel formation region of the layer 108 in a subsequent step, thereby reducing oxygen vacancies in the channel formation region and V O H.

[0463] When forming the metal oxide film 108f, an oxygen gas and an inert gas (e.g., helium, argon, xenon, etc.) may be mixed. Note that, when the oxygen flow rate ratio or oxygen partial pressure of the deposition gas during the formation of the metal oxide film is higher, the crystallinity of the metal oxide film can be increased, and a transistor with high reliability can be realized. On the other hand, when the oxygen flow rate ratio or oxygen partial pressure is lower, a metal oxide film with lower crystallinity and higher conductivity can be realized, thereby realizing a transistor with high on-state current.

[0464] Here, when the oxygen flow rate ratio or oxygen partial pressure is high, the metal oxide film may have a polycrystalline structure. In a metal oxide film with a polycrystalline structure, grain boundaries serve as recombination centers, trapping carriers, which may reduce the on-state current of the transistor. Therefore, it is preferable to adjust the oxygen flow rate ratio or oxygen partial pressure to prevent the metal oxide film 108f from having a polycrystalline structure. Since the metal oxide film is more likely to have a polycrystalline structure depending on its composition, the oxygen flow rate ratio or oxygen partial pressure can be adjusted according to the composition of the metal oxide film 108f.

[0465] When the substrate temperature is high during the formation of the metal oxide film, a more crystalline and denser metal oxide film can be formed. On the other hand, as the substrate temperature becomes lower, a less crystalline and more conductive metal oxide film can be formed.

[0466] The substrate temperature during formation of the metal oxide film 108f is preferably between room temperature and 250°C, more preferably between room temperature and 200°C, and even more preferably between room temperature and 140°C. For example, the substrate temperature is preferably between room temperature and 140°C, thereby improving productivity. Furthermore, by setting the substrate temperature to room temperature or forming the metal oxide film 108f without heating the substrate, the crystallinity can be reduced.

[0467] When the substrate temperature is high, the metal oxide film may have a polycrystalline structure. Therefore, it is preferable to adjust the substrate temperature so that the metal oxide film 108f does not have a polycrystalline structure. The substrate temperature can be adjusted according to the composition used for the metal oxide film 108f.

[0468] When using ALD, thermal ALD or PEALD (Plasma Enhanced ALD) deposition methods are preferred. Thermal ALD is preferred due to its extremely high coverage. PEALD is also preferred due to its high coverage and low-temperature deposition capabilities.

[0469] The metal oxide film can be formed by, for example, an ALD method using a precursor containing constituent metal elements and an oxidant.

[0470] For example, when forming an In—Ga—Zn oxide, three precursors including an indium precursor, a gallium precursor, and a zinc precursor may be used. Alternatively, two precursors including an indium precursor and gallium and zinc precursors may be used.

[0471] Examples of the precursor containing indium include triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedione)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.

[0472] Examples of the precursor containing gallium include trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamide)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedione)gallium, dimethylchlorogallium, and diethylchlorogallium.

[0473] Examples of the precursor containing zinc include dimethylzinc, diethylzinc, bis(2,2,6,6-tetramethyl-3,5-heptanedione)zinc, and zinc chloride.

[0474] Examples of the oxidizing agent include ozone, oxygen, and water.

[0475] Methods for controlling the composition of the resulting film include adjusting one or more of the source gas type, source gas flow ratio, source gas flow time, and source gas flow order. By adjusting these, the composition of the metal oxide film 108f can be controlled. Furthermore, by adjusting these, a film with a continuously varying composition can be formed. The composition of the metal oxide film 108f can also be continuously varied.

[0476] Before depositing the metal oxide film 108f, it is preferred to perform at least one of a treatment for removing water, hydrogen, organic matter, and the like adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen to the insulating layer 110. For example, a heat treatment may be performed at a temperature of 70°C to 200°C in a reduced pressure atmosphere. Alternatively, a plasma treatment may be performed in an oxygen-containing atmosphere. Alternatively, oxygen may be supplied to the insulating layer 110 by performing a plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (N2O). When a plasma treatment containing nitrous oxide gas is performed, organic matter on the surface of the insulating layer 110 can be appropriately removed and oxygen can be supplied to the insulating layer 110. Preferably, after such treatment, the metal oxide film 108f is continuously deposited without exposing the surface of the insulating layer 110 to the atmosphere.

[0477] Note that when the layer 108 has a stacked-layer structure, it is preferable that, after depositing a lower metal oxide film, an upper metal oxide film be continuously deposited without exposing the surface thereof to the atmosphere.

[0478] When layer 108 has a stacked structure, all layers constituting layer 108 may be formed using the same deposition method (e.g., sputtering or ALD), or each layer may be deposited using a different deposition method. For example, a first metal oxide layer may be deposited using sputtering, and a second metal oxide layer may be deposited using ALD.

[0479] Next, the metal oxide film 108f is processed into an island shape to form a layer 108 ( Figure 49B Layer 108 is provided across a region where the insulating layer 110 is provided and a region where the insulating layer 110 is not provided, and is in contact with the top surface and side surfaces of the insulating layer 110 and the top surface of the insulating layer 109 .

[0480] When forming the layer 108, a wet etching method can be appropriately used. In this process, portions of the insulating layer 110 and the insulating layer 109 in regions not overlapping with the layer 108 may be etched, resulting in a reduction in thickness. Note that when etching the metal oxide film 108f, it is preferable to use a material with a high selectivity for the insulating layer 110b and the insulating layer 109 because this can suppress a reduction in thickness of the insulating layer 110b and the insulating layer 109.

[0481] It is preferable to perform heat treatment after depositing the metal oxide film 108f or after processing the metal oxide film 108f into the layer 108. The heat treatment can remove hydrogen or water contained in the metal oxide film 108f or the layer 108 or adsorbed on the surface of the metal oxide film 108f or the layer 108. In addition, the heat treatment may improve the film quality of the metal oxide film 108f or the layer 108 (for example, reducing defects or improving crystallinity).

[0482] By heat treatment, impurities can be supplied from the insulating layer 110b to the metal oxide film 108f or the region of the layer 108 that is in contact with the insulating layer 110b. Thus, the region 108P is formed. Similarly, impurities can be supplied from the insulating layer 109 to the metal oxide film 108f or the region of the layer 108 that is in contact with the insulating layer 109. Thus, the region 108Q is formed. In addition, oxygen can also be supplied from the insulating layer 110a to the metal oxide film 108f or the layer 108 by heat treatment. Thus, the oxygen vacancies (V) in the region 108C serving as the channel formation region can be reduced. O ). In this case, it is more preferable to perform a heat treatment before processing into the layer 108. Regarding the heat treatment, reference can be made to the above description, so a detailed description is omitted. Note that the present invention is not limited to this heat treatment, and the supply of impurities to the regions 108P and 108Q and the supply of oxygen to the region 108C serving as the channel formation region may also be performed in a heating step after the formation of the metal oxide film 108f (for example, in the step of forming the insulating layer 106).

[0483] Note that this heat treatment may not be performed if not necessary. Alternatively, the heat treatment may be omitted and a heat treatment performed in a subsequent step may be used as the heat treatment. Sometimes, a heat treatment in a subsequent step (e.g., a deposition step) may be used as the heat treatment.

[0484] Next, the insulating layer 106 is formed to cover the insulating layer 108 and the insulating layer 110. When forming the insulating layer 106, for example, a PECVD method, a sputtering method, or an ALD method can be used as appropriate.

[0485] When the insulating layer 106 has a stacked structure, it is more preferable to form these layers continuously in a vacuum. For example, when the insulating layer 106 has a stacked structure of an insulating layer 106a and an insulating layer 106b on the insulating layer 106a, it is preferable to form the insulating layer 106b continuously in a vacuum after forming the insulating layer 106a so as not to expose the surface of the insulating layer 106a to the atmosphere. By forming the insulating layers 106a and 106b continuously in a vacuum, it is possible to suppress the adhesion of impurities from the atmosphere to the surface of the insulating layer 106a. Examples of such impurities include water and organic matter.

[0486] By increasing the temperature during the formation of the insulating layer 106 used as a gate insulating layer, an insulating layer with fewer defects can be formed. However, when the temperature during the formation of the insulating layer 106 is high, oxygen is released from the layer 108, and sometimes oxygen vacancies in the layer 108 and V O H increases. The substrate temperature during formation of the insulating layer 106 is preferably 180° C. to 450° C., more preferably 200° C. to 450° C., more preferably 250° C. to 450° C., more preferably 300° C. to 450° C., more preferably 300° C. to 400° C. When the substrate temperature during formation of the insulating layer 106 is within the above range, defects in the insulating layer 106 can be reduced and oxygen desorption from the layer 108 can be suppressed. Consequently, a transistor exhibiting excellent electrical characteristics and high reliability can be realized.

[0487] The surface of the layer 108 may be subjected to plasma treatment before forming the insulating layer 106. This plasma treatment can reduce impurities such as water adsorbed on the surface of the layer 108. Therefore, impurities in the interface between the layer 108 and the insulating layer 106 can be reduced, so that a transistor with high reliability can be realized. In particular, it is preferable to perform plasma treatment when the surface of the layer 108 is exposed to the atmosphere between the formation of the layer 108 and the formation of the insulating layer 106. The plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like. The plasma treatment and the deposition of the insulating layer 106 are preferably performed continuously without being exposed to the atmosphere.

[0488] Next, a film to be the conductive layer 104 is formed on the insulating layer 106 and processed to form the conductive layer 104 ( Figure 49C ). When forming the film, for example, a sputtering method, a thermal CVD method (including an MOCVD method), or an ALD method can be appropriately used.

[0489] Through the above steps, the transistor 100 can be manufactured.

[0490] Next, an insulating layer 195 is formed so as to cover the conductive layer 104 and the insulating layer 106 ( Figure 49D ) When forming the insulating layer 195, a PECVD method can be appropriately used.

[0491] After the insulating layer 195 is formed, heat treatment may be performed.

[0492] Next, portions of the insulating layer 106 and the insulating layer 195 are removed to form an opening 187A reaching the region 108P and an opening 187B reaching the region 108Q.

[0493] Next, a film to be the conductive layer 182A and the conductive layer 182B is deposited so as to cover the opening 187A and the opening 187B, and the film is processed to form the conductive layer 182A and the conductive layer 182B ( Figure 1B ).

[0494] Through the above steps, the semiconductor device according to one embodiment of the present invention can be manufactured.

[0495] This embodiment mode can be combined with other embodiment modes as appropriate.

[0496] (Implementation 3)

[0497] In this embodiment, referring to Figure 50 to Figure 6 0 A display device according to one embodiment of the present invention will be described.

[0498] The display device of this embodiment mode can be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment mode can be used as a display portion of electronic devices with large screens, such as televisions, desktop or notebook computers, monitors for computers, digital signage, large-scale game consoles such as pinball machines, etc.; digital cameras; digital video cameras; digital photo frames; mobile phones; portable game consoles; portable information terminals; and audio reproduction devices.

[0499] The display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as the display portion of information terminal devices (wearable devices) such as watches and bracelets, as well as the display portion of wearable devices such as head-mounted displays (HMDs) for VR devices and glasses-type AR devices that can be worn on the head.

[0500] A semiconductor device according to one embodiment of the present invention can be used in a display device or a module including the display device. Examples of modules including the display device include a module in which a connector such as a flexible printed circuit (FPC) or a TCP (Tape Carrier Package) is mounted on the display device, and a module in which an integrated circuit (IC) is mounted using a COG (Chip On Glass) or COF (Chip On Film) method.

[0501] The display device of this embodiment may also have a touch panel function. For example, various detection elements (also called sensor elements) that can detect the approach or contact of a detection object such as a finger may be used as the display device.

[0502] Examples of sensor types include capacitance type, resistance film type, surface acoustic wave type, infrared type, optical type, and pressure sensitive type.

[0503] Examples of electrostatic capacitance include surface capacitance and projected capacitance. Projected capacitance also includes self-capacitance and mutual capacitance. Mutual capacitance is preferred because it allows for simultaneous multi-point sensing.

[0504] Examples of touch panels include out-cell, on-cell, and in-cell types. Note that an in-cell touch panel has electrodes constituting detection elements provided on one or both of a substrate supporting a display element and a counter substrate.

[0505] [Display device 50A]

[0506] Figure 50 It is a perspective view of the display device 50A.

[0507] The display device 50A has a structure in which a substrate 152 and a substrate 151 are bonded together. Figure 50 , the substrate 152 is indicated by a dotted line.

[0508] The display device 50A includes a display portion 162 , a connection portion 140 , a circuit portion 164 , a conductive layer 165 , and the like. Figure 50 The example in which the display device 50A is mounted with IC173 and FPC172 is shown. Figure 50 The structure shown is called a display module including the display device 50A, an IC, and an FPC.

[0509] The connection portion 140 is disposed outside the display portion 162. The connection portion 140 may be disposed along one side or multiple sides of the display portion 162. There may also be one or more connection portions 140. Figure 50 In the example shown, the connection portion 140 is provided so as to surround the four sides of the display portion. In the connection portion 140, the common electrode of the display element is electrically connected to the conductive layer, and a potential can be supplied to the common electrode.

[0510] The circuit portion 164 includes, for example, a scanning line driver circuit (also referred to as a gate driver). Alternatively, the circuit portion 164 may include both a scanning line driver circuit and a signal line driver circuit (also referred to as a source driver).

[0511] The conductive layer 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the conductive layer 165 from the outside through the FPC 172 or from the IC 173.

[0512] Figure 50The following illustrates an example of IC 173 being provided on substrate 151 using a COG method or a COF method. For example, IC 173 may include one or both of a scan line driver circuit and a signal line driver circuit. Note that the display device 50A and the display module do not necessarily need to include an IC. Alternatively, the IC may be mounted on an FPC using a COF method or the like.

[0513] A semiconductor device according to one embodiment of the present invention includes a vertical transistor (VFET) having a submicron channel length and a large on-state current. A semiconductor device according to one embodiment of the present invention can be used, for example, in one or both of the display portion 162 and the circuit portion 164 of the display device 50A. The channel formation region of the transistor included in the display device can appropriately use an oxide semiconductor (OS). By using OS transistors, a low-power display device can be achieved. In addition, a semiconductor device according to one embodiment of the present invention can be used for both the display portion 162 and the circuit portion 164. In other words, all transistors included in the display device can be OS transistors. In this way, when all transistors included in the display device are OS transistors, an effect such as reducing manufacturing costs is produced.

[0514] For example, when a semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, thereby realizing a high-definition display device. Furthermore, for example, when a semiconductor device according to one embodiment of the present invention is used in a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, thereby realizing a display device with a narrow frame. Furthermore, a semiconductor device according to one embodiment of the present invention has excellent electrical characteristics, and by using the semiconductor device in a display device, the reliability of the display device can be improved.

[0515] The display unit 162 is an image display region in the display device 50A, and includes a plurality of periodically arranged pixels 201 . Figure 50 An enlarged view of one pixel 201 is shown in FIG.

[0516] There are no particular limitations on the arrangement of pixels in the display device of this embodiment, and various methods can be employed. Examples of pixel arrangements include stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement.

[0517] Figure 50 The pixel 201 shown includes a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light.

[0518] Each of the sub-pixels 11R, 11G, and 11B includes a display element and a circuit for controlling driving of the display element.

[0519] Various elements can be used as display elements, for example, liquid crystal elements and light-emitting elements. In addition, MEMS (Micro Electro Mechanical Systems) elements using shutter or optical interference methods, display elements using microcapsule, electrophoresis, electrowetting, or electronic powder fluid (registered trademark) methods, etc. can also be used. In addition, QLED (Quantum-dot LED) using light source and color conversion technology using quantum dot materials can also be used.

[0520] Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.

[0521] Examples of modes that can be used in display devices using liquid crystal elements include the vertical alignment (VA) mode, the FFS (Fringe Field Switching) mode, the IPS (In-Plane Switching) mode, the TN (Twisted Nematic) mode, the ASM (Axially Symmetrically Aligned Microcell) mode, the OCB (Optically Compensated Birefringence) mode, the FLC (Ferroelectric Liquid Crystal) mode, the AFLC (Anti-Ferroelectric Liquid Crystal) mode, the ECB (Electrically Controlled Birefringence) mode, and the guest-host mode. Examples of the VA mode include the MVA (Multi-Domain Vertical Alignment) mode, the PVA (Patterned Vertical Alignment) mode, and the ASV (Advanced Super View) mode.

[0522] Examples of liquid crystal materials that can be used in liquid crystal elements include thermotropic liquid crystals, low-molecular-weight liquid crystals, high-molecular-weight liquid crystals, polymer-dispersed liquid crystals (PDLC), polymer-network liquid crystals (PNLC), ferroelectric liquid crystals, and antiferroelectric liquid crystals. These liquid crystal materials exhibit cholesteric, smectic, cubic, chiral nematic, isotropic, and blue phases, depending on the conditions. Both positive- and negative-working liquid crystals can be used, and the choice can be made based on the intended mode and design.

[0523] Examples of the light emitting element include self-luminous light emitting elements such as LED (Light Emitting Diode), OLED (Organic LED), and semiconductor lasers. Examples of the LED include miniature LEDs and micro LEDs.

[0524] Examples of the light-emitting substance contained in the light-emitting element include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) materials), and inorganic compounds (quantum dot materials, etc.).

[0525] The light emitting element may emit light of infrared, red, green, blue, cyan, magenta, yellow or white, etc. In addition, when the light emitting element has a microcavity structure, the color purity can be further improved.

[0526] Of a pair of electrodes included in the light-emitting element, one electrode serves as an anode and the other electrode serves as a cathode.

[0527] A display device according to one embodiment of the present invention may also adopt any of the following structures: a top emission type (top emission type) that emits light in a direction opposite to the substrate on which the light-emitting element is formed, a bottom emission type (bottom emission type) that emits light toward one side of the substrate on which the light-emitting element is formed, or a dual emission type (dual emission type) that emits light toward both sides.

[0528] Figure 51A An example of a cross section of display device 50A is shown, showing a portion of a region including FPC 172, a portion of circuit portion 164, a portion of display portion 162, a portion of connection portion 140, and a portion of a region including an end portion. Multiple layers obtained by processing the same conductive film are shaded identically.

[0529] Figure 51A Display device 50A shown includes transistors 205D, 205R, 205G, and 205B, light-emitting elements 130R, 130G, and 130B, etc., between substrates 151 and 152. Light-emitting element 130R is a display element included in sub-pixel 11R that emits red light, light-emitting element 130G is a display element included in sub-pixel 11G that emits green light, and light-emitting element 130B is a display element included in sub-pixel 11B that emits blue light.

[0530] The display device 50A adopts an SBS structure. The SBS structure allows for optimization of the material and structure of each light-emitting element, thus increasing the freedom of material and structure selection and making it easier to improve brightness and reliability.

[0531] The display device 50A adopts a top emission type. In a top emission type, transistors and the like can be arranged so as to overlap with the light-emitting region of a light-emitting element, thereby further improving the pixel aperture ratio compared to a bottom emission type.

[0532] The transistors 205D, 205R, 205G, and 205B are all formed over the substrate 151. These transistors can be manufactured using the same materials and the same process.

[0533] In this embodiment, an example of using OS transistors as transistors 205D, 205R, 205G, and 205B is shown. As transistors 205D, 205R, 205G, and 205B, transistors according to one embodiment of the present invention can be used. That is, in the display device 50A, both the display unit 162 and the circuit unit 164 include transistors according to one embodiment of the present invention. By using a transistor according to one embodiment of the present invention in the display unit 162, the pixel size can be reduced and high definition can be achieved. In addition, by using a transistor according to one embodiment of the present invention in the circuit unit 164, the area occupied by the circuit unit 164 can be reduced and a narrow frame can be achieved. For information about the transistor according to one embodiment of the present invention, reference can be made to the description of the above embodiment.

[0534] Specifically, transistors 205D, 205R, 205G, and 205B each include a conductive layer 104 serving as a gate electrode, an insulating layer 106 serving as a gate insulating layer, and a layer 108 containing a metal oxide. Layer 108 includes a region 108P (not shown) in contact with insulating layer 109. Region 108P serves as one of a source and a drain. Layer 108 includes a region 108Q (not shown) in contact with insulating layer 110b. Region 108Q serves as the other of a source and a drain.

[0535] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the transistor of one embodiment of the present invention may be combined with a transistor of another structure.

[0536] The display device of this embodiment may include, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor. The transistors included in the display device of this embodiment may have either a top-gate structure or a bottom-gate structure. Alternatively, gate electrodes may be provided above and below the layer forming the channel.

[0537] The display device of this embodiment may also include a Si transistor.

[0538] To increase the brightness of the light-emitting element included in a pixel circuit, the current flowing through the light-emitting element needs to be increased. To achieve this, the source-drain voltage of the driver transistor included in the pixel circuit needs to be increased. Because the source-drain withstand voltage of an OS transistor is higher than that of a Si transistor, a high voltage can be applied to the source-drain of the OS transistor. Therefore, by using an OS transistor as the driver transistor included in the pixel circuit, the current flowing through the light-emitting element can be increased, thereby improving the brightness of the light-emitting element.

[0539] When operating in the saturation region, OS transistors can make changes in the source-drain current smaller than those of Si transistors in response to changes in the gate-source voltage. Therefore, by using OS transistors as driver transistors in pixel circuits, the current flowing between the source and drain can be precisely determined based on changes in the gate-source voltage, allowing the amount of current flowing through the light-emitting element to be controlled. This increases the number of grayscales in the pixel circuit.

[0540] Regarding the saturation of the current flowing through the transistor when operating in the saturation region, compared to Si transistors, OS transistors can allow a stable current (saturation current) to flow even if the source-drain voltage is gradually increased. Therefore, by using OS transistors as drive transistors, a stable current can flow through the light-emitting element even if, for example, the current-voltage characteristics of the light-emitting element are uneven. In other words, when the OS transistor operates in the saturation region, even if the source-drain voltage changes, the source-drain current remains almost unchanged, thereby stabilizing the light emission brightness of the light-emitting element.

[0541] The transistors included in the circuit portion 164 and the transistors included in the display portion 162 may have the same structure or different structures. The multiple transistors included in the circuit portion 164 may have the same structure or two or more different structures. Similarly, the multiple transistors included in the display portion 162 may have the same structure or two or more different structures.

[0542] All transistors included in the display portion 162 may be OS transistors, all transistors included in the display portion 162 may be Si transistors, or some transistors included in the display portion 162 may be OS transistors and the remaining transistors may be Si transistors.

[0543] For example, by using both LTPS transistors and OS transistors in the display portion 162, a display device with low power consumption and high driving capability can be realized. A structure combining LTPS and OS transistors is sometimes referred to as LTPO. A more preferred example is a structure in which an OS transistor is used as a transistor used as a switch to control conduction / non-conduction between wirings, and an LTPS transistor is used as a transistor to control current flow.

[0544] For example, one of the transistors included in the display unit 162 is used as a transistor for controlling the current flowing through the light-emitting element and may also be referred to as a drive transistor. One of the source and drain of the drive transistor is electrically connected to the pixel electrode of the light-emitting element. An LTPS transistor is preferably used as the drive transistor. This increases the current flowing through the light-emitting element in the pixel circuit.

[0545] On the other hand, one of the other transistors included in the display unit 162 is used as a switch for controlling the selection and non-selection of pixels, and may also be referred to as a selection transistor. The gate of the selection transistor is electrically connected to the gate line, and one of the source and drain is electrically connected to the source line (signal line). An OS transistor is preferably used as the selection transistor. Therefore, even if the frame rate is significantly reduced (for example, below 1 fps), the grayscale of the pixel can be maintained, thereby reducing power consumption by stopping the driver when displaying a static image.

[0546] An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided over the insulating layer 218 .

[0547] The insulating layer 218 is preferably used as a protective layer for the transistor. A material that does not readily diffuse impurities such as water and hydrogen is preferably used for the insulating layer 218. This allows the insulating layer 218 to function as a barrier film. This structure effectively prevents impurities from diffusing into the transistor from the outside, thereby improving the reliability of the display device.

[0548] The insulating layer 218 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. Specific examples of materials that can be used for the inorganic insulating film are as described above.

[0549] The insulating layer 235 is preferably used as a planarization layer, and an organic insulating film is suitable. As materials that can be used for the organic insulating film, for example, acrylic resins, polyimide resins, epoxy resins, polyamide resins, polyimide amide resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins can be used. In addition, the insulating layer 235 can also adopt a stacked structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. As a result, when processing the pixel electrodes 111R, 111G, 111B, etc., the formation of recesses in the insulating layer 235 can be suppressed. Alternatively, recesses can be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.

[0550] The light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235 .

[0551] The light emitting element 130R includes a pixel electrode 111R on the insulating layer 235 , an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. Figure 51A The light emitting element 130R shown emits red light (R). The EL layer 113R includes a light emitting layer that emits red light.

[0552] The light-emitting element 130G includes a pixel electrode 111G on the insulating layer 235 , an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. Figure 51A The light-emitting element 130G shown emits green light (G). The EL layer 113G includes a light-emitting layer that emits green light.

[0553] The light-emitting element 130B includes a pixel electrode 111B on the insulating layer 235 , an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. Figure 51A The light-emitting element 130B shown emits blue light (B). The EL layer 113B includes a light-emitting layer that emits blue light.

[0554] Note that in Figure 51A EL layers 113R, 113G, and 113B are shown as having the same thickness, but this is not limiting. EL layers 113R, 113G, and 113B may also have different thicknesses. For example, the thicknesses are preferably set to enhance the optical path length of light emitted by EL layers 113R, 113G, and 113B. This allows for a microcavity structure to be implemented, thereby improving the color purity of light emitted from each light-emitting element.

[0555] Pixel electrode 111R is electrically connected to region 108P of transistor 205R via openings provided in insulating layer 106, insulating layer 195, insulating layer 218, and insulating layer 235. Similarly, pixel electrode 111G is electrically connected to region 108P of transistor 205G, and pixel electrode 111B is electrically connected to region 108P of transistor 205B.

[0556] Each end of the pixel electrodes 111R, 111G, and 111B is covered by an insulating layer 237. The insulating layer 237 serves as a partition wall. The insulating layer 237 can be formed using one or both of an inorganic insulating material and an organic insulating material to form a single-layer structure or a stacked-layer structure. For example, the insulating layer 237 can use the material that can be used for the insulating layer 218 and the material that can be used for the insulating layer 235. The insulating layer 237 can electrically insulate the pixel electrodes from the common electrode. In addition, the insulating layer 237 can electrically insulate adjacent light-emitting elements.

[0557] The insulating layer 237 is provided at least in the display portion 162. The insulating layer 237 may be provided not only in the display portion 162 but also in the connection portion 140 and the circuit portion 164. Alternatively, the insulating layer 237 may be provided so as to extend to the end portion of the display device 50A.

[0558] Common electrode 115 is a continuous film shared by light-emitting elements 130R, 130G, and 130B. Common electrode 115, shared by multiple light-emitting elements, is electrically connected to conductive layer 123 provided in connection portion 140. Conductive layer 123 is preferably formed using the same material and process as pixel electrodes 111R, 111G, and 111B.

[0559] In a display device according to one embodiment of the present invention, a conductive film that transmits visible light is used as the electrode on the light extraction side of the pixel electrode and the common electrode. A conductive film that reflects visible light is preferably used as the electrode on the side that does not extract light.

[0560] The electrode on the side that does not extract light can also be made of a conductive film that transmits visible light. In this case, it is preferably placed between the reflective layer and the EL layer. In other words, the light emitted by the EL layer can also be reflected by the reflective layer and extracted from the display device.

[0561] As the material for forming a pair of electrodes of the light-emitting element, metals, alloys, conductive compounds and mixtures thereof can be appropriately used. As such materials, specifically, metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium and neodymium and alloys thereof as appropriate combinations thereof can be cited. In addition, such materials include indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide) and In-W-Zn oxide. In addition, such materials include aluminum alloys (aluminum alloys) such as alloys of aluminum, nickel and lanthanum (Al-Ni-La), silver alloys such as alloys of silver and magnesium and alloys of silver, palladium and copper (also referred to as Ag-Pd-Cu, APC) and silver alloys. In addition, examples of the material include elements belonging to Group 1 or Group 2 of the periodic table (e.g., lithium, cesium, calcium, strontium) not listed above, rare earth metals such as europium and ytterbium, alloys of appropriately combined elements, and graphene.

[0562] The light-emitting element preferably employs a microcavity resonator (microcavity) structure. Therefore, one of the pair of electrodes included in the light-emitting element is preferably an electrode that is both transmissive and reflective to visible light (a semi-transmissive / semi-reflective electrode), while the other is preferably an electrode that is reflective to visible light (a reflective electrode). When the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can resonate between the two electrodes, thereby enhancing the light emitted from the light-emitting element.

[0563] The light transmittance of the transparent electrode is 40% or more. For example, an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as a transparent electrode of a light-emitting element. The reflectivity of the semi-transmissive-semi-reflective electrode to visible light is 10% or more and 95% or less, preferably 30% or more and 80% or less. The reflectivity of the reflective electrode to visible light is 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ωcm or less.

[0564] The EL layers 113R, 113G, and 113B are all arranged in an island shape. Figure 51A In the embodiment, the end of the adjacent EL layer 113R overlaps with the end of the EL layer 113G, the end of the adjacent EL layer 113G overlaps with the end of the EL layer 113B, and the end of the adjacent EL layer 113R overlaps with the end of the EL layer 113B. Figure 51AAs shown in FIG. 1 , when depositing island-shaped EL layers using a high-definition metal mask, the ends of adjacent EL layers may overlap. However, the present invention is not limited to this. In other words, adjacent EL layers may be separated without overlapping. Furthermore, a display device may have both overlapping and separated portions of adjacent EL layers.

[0565] EL layers 113R, 113G, and 113B each include at least a light-emitting layer. The light-emitting layer contains one or more light-emitting substances. As the light-emitting substance, a substance that emits light in a color such as blue, purple, bluish-purple, green, yellow-green, yellow, orange, or red is suitably used. Alternatively, a substance that emits near-infrared light may be used.

[0566] Examples of the light-emitting substance include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0567] In addition to the light-emitting substance (guest material), the light-emitting layer may also contain one or more organic compounds (host material, auxiliary material, etc.). As the one or more organic compounds, one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) can be used. In addition, as the one or more organic compounds, a bipolar substance (a substance with high electron transport properties and hole transport properties) or a TADF material can also be used.

[0568] For example, the light-emitting layer preferably comprises a combination of a phosphorescent material, a hole transport material that easily forms an exciplex, and an electron transport material. By adopting such a structure, it is possible to efficiently obtain light emission by ExTET (Exciplex-Triplet Energy Transfer) that utilizes energy transfer from the exciplex to the luminescent substance (phosphorescent material). In addition, by selecting a combination of light whose emission wavelength overlaps with the absorption band on the lowest energy side of the luminescent substance as the exciplex, energy transfer can be smoothed, thereby efficiently obtaining light emission. By adopting the above structure, high efficiency, low voltage drive, and long life of the light-emitting element can be achieved at the same time.

[0569] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting properties (hole-injection layer), a layer containing a hole-transporting material (hole-transport layer), a layer containing a substance with high electron-blocking properties (electron-blocking layer), a layer containing a substance with high electron-injecting properties (electron-injection layer), a layer containing an electron-transporting material (electron-transport layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer). Furthermore, the EL layer may include one or both of a bipolar material and a TADF material.

[0570] The light-emitting element may use a low molecular weight compound or a high molecular weight compound, and may also contain an inorganic compound. The layers constituting the light-emitting element may be formed by methods such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, and coating.

[0571] The light-emitting element can adopt a single structure (a structure with only one light-emitting unit) or a series structure (a structure including multiple light-emitting units). The light-emitting unit includes at least one light-emitting layer. The series structure has a structure in which multiple light-emitting units are connected in series through a charge generation layer. The charge generation layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes. By adopting a series structure, a light-emitting element that can emit light with high brightness can be realized. In addition, the series structure can improve reliability because it can reduce the current required to obtain the same brightness compared to the single structure. In addition, the series structure can also be called a stacked structure.

[0572] exist Figure 51A When a tandem-structured light-emitting element is used, it is preferred that the EL layer 113R include multiple light-emitting units emitting red light, the EL layer 113G include multiple light-emitting units emitting green light, and the EL layer 113B include multiple light-emitting units emitting blue light.

[0573] A protective layer 131 is provided on the light emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded by an adhesive layer 142. The substrate 152 is provided with a light shielding layer 117. As a seal for the light emitting element, for example, a solid sealing structure or a hollow sealing structure can be used. Figure 51A In the embodiment, the space between substrate 152 and substrate 151 is filled with adhesive layer 142, i.e., a solid sealing structure is adopted. Alternatively, a hollow sealing structure can be adopted in which the space is filled with an inert gas (nitrogen or argon, etc.). In this case, adhesive layer 142 can also be arranged in a manner that does not overlap with the light-emitting element. In addition, a resin different from the adhesive layer 142 arranged in a frame shape can also be used to fill the space.

[0574] Protective layer 131 is provided at least within display portion 162, preferably covering the entire display portion 162. Protective layer 131 is preferably provided to cover not only display portion 162 but also connection portion 140 and circuit portion 164. Furthermore, protective layer 131 is preferably provided to extend to the end of display device 50A. Meanwhile, in order to electrically connect FPC 172 to conductive layer 166, some portions of connection portion 197 are not provided with protective layer 131.

[0575] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.

[0576] The protective layer 131 may have a single-layer structure or a stacked structure of two or more layers. There is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film may be used.

[0577] When the protective layer 131 includes an inorganic film, degradation of the light emitting element can be suppressed, such as preventing oxidation of the common electrode 115 and suppressing impurities (moisture, oxygen, etc.) from entering the light emitting element, thereby improving the reliability of the display device.

[0578] For example, an inorganic insulating film containing one or more of oxide, nitride, oxynitride, and oxynitride can be used as the protective layer 131. Specific examples of materials that can be used for the inorganic insulating film are as described above. In particular, the protective layer 131 preferably includes a nitride or an oxynitride, and more preferably includes a nitride.

[0579] An inorganic film including ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO may be used as the protective layer 131. The inorganic film preferably has a high resistance, and more specifically, preferably has a resistance higher than that of the common electrode 115. The inorganic film may further contain nitrogen.

[0580] When light emitted from the light-emitting element is extracted through the protective layer 131, the protective layer 131 preferably has high visible light transmittance. For example, ITO, IGZO, and alumina are inorganic materials with high visible light transmittance and are therefore preferred.

[0581] For example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used as the protective layer 131. This stacked structure can suppress the intrusion of impurities (such as water and oxygen) into the EL layer.

[0582] Furthermore, the protective layer 131 may include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 131 include organic insulating films that can be used for the insulating layer 235.

[0583] A connection portion 197 is provided in an area where the substrate 151 and the substrate 152 do not overlap. In the connection portion 197, the conductive layer 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242. FIG. 51 shows an example in which the conductive layer 165 has the same structure as the area 108P of the layer 108. For example, a film that will become the layer 108 and the conductive layer 165 is formed and processed. The area 108P and the conductive layer 165 are formed in the area in contact with the uppermost layer of the insulating layer 110 (here, the insulating layer 110b) in the layer 108. An example of a single-layer structure in which the conductive layer 166 is obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B is shown. The conductive layer 166 is exposed on the top surface of the connection portion 197. Therefore, the connection portion 197 can be electrically connected to the FPC 172 via the connection layer 242.

[0584] Display device 50A employs a top-emission type. Light emitted by the light-emitting element is emitted toward substrate 152. Substrate 152 is preferably made of a material that has high visible light transmittance. Pixel electrodes 111R, 111G, and 111B are made of a material that reflects visible light, while the counter electrode (common electrode 115) is made of a material that transmits visible light.

[0585] A light-shielding layer 117 is preferably provided on the surface of the substrate 152 on the substrate 151 side. The light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connecting portion 140, the circuit portion 164, and the like.

[0586] Alternatively, a colored layer such as a color filter may be provided on the substrate 151 side surface of the substrate 152 or on the protective layer 131. When the color filter is provided so as to overlap with the light-emitting element, the color purity of light emitted from the pixel can be improved.

[0587] Colored layers selectively transmit light of specific wavelengths while absorbing light of other wavelengths. For example, a red (R) filter that transmits light in the red wavelength range, a green (G) filter that transmits light in the green wavelength range, and a blue (B) filter that transmits light in the blue wavelength range can be used. Each colored layer can be made of one or more of a metal material, a resin material, a pigment, or a dye. The colored layers are formed in the desired locations using methods such as printing, inkjet printing, and etching using photolithography.

[0588] In addition, various optical components can be configured on the outside of the substrate 152 (the surface on the side opposite to the substrate 151). As optical components, for example, polarizers, phase difference plates, light diffusion layers (diffusion films, etc.), anti-reflection layers and light-concentrating films (condensing films) can be cited. In addition, surface protection layers such as an antistatic film that suppresses the adhesion of dust, a water-repellent film that is not easily soiled, a hard coating that suppresses damage during use, and an impact-absorbing layer can also be configured on the outside of the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiOx layer) as a surface protection layer, it is possible to prevent the surface from being soiled or damaged, so it is preferred. In addition, DLC (diamond-like carbon), aluminum oxide (AlOx), polyester materials or polycarbonate materials can also be used as surface protection layers. In addition, as a surface protection layer, it is preferred to use a material with high transmittance to visible light. In addition, a material with high hardness is preferably used for the surface protection layer.

[0589] Glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, or the like can be used for each of substrates 151 and 152. The substrate on the side that extracts light from the light-emitting element uses a material that transmits that light. By using flexible materials for substrates 151 and 152, the flexibility of the display device can be increased, thereby realizing a flexible display. A polarizing plate may also be used as at least one of substrates 151 and 152.

[0590] The following materials can be used for substrate 151 and substrate 152, respectively: polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyethersulfone (PES) resins, polyamide resins (such as nylon and aramid), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamide-imide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, and cellulose nanofibers. Furthermore, glass having a thickness sufficient to provide flexibility can be used for at least one of substrate 151 and substrate 152.

[0591] When a circular polarizer is superimposed on a display device, it is preferred that a substrate with high optical isotropy be used as the substrate included in the display device. A substrate with high optical isotropy has low birefringence (or, in other words, low birefringence). Examples of films with high optical isotropy include triacetyl cellulose (TAC, also known as triacetyl cellulose) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic resin films.

[0592] As the adhesive layer 142, various curing adhesives such as light-curing adhesives such as ultraviolet curing adhesives, reaction-curing adhesives, heat-curing adhesives, and anaerobic adhesives can be used. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. In particular, materials with low moisture permeability such as epoxy resins are preferably used. In addition, two-liquid mixed resins can also be used. In addition, adhesive sheets can also be used.

[0593] As the connection layer 242 , an anisotropic conductive film (ACF), anisotropic conductive paste (ACP), or the like can be used.

[0594] [Display device 50B]

[0595] Figure 51B An example of a cross section of display portion 162 of display device 50B is shown. Display device 50B differs from display device 50A primarily in that subpixels of each color use a light-emitting element including a shared EL layer 113 and a coloring layer (color filter, etc.). Figure 51B The structure shown can be combined with Figure 51A The illustrated area includes the FPC 172, the circuit portion 164, the stacked structure from the substrate 151 to the insulating layer 235 of the display portion 162, the connection portion 140, and the end structure. Note that in the description of the display device described later, description of parts identical to those of the previously described display device may be omitted.

[0596] Figure 51B The display device 50B shown includes light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0597] The light emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50B through the colored layer 132R.

[0598] The light emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50B through the colored layer 132G.

[0599] The light-emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted from the light-emitting element 130B is extracted as blue light to the outside of the display device 50B through the colored layer 132B.

[0600] The light-emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 115. Compared with a structure in which each sub-pixel of each color has a different EL layer, a structure in which each sub-pixel of each color shares the EL layer 113 can reduce the number of manufacturing steps.

[0601] For example, Figure 51B The light emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0602] The white light-emitting element preferably includes two or more light-emitting layers. In the case of using two light-emitting layers to obtain white light, the light-emitting layers can be selected in such a way that the light-emitting colors of the two light-emitting layers are in a complementary color relationship. For example, by making the light-emitting colors of the first light-emitting layer and the light-emitting colors of the second light-emitting layer complementary colors, a structure in which the light-emitting element as a whole emits white light can be obtained. In addition, in the case of using three or more light-emitting layers to obtain white light, the light-emitting colors of the three or more light-emitting layers can be combined to obtain a structure in which the light-emitting element as a whole emits white light.

[0603] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light having a wavelength longer than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0604] Light-emitting elements emitting white light preferably adopt a series structure. Specifically, the following can be adopted: a two-stage series structure including a light-emitting unit emitting yellow light and a light-emitting unit emitting blue light; a two-stage series structure including a light-emitting unit emitting red and green light, and a light-emitting unit emitting blue light; a three-stage series structure including, in sequence, a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light, or green light, and a light-emitting unit emitting blue light; or a three-stage series structure including, in sequence, a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light, or green light, and red light, and a light-emitting unit emitting blue light. For example, examples of the number of layers stacked and the color sequence of the light-emitting unit include a two-stage structure in which B and Y are stacked from the anode side, a two-stage structure in which B and the light-emitting unit X are stacked, a three-stage structure in which B, Y, and B are stacked, and a three-stage structure in which B, X, and B are stacked. Examples of the number of layers stacked and the color sequence of the light-emitting layer in the light-emitting unit X include a two-stage structure in which R and Y are stacked from the anode side, a two-stage structure in which R and G are stacked, a two-stage structure in which G and R are stacked, a three-stage structure in which G, R, and G are stacked, and a three-stage structure in which R, G, and R are stacked. Furthermore, other layers may be provided between the two light-emitting layers.

[0605] In addition, a light-emitting element that emits white light may emit light with a specific color, such as red, green, or blue, enhanced by adopting a microcavity structure.

[0606] Or, for example Figure 51B The light-emitting elements 130R, 130G, and 130B shown emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. For sub-pixel 11B that emits blue light, the blue light emitted by light-emitting element 130B can be extracted. Furthermore, for sub-pixel 11R that emits red light and sub-pixel 11G that emits green light, by providing a color conversion layer between light-emitting element 130R or 130G and substrate 152, the blue light emitted by light-emitting element 130R or 130G can be converted into light with a longer wavelength and extracted as red or green light. Furthermore, it is preferable to provide a colored layer 132R between the color conversion layer on light-emitting element 130R and substrate 152, and a colored layer 132G between the color conversion layer on light-emitting element 130G and substrate 152. Some of the light emitted by the light-emitting elements may be transmitted through the color conversion layer without being converted. By extracting the light that has passed through the color conversion layer through the colored layer, the colored layer absorbs light other than the desired color light, thereby improving the color purity of the light presented by the sub-pixel.

[0607] [Display device 50C]

[0608] Figure 52 The main difference between the display device 50C shown and the display device 50B is that the former is a bottom emission type display device.

[0609] Light emitted by the light-emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.

[0610] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Figure 52 In the example shown, a light-shielding layer 117 is provided over a substrate 151, an insulating layer 153 is provided over the light-shielding layer 117, and transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. Furthermore, colored layers 132R, 132G, and 132B are provided over an insulating layer 218, and an insulating layer 235 is provided over the colored layers 132R, 132G, and 132B.

[0611] The light-emitting element 130R overlapping the colored layer 132R includes a pixel electrode 111R, an EL layer 113 , and a common electrode 115 .

[0612] The light-emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113 , and a common electrode 115 .

[0613] The light-emitting element 130B overlapping the colored layer 132B includes a pixel electrode 111B, an EL layer 113 , and a common electrode 115 .

[0614] Pixel electrodes 111R, 111G, and 111B are each made of a material with high visible light transmittance. Common electrode 115 is preferably made of a material that reflects visible light. Because low-resistance metals, etc., can be used for common electrode 115 in bottom-emission display devices, voltage drops caused by the resistance of common electrode 115 can be suppressed, achieving high display quality.

[0615] The transistor of one embodiment of the present invention can be miniaturized and have a smaller occupied area, thereby enabling an increase in the aperture ratio of pixels or a reduction in the size of pixels in a bottom emission display device.

[0616] [Display device 50D]

[0617] Figure 53A The main difference between the display device 50D shown and the display device 50A is that the former includes a light receiving element 130S.

[0618] Display device 50D includes light-emitting elements and light-receiving elements in its pixels. In display device 50D, it is preferred to use organic EL elements as the light-emitting elements and organic photodiodes as the light-receiving elements. The organic EL elements and organic photodiodes can be formed on the same substrate. Therefore, organic photodiodes can be incorporated into display devices using organic EL elements.

[0619] In a display device 50D in which pixels include both light-emitting elements and light-receiving elements, the pixels have a light-receiving function, allowing the display device to simultaneously detect the contact or proximity of an object while displaying an image. Therefore, the display unit 162 has one or both of an imaging function and a sensing function in addition to the image display function. For example, rather than displaying an image using all of the sub-pixels included in the display device 50D, a portion of the sub-pixels can be used as light sources to emit light, another portion of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display the image.

[0620] Therefore, there is no need to provide a separate light receiving unit and light source from the display device 50D, which can reduce the number of components in the electronic device. For example, there is no need to separately install a biometric recognition device or an electrostatic capacitive touch panel for scrolling, etc. in the electronic device. Therefore, by using the display device 50D, it is possible to provide an electronic device with reduced manufacturing costs.

[0621] When a light receiving element is used as an image sensor, the display device 50D can capture images using the light receiving element. For example, the image sensor can be used to capture images for personal identification using fingerprints, palm prints, irises, vein shapes (including vein shapes and artery shapes), or faces.

[0622] Light-receiving elements can be used in touch sensors (also called direct touch sensors) or contactless sensors (also called hover sensors, hover touch sensors, and non-touch sensors). Touch sensors detect objects (such as fingers, hands, and pens) when they directly touch the display device. Contactless sensors can detect objects even when they are not touching the display device.

[0623] The light emitting element 130S includes a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from outside the display device 50D.

[0624] The pixel electrode 111S is electrically connected to a region 108P of the layer 108 of the transistor 205S through an opening provided in the insulating layer 106 , the insulating layer 195 , the insulating layer 218 , and the insulating layer 235 .

[0625] The end portion of the pixel electrode 111S is covered with the insulating layer 237 .

[0626] The common electrode 115 is a continuous film shared by the light-receiving element 130S, the light-emitting element 130R (not shown), the light-emitting element 130G, and the light-emitting element 130B. The common electrode 115 shared by the light-emitting and light-receiving elements is electrically connected to the conductive layer 123 provided in the connection portion 140 .

[0627] The functional layer 113S includes at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors including organic compounds. In this embodiment, an example of using an organic semiconductor as a semiconductor contained in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum deposition method), and manufacturing equipment can be used in common, which is preferable.

[0628] The functional layer 113S may also include a layer containing a substance with high hole-transporting properties, a substance with high electron-transporting properties, or a bipolar material as a layer other than the active layer. Furthermore, without limitation thereto, the functional layer 113S may also include a layer containing a substance with high hole-injecting properties, a hole-blocking material, a substance with high electron-injecting properties, or an electron-blocking material. For example, the materials described above for use in light-emitting elements can be used as the functional layer 113S.

[0629] The light-receiving element can be formed using low molecular weight compounds or high molecular weight compounds, and can also contain inorganic compounds. The layers constituting the light-receiving element can be formed by methods such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, and coating.

[0630] Figure 53B and Figure 53C The display device 50D shown includes a layer 353 including a light-receiving element, a circuit layer 355 , and a layer 357 including a light-emitting element between a substrate 151 and a substrate 152 .

[0631] The layer 353 includes, for example, the light-receiving element 130S. The layer 357 includes, for example, the light-emitting elements 130R, 130G, and 130B.

[0632] Circuit layer 355 includes circuits for driving the light-receiving elements and circuits for driving the light-emitting elements. Circuit layer 355 includes, for example, transistors 205R, 205G, and 205B. In addition, circuit layer 355 may include one or more switches, transistors, capacitors, resistors, wiring, terminals, and the like.

[0633] Figure 53B This is an example of using the light receiving element 130S as a touch sensor. Figure 53BAs shown, when finger 352 touching display device 50D reflects light emitted by the light emitting element in layer 357, the light receiving element in layer 353 detects the reflected light. This allows detection of finger 352 touching display device 50D.

[0634] Figure 53C This is an example of using the light receiving element 130S as a non-contact sensor. Figure 53C As shown, when a finger 352 approaching (ie, not in contact with) the display device 50D reflects light emitted by the light-emitting element in the layer 357 , the light-receiving element in the layer 353 detects the reflected light.

[0635] [Display device 50E]

[0636] Figure 54A Display device 50E shown in the figure is an example of a display device employing an MML (Metal Mask Less) structure. Specifically, display device 50E includes a light-emitting element manufactured without using a high-definition metal mask. Note that the stacked structure from substrate 151 to insulating layer 235 and the stacked structure from protective layer 131 to substrate 152 are similar to those of display device 50A, and therefore their description is omitted.

[0637] exist Figure 54A In the embodiment, light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235 .

[0638] The light emitting element 130R includes a conductive layer 124R on the insulating layer 235 , a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114 . Figure 54A Light-emitting element 130R shown emits red light (R). Layer 133R includes a light-emitting layer that emits red light. In light-emitting element 130R, layer 133R and common layer 114 can be collectively referred to as an EL layer. One or both of conductive layer 124R and conductive layer 126R can be referred to as a pixel electrode.

[0639] The light emitting element 130G includes a conductive layer 124G on the insulating layer 235 , a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114 . Figure 54A Light-emitting element 130G shown emits green light (G). Layer 133G includes a light-emitting layer that emits green light. In light-emitting element 130G, layer 133G and common layer 114 can be collectively referred to as an EL layer. One or both of conductive layer 124G and conductive layer 126G can be referred to as a pixel electrode.

[0640] The light emitting element 130B includes a conductive layer 124B on the insulating layer 235 , a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114 . Figure 54A Light-emitting element 130B shown emits blue light (B). Layer 133B includes a light-emitting layer that emits blue light. In light-emitting element 130B, layer 133B and common layer 114 can be collectively referred to as an EL layer. One or both of conductive layer 124B and conductive layer 126B can be referred to as a pixel electrode.

[0641] In this specification and other documents, an island-shaped layer provided for each light-emitting element in the EL layer included in a light-emitting element is referred to as layer 133R, layer 133G, or layer 133B, and a layer shared by a plurality of light-emitting elements is referred to as common layer 114. Furthermore, in this specification and other documents, layers 133R, 133G, and 133B excluding common layer 114 may be referred to as island-shaped EL layers, EL layers formed in an island shape, or the like.

[0642] Layers 133R, 133G, and 133B are separated from each other. Providing island-shaped EL layers in each light-emitting element suppresses leakage current between adjacent light-emitting elements. This reduces unintended light emission caused by crosstalk, enabling the realization of a display device with a very high contrast ratio.

[0643] In addition, Figure 54A In FIG. 1 , the film thicknesses of the layers 133R, 133G, and 133B are shown as being the same, but the present invention is not limited thereto and the film thicknesses of the layers 133R, 133G, and 133B may be different from each other.

[0644] Conductive layer 124R is electrically connected to region 108P of layer 108 of transistor 205R via openings provided in insulating layer 106, insulating layer 195, insulating layer 218, and insulating layer 235. Similarly, conductive layer 124G is electrically connected to region 108P of layer 108 of transistor 205G, and conductive layer 124B is electrically connected to region 108P of layer 108 of transistor 205B.

[0645] Conductive layers 124R, 124G, and 124B are formed to cover the openings provided in insulating layer 235. The recessed portions of conductive layers 124R, 124G, and 124B are filled with layer 128, respectively.

[0646] Layer 128 flattens the concave portions of conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B are provided on conductive layers 124R, 124G, and 124B, and electrically connected to conductive layers 124R, 124G, and 124B. Therefore, the areas overlapping the concave portions of conductive layers 124R, 124G, and 124B can also be used as light-emitting areas, thereby increasing the pixel aperture ratio. Conductive layers 124R and 126R are preferably conductive layers that function as reflective electrodes.

[0647] Layer 128 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for layer 128. In particular, layer 128 is preferably formed of an insulating material, and an organic insulating material is particularly preferred. For example, the organic insulating material used for insulating layer 237 described above can be used as layer 128.

[0648] Although Figure 54A An example is shown in which the top surface of the layer 128 has a flat portion, but there is no particular limitation on the shape of the layer 128. The top surface of the layer 128 may have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0649] The height of the top surface of layer 128 may be the same as or substantially the same as the height of the top surface of conductive layer 124R, or may be different from each other. For example, the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.

[0650] The ends of conductive layer 126R may also be aligned with the ends of conductive layer 124R and may also cover the side surfaces of the ends of conductive layer 124R. Each end of conductive layer 124R and conductive layer 126R preferably has a tapered shape. Specifically, each end of conductive layer 124R and conductive layer 126R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the ends of the pixel electrode have a tapered shape, layer 133R disposed along the side surfaces of the pixel electrode has an inclined portion. By providing the side surfaces of the pixel electrode with a tapered shape, the EL layer disposed along the side surfaces of the pixel electrode can provide good coverage.

[0651] Since the conductive layers 124G and 126G and the conductive layers 124B and 126B are the same as the conductive layers 124R and 126R, detailed description thereof will be omitted.

[0652] The top and side surfaces of conductive layer 126R are covered by layer 133R. Similarly, the top and side surfaces of conductive layer 126G are covered by layer 133G, and the top and side surfaces of conductive layer 126B are covered by layer 133B. Therefore, the entire area where conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting area of light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0653] Part of the top surface and side surfaces of layers 133R, 133G, and 133B are covered by insulating layers 125 and 127. A common layer 114 is provided on layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on common layer 114. Both common layer 114 and common electrode 115 are continuous films shared by multiple light-emitting elements.

[0654] exist Figure 54A There is no arrangement between the conductive layer 126R and the layer 133R. Figure 51A The insulating layer 237 shown in FIG. 1 is a diagram illustrating an insulating layer 237 shown in FIG. 1 . That is, the display device 50E is not provided with an insulating layer (also referred to as a partition wall, dam, spacer, etc.) that contacts the pixel electrode and covers the top end of the pixel electrode. Therefore, the interval between adjacent light-emitting elements can be made very small. Thus, a high-definition or high-resolution display device can be realized. In addition, a mask (e.g., a photomask) for forming the insulating layer is not required, thereby reducing the manufacturing cost of the display device.

[0655] As described above, layer 133R, layer 133G, and layer 133B all include a light-emitting layer. Layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B may also include a light-emitting layer, a carrier blocking layer on the light-emitting layer, and a carrier transport layer on the carrier blocking layer. The surfaces of layer 133R, layer 133G, and layer 133B are exposed during the manufacturing process of the display device. Therefore, by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface and damage to the light-emitting layer can be reduced. As a result, the reliability of the light-emitting element can be improved.

[0656] The common layer 114 may include, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The light-emitting elements 130R, 130G, and 130B share the common layer 114.

[0657] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B via the insulating layer 125.

[0658] By covering the side surfaces of the layers 133R, 133G, and 133B (or even covering a portion of their top surfaces) with at least one of the insulating layer 125 and the insulating layer 127, the common layer 114 (or the common electrode 115) can be prevented from contacting the pixel electrode and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing short circuits in the light-emitting elements. This improves the reliability of the light-emitting elements.

[0659] The insulating layer 125 is preferably in contact with the side surfaces of the layers 133R, 133G, and 133B. The structure in which the insulating layer 125 is in contact with the layers 133R, 133G, and 133B can prevent the layers 133R, 133G, and 133B from peeling off, thereby improving the reliability of the light-emitting element.

[0660] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125. The insulating layer 127 preferably covers at least a portion of the side surface of the insulating layer 125.

[0661] By providing the insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled. Therefore, the large unevenness of the formed surface of the layers (e.g., the carrier injection layer, the common electrode, etc.) provided on the island-shaped layers can be reduced, thereby further flattening the surface. Consequently, the coverage of the carrier injection layer, the common electrode, etc. can be improved.

[0662] The common layer 114 and the common electrode 115 are provided on the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, steps are generated due to the region where the pixel electrode and the island EL layer are provided and the region where the pixel electrode and the island EL layer are not provided (the region between the light-emitting elements). The display device of one embodiment of the present invention can flatten the steps by including the insulating layer 125 and the insulating layer 127, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection caused by disconnection can be suppressed. Alternatively, the increase in resistance caused by local thinning of the common electrode 115 due to the steps can be suppressed.

[0663] The top surface of the insulating layer 127 preferably has a more flat shape. The top surface of the insulating layer 127 may also have at least one of a flat surface, a convex surface, and a concave surface. For example, the top surface of the insulating layer 127 preferably has a convex surface with a large curvature radius.

[0664] The insulating layer 125 may be an inorganic insulating film. For example, oxides, nitrides, oxynitrides, and oxynitrides can be used as the insulating layer 125. Specific examples of materials that can be used for the inorganic insulating film are described above. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Aluminum oxide is particularly preferred because it has a high selectivity with the EL layer during etching and protects the EL layer during the formation of the insulating layer 127 described later. In particular, using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by ALD for the insulating layer 125 allows for the formation of an insulating layer 125 with fewer pinholes and excellent EL layer protection. Alternatively, the insulating layer 125 may have a stacked-layer structure of a film formed by ALD and a film formed by sputtering. For example, the insulating layer 125 may have a stacked-layer structure of an aluminum oxide film formed by ALD and a silicon nitride film formed by sputtering.

[0665] The insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 125 preferably functions to suppress the diffusion of at least one of water and oxygen. Furthermore, the insulating layer 125 preferably functions to capture or fix (also known as gettering) at least one of water and oxygen.

[0666] When the insulating layer 125 functions as a blocking insulating layer, it can have a structure that suppresses the entry of impurities (typically, at least one of water and oxygen) that might diffuse from the outside into each light-emitting element. This structure enables a highly reliable light-emitting element and a highly reliable display device to be provided.

[0667] The concentration of impurity elements in the insulating layer 125 is preferably low. This prevents impurities from entering the EL layer from the insulating layer 125 and degrading the EL layer. Furthermore, by reducing the concentration of impurity elements in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is preferable that either the hydrogen concentration or the carbon concentration in the insulating layer 125 be sufficiently low, and preferably both the hydrogen concentration and the carbon concentration be sufficiently low.

[0668] The insulating layer 127 provided on the insulating layer 125 has the function of flattening the large unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the inclusion of the insulating layer 127 improves the flatness of the surface on which the common electrode 115 is formed.

[0669] An insulating layer composed of an organic material can be suitably used as the insulating layer 127. A photosensitive organic resin is preferably used as the organic material, and for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification, etc., the term "acrylic resin" may refer to a broad range of acrylic polymers, rather than just polymethacrylate or methacrylic resin.

[0670] As the insulating layer 127, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimide amide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenolic resin and precursors of the above resins can also be used. In addition, as the insulating layer 127, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose or alcohol-soluble polyamide resin can also be used. In addition, as the photosensitive resin, a photoresist can also be used. As the photosensitive organic resin, a positive material or a negative material can be used.

[0671] A material that absorbs visible light can also be used as the insulating layer 127. By absorbing the light emitted by the light-emitting element, the insulating layer 127 can suppress light leakage from the light-emitting element to adjacent light-emitting elements through the insulating layer 127 (stray light). This improves the display quality of the display device. Furthermore, even without using a polarizing plate in the display device, the display quality can be improved, thereby achieving a lighter and thinner display device.

[0672] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, the use of resin materials formed by mixing or laminating two or more color filter materials is preferred because it can enhance the visible light shielding effect. In particular, by mixing three or more color filter materials, a black or nearly black resin layer can be achieved.

[0673] [Display device 50F]

[0674] Figure 54B An example of a cross section of the display portion 162 of the display device 50F is shown. The display device 50F differs from the display device 50E mainly in that a colored layer (color filter, etc.) is provided in each sub-pixel of each color. Figure 54B The structure shown can be combined with Figure 54A The structure shown includes the region of the FPC 172, the circuit portion 164, the stacked structure from the substrate 151 to the insulating layer 235 of the display portion 162, the connection portion 140, and the end portion.

[0675] Figure 54B The display device 50F shown includes light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0676] Light emitted from light-emitting element 130R passes through colored layer 132R and is extracted outside display device 50F as red light. Similarly, light emitted from light-emitting element 130G passes through colored layer 132G and is extracted outside display device 50F as green light. Light emitted from light-emitting element 130B passes through colored layer 132B and is extracted outside display device 50F as blue light.

[0677] Light-emitting elements 130R, 130G, and 130B each include a layer 133. These three layers 133 are formed using the same process and the same materials. Furthermore, these three layers 133 are separated from one another. Providing island-shaped EL layers in each light-emitting element suppresses leakage current between adjacent light-emitting elements. This suppresses unintended light emission caused by crosstalk, enabling the realization of a display device with a very high contrast ratio.

[0678] For example, Figure 54B The light emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0679] Or, for example Figure 54B Light-emitting elements 130R, 130G, and 130B shown emit blue light. In this case, layer 133 includes one or more blue-emitting layers. For sub-pixel 11B emitting blue light, the blue light emitted by light-emitting element 130B can be extracted. Furthermore, for sub-pixel 11R emitting red light and sub-pixel 11G emitting green light, by providing a color conversion layer between light-emitting element 130R or 130G and substrate 152, the blue light emitted by light-emitting element 130R or 130G can be converted into light with a longer wavelength and extracted as red or green light. Furthermore, preferably, a colored layer 132R is provided between the color conversion layer on light-emitting element 130R and substrate 152, and a colored layer 132G is provided between the color conversion layer on light-emitting element 130G and substrate 152. By extracting light that has passed through the color conversion layers through the colored layers, the colored layers can absorb light other than the desired color, thereby improving the color purity of the light emitted by the sub-pixels.

[0680] [Display device 50G]

[0681] Figure 55 The main difference between the display device 50G shown and the display device 50F is that the former is a bottom emission type display device.

[0682] Light emitted by the light-emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.

[0683] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Figure 55 In the example shown, a light-shielding layer 117 is provided over a substrate 151, an insulating layer 153 is provided over the light-shielding layer 117, and transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. Furthermore, colored layers 132R, 132G, and 132B are provided over an insulating layer 218, and an insulating layer 235 is provided over the colored layers 132R, 132G, and 132B.

[0684] The light emitting element 130R overlapping the colored layer 132R includes a conductive layer 124R, a conductive layer 126R, a layer 133 , a common layer 114 , and a common electrode 115 .

[0685] The light emitting element 130G overlapping the colored layer 132G includes a conductive layer 124G, a conductive layer 126G, a layer 133 , a common layer 114 , and a common electrode 115 .

[0686] The light emitting element 130B overlapping the colored layer 132B includes a conductive layer 124B, a conductive layer 126B, a layer 133 , a common layer 114 , and a common electrode 115 .

[0687] Conductive layers 124R, 124G, 124B, 126R, 126G, and 126B are each made of a material with high visible light transmittance. Common electrode 115 is preferably made of a material that reflects visible light. In bottom-emission display devices, low-resistivity metals, etc., can be used for common electrode 115. This reduces voltage drops caused by the resistance of common electrode 115, thereby achieving high display quality.

[0688] The transistor of one embodiment of the present invention can be miniaturized and have a smaller occupied area, thereby enabling an increase in the aperture ratio of pixels or a reduction in the size of pixels in a bottom emission display device.

[0689] [Display device 50H]

[0690] Figure 56 The display device 50H shown is a VA-mode liquid crystal display device.

[0691] The substrate 151 and the substrate 152 are bonded together using an adhesive layer 144. Liquid crystal 262 is sealed in the area surrounded by the substrate 151, the substrate 152, and the adhesive layer 144. A polarizing plate 260a is located on the outer surface of the substrate 152, and a polarizing plate 260b is located on the outer surface of the substrate 151. Although not shown, a backlight may be provided outside the polarizing plate 260a or outside the polarizing plate 260b.

[0692] The substrate 151 is provided with transistors 205D, 205R, and 205G, a connection portion 197, a spacer 224, and the like. Transistor 205D is provided in the circuit portion 164, and transistors 205R and 205G are provided in the display portion 162. Region 108P of layer 108 of transistors 205R and 205G is used as a pixel electrode of liquid crystal element 60. Note that while the description herein uses a structure in which region 108P is used as a pixel electrode, one embodiment of the present invention is not limited to this. For example, region 108Q of layer 108 may also be used as a pixel electrode of liquid crystal element 60.

[0693] The substrate 152 is provided with the colored layers 132R and 132G, the light-shielding layer 117 , the insulating layer 225 , the conductive layer 263 , and the like. The conductive layer 263 serves as a common electrode of the liquid crystal element 60 .

[0694] Transistors 205D, 205R, and 205G all include layer 108, insulating layer 106, and conductive layer 104. Conductive layer 104 serves as a gate electrode. A portion of insulating layer 106 serves as a gate insulating layer. Layer 108 includes region 108P in a region in contact with insulating layer 110b. Region 108P serves as one of a source electrode and a drain electrode. Layer 108 includes region 108Q in a region in contact with insulating layer 109. Region 108Q serves as the other of a source electrode and a drain electrode.

[0695] As described above, in this embodiment, an example of using OS transistors as transistors 205D, 205R, and 205G is shown. As transistors 205D, 205R, and 205G, transistors according to one embodiment of the present invention can be used. That is, in the display device 50H, both the display portion 162 and the circuit portion 164 include transistors according to one embodiment of the present invention. By using a transistor according to one embodiment of the present invention in the display portion 162, the pixel size can be reduced and high definition can be achieved. In addition, by using a transistor according to one embodiment of the present invention in the circuit portion 164, the area occupied by the circuit portion 164 can be reduced and a narrow frame can be achieved. For information about the transistor according to one embodiment of the present invention, reference can be made to the description of the above embodiment.

[0696] The subpixels included in the display unit 162 include transistors, a liquid crystal element 60, and a colored layer. For example, a subpixel that emits red light includes a transistor 205R, a liquid crystal element 60, and a colored layer 132R that transmits red light. Furthermore, a subpixel that emits green light includes a transistor 205G, a liquid crystal element 60, and a colored layer 132G that transmits green light. Although not shown, a subpixel that emits blue light similarly includes a transistor, a liquid crystal element 60, and a colored layer that transmits blue light.

[0697] The liquid crystal element 60 includes a region 108P included in the layer 108 , a conductive layer 263 , and a liquid crystal 262 sandwiched therebetween.

[0698] Conductive layer 264 is provided over substrate 151. Conductive layer 264 has a portion that overlaps region 108P with insulating layer 110 interposed therebetween. Region 108P, conductive layer 264, and insulating layer 110 therebetween form a storage capacitor. Note that one or more insulating layers may be provided between region 108P and conductive layer 264, and a portion of insulating layer 110 may be omitted.

[0699] An insulating layer 225 is provided on the substrate 152 side to cover the colored layers 132R and 132G and the light-shielding layer 117. The insulating layer 225 can also function as a planarizing film. The insulating layer 225 can make the surface of the conductive layer 263 substantially flat, thereby making the alignment of the liquid crystal 262 uniform.

[0700] Furthermore, an alignment film for controlling the alignment of the liquid crystal 262 may be provided on the surface of the conductive layer 263 and the insulating layer 218 that is in contact with the liquid crystal 262. (See Figure 59 Orientation film 265 in).

[0701] Region 108P of the oxide conductor transmits visible light. Furthermore, materials that transmit visible light can be used for the conductive layers 263 and 264. In other words, the liquid crystal element can be a transmissive liquid crystal element. For example, when the backlight source is positioned on one side of the substrate 152, light from the backlight source polarized by the polarizer 260a passes through the substrate 152, the conductive layer 263, the liquid crystal 262, the region 108P, and the substrate 151 to reach the polarizer 260b. At this point, the orientation of the liquid crystal 262 can be controlled by a voltage applied between the region 108P and the conductive layer 263, thereby controlling the optical modulation of the light. In other words, the intensity of light emitted through the polarizer 260b can be controlled. Furthermore, because light outside the specified wavelength range of the incident light is absorbed by the coloring layer, the extracted light appears red, for example.

[0702] Here, as the polarizer 260b, a linear polarizer or a circular polarizer can be used. For example, a polarizer formed by laminating a linear polarizer and a quarter-wave phase difference plate can be used. By using a circular polarizer as the polarizer 260b, external light reflection can be suppressed.

[0703] When a circular polarizer is used as polarizer 260b, a circular polarizer or a conventional linear polarizer may be used as polarizer 260a. A desired contrast ratio can be achieved by adjusting the cell gap, alignment, and drive voltage of the liquid crystal element used in liquid crystal element 60 according to the type of polarizer used for polarizers 260a and 260b.

[0704] Conductive layer 263 is electrically connected to conductive layer 166 provided on substrate 151 side via connector 223 in connection portion 140. Thus, a potential or a signal can be supplied to conductive layer 263 from an FPC or IC provided on substrate 151 side. Figure 56 In the illustrated example, the conductive layer 166 is formed by the same process as that for the region 108P of the layer 108. The conductive layer 166 is provided in a region in contact with the uppermost layer of the insulating layer 110 (here, the insulating layer 110b).

[0705] For example, the connector 223 may use conductive particles. As the conductive particles, particles such as organic resin or silicon dioxide with a metal material coated on the surface may be used. As the metal material, nickel or gold is preferably used because it can reduce the contact resistance. In addition, particles such as nickel covered with gold and coated with two or more metal materials in a layered manner are preferably used. In addition, the connector 223 is preferably made of a material that can be elastically deformed or plastically deformed. In this case, the conductive particles sometimes become Figure 56 The connector 223 is preferably arranged so as to be covered by the adhesive layer 144. For example, the connector 223 is preferably dispersed in the adhesive layer 144 before curing.

[0706] A connection portion 197 is provided in a region near an end portion of the substrate 151 . In the connection portion 197 , the conductive layer 165 is electrically connected to the FPC 172 via the connection layer 242 . Figure 56 In the example shown, the conductive layer 165 is formed by the same process as that for the region 108P of the layer 108. The conductive layer 165 is provided in a region in contact with the uppermost layer of the insulating layer 110 (here, the insulating layer 110b).

[0707] [Display device 50I]

[0708] Figure 57 The display device 50I shown is an FFS mode liquid crystal display device. The main difference between the display device 50I and the display device 50H is the structure of the liquid crystal element 60.

[0709] A region 108P included in the layer 108 of the transistor functions as one of a source electrode and a drain electrode of the transistor and functions as a pixel electrode of the liquid crystal element 60. An insulating layer 218 is provided over the transistor, and a conductive layer 263 serving as a common electrode of the liquid crystal element 60 is provided over the insulating layer 218. Furthermore, an insulating layer 261 is provided over the conductive layer 263.

[0710] The conductive layer 263 has a comb-like shape or a shape with slits when viewed from above. The conductive layer 263 is arranged so as to overlap with the region 108P. In the region overlapping with the colored layer, there is a portion where the conductive layer 263 is not arranged on the region 108P.

[0711] A capacitor is formed by stacking the region 108P and the conductive layer 263 via the insulating layer 106, the insulating layer 195, and the insulating layer 218. Therefore, there is no need to form a separate capacitor, and the pixel aperture ratio can be increased.

[0712] Note that in the liquid crystal element 60, both the region 108P and the conductive layer 263 may have a comb-teeth-like top surface. Alternatively, as shown in the display device 50I, in the liquid crystal element 60, only one of the region 108P and the conductive layer 263 has a comb-teeth-like top surface. This results in a structure in which the region 108P and the conductive layer 263 partially overlap. This allows the capacitor between the region 108P and the conductive layer 263 to be used as a storage capacitor, eliminating the need for a separate capacitor and thereby improving the aperture ratio of the display device.

[0713] [Display device 50J]

[0714] Figure 58 The main difference between the display device 50J shown and the display device 50I is that the layer 108 has a region 108Q that is used as a pixel electrode.

[0715] A region 108Q included in the layer 108 of the transistor is used as one of a source electrode and a drain electrode of the transistor and is also used as a pixel electrode of the liquid crystal element 60 .

[0716] The conductive layer 263 is arranged so as to overlap with the region 108Q. In the region overlapping with the colored layer, there is a portion where the conductive layer 263 is not arranged on the region 108Q.

[0717] A capacitor is formed by stacking the region 108Q and the conductive layer 263 via the insulating layer 106, the insulating layer 195, and the insulating layer 218. Therefore, there is no need to form a separate capacitor, and the aperture ratio of the pixel can be increased.

[0718] In display device 50J, liquid crystal element 60 includes a portion that does not overlap with insulating layer 110. Since liquid crystal element 60 does not overlap with insulating layer 110, light transmittance is improved and the number of interfaces on the path of light from the light source is reduced, thereby suppressing the effects of interface reflection and interface scattering.

[0719] [Display device 50K]

[0720] Figure 59The main difference between the display device 50K shown and the display device 50J is that the pixel electrode is provided on the common electrode.

[0721] The region 108Q functions as a pixel electrode of the liquid crystal element 60 . The conductive layer 264 functions as a common electrode of the liquid crystal element 60 .

[0722] Alternatively, the portion of any one or more of insulating layer 106, insulating layer 195, and insulating layer 218 that overlaps with liquid crystal element 60 may be removed by etching. This facilitates the transmission of the electric field from region 108Q and conductive layer 264 to liquid crystal 262, enabling high-speed operation of liquid crystal element 60. Furthermore, this improves the light transmittance of the portion overlapping with liquid crystal element 60 and suppresses the effects of interface reflection and scattering. Furthermore, the capacitance between region 108Q and conductive layer 264 may be increased.

[0723] In the liquid crystal element 60 , both the region 108Q and the conductive layer 264 may have a comb-tooth-like top surface shape.

[0724] [Example of a method for manufacturing a display device]

[0725] The following describes a method for manufacturing a display device using an MML (Metal Mask Less) structure with reference to FIG60 . The steps for manufacturing light-emitting elements without using a high-definition metal mask are described in detail. FIG60 shows cross-sectional views of the three light-emitting elements and the connection portion 140 included in the display portion 162 during various steps.

[0726] When manufacturing a light-emitting element, a vacuum process such as an evaporation method and a solution process such as a spin coating method and an inkjet method can be utilized. As an evaporation method, physical evaporation methods (PVD methods) such as sputtering, ion plating, ion beam evaporation, molecular beam evaporation, and vacuum evaporation me...

Claims

1. A semiconductor device comprising: a first transistor; a first insulating layer; as well as The second insulating layer, The second insulating layer is provided in a manner of contacting a portion of the top surface of the first insulating layer. The first transistor includes a metal oxide layer, a third insulating layer and a first conductive layer, The metal oxide layer is in contact with the top surface of the first insulating layer and the top surface and side surfaces of the second insulating layer. The third insulating layer is in contact with the top surface and side surfaces of the metal oxide layer, the top surface of the first insulating layer, and the top surface and side surfaces of the second insulating layer. The first conductive layer has a region overlapping a side surface of the second insulating layer via the third insulating layer and the metal oxide layer. The second insulating layer includes a fourth insulating layer and a fifth insulating layer on the fourth insulating layer, The first insulating layer and the fifth insulating layer both contain nitrogen, Furthermore, the fourth insulating layer contains oxygen.

2. The semiconductor device according to claim 1, further comprising: The second transistor, The second transistor includes the metal oxide layer, the third insulating layer and the second conductive layer, The second conductive layer has a region overlapping a side surface of the second insulating layer via the third insulating layer and the metal oxide layer. The first transistor and the second transistor share the metal oxide layer in a region in contact with the first insulating layer.

3. The semiconductor device according to claim 1 , further comprising: The second transistor, The second transistor includes the metal oxide layer, the third insulating layer, and a second conductive layer. The second conductive layer has a region overlapping a side surface of the second insulating layer via the third insulating layer and the metal oxide layer. Furthermore, the first transistor and the second transistor share the metal oxide layer in a region in contact with the fifth insulating layer.

4. The semiconductor device according to claim 1 , further comprising: capacitors, wherein the capacitor comprises the metal oxide layer, the third insulating layer and a second conductive layer on the third insulating layer, And the second conductive layer has a portion overlapping with the third insulating layer in a region of the metal oxide layer contacting the first insulating layer.

5. The semiconductor device according to claim 1 , further comprising: capacitors, wherein the capacitor comprises the metal oxide layer, the third insulating layer and a second conductive layer on the third insulating layer, And the second conductive layer has a portion overlapping with the third insulating layer in a region of the metal oxide layer contacting the fifth insulating layer.

6. The semiconductor device according to any one of claims 1 to 5, wherein the second insulating layer includes a sixth insulating layer, The sixth insulating layer is located between the first insulating layer and the fourth insulating layer, The sixth insulating layer contains nitrogen, And the first insulating layer has a region having a higher hydrogen concentration than that of the sixth insulating layer.

7. The semiconductor device according to any one of claims 1 to 5, wherein the second insulating layer includes a seventh insulating layer, The seventh insulating layer is located between the fourth insulating layer and the fifth insulating layer, The seventh insulating layer contains nitrogen, And the fifth insulating layer has a region having a higher hydrogen concentration than that of the seventh insulating layer. 8 . The semiconductor device according to claim 1 , wherein the third insulating layer includes a layer containing aluminum oxide or silicon nitride.

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