Data acquisition system for high-precision multi-protocol signal processing

Abstract

The invention provides a data acquisition system for high-precision multi-protocol signal processing, and relates to the technical field of data processing, and the system comprises a signal receiving module which is used for receiving various signal data sent by an external sensor, carrying out the analysis processing of the various signal data, obtaining various processed signal data, and sending the processed signal data to a data processing module; all kinds of processed signal data are transmitted to the signal conversion module; the signal conversion module is connected with the signal receiving module, converts the processed various signal data into digital signals through an analog-to-digital converter, performs differential amplification processing on the digital signals through a programmable gain amplifier so as to enhance the signal strength, and transmits the amplified digital signals to the analog quantity output module; and the analog quantity output module is connected with the signal conversion module and is used for receiving the amplified digital signal and converting the amplified digital signal into voltage or current. According to the invention, the requirement of high-precision acquisition can be met, and the problem of limitation of domestic equipment in precision is effectively solved.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a data acquisition system for high-precision multi-protocol signal processing. Background Art

[0002] In current high-precision applications such as environmental monitoring, industrial control, and scientific research, data acquisition systems are key equipment, responsible for multiple tasks including signal acquisition, data conversion, storage, and transmission. However, existing data acquisition systems have significant shortcomings in meeting these demanding scenarios, especially in terms of high-precision signal processing and multi-protocol compatibility, making it difficult to achieve ideal application results.

[0003] Existing domestic data acquisition systems are primarily focused on low- and mid-range applications, with limited overall accuracy and functionality. Many domestic devices perform poorly in acquiring tiny voltage and current signals, making them difficult to meet the demands of high-precision data acquisition. While some high-performing imported devices from Europe and the United States are now available, these devices often rely on traditional single-chip microcontroller solutions, resulting in relatively insufficient processing performance and storage capacity, making them incapable of handling sustained high-precision data acquisition tasks. Furthermore, these devices have limited signal storage capacity, often failing to meet the demands of large data volumes and long-term continuous data acquisition.

[0004] In terms of compatibility, existing domestic data acquisition equipment typically supports fewer protocols, making it difficult to adapt to a variety of sensor interfaces. This is particularly true in the industrial and environmental monitoring fields, where the commonly used SDI12 protocol is not widely supported by domestic equipment. Because some high-precision sensors rely on the SDI12 interface, this compatibility gap makes it difficult for domestic equipment to meet the demands of high-precision applications. In comparison, while European and American equipment may have a slight advantage in protocol support, its higher cost and lack of adaptability make it unsuitable for the diverse application needs of China.

[0005] Therefore, facing increasingly complex high-precision application scenarios, existing data acquisition systems have shortcomings in accuracy, compatibility, and performance. These shortcomings have, to a certain extent, limited the application of equipment in demanding scenarios and cannot fully meet the high standards currently placed on data acquisition systems in the industrial and environmental monitoring fields. Summary of the Invention

[0006] In order to overcome the problems existing in the related art, the present invention provides a data acquisition system for high-precision multi-protocol signal processing.

[0007] According to a first aspect of an embodiment of the present invention, there is provided a data acquisition system for high-precision multi-protocol signal processing, comprising:

[0008] A signal receiving module is used to receive various signal data sent by external sensors, analyze and process the various signal data to obtain processed signal data, and transmit the processed signal data to the signal conversion module respectively, wherein the various signal data include pulse signals, protocol signals, and small voltage signals and small current signals;

[0009] a signal conversion module connected to the signal receiving module, converting the processed signal data into digital signals through an analog-to-digital converter, performing differential amplification on the digital signals through a programmable gain amplifier to enhance the signal strength, and transmitting the amplified digital signals to the analog output module;

[0010] The analog output module is connected to the signal conversion module and is used to receive the amplified digital signal and convert the amplified digital signal into voltage or current.

[0011] According to a second aspect of an embodiment of the present invention, there is provided a data processing method based on the above-mentioned data acquisition system for high-precision multi-protocol signal processing, comprising:

[0012] Receiving various signal data sent by external sensors, analyzing and processing the various signal data to obtain processed various signal data;

[0013] Converting the processed signal data into digital signals, and performing differential amplification processing on the digital signals through a programmable gain amplifier to enhance the signal strength, thereby obtaining amplified digital signals;

[0014] The amplified digital signal is converted into voltage or current.

[0015] The technical solutions provided by the embodiments of the present invention may have the following beneficial effects:

[0016] In an embodiment of the present invention, the signal receiving module can access multiple types of analog signals, including pulse signals, protocol signals (RS232, RS485, RS422 and SDI12, etc.), small voltage signals and small current signals, so that the data acquisition system of the present invention has a wide range of application scenarios and can simultaneously process different types of signals from multiple sensors, providing higher flexibility and scalability; the signal conversion module converts the analog signal into a digital signal through an analog-to-digital converter (ADC), ensuring high precision and stability of signal processing; the digital signal is differentially amplified through a programmable gain amplifier (PGA), which can enhance the strength of weak signals and effectively improve the signal-to-noise ratio, so that low-intensity signals have sufficient availability in subsequent processing and output; the design of the analog output module makes the system compatible with various industrial equipment, instruments and control systems, and can achieve precise signal regulation and feedback.

[0017] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0019] Figure 1 A schematic structural diagram of a data acquisition system for high-precision multi-protocol signal processing according to some embodiments of the present invention is shown;

[0020] Figure 2 A schematic diagram of an acquisition circuit of an analog signal acquisition and processing unit according to some embodiments of the present invention is shown;

[0021] Figure 3 Schematically shows another acquisition circuit diagram of the analog signal acquisition and processing unit according to some embodiments of the present invention;

[0022] Figure 4 Schematically shows another acquisition circuit diagram of an analog signal acquisition and processing unit according to some embodiments of the present invention;

[0023] Figure 5 Schematically shows another acquisition circuit diagram of the analog signal acquisition and processing unit according to some embodiments of the present invention;

[0024] Figure 6 Schematically illustrates a circuit diagram of a chip U57 according to some embodiments of the present invention;

[0025] Figure 7 Schematically illustrates a circuit diagram of a chip U59 according to some embodiments of the present invention;

[0026] Figure 8 Schematically illustrating a circuit diagram of a power isolation and protection circuit according to some embodiments of the present invention;

[0027] Figure 9 Schematically illustrates a circuit diagram of a chip U48 according to some embodiments of the present invention;

[0028] Figure 10 Schematically illustrates a circuit diagram of a chip U49 according to some embodiments of the present invention;

[0029] Figure 11 Schematically shows a circuit diagram of a chip U50 according to some embodiments of the present invention;

[0030] Figure 12Schematically shows a circuit diagram of a chip U51 according to some embodiments of the present invention;

[0031] Figure 13 Schematically shows a circuit diagram of a chip U52 according to some embodiments of the present invention;

[0032] Figure 14 Schematically shows a circuit diagram of a chip U53 according to some embodiments of the present invention;

[0033] Figure 15 Schematically illustrates a circuit diagram of a chip U54 according to some embodiments of the present invention;

[0034] Figure 16 Schematically shows a circuit diagram of a chip U55 according to some embodiments of the present invention;

[0035] Figure 17 Schematically shows a circuit diagram of a chip U33 according to some embodiments of the present invention;

[0036] Figure 18 Schematically shows a circuit diagram of a socket strip J16 according to some embodiments of the present invention;

[0037] Figure 19 Schematically shows a circuit diagram of a chip U37 according to some embodiments of the present invention;

[0038] Figure 20 Schematically illustrates a circuit diagram of a chip U38 according to some embodiments of the present invention;

[0039] Figure 21 Schematically shows a circuit diagram of a chip U40 according to some embodiments of the present invention;

[0040] Figure 22 Schematically shows a circuit diagram of a chip U41 according to some embodiments of the present invention;

[0041] Figure 23 Schematically illustrates a circuit diagram of a chip U42 according to some embodiments of the present invention;

[0042] Figure 24 Schematically illustrates a circuit diagram of chip U43 and chip U46 according to some embodiments of the present invention;

[0043] Figure 25 Schematically shows a circuit diagram of a chip U45 according to some embodiments of the present invention;

[0044] Figure 26 Schematically illustrates a circuit diagram of a chip U47 according to some embodiments of the present invention;

[0045] Figure 27 Schematically shows a circuit diagram of a chip U62 according to some embodiments of the present invention;

[0046] Figure 28 Schematically illustrates a circuit diagram of chip U63, chip U64, chip U65, and chip U66 according to some embodiments of the present invention;

[0047] Figure 29 Schematically illustrating a circuit diagram of chip U7, chip U12, chip U15, and chip U21 according to some embodiments of the present invention;

[0048] Figure 30 Schematically shows a circuit diagram of a chip U67 according to some embodiments of the present invention;

[0049] Figure 31 Schematically shows a circuit diagram of a chip U10 according to some embodiments of the present invention;

[0050] Figure 32 Schematically illustrates a circuit diagram of a chip U2 according to some embodiments of the present invention;

[0051] Figure 33 Schematically illustrating a diagram of a diode array connected in series according to some embodiments of the present invention;

[0052] Figure 34 Schematically illustrates a circuit diagram of a socket strip J2B according to some embodiments of the present invention;

[0053] Figure 35 Schematically illustrating a circuit diagram of a socket strip J2A according to some embodiments of the present invention;

[0054] Figure 36 Schematically illustrates a circuit diagram of a socket strip J2C according to some embodiments of the present invention;

[0055] Figure 37 Schematically illustrates a circuit diagram of a socket strip J2D according to some embodiments of the present invention;

[0056] Figure 38 Schematically illustrates a circuit diagram of a chip U4 according to some embodiments of the present invention;

[0057] Figure 39 Schematically illustrates a circuit diagram of a chip U6 according to some embodiments of the present invention;

[0058] Figure 40 Schematically illustrates a circuit diagram of a chip U5 according to some embodiments of the present invention;

[0059] Figure 41Schematically illustrates a circuit diagram of a 4G power control unit according to some embodiments of the present invention;

[0060] Figure 42 Schematically illustrates a circuit diagram of a real-time clock power supply switching unit according to some embodiments of the present invention;

[0061] Figure 43 Schematically illustrates a circuit diagram of a power management switch circuit according to some embodiments of the present invention;

[0062] Figure 44 A circuit diagram schematically illustrates a switch circuit for external sensor power supply control according to some embodiments of the present invention. DETAILED DESCRIPTION

[0063] Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. In the following description, when referring to the drawings, like numbers in different figures represent like or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present invention, as detailed in the appended claims.

[0064] The terms used in this invention are for the purpose of describing specific embodiments only and are not intended to limit the invention. The singular forms "a," "the," and "the" used in this invention and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0065] The present invention provides a data acquisition system for high-precision multi-protocol signal processing, referring to Figure 1 Shown, including:

[0066] A signal receiving module is used to receive various signal data sent by external sensors, analyze and process the various signal data to obtain processed signal data, and transmit the processed signal data to the signal conversion module respectively, wherein the various signal data include pulse signals, protocol signals, and small voltage signals and small current signals;

[0067] a signal conversion module connected to the signal receiving module, converting the processed signal data into digital signals through an analog-to-digital converter, performing differential amplification on the digital signals through a programmable gain amplifier to enhance the signal strength, and transmitting the amplified digital signals to the analog output module;

[0068] The analog output module is connected to the signal conversion module and is used to receive the amplified digital signal and convert the amplified digital signal into voltage or current.

[0069] Here, the protocol signal includes protocol signals in SDI12, RS232, RS485, and RS422 protocol formats.

[0070] The synergistic effect of the various modules in this invention enables the system to stably handle the high-precision data acquisition needs of a variety of sensors and offers the flexibility of multi-protocol transmission. The modular design provides a clearer system structure, meeting diverse data acquisition requirements while maintaining stable processing performance, effectively overcoming the processing limitations of existing equipment. As a result, this system demonstrates greater reliability and applicability in high-precision applications such as environmental monitoring and industrial control.

[0071] In some exemplary embodiments of the present invention, the signal receiving module includes:

[0072] The analog signal acquisition and processing unit is used to receive a small voltage signal and a small current signal, and analyze and process the small voltage signal and the current signal to obtain a processed small voltage signal and a processed small current signal;

[0073] The digital signal acquisition and calculation unit is used to receive the pulse signal, analyze and process the pulse signal, and obtain the processed pulse signal;

[0074] The serial data acquisition protocol parsing unit is used to receive the protocol signal and parse and process the protocol signal to obtain the processed protocol signal.

[0075] The analog signal acquisition and processing unit includes:

[0076] refer to Figure 2As shown, one end of the resistor R3, one end of the resistor R25, and one end of the diode D16 are simultaneously connected to the VIN_CON_P1 interface, the other end of the resistor R3 is simultaneously connected to one end of the resistor R24 and one end of the resistor R250, the other end of the resistor R250 is connected to one end of the capacitor C202 to form the VIN_P1 interface, the other end of the capacitor C202, the other end of the resistor R24, the other end of the diode D16, the other end of the resistor R25, one end of the resistor R270, one end of the diode D21, one end of the resistor R252, and one end of the capacitor C208 are simultaneously grounded, the other end of the resistor R270, the other end of the diode D21, and one end of the resistor R251 are simultaneously connected to the VIN_CON_N1 interface, the other end of the resistor R251 is simultaneously connected to the other end of the resistor R252 and one end of the resistor R255, and the other end of the resistor R255 is connected to the other end of the capacitor C208 to form the VIN_N1 interface;

[0077] refer to Figure 3 As shown, one end of the resistor R261, one end of the resistor R289, and one end of the diode D17 are simultaneously connected to the VIN_CON_P2 interface, the other end of the resistor R261 is simultaneously connected to one end of the resistor R259 and one end of the resistor R285, the other end of the resistor R259 is connected to one end of the capacitor C216 to form the VIN_P2 interface, the other end of the capacitor C216, the other end of the resistor R285, the other end of the diode D17, the other end of the resistor R289, one end of the resistor R290, one end of the diode D18, one end of the resistor R286, and one end of the capacitor C221 are simultaneously grounded, the other end of the resistor R290, the other end of the diode D18, and one end of the resistor R278 are simultaneously connected to the VIN_CON_N2 interface, the other end of the resistor R278 is simultaneously connected to the other end of the resistor R286 and one end of the resistor R263, and the other end of the resistor R263 is connected to the other end of the capacitor C221 to form the VIN_N2 interface;

[0078] refer to Figure 4As shown, one end of the resistor R280, one end of the resistor R291, and one end of the diode D22 are simultaneously connected to the VIN_CON_P3 interface, the other end of the resistor R280 is simultaneously connected to one end of the resistor R268 and one end of the resistor R287, the other end of the resistor R268 is connected to one end of the capacitor C227 to form the VIN_P3 interface, the other end of the capacitor C227, the other end of the resistor R287, the other end of the diode D22, the other end of the resistor R291, one end of the resistor R292, one end of the diode D23, one end of the resistor R288, and one end of the capacitor C229 are simultaneously grounded, the other end of the resistor R292, the other end of the diode D23, and one end of the resistor R282 are simultaneously connected to the VIN_CON_N3 interface, the other end of the resistor R282 is simultaneously connected to the other end of the resistor R288 and one end of the resistor R269, and the other end of the resistor R269 is connected to the other end of the capacitor C229 to form the VIN_N3 interface;

[0079] refer to Figure 5 As shown, one end of the resistor R284, one end of the resistor R293, and one end of the diode D19 are simultaneously connected to the VIN_CON_P4 interface, the other end of the resistor R284 is simultaneously connected to one end of the resistor R272 and one end of the resistor R257, the other end of the resistor R272 is connected to one end of the capacitor C235 to form the VIN_P4 interface, the other end of the capacitor C235, the other end of the resistor R257, the other end of the diode D19, the other end of the resistor R293, one end of the resistor R294, one end of the diode D20, one end of the resistor R258, and one end of the capacitor C237 are simultaneously grounded, the other end of the resistor R294, the other end of the diode D20, and one end of the resistor R253 are simultaneously connected to the VIN_CON_N4 interface, the other end of the resistor R253 is simultaneously connected to the other end of the resistor R258 and one end of the resistor R273, and the other end of the resistor R273 is connected to the other end of the capacitor C237 to form the VIN_N4 interface;

[0080] refer to Figure 6As shown, the VIN_P1 interface is connected to pin 7 of chip U57, the VIN_N1 interface is connected to pin 8 of chip U57, the VIN_P3 interface is connected to pin 9 of chip U57, the VIN_N3 interface is connected to pin 10 of chip U57, the VIN_P2 interface is connected to pin 13 of chip U57, the VIN_N2 interface is connected to pin 14 of chip U57, the VIN_P4 interface is connected to pin 11 of chip U57, the VIN_N4 interface is connected to pin 12 of chip U57, the pin 1 of chip U57 is connected to A5V and one end of resistor R256 at the same time, and the pin 2 of chip U57 is connected to one end of ground capacitor C205 at the same time. end and one end of the transistor Q40, pin 3 of the chip U57 is connected to the grounded capacitor C213 and the other end of the transistor Q40 at the same time, pin 4 of the chip U57 is connected to the other end of the resistor R256, pin 5 of the chip U57 is connected to the 2.5V_VREF interface, pin 6 and pin 15 of the chip U57 are grounded, pin 16 of the chip U57 is connected to pin 13 of the chip U1, pin 17 of the chip U57 is connected to pin 12 of the chip U1, pin 18 of the chip U57 is connected to pin 11 of the chip U1, pin 19 of the chip U57 is connected to pin 15 of the chip U1, and pin 20 of the chip U57 is connected to pin 10 of the chip U1;

[0081] Pin 1 of chip U1 is connected to the VDD_3V3_R interface, pin 2 of chip U1 is connected to the SPI1_CLK port of chip J28 of the signal conversion module, pin 4 of chip U1 is connected to the SPI1_SS0 port, pin 5 of chip U1 is connected to the SPI1_MOSI port, pin 6 of chip U1 is connected to the SPI1_MISO port, pin 7 of chip U1 is connected to the AI_DRY port, pins 8 and 9 of chip U1 are grounded, and pin 16 of chip U1 is connected to the A5V interface.

[0082] refer to Figure 7 As shown, pin 2 of chip U59 is grounded, pins 3 and 4 of chip U59 are simultaneously connected to ground capacitor C230 and A5V interface, and pin 5 of chip U59 is connected to ground capacitor C232 to form the 2.5V_VREF interface.

[0083] Among them, the VIN_P1 interface to the VIN_P4 interface are multiple input signals of the system. Chip U57 is an analog-to-digital converter (ADC) used to convert analog input signals (such as VIN_P1 to VIN_P4) into digital signals. The input ports of this chip (VIN_P1, VIN_N1, VIN_P2, VIN_N2, etc.) receive analog signals from different signal sources. DIN and DOUT are used for SPI communication and are responsible for receiving and sending data. The VREF+ and VREF- interfaces are used to set the reference voltage to ensure the accuracy of the ADC. The ADC samples with a 24-bit resolution and can recognize a minimum input voltage of 75nV or an input current of 9.4uA.

[0084] Chip U59 is a 2.5V precision reference voltage source, used to provide a stable reference voltage for the system. The VOUT pin outputs a 2.5V voltage, which is connected to 2.5V_VREF and provided to the ADC and other circuits. The VIN pin is connected to A5V to provide power for the reference voltage source.

[0085] Transistor Q40 provides a clock signal, and capacitors C205 and C213 are used for filtering and decoupling the clock signal to ensure the stability of the clock signal.

[0086] The system's signal receiving module is designed to receive a variety of external signal sources. Its structure enables it to interface with various sensor outputs, including analog voltage and current signals. Connecting to external sensors, this module stably receives minute signals, providing reliable raw data for the subsequent signal conversion module. The signal receiving module must not only be sensitive to the signal but also minimize signal attenuation during transmission, providing a stable input foundation for data processing and laying the foundation for high-precision signal conversion.

[0087] The digital signal acquisition and calculation unit includes:

[0088] refer to Figure 8 As shown, it is a power isolation and protection circuit, including: one end of the ferrite bead FB1 and one end of the ferrite bead FB2 are simultaneously connected to the VDD_3V3_R interface, the other end of the ferrite bead FB1 is connected to the VDD_3V3 interface, the other end of the ferrite bead FB2 is connected to the SEN_VDD_3V3 interface, both ends of the ferrite bead FB45 are grounded, and pin 4 of chip U48, pin 4 of chip U49, pin 4 of chip U50, pin 4 of chip U51, pin 4 of chip U52, pin 4 of chip U53, pin 4 of chip U54, pin 4 of chip U55 and pin 1 of chip U33 are all connected to the VDD_3V3_R interface;

[0089] refer to Figure 9As shown, pin 1 of chip U48 is connected to one end of resistor R219, the other end of resistor R219 and one end of diode D53 are connected to INPUT0 port at the same time, the other end of diode D53 and pin 2 of chip U48 are grounded at the same time, and pin 3 of chip U48, grounding capacitor C193 and grounding resistor R225 are connected to DIN_0 interface at the same time; Figure 10 As shown, pin 1 of chip U49 is connected to one end of resistor R220, the other end of resistor R220 and one end of diode D54 are connected to INPUT1 port at the same time, the other end of diode D54 and pin 2 of chip U49 are grounded at the same time, and pin 3 of chip U49, grounding capacitor C194 and grounding resistor R226 are connected to DIN_1 interface at the same time; Figure 11 As shown, pin 1 of chip U50 is connected to one end of resistor R222, the other end of resistor R222 and one end of diode D55 are connected to INPUT2 port at the same time, the other end of diode D55 and pin 2 of chip U50 are grounded at the same time, and pin 3 of chip U50, grounding capacitor C195 and grounding resistor R227 are connected to DIN_2 interface at the same time; Figure 12 As shown, pin 1 of chip U51 is connected to one end of resistor R228, the other end of resistor R228 and one end of diode D56 are connected to INPUT3 port at the same time, the other end of diode D56 and pin 2 of chip U51 are grounded at the same time, and pin 3 of chip U51, grounding capacitor C196 and grounding resistor R234 are connected to DIN_3 interface at the same time; Figure 13 As shown, pin 1 of chip U52 is connected to one end of resistor R229, the other end of resistor R229 and one end of diode D57 are connected to INPUT4 port at the same time, the other end of diode D57 and pin 2 of chip U52 are grounded at the same time, and pin 3 of chip U52, grounding capacitor C197 and grounding resistor R235 are connected to DIN_4 interface at the same time; Figure 14 As shown, pin 1 of chip U53 is connected to one end of resistor R230, the other end of resistor R230 and one end of diode D58 are connected to INPUT5 port at the same time, the other end of diode D58 and pin 2 of chip U53 are grounded at the same time, and pin 3 of chip U53, grounding capacitor C198 and grounding resistor R236 are connected to DIN_5 interface at the same time; Figure 15 As shown, pin 1 of chip U54 is connected to one end of resistor R237, the other end of resistor R237 and one end of diode D64 are connected to EX_COUNTER1 port at the same time, the other end of diode D64 and pin 2 of chip U54 are grounded at the same time, and pin 3 of chip U54, grounding capacitor C199 and grounding resistor R239 are connected to COUNTER1 port at the same time; refer to Figure 16As shown, pin 1 of chip U55 is connected to one end of resistor R246, the other end of resistor R246 and one end of diode D65 are connected to EX_COUNTER2 port at the same time, the other end of diode D65 and pin 2 of chip U55 are grounded at the same time, and pin 3 of chip U55, grounding capacitor C200 and grounding resistor R248 are connected to COUNTER2 port at the same time;

[0090] refer to Figure 17 As shown, pin 2 of chip U33 is connected to DOUT5 port, pin 3 of chip U33 is connected to DOUT4 port, pin 4 of chip U33 is connected to DOUT3 port, pin 5 of chip U33 is connected to DOUT2 port, pin 6 of chip U33 is connected to DOUT1 port, pin 7 of chip U33 is connected to DOUT0 port, pin 8 and pin 9 of chip U33 are grounded, pin 10 of chip U33 is connected to EXT_DO0 port, pin 11 of chip U33 is connected to EXT_DO1 port, and pin 12 of chip U33 is connected to EXT _DO2 port, pin 13 of chip U33 is connected to EXT_DO3 port, pin 14 of chip U33 is connected to EXT_DO4 port, pin 15 of chip U33 is connected to EXT_DO5 port, pin 16 of chip U33 is connected to pins 1 and 2 of switch SW4 at the same time, pin 3 of switch SW4 is connected to the cathode of diode D60, the anode of diode D60 is connected to SEN_VDD_3V3 port, pin 4 of switch SW4 is connected to the cathode of diode D59, the anode of diode D59 is connected to SEN_VDD_5V port;

[0091] refer to Figure 18As shown, pin 1 of socket J16 is connected to the VIN_CON_P1 port, pin 2 is connected to the VIN_CON_N1 port, pin 3 is connected to the VIN_CON_P3 port, pin 4 is connected to the VIN_CON_N3 port, pin 5 is connected to the VIN_CON_P4 port, pin 6 is connected to the VIN_CON_N4 port, pin 7 is connected to the VIN_CON_P2 port, pin 8 is connected to the VIN_CON_N2 port, pin 9 is connected to the VOUT_A port, pin 10 is connected to the IOUT_A port, and pin 1 1 is connected to the VOUT_B port, its pin 12 is connected to the IOUT_B port, its pin 13 is connected to the VOUT_C port, its pin 14 is connected to the IOUT_C port, its pin 15 is connected to the VOUT_D port, its pin 16 is connected to the IOUT_D port, its pin 17 is connected to the VOUT_E port, its pin 18 is connected to the IOUT_E port, its pin 19 is connected to the VOUT_F port, its pin 20 is connected to the IOUT_F port, its pin 21 is connected to the VOUT_G port, its pin 22 is connected to the IOUT_G port, and its pin 23 is connected to V OUT_H port, its pin 24 is connected to the IOUT_H port, its pins 25, 26, and 28 are grounded, its pin 27 is connected to the EX_COUNTER1 port, its pin 29 is connected to the INPUT0 port, its pin 30 is connected to the EX_COUNTER2 port, its pin 31 is connected to the INPUT2 port, its pin 32 is connected to the INPUT1 port, its pin 33 is connected to the INPUT4 port, its pin 34 is connected to the INPUT3 port, its pin 36 is connected to the INPUT5 port, and its pin 37 is connected to the EXT_DO0 port , its pin 38 is connected to the EXT_DO1 port, its pin 39 is connected to the EXT_DO2 port, its pin 40 is connected to the EXT_DO3 port, its pin 41 is connected to the EXT_DO4 port, its pin 42 is connected to the EXT_DO5 port, its pin 43 is connected to the 12VOUT_CON port, its pin 44 is connected to the SEN_PWR_EN port, its pin 45 is connected to the VDD_3V3 interface, its pins 46 and 48 are grounded, its pin 49 is connected to the DC_BATT_IN interface, and its pin 50 is connected to the DC_BATT_IN interface.

[0092] Among them, U26 is a boost converter used to convert low voltage (e.g., 5V) to a higher voltage output (e.g., 20V). This chip provides efficient voltage conversion and is primarily used for high-voltage output requirements. Multiple SPI buses (such as SPI2_CLK and SPI2_MOSI) are used for data exchange and control signal transmission within the system. U10 and U2 are SPI interface chips responsible for managing and transmitting data from the main processing unit. Data is exchanged via the DIN and DOUT interfaces. U67 is a reference voltage source, providing a 5V reference voltage to ensure the stability of the reference voltage of the entire system to support the stable operation of other modules.

[0093] The serial data acquisition protocol parsing unit includes:

[0094] refer to Figure 19 As shown, pin 1 of chip U37 is grounded, pin 2 of chip U37 is connected to ground resistor R193, pin 3 of chip U37 is connected to ground resistor R192, pin 4 of chip U37 is simultaneously connected to one end of resistor R194 and the emitter of transistor Q32, the other end of resistor R194, the collector of transistor Q32, one end of resistor R195, the collector of transistor Q33, one end of resistor R196 and the collector of transistor Q34 are simultaneously connected, the base of transistor Q32 is simultaneously connected to ground resistor R274 and 3V3_5_232 interface, the other end of resistor R196 and the emitter of transistor Q34 are simultaneously connected to pin 7 of chip U37, the base of transistor Q34 is connected to 3V3_5_SDI interface, the other end of resistor R195 and the emitter of transistor Q33 are simultaneously connected to pin 6 of chip U37, and the bottom of chip U37 is connected to 3V3_5_SDI interface. Pin 9 of chip U37 is simultaneously connected to one end of resistor R202 and the emitter of transistor Q37. The base of transistor Q37 is connected to the 3V3_6_SDI interface. The collector of transistor Q37, the other end of resistor R202, one end of resistor R200, the collector of transistor Q35, one end of resistor R201, and the collector of transistor Q36 are simultaneously connected to form a SEN_VDD_3V3_UART interface. The other end of resistor R201 and the emitter of transistor Q36 are simultaneously connected to pin 10 of chip U37. The base of transistor Q36 is simultaneously connected to ground resistor R277 and the 3V3_6_485 interface. The other end of resistor R200 and the emitter of transistor Q35 are simultaneously connected to pin 12 of chip U37. The base of transistor Q35 is simultaneously connected to ground resistor R276 and the 3V3_6_232 interface.

[0095] refer to Figure 20As shown, pins 1 and 3 of chip U38 are connected to both ends of capacitor C163 respectively, pins 4 and 5 of chip U38 are connected to both ends of capacitor C164 respectively, pin 2 of chip U38 is connected to one end of capacitor C166, its pin 6 is connected to one end of capacitor C167, its pin 16 is connected to one end of capacitor C165, the other end of capacitor C165, the other end of capacitor C166, the other end of capacitor C167 and pin 15 of chip U38 are grounded at the same time, pin 14 of chip U38 is connected to one end of ferrite bead FB34 through RS232_TX6 port, and the other end of ferrite bead FB34 is connected to C_RS 232_TX6 port, its pin 13 is connected to one end of the ferrite bead FB35 through the RS232_RX6 port, and the other end of the ferrite bead FB35 is connected to the C_RS232_RX6 port, its pin 12 is connected to pin 6 of chip U56, and its pin 11 is connected to pin 7 of chip U56; pin 1 of chip U56 is connected to the SEN_VDD_3V3 interface, pin 2 of chip U56 is connected to the UART6_TX port, pin 3 of chip U56 is connected to the UART6_RX port, pins 4 and 5 of chip U56 are grounded, and pin 8 of chip U56 is connected to the SEN_VDD_3V3_UART interface;

[0096] refer to Figure 21 As shown, pin 1 and pin 48 of chip U40, grounding capacitor C168 and grounding capacitor C169 are simultaneously connected to the 3V3_5_SDI interface, pin 3 of chip U40 is connected to grounding capacitor C177 and one end of crystal oscillator Y10 through RC14_5 interface, its pin 4 is connected to the other end of crystal oscillator Y10 and grounding capacitor C176 through RC15_5 interface, its pin 5 is connected to grounding capacitor C174 and one end of crystal oscillator Y9 through OSCIN5 interface, its pin 6 is connected to the other end of crystal oscillator Y9 and grounding capacitor C175 through OSCOUT5 interface, and its pin 7 is simultaneously connected to Connect one end of resistor R206 and grounded capacitor C172, pins 8, 23, and 47 of chip U40 are grounded, its pins 9, 24, the other end of resistor R206, and pin 1 of relay J14 are connected to the 3V3_5_SDI interface, its pin 12 is connected to the PA2_5 port, its pin 13 is connected to the PA3_5 interface, its pin 29 is connected to the UART6_RX port, its pin 30 is connected to the UART6_TX port, its pins 34 and 37 are connected to pins 2 and 3 of relay J14 respectively, pin 4 of relay J14 is grounded, and pin 44 of chip U40 is connected to grounded resistor R203;

[0097] refer to Figure 22As shown, pin 1 of chip U41 is connected to the 3V3_5_SDI interface, pin 2 of chip U41 is grounded, pin 3 of chip U41 is connected to the PA2_5 port, pin 4 of chip U41 is connected to one end of the ferrite bead FB38 through the SDI_12_5 interface, the other end of the ferrite bead FB38 is connected to the grounding diode D43 and the C_SDI_12_5 port, pin 5 of chip U41 is connected to the PA3_5 interface, pin 6 of chip U41 and the base of transistor Q50 are connected to the VDD3.6_5 interface, the emitter of transistor Q50 is connected to one end of resistor R114 and the collector of transistor Q51, the emitter of transistor Q51 is grounded, and the base of transistor Q51 is connected to one end of resistor R115, the other end of resistor R115 is connected to the grounding resistor R231 and the 3V3_5_SDI interface, the other end of resistor R114 and the collector of transistor Q50 are connected to the VDD_3.6V interface.

[0098] refer to Figure 23 As shown, pin 1 of chip U42 is simultaneously connected to one end of resistor R58 and UART6_RX port, the other end of resistor R58 is connected to 3V3_5_485 interface, pin 2 of chip U42 is simultaneously connected to its pin 3, the collector of transistor Q38 and one end of resistor R207, the other end of resistor R207 is simultaneously connected to 3V3_5_485 interface and one end of resistor R209, the other end of resistor R209 is simultaneously connected to one end of resistor R210 and UART6_TX port, the other end of resistor R210 is connected to the base of transistor Q38, the emitter of transistor Q38, pin 4 of chip U42 and pin 5 are grounded. Pin 6 of chip U42 and one end of resistor R208 are connected to one end of resistor R204 and one end of ferrite bead FB36 through RS485_A6 port. The other end of resistor R204 is connected to 3V3_5_485 port. The other end of ferrite bead FB36 is connected to C_RS485_A6 port. Pin 7 of chip U42 and the other end of resistor R208 are connected to ground resistor R205 and one end of ferrite bead FB37 through RS485_B6 port. The other end of ferrite bead FB37 is connected to C_RS485_B6 port. Pin 8 of chip U42 and ground capacitor C173 are connected to 3V3_5_485 port.

[0099] refer to Figure 24As shown, pin 1 and pin 3 of chip U43 are respectively connected to the high end of capacitor C178, pin 4 and pin 5 of chip U43 are respectively connected to the two ends of capacitor C181, pin 2 of chip U43 is connected to one end of capacitor C180, pin 6 of chip U43 is connected to one end of capacitor C182, pin 16 of chip U43 is connected to one end of capacitor C179, the other end of capacitor C179, the other end of capacitor C180, the other end of capacitor C182 and pin 15 of chip U43 are grounded at the same time, pin 14 of chip U43 is connected to one end of ferrite bead FB39 through RS232_TX7 port, and the other end of ferrite bead FB39 is connected to C_RS2 32_TX7 port, its pin 13 is connected to one end of the ferrite bead FB40 through the RS232_RX7 port, and the other end of the ferrite bead FB40 is connected to the C_RS232_RX7 port. Its pin 12 is connected to pin 6 of chip U58, and its pin 11 is connected to pin 7 of chip U58; pin 1 of chip U58 is connected to the SEN_VDD_3V3 interface, pin 2 of chip U58 is connected to the UART7_TX port, and pin 3 of chip U58 is connected to the UART7_RX port. Pins 4 and 5 of chip U58 are grounded, and its pin 8 is connected to the SEN_VDD_3V3_UART interface;

[0100] refer to Figure 25 As shown, pin 1 and pin 48 of chip U45, grounding capacitor C183 and grounding capacitor C185 are connected to the 3V3_6_SDI interface at the same time, pin 3 of chip U45 is connected to grounding capacitor C190 and one end of crystal oscillator Y12 through RC14_6 interface, its pin 4 is connected to the other end of crystal oscillator Y12 and grounding capacitor C192 through RC15_6 interface, its pin 5 is connected to one end of crystal oscillator Y11 and grounding capacitor C189 through OSCIN6 interface, its pin 6 is connected to the other end of crystal oscillator Y11 and grounding capacitor C191 through OSCOUT6 interface, and its pin 7 is connected to One end of the resistor R214 and the grounded capacitor C187, pins 8, 23, and 47 of the chip U45 are grounded, its pins 9, 24, the other end of the resistor R214, and pin 1 of the relay J15 are connected to the 3V3_6_SDI interface, its pin 12 is connected to the PA2_6 port, its pin 13 is connected to the PA3_6 port, its pin 29 is connected to the UART7_RX port, its pin 30 is connected to the UART7_TX port, its pins 34 and 37 are connected to pins 2 and 3 of the relay J15 respectively, pin 4 of the relay J15 is grounded, and pin 44 of the chip U45 is connected to the grounded resistor R212;

[0101] refer to Figure 23As shown, pin 1 of chip U46 is simultaneously connected to one end of resistor R62 and UART7_RX port, the other end of resistor R62 is connected to 3V3_6_485 interface, pin 2 of chip U46 is simultaneously connected to its pin 3, collector of transistor Q39 and one end of resistor R215, the other end of resistor R215 is simultaneously connected to 3V3_6_485 interface and one end of resistor R217, the other end of resistor R217 is simultaneously connected to one end of resistor R218 and UART7_TX port, the other end of resistor R218 is connected to the base of transistor Q39, the emitter of transistor Q39, pin 4 of chip U46 and pin 5 are grounded. Pin 6 of chip U46 and one end of resistor R216 are connected to resistor R211 and one end of ferrite bead FB41 through RS485_A7 port at the same time. The other end of resistor R211 is connected to 3V3_6_485 port. The other end of ferrite bead FB41 is connected to C_RS485_A7 port. Pin 7 of chip U46 and the other end of resistor R216 are connected to ground resistor R213 and one end of ferrite bead FB42 through RS485_B7 port at the same time. The other end of ferrite bead FB42 is connected to C_RS485_B7 port. Pin 8 of chip U46 and ground capacitor C188 are connected to 3V3_6_485 port at the same time.

[0102] refer to Figure 26 As shown, pin 1 of chip U47 is connected to the 3V3_6_SDI interface, its pin 2 is grounded, its pin 3 is connected to the PA2_5 port, its pin 4 is connected to one end of the ferrite bead FB43 through the SDI_12_6 port, and the other end of the ferrite bead FB43 is simultaneously connected to the grounding diode D48 and the C_SDI_12_6 port, its pin 5 is connected to the PA3_6 interface, its pin 6 and the base of the transistor Q56 are simultaneously connected to the VDD3.6_6 port, the emitter of the transistor Q56 is simultaneously connected to one end of the resistor R232 and the collector of the transistor Q57, the emitter of the transistor Q57 is grounded, and its base is connected to one end of the resistor R233, the other end of the resistor R233 is simultaneously connected to the grounding resistor R238 and the 3V3_6_SDI interface, and the other end of the resistor R232 and the collector of the transistor Q56 are simultaneously connected to the VDD_3.6V interface.

[0103] Chips such as U37, U38, U40, and U42 are different serial communication interface modules used for conversion between different protocols, such as RS232 to UART or RS485 to UART. For example, U38 is responsible for managing UART6 signal conversion, while U43 and U42 are mainly used for RS232 / RS485 conversion.

[0104] The serial data acquisition protocol parsing unit supports a variety of communication protocols, particularly common ones such as RS232, RS485, RS422, and SDI12. Through its multi-channel interface design, it receives digital signals output by the signal conversion module and standardizes them according to the requirements of different protocols, generating protocol signals that conform to the respective protocol formats. Switching between protocols is accomplished by the control logic within the serial data acquisition protocol parsing unit. By adapting to the format requirements of different protocols, the system ensures compatibility with various types of external devices, expanding its application areas and accommodating diverse industrial sensor interface standards. This module not only enables flexible adaptation in protocol conversion but also ensures stable signal transmission under different protocols, providing reliable support for diverse data output.

[0105] Analog output modules include:

[0106] refer to Figure 27 As shown, pin 1 of chip U62 is connected to one end of resistor R281, the other end of resistor R281 is connected to grounding capacitor C241, its pin 2 is connected to grounding resistor R283 and one end of resistor R279, the other end of resistor R279 is connected to the cathode of diode D88, grounding capacitor C246 and AVDD_20V interface at the same time, the anode of diode D88 is connected to one end of inductor L18 and connected to pin 5 of chip U62 at the same time, the other end of inductor L18, grounding capacitor C242, pin 6 of chip U62 and pin 3 are connected to one end of ferrite bead FB44 and one end of ferrite bead FB3 through A5V interface at the same time, the other end of ferrite bead FB44 is connected to SEN_VDD_5V interface, the other end of ferrite bead FB3 is connected to VDD_5V interface, grounding capacitor C243 is connected to pin 8 of chip U62, and pin 7 of chip U62 is grounded;

[0107] refer to Figure 28 and Figure 33 As shown, pin 1 of chip U63 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q42 and one end of resistor R312, the other end of resistor R312, the base of transistor Q42, and the collector of transistor Q58 are simultaneously connected, the collector of transistor Q42 and the emitter of transistor Q58 are simultaneously connected to pin 3 of chip U63, the base of transistor Q58 is simultaneously connected to one end of resistor R313 and grounding capacitor C251, the other end of resistor R313 is connected to grounding diode D8 through IOUT_A interface, pin 6 of chip U63 is connected to one end of resistor R315, and the other end of resistor R315 is connected to grounding diode D1 through VOUT_A interface, pin 7 of chip U63 is connected to grounding resistor R316, its pin 9 is connected to grounding resistor R314, and its pins 10 and 11 are grounded;

[0108] refer to Figure 28 and Figure 33 As shown, pin 1 of chip U64 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q43 and one end of resistor R320, the other end of resistor R320, the base of transistor Q43, and the collector of transistor Q41 are simultaneously connected, the collector of transistor Q43 and the emitter of transistor Q41 are simultaneously connected to pin 3 of chip U64, the base of transistor Q41 is simultaneously connected to one end of resistor R321 and grounding capacitor C253, the other end of resistor R321 is connected to grounding diode D5 through IOUT_B interface, pin 6 of chip U64 is connected to one end of resistor R317, the other end of resistor R317 is connected to grounding diode D2 through VOUT_B interface, pin 7 of chip U64 is connected to grounding resistor R318, its pin 9 is connected to grounding resistor R319, and its pins 10 and 11 are grounded;

[0109] refer to Figure 28 and Figure 33 As shown, pin 1 of chip U65 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q45 and one end of resistor R327, the other end of resistor R327, the base of transistor Q45, and the collector of transistor Q44 are simultaneously connected, the collector of transistor Q45 and the emitter of transistor Q44 are simultaneously connected to pin 3 of chip U65, the base of transistor Q44 is simultaneously connected to one end of resistor R328 and grounding capacitor C255, the other end of resistor R328 is connected to grounding diode D9 through IOUT_C interface, pin 6 of chip U65 is connected to one end of resistor R324, and the other end of resistor R324 is connected to grounding diode D3 through VOUT_C interface, pin 7 of chip U65 is connected to grounding resistor R325, its pin 9 is connected to grounding resistor R326, and its pins 10 and 11 are grounded;

[0110] refer to Figure 28 and Figure 33As shown, pin 1 of chip U66 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q47 and one end of resistor R334, the other end of resistor R334, the base of transistor Q47, and the collector of transistor Q46 are simultaneously connected, the collector of transistor Q47 and the emitter of transistor Q46 are simultaneously connected to pin 3 of chip U66, the base of transistor Q46 is simultaneously connected to one end of resistor R335 and grounding capacitor C257, the other end of resistor R335 is connected to grounding diode D7 through IOUT_D interface, pin 6 of chip U66 is connected to one end of resistor R331, and the other end of resistor R331 is connected to grounding diode D4 through VOUT_D interface, pin 7 of chip U66 is connected to grounding resistor R332, its pin 9 is connected to grounding resistor R333, and its pins 10 and 11 are grounded;

[0111] refer to Figure 29 and Figure 33 As shown, pin 1 of chip U7 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q48 and one end of resistor R295, the other end of resistor R295, the base of transistor Q48, and the collector of transistor Q59 are simultaneously connected, the collector of transistor Q48 and the emitter of transistor Q59 are simultaneously connected to pin 3 of chip U7, the base of transistor Q59 is simultaneously connected to one end of resistor R298 and grounding capacitor C8, the other end of resistor R298 is connected to grounding diode D29 through IOUT_E interface, pin 6 of chip U7 is connected to one end of resistor R297, the other end of resistor R297 is connected to grounding diode D25 through VOUT_E interface, pin 7 of chip U7 is connected to grounding resistor R299, its pin 9 is connected to grounding resistor R296, and its pins 10 and 11 are grounded;

[0112] refer to Figure 29 and Figure 33 As shown, pin 1 of chip U12 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q60 and one end of resistor R300, the other end of resistor R300, the base of transistor Q60, and the collector of transistor Q61 are simultaneously connected, the collector of transistor Q60 and the emitter of transistor Q61 are simultaneously connected to pin 3 of chip U12, the base of transistor Q61 is simultaneously connected to one end of resistor R303 and grounding capacitor C9, the other end of resistor R303 is connected to grounding diode D30 through IOUT_F interface, pin 6 of chip U12 is connected to one end of resistor R302, and the other end of resistor R302 is connected to grounding diode D26 through VOUT_F interface, pin 7 of chip U12 is connected to grounding resistor R304, its pin 9 is connected to grounding resistor R301, and its pins 10 and 11 are grounded;

[0113] refer to Figure 29 As shown, pin 1 of chip U15 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q62 and one end of resistor R305. The other end of resistor R305, the base of transistor Q62, and the collector of transistor Q63 are simultaneously connected. The collector of transistor Q62 and the emitter of transistor Q63 are simultaneously connected to pin 3 of chip U15. The base of transistor Q63 is simultaneously connected to one end of resistor R322 and grounding capacitor C11. The other end of resistor R322 is connected to grounding diode D31 through IOUT_G interface. Pin 6 of chip U15 is connected to one end of resistor R311. The other end of resistor R311 is connected to grounding diode D27 through VOUT_G interface. Pin 7 of chip U15 is connected to grounding resistor R323. Pin 9 of chip U15 is connected to grounding resistor R310. Pins 10 and 11 of chip U15 are grounded.

[0114] refer to Figure 29 As shown, pin 1 of chip U21 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q64 and one end of resistor R329, the other end of resistor R329, the base of transistor Q64, and the collector of transistor Q65 are simultaneously connected, the collector of transistor Q64 and the emitter of transistor Q65 are simultaneously connected to pin 3 of chip U21, the base of transistor Q65 is simultaneously connected to one end of resistor R337 and grounding capacitor C12, the other end of resistor R337 is connected to grounding diode D32 through IOUT_H interface, pin 6 of chip U21 is connected to one end of resistor R336, and the other end of resistor R336 is connected to grounding diode D28 through VOUT_H interface, pin 7 of chip U21 is connected to grounding resistor R340, its pin 9 is connected to grounding resistor R330, and its pins 10 and 11 are grounded;

[0115] refer to Figure 30 As shown, pin 2 of chip U67 is grounded, its pins 3 and 4 are connected to the ground A5V interface at the same time, its pin 4 is also connected to the ground capacitor C681, and its pin 5 is connected to the ground capacitor C258, the ground capacitor C259 and the 5.0_VREF interface at the same time;

[0116] refer to Figure 31As shown, the A5V interface is also connected to one end of the resistor R339, the grounding capacitor C260, the grounding capacitor C261, the pin 7 of the chip U10 and the pin 16 of the chip U2. The other end of the resistor R339 is connected to the pin 15 of the chip U10 and the CBM53_CS interface at the same time. The pin 1 of the chip U10 is connected to the CBM53_DIN interface, its pin 2 is connected to the CBM53_DOUT interface, its pin 3 is connected to the VOUT_A interface, its pin 4 is connected to the VOUT_B interface, its pin 5 is connected to the VOUT_C interface, its pin 6 is connected to the VOUT_D interface, its pin 11 is connected to the VOUT_H interface, its pin 12 is connected to the VOUT_G interface, its pin 13 is connected to the VOUT_F interface, its pin 14 is connected to the VOUT_E interface, its pin 10 is grounded, and its pins 9 and 8 are connected to the 5.0_VREF interface.

[0117] refer to Figure 32 As shown, pin 1 of chip U2 is connected to the VDD_3V3_R interface, its pin 3 is connected to the SPI2_SS0 interface, its pin 4 is connected to the SPI2_CLK interface, its pin 5 is connected to the SPI2_MOSI interface, its pin 6 is connected to the SPI2_MISO interface, its pins 8 and 9 are grounded, its pin 11 is connected to the CBM53_DOUT interface, its pin 12 is connected to the CBM53_DIN interface, its pin 13 is connected to the CBM53_CLK interface, and its pin 14 is connected to the CBM53_CS interface.

[0118] The signal conversion module includes:

[0119] refer to Figure 34As shown, pin 108 of socket J2B is connected to the SPI1_MISO port, pin 109 is connected to the SPI1_MOSI port, pin 110 is connected to the SPI1_SS0 port, pin 111 is connected to the SPI1_CLK port, pin 112 is connected to the DOUT5 port, pin 113 is connected to the DOUT4 port, pin 114 is connected to the DOUT3 port, pin 118 is connected to the DIN_5 port, pin 119 is connected to the DIN_4 port, pin 120 is connected to the DIN_3 port, pin 121 is connected to the LCD_DATA11 port, pin 122 is connected to the DIN_2 port, pin 123 is connected to the DIN_1 port, pin 124 is connected to the DIN_0 port, pin 126 is connected to the LCD_DATA7 port, and pin 127 is connected to the LCD _DATA6 port, its pin 128 is connected to the LCD_DATA5 port, its pin 129 is connected to the LCD_DATA4 port, its pin 130 is connected to the LCD_DATA3 port, its pin 131 is connected to the DOUT2 port, its pin 132 is connected to the DOUT1 port, its pin 133 is connected to the DOUT0 port, its pin 135 is connected to the UART4_TX1 port, its pin 136 is connected to the UART4_RX1 port, its pin 138 is connected to the USB_VBUS_EN port, its pin 141 is connected to the SD1_D3 port, its pin 142 is connected to the SD1_D2 port, its pin 143 is connected to the SD1_D1 port, its pin 144 is connected to the SD1_D0 port, its pin 145 is connected to the SD1_CMD port, and its pin 146 is connected to the SD1_CLK port;

[0120] refer to Figure 35As shown, pin 47 of the socket strip J2A is connected to one end of the resistor R48, and the other end of the resistor R48 is connected to the VDD_5V interface. Pin 48 of the socket strip J2A is connected to the USB2_DN port, and its pin 49 is connected to the USB2_DP port. Pin 52 of the socket strip J2A is connected to one end of the resistor R47, and the other end of the resistor R47 is connected to the VDD_5V interface. Pin 53 of the socket strip J2A is connected to one end of the resistor R46, and the other end of the resistor R46 is connected to the USB1_DN port. Pin 54 of the socket strip J2A is connected to one end of the resistor R45, and the other end of the resistor R45 is connected to the USB1_DP port. Pin 63 of the socket strip J2A is connected to the USER_CL_LED5 port, its pin 65 is connected to the USER_CL_LED6 port, and its pin 67 is connected to VDD_MOBILE_PG port, its pin 68 is connected to the VDD_MOBILE_EN port, its pin 69 is connected to the CPU_SEN_PWR_EN port, its pin 64 is connected to the USB1_OTG_ID port, its pin 72 is connected to the UART2_RXI port, its pin 73 is connected to the UART2_TXI port, its pin 74 is connected to the ENET1_RST port, its pin 77 is connected to the UART3_RXI, its pin 78 is connected to the UART3_TXI, its pin 79 is connected to the AC_DETECT port, its pin 80 is connected to the RST_LCS# port, its pin 82 is connected to the I2C1_SCL port, its pin 83 is connected to the I2C1_SDA port, its pin 84 is connected to the UART5_TXI port, and its pin 85 is connected to the UART5_RXI port;

[0121] refer to Figure 36As shown, pin 7 of the J2C socket is connected to the NET_STATUS_5G port, its pin 8 is connected to the CPU_ONOFF_MOBILE port, its pin 9 is connected to the CPU_EN_MOBILE port, its pin 10 is connected to the VO_SETA port, its pin 14 is connected to the SPI2_CLK port, its pin 17 is connected to the SPI2_SS0 port, its pin 19 is connected to the SPI2_MOSI port, its pin 20 is connected to the SPI2_MISO port, its pin 15 is connected to the CPU_RST_MOBILE port, its pin 16 is connected to the NET_STATUS_4G port, its pin 18 is connected to the AI_DRY port, its pin 28 is connected to the UART1_TXD port, its pin 27 is connected to the UART1_RXD port, and its pin 30 is connected to the SD1_WP port. port, its pin 29 is connected to the SD1_CD port, its pin 97 is connected to the ENET_MDIO port, its pin 96 is connected to the ENET_MDCLK port, its pin 90 is connected to the ENET1_RXD0 port, its pin 93 is connected to the ENET1_RXD1 port, its pin 91 is connected to the ENET1_CRS_DV port, its pin 92 is connected to the ENET1_TXD0 port, its pin 87 is connected to the ENET1_TXD1 port, its pin 89 is connected to the ENET1_TXEN port, its pin 88 is connected to the ENET1_TXCLK port, its pin 94 is connected to the ENET1_RXER port, its pin 101 is connected to the UART6_TX1 port, its pin 102 is connected to the ENET6_RXI port, and its pin 105 is connected to the 12VOUT_CON port;

[0122] refer to Figure 37 As shown, pin 2 of the socket strip J2D is connected to the VDD_COIN_3V interface, its pins 3 and 4 are connected to the PS_5V interface at the same time, its pin 11 is connected to one end of the resistor R44, and the other end of the resistor R44 is connected to the VDD_3V3 interface, its pin 23 is connected to the PMIC_ON_REO port, its pin 42 is connected to the MODE0 port, its pin 43 is connected to the MODE1 port, its pin 32 is connected to the MX6_POR_B port, its pin 1, pin 5, pin 6, pin 12, pin 21, pin 26, pin 31, pin 39, pin 46, pin 51, pin 55, pin 62, pin 70, pin 76, pin 81, pin 86, pin 95, pin 98, pin 107, pin 134, pin 116 and pin 140 are all grounded, its pin 40 is connected to the ENET1_NINT port, its pin 37 is connected to the COUNTER1 port, and its pin 43 is connected to the COUNTER2 port.

[0123] The signal conversion module works in conjunction with the signal receiving module to precisely convert analog signals to digital signals. This module connects to the raw signal received by the signal receiving module and contains an analog-to-digital converter for precise conversion, allowing the analog signal to be further processed in a digital format. The signal conversion module ensures data stability and consistency during the digitization of analog signals, preventing the accumulation of errors caused by interference during the conversion process. Its design enables the system to accurately digitize even tiny input voltage or current signals, providing a reliable foundation for subsequent multi-protocol adaptation and transmission.

[0124] In some exemplary embodiments of the present invention, the data acquisition system for high-precision multi-protocol signal processing further includes a power control module, wherein the power control module includes:

[0125] A first DC-DC step-down circuit is used to step down the input voltage and output it to 5V;

[0126] A second DC-DC step-down circuit is used to step down the 5V voltage and output it to 3V;

[0127] The third DC-DC step-down circuit is used to step down the 5V voltage to 3.8V or 3.3V for supplying to the communication module;

[0128] Real-time clock power supply switching unit, used to manage the power switch of the real-time clock;

[0129] Power management switch circuit for controlling the switching of multiple voltage rails through a single button;

[0130] The switch circuit of the external sensor power supply control is used to control the power switch of the external sensor.

[0131] In some exemplary embodiments of the present invention, reference Figure 38As shown, the first DC-DC buck circuit includes: pin 1 of chip U4 is connected to one end of capacitor C37, its pin 8 is simultaneously connected to the other end of capacitor C37, grounding diode D11 and one end of inductor L5, its pin 2 is simultaneously connected to grounding capacitor C45, grounding capacitor C40 and DC_BATT_IN interface, its pin 4 is connected to grounding capacitor C46, its pin 5 is connected to CAP_5V5_FB port, its pin 6 is simultaneously connected to one end of resistor R31 and grounding capacitor C38, its pin 7 and pin 9 are grounded, the other end of resistor R31 is connected to grounding capacitor C39, and the other end of inductor L5 is simultaneously connected to grounding capacitor C41, grounding capacitor C47, grounding capacitor C48, grounding capacitor C49, the anode of diode D10 and TS_5 V5 interface, the cathode of diode D10 is simultaneously connected to the PS_5V interface, one end of resistor R32, one end of capacitor C42 and the collector of transistor Q8, the other end of resistor R32, the other end of capacitor C42 and the emitter of transistor Q8 are simultaneously connected to the PWR_EN port, the base of transistor Q8 is simultaneously connected to grounded capacitor C43, grounded capacitor C44, one end of resistor R1, one end of capacitor C2, the collector of transistor Q7 and the VDD_5V interface, the other end of resistor R1, the other end of capacitor C2 and the emitter of transistor Q7 are simultaneously connected to the SEN_PWR_EN port, the TS_5V5 interface is connected to one end of resistor R28, the other end of resistor R28 is simultaneously connected to the CAP_5V5_FB port and grounded resistor R34;

[0132] refer to Figure 39 As shown, the second DC-DC step-down circuit includes: pin 1 of chip U6 is connected to the PS_3V3_FB port, its pin 6 is connected to one end of the inductor L7, its pin 2 is simultaneously connected to the other end of the inductor L7, the grounding capacitor C58, the grounding capacitor C59, the collector of the transistor Q9 and the TS_3V3 interface, the emitter of the transistor Q9 is connected to the PWR_EN port, and its base is simultaneously connected to the collector of the transistor Q3, the grounding capacitor C55 and the VDD_3V3 interface, and the emitter of the transistor Q3 is connected to SEN_PWR _EN port, its base is connected to the ground capacitor C1 and the SEN_VDD_3V3 interface at the same time, pin 7 of chip U6 is grounded, its pin 3 is connected to one end of resistor R38, its pin 4 is connected to one end of resistor R41, its pin 5 is connected to the other end of resistor R38, the other end of resistor R41, ground capacitor C56, ground capacitor C57 and PS_5V interface at the same time, TS_3V3 interface is connected to one end of ground resistor R39, and the other end of resistor R39 and ground resistor R43 are connected to PS_3V3_FB port at the same time;

[0133] refer to Figure 40As shown, the third DC-DC step-down circuit includes: pin 1 of chip U5 is connected to the TS_4G_FB port, its pin 6 is connected to one end of the inductor L6, its pin 2 is connected to the other end of the inductor L6, the grounding capacitor C52, the grounding inductor C3 and the VDD_4G interface, its pin 3 is simultaneously connected to the VDD_4G_PG port and one end of the resistor R33, its pin 5 is simultaneously connected to the other end of the resistor R33, the grounding capacitor C50, the grounding capacitor C51 and the VDD_5V interface, its pin 4 is simultaneously connected to the VDD_4G_ONOFF port and one end of the resistor R35, the other end of the resistor R35 is connected to the VDD_5V interface, the VDD_4G interface is connected to one end of the resistor R29, and the other end of the resistor R29 and the grounding resistor R36 are simultaneously connected to the TS_4G_FB port;

[0134] refer to Figure 41 As shown, the 4G power control unit includes: a VDD_4G_ONOFF port connected to the collector of the transistor Q10, the emitter of the transistor Q10 is grounded, the base thereof is connected to the ground resistor R42 and one end of the resistor R40, and the other end of the resistor R40 is connected to the VDD_MOBILE_EN port;

[0135] refer to Figure 42 As shown, the real-time clock power supply switching unit includes: pin 1 of the dual Schottky diode D6 is connected to the TS_3V3 interface, its pin 2 is connected to pin 1 of the socket J1, its common pin is connected to the VDD_COIN_3V interface, and pin 2 of the socket J1 is grounded;

[0136] refer to Figure 43 As shown, the power management switch circuit includes: the base of the transistor Q5 is connected to one end of the ground resistor R22 and one end of the resistor R16 at the same time, the other end of the resistor R16 is connected to the PMIC_ON_PEQ port, the emitter of the transistor Q5 is grounded, and its collector is connected to the PWR_EN port;

[0137] refer to Figure 44 As shown, the switching circuit for external sensor power control includes: the base of transistor Q2 is connected to one end of grounding resistor R19 and one end of resistor R18 at the same time, the other end of resistor R18 is connected to CPU_SEN_PWR_EN port, the emitter of transistor Q5 is grounded, and its collector is connected to SEN_PWR_EN port.

[0138] According to a second aspect of an embodiment of the present invention, there is provided a data processing method based on the above-mentioned data acquisition system for high-precision multi-protocol signal processing, comprising:

[0139] Receiving various signal data sent by external sensors, analyzing and processing the various signal data to obtain processed various signal data;

[0140] Converting the processed signal data into digital signals, and performing differential amplification processing on the digital signals through a programmable gain amplifier to enhance the signal strength, thereby obtaining amplified digital signals;

[0141] The amplified digital signal is converted into voltage or current.

[0142] Other embodiments of the present invention will readily occur to those skilled in the art after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses, or adaptations of the present invention that follow from the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the invention being indicated by the claims.

[0143] It should be understood that the present invention is not limited to the exact construction described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A data acquisition system for high-precision multi-protocol signal processing, characterized in that: include: A signal receiving module is used to receive various signal data sent by external sensors, analyze and process the various signal data to obtain processed signal data, and transmit the processed signal data to the signal conversion module respectively, wherein the various signal data include pulse signals, protocol signals, and small voltage signals and small current signals; a signal conversion module connected to the signal receiving module, converting the processed signal data into digital signals through an analog-to-digital converter, performing differential amplification on the digital signals through a programmable gain amplifier to enhance the signal strength, and transmitting the amplified digital signals to the analog output module; The analog output module is connected to the signal conversion module and is used to receive the amplified digital signal and convert the amplified digital signal into voltage or current.

2. The data acquisition system for high-precision multi-protocol signal processing according to claim 1, characterized in that: The signal receiving module includes: an analog signal acquisition and processing unit, the analog signal acquisition and processing unit being configured to receive the minute voltage signal and the minute current signal, and perform analysis and processing on the minute voltage signal and the minute current signal to obtain a processed minute voltage signal and a processed minute current signal; A digital signal acquisition and calculation unit, the digital signal acquisition and calculation unit is used to receive the pulse signal and perform analysis and processing on the pulse signal to obtain a processed pulse signal; The serial data acquisition protocol parsing unit is used to receive the protocol signal and perform parsing processing on the protocol signal to obtain a processed protocol signal.

3. The data acquisition system for high-precision multi-protocol signal processing according to claim 2, characterized in that: The analog acquisition signal processing unit includes: One end of resistor R3, one end of resistor R25, and one end of diode D16 are simultaneously connected to the VIN_CON_P1 interface. The other end of resistor R3 is simultaneously connected to one end of resistor R24 and one end of resistor R250. The other end of resistor R250 is connected to one end of capacitor C202 to form a VIN_P1 interface. The other end of capacitor C202, the other end of resistor R24, the other end of diode D16, the other end of resistor R25, one end of resistor R270, one end of diode D21, one end of resistor R252, and one end of capacitor C208 are simultaneously grounded. The other end of resistor R270, the other end of diode D21, and one end of resistor R251 are simultaneously connected to the VIN_CON_N1 interface. The other end of resistor R251 is simultaneously connected to the other end of resistor R252 and one end of resistor R255. The other end of resistor R255 is connected to the other end of capacitor C208 to form a VIN_N1 interface. One end of resistor R261, one end of resistor R289, and one end of diode D17 are simultaneously connected to the VIN_CON_P2 interface. The other end of resistor R261 is simultaneously connected to one end of resistor R259 and one end of resistor R285. The other end of resistor R259 is connected to one end of capacitor C216 to form a VIN_P2 interface. The other end of capacitor C216, the other end of resistor R285, the other end of diode D17, the other end of resistor R289, one end of resistor R290, one end of diode D18, one end of resistor R286, and one end of capacitor C221 are simultaneously grounded. The other end of resistor R290, the other end of diode D18, and one end of resistor R278 are simultaneously connected to the VIN_CON_N2 interface. The other end of resistor R278 is simultaneously connected to the other end of resistor R286 and one end of resistor R263. The other end of resistor R263 is connected to the other end of capacitor C221 to form a VIN_N2 interface. One end of resistor R280, one end of resistor R291, and one end of diode D22 are simultaneously connected to the VIN_CON_P3 interface. The other end of resistor R280 is simultaneously connected to one end of resistor R268 and one end of resistor R287. The other end of resistor R268 is connected to one end of capacitor C227 to form a VIN_P3 interface. The other end of capacitor C227, the other end of resistor R287, the other end of diode D22, the other end of resistor R291, one end of resistor R292, one end of diode D23, one end of resistor R288, and one end of capacitor C229 are simultaneously grounded. The other end of resistor R292, the other end of diode D23, and one end of resistor R282 are simultaneously connected to the VIN_CON_N3 interface. The other end of resistor R282 is simultaneously connected to the other end of resistor R288 and one end of resistor R269. The other end of resistor R269 is connected to the other end of capacitor C229 to form a VIN_N3 interface. One end of resistor R284, one end of resistor R293, and one end of diode D19 are simultaneously connected to the VIN_CON_P4 interface. The other end of resistor R284 is simultaneously connected to one end of resistor R272 and one end of resistor R257. The other end of resistor R272 is connected to one end of capacitor C235 to form a VIN_P4 interface. The other end of capacitor C235, the other end of resistor R257, the other end of diode D19, the other end of resistor R293, one end of resistor R294, one end of diode D20, one end of resistor R258, and one end of capacitor C237 are simultaneously grounded. The other end of resistor R294, the other end of diode D20, and one end of resistor R253 are simultaneously connected to the VIN_CON_N4 interface. The other end of resistor R253 is simultaneously connected to the other end of resistor R258 and one end of resistor R273. The other end of resistor R273 is connected to the other end of capacitor C237 to form a VIN_N4 interface. The VIN_P1 interface is connected to pin 7 of chip U57, the VIN_N1 interface is connected to pin 8 of chip U57, the VIN_P3 interface is connected to pin 9 of chip U57, the VIN_N3 interface is connected to pin 10 of chip U57, the VIN_P2 interface is connected to pin 13 of chip U57, the VIN_N2 interface is connected to pin 14 of chip U57, the VIN_P4 interface is connected to pin 11 of chip U57, the VIN_N4 interface is connected to pin 12 of chip U57, the pin 1 of chip U57 is connected to A5V and one end of resistor R256 at the same time, the pin 2 of chip U57 is connected to one end of capacitor C205 and the grounding resistor R256 at the same time. One end of the transistor Q40, pin 3 of the chip U57 is connected to the grounded capacitor C213 and the other end of the transistor Q40 at the same time, pin 4 of the chip U57 is connected to the other end of the resistor R256, pin 5 of the chip U57 is connected to the 2.5V_VREF interface, pin 6 and pin 15 of the chip U57 are grounded, pin 16 of the chip U57 is connected to pin 13 of the chip U1, pin 17 of the chip U57 is connected to pin 12 of the chip U1, pin 18 of the chip U57 is connected to pin 11 of the chip U1, pin 19 of the chip U57 is connected to pin 15 of the chip U1, and pin 20 of the chip U57 is connected to pin 10 of the chip U1; Pin 1 of chip U1 is connected to the VDD_3V3_R interface, pin 2 of chip U1 is connected to the SPI1_CLK port of chip J28 of the signal conversion module, pin 4 of chip U1 is connected to the SPI1_SS0 port, pin 5 of chip U1 is connected to the SPI1_MOSI port, pin 6 of chip U1 is connected to the SPI1_MISO port, pin 7 of chip U1 is connected to the AI_DRY port, pins 8 and 9 of chip U1 are grounded, and pin 16 of chip U1 is connected to the A5V interface; Pin 2 of chip U59 is grounded, pins 3 and 4 of chip U59 are connected to ground capacitor C230 and A5V interface at the same time, and pin 5 of chip U59 is connected to ground capacitor C232 to form the 2.5V_VREF interface.

4. The data acquisition system for high-precision multi-protocol signal processing according to claim 2, characterized in that: The digital signal acquisition and calculation unit includes: One end of the ferrite bead FB1 and one end of the ferrite bead FB2 are simultaneously connected to the VDD_3V3_R interface, the other end of the ferrite bead FB1 is connected to the VDD_3V3 interface, and the other end of the ferrite bead FB2 is connected to the SEN_VDD_3V3 interface. Both ends of the ferrite bead FB45 are grounded. Pin 4 of chip U48, pin 4 of chip U49, pin 4 of chip U50, pin 4 of chip U51, pin 4 of chip U52, pin 4 of chip U53, pin 4 of chip U54, pin 4 of chip U55, and pin 1 of chip U33 are all connected to the VDD_3V3_R interface. Pin 1 of chip U48 is connected to one end of resistor R219, the other end of resistor R219 and one end of diode D53 are connected to INPUT0 port at the same time, the other end of diode D53 and pin 2 of chip U48 are grounded at the same time, pin 3 of chip U48, grounding capacitor C193 and grounding resistor R225 are connected to DIN_0 interface at the same time; pin 1 of chip U49 is connected to one end of resistor R220, the other end of resistor R220 and one end of diode D54 are connected to INPUT1 port at the same time, the other end of diode D54 and pin 2 of chip U49 are grounded at the same time, pin 3 of chip U49, grounding capacitor C194 and grounding resistor R226 are connected to DIN_1 interface at the same time; Pin 1 of chip U50 is connected to one end of resistor R222, the other end of resistor R222 and one end of diode D55 are connected to INPUT2 port at the same time, the other end of diode D55 and pin 2 of chip U50 are grounded at the same time, pin 3 of chip U50, grounding capacitor C195 and grounding resistor R227 are connected to DIN_2 interface at the same time; pin 1 of chip U51 is connected to one end of resistor R228, the other end of resistor R228 and one end of diode D56 are connected to INPUT3 port at the same time, the other end of diode D56 and pin 2 of chip U51 are grounded at the same time, pin 3 of chip U51, grounding capacitor C196 and grounding resistor R234 are connected to DIN_3 interface at the same time; pin 1 of chip U52 is connected to one end of resistor R228, the other end of resistor R228 and one end of diode D56 are connected to INPUT3 port at the same time, the other end of diode D56 and pin 2 of chip U51 are grounded at the same time, pin 3 of chip U51, grounding capacitor C196 and grounding resistor R234 are connected to DIN_3 interface at the same time; pin 2 of chip U52 is connected to one end of resistor R228, the other end of resistor R228 and one end of diode D56 are connected to INPUT3 port at the same time, the other end of diode D56 and pin 2 of chip U51 are grounded at the same time, pin 3 of chip U51, grounding capacitor C196 and grounding resistor R234 are connected to DIN_3 interface at the same time 1 is connected to one end of the resistor R229, the other end of the resistor R229 and one end of the diode D57 are connected to the INPUT4 port at the same time, the other end of the diode D57 and the pin 2 of the chip U52 are grounded at the same time, the pin 3 of the chip U52, the grounding capacitor C197 and the grounding resistor R235 are connected to the DIN_4 interface at the same time; the pin 1 of the chip U53 is connected to one end of the resistor R230, the other end of the resistor R230 and one end of the diode D58 are connected to the INPUT5 port at the same time, the other end of the diode D58 and the pin 2 of the chip U53 are grounded at the same time, the pin 3 of the chip U53, the grounding capacitor C198 and the grounding resistor R236 are connected to the DIN_5 interface at the same time; the pin 1 of the chip U54 is connected to the One end of resistor R237, the other end of resistor R237 and one end of diode D64 are connected to the EX_COUNTER1 port at the same time, the other end of diode D64 and pin 2 of chip U54 are grounded at the same time, pin 3 of chip U54, grounding capacitor C199 and grounding resistor R239 are connected to the COUNTER1 port at the same time; pin 1 of chip U55 is connected to one end of resistor R246, the other end of resistor R246 and one end of diode D65 are connected to the EX_COUNTER2 port at the same time, the other end of diode D65 and pin 2 of chip U55 are grounded at the same time, pin 3 of chip U55, grounding capacitor C200 and grounding resistor R248 are connected to the COUNTER2 port at the same time; Pin 2 of chip U33 is connected to DOUT5 port, pin 3 of chip U33 is connected to DOUT4 port, pin 4 of chip U33 is connected to DOUT3 port, pin 5 of chip U33 is connected to DOUT2 port, pin 6 of chip U33 is connected to DOUT1 port, pin 7 of chip U33 is connected to DOUT0 port, pins 8 and 9 of chip U33 are grounded, pin 10 of chip U33 is connected to EXT_DO0 port, pin 11 of chip U33 is connected to EXT_DO1 port, pin 12 of chip U33 is connected to EXT_ DO2 port, pin 13 of chip U33 is connected to EXT_DO3 port, pin 14 of chip U33 is connected to EXT_DO4 port, pin 15 of chip U33 is connected to EXT_DO5 port, pin 16 of chip U33 is connected to pin 1 and pin 2 of switch SW4 at the same time, pin 3 of switch SW4 is connected to the cathode of diode D60, the anode of diode D60 is connected to SEN_VDD_3V3 port, pin 4 of switch SW4 is connected to the cathode of diode D59, the anode of diode D59 is connected to SEN_VDD_5V port; Pin 1 of socket J16 is connected to the VIN_CON_P1 port, its pin 2 is connected to the VIN_CON_N1 port, its pin 3 is connected to the VIN_CON_P3 port, its pin 4 is connected to the VIN_CON_N3 port, its pin 5 is connected to the VIN_CON_P4 port, its pin 6 is connected to the VIN_CON_N4 port, its pin 7 is connected to the VIN_CON_P2 port, its pin 8 is connected to the VIN_CON_N2 port, its pin 9 is connected to the VOUT_A port, its pin 10 is connected to the IOUT_A port, and its pin 11 is connected to VOUT_B port, its pin 12 is connected to IOUT_B port, its pin 13 is connected to VOUT_C port, its pin 14 is connected to IOUT_C port, its pin 15 is connected to VOUT_D port, its pin 16 is connected to IOUT_D port, its pin 17 is connected to VOUT_E port, its pin 18 is connected to IOUT_E port, its pin 19 is connected to VOUT_F port, its pin 20 is connected to IOUT_F port, its pin 21 is connected to VOUT_G port, its pin 22 is connected to IOUT_G port, its pin 23 is connected to VOUT T_H port, its pin 24 is connected to the IOUT_H port, its pins 25, 26 and 28 are grounded, its pin 27 is connected to the EX_COUNTER1 port, its pin 29 is connected to the INPUT0 port, its pin 30 is connected to the EX_COUNTER2 port, its pin 31 is connected to the INPUT2 port, its pin 32 is connected to the INPUT1 port, its pin 33 is connected to the INPUT4 port, its pin 34 is connected to the INPUT3 port, its pin 36 is connected to the INPUT5 port, and its pin 37 is connected to the EXT_DO0 port. Its pin 38 is connected to the EXT_DO1 port, its pin 39 is connected to the EXT_DO2 port, its pin 40 is connected to the EXT_DO3 port, its pin 41 is connected to the EXT_DO4 port, its pin 42 is connected to the EXT_DO5 port, its pin 43 is connected to the 12VOUT_CON port, its pin 44 is connected to the SEN_PWR_EN port, its pin 45 is connected to the VDD_3V3 interface, its pins 46 and 48 are grounded, its pin 49 is connected to the DC_BATT_IN interface, and its pin 50 is connected to the DC_BATT_IN interface.

5. The data acquisition system for high-precision multi-protocol signal processing according to claim 2, characterized in that: The serial data acquisition protocol parsing unit includes: Pin 1 of chip U37 is grounded, pin 2 of chip U37 is connected to ground resistor R193, pin 3 of chip U37 is connected to ground resistor R192, pin 4 of chip U37 is simultaneously connected to one end of resistor R194 and the emitter of transistor Q32, the other end of resistor R194, the collector of transistor Q32, one end of resistor R195, the collector of transistor Q33, one end of resistor R196 and the collector of transistor Q34 are simultaneously connected, the base of transistor Q32 is simultaneously connected to ground resistor R274 and 3V3_5_232 interface, the other end of resistor R196 and the emitter of transistor Q34 are simultaneously connected to pin 7 of chip U37, the base of transistor Q34 is connected to 3V3_5_SDI interface, the other end of resistor R195 and the emitter of transistor Q33 are simultaneously connected to pin 6 of chip U37, and the bottom of chip U37 is connected to 3V3_5_SDI interface. Pin 9 of chip U37 is simultaneously connected to one end of resistor R202 and the emitter of transistor Q37. The base of transistor Q37 is connected to the 3V3_6_SDI interface. The collector of transistor Q37, the other end of resistor R202, one end of resistor R200, the collector of transistor Q35, one end of resistor R201, and the collector of transistor Q36 are simultaneously connected to form a SEN_VDD_3V3_UART interface. The other end of resistor R201 and the emitter of transistor Q36 are simultaneously connected to pin 10 of chip U37. The base of transistor Q36 is simultaneously connected to ground resistor R277 and the 3V3_6_485 interface. The other end of resistor R200 and the emitter of transistor Q35 are simultaneously connected to pin 12 of chip U37. The base of transistor Q35 is simultaneously connected to ground resistor R276 and the 3V3_6_232 interface. Pins 1 and 3 of chip U38 are connected to both ends of capacitor C163 respectively, pins 4 and 5 of chip U38 are connected to both ends of capacitor C164 respectively, pin 2 of chip U38 is connected to one end of capacitor C166, its pin 6 is connected to one end of capacitor C167, its pin 16 is connected to one end of capacitor C165, the other end of capacitor C165, the other end of capacitor C166, the other end of capacitor C167 and pin 15 of chip U38 are grounded at the same time, pin 14 of chip U38 is connected to one end of ferrite bead FB34 through RS232_TX6 port, and the other end of ferrite bead FB34 is connected to C_RS2 32_TX6 port, its pin 13 is connected to one end of the ferrite bead FB35 through the RS232_RX6 port, and the other end of the ferrite bead FB35 is connected to the C_RS232_RX6 port. Its pin 12 is connected to pin 6 of chip U56, and its pin 11 is connected to pin 7 of chip U56; pin 1 of chip U56 is connected to the SEN_VDD_3V3 interface, pin 2 of chip U56 is connected to the UART6_TX port, pin 3 of chip U56 is connected to the UART6_RX port, pins 4 and 5 of chip U56 are grounded, and pin 8 of chip U56 is connected to the SEN_VDD_3V3_UART interface; Pin 1 and pin 48 of chip U40, ground capacitor C168 and ground capacitor C169 are connected to the 3V3_5_SDI interface at the same time. Pin 3 of chip U40 is connected to ground capacitor C177 and one end of crystal oscillator Y10 through RC14_5 interface. Its pin 4 is connected to the other end of crystal oscillator Y10 and ground capacitor C176 through RC15_5 interface. Its pin 5 is connected to ground capacitor C174 and one end of crystal oscillator Y9 through OSCIN5 interface. Its pin 6 is connected to the other end of crystal oscillator Y9 and ground capacitor C175 through OSCOUT5 interface. Its pin 7 is connected to One end of the resistor R206 and the grounded capacitor C172, pins 8, 23, and 47 of the chip U40 are grounded, its pins 9, 24, the other end of the resistor R206, and pin 1 of the relay J14 are connected to the 3V3_5_SDI interface, its pin 12 is connected to the PA2_5 port, its pin 13 is connected to the PA3_5 interface, its pin 29 is connected to the UART6_RX port, its pin 30 is connected to the UART6_TX port, its pins 34 and 37 are connected to pins 2 and 3 of the relay J14 respectively, pin 4 of the relay J14 is grounded, and pin 44 of the chip U40 is connected to the grounded resistor R203; Pin 1 of chip U41 is connected to the 3V3_5_SDI interface, pin 2 of chip U41 is grounded, pin 3 of chip U41 is connected to the PA2_5 port, pin 4 of chip U41 is connected to one end of the ferrite bead FB38 through the SDI_12_5 interface, the other end of the ferrite bead FB38 is connected to both the grounding diode D43 and the C_SDI_12_5 port, pin 5 of chip U41 is connected to the PA3_5 interface, pin 6 of chip U41 and the base of transistor Q50 are connected to both the VDD3.6_5 interface, the emitter of transistor Q50 is connected to both one end of resistor R114 and the collector of transistor Q51, the emitter of transistor Q51 is grounded, and the base of transistor Q51 is connected to one end of resistor R115, the other end of resistor R115 is connected to both the grounding resistor R231 and the 3V3_5_SDI interface, the other end of resistor R114 and the collector of transistor Q50 are connected to both the VDD_3.6V interface; Pin 1 of chip U42 is connected to one end of resistor R58 and UART6_RX port at the same time, and the other end of resistor R58 is connected to 3V3_5_485 interface. Pin 2 of chip U42 is connected to its pin 3, collector of transistor Q38 and one end of resistor R207 at the same time. The other end of resistor R207 is connected to 3V3_5_485 interface and one end of resistor R209 at the same time. The other end of resistor R209 is connected to one end of resistor R210 and UART6_TX port at the same time. The other end of resistor R210 is connected to the base of transistor Q38. The emitter of transistor Q38, pin 4 of chip U42 and pin 5 of chip U42 are grounded. Pin 6 of U42 and one end of resistor R208 are connected to one end of resistor R204 and one end of ferrite bead FB36 through the RS485_A6 port. The other end of resistor R204 is connected to the 3V3_5_485 port, and the other end of ferrite bead FB36 is connected to the C_RS485_A6 port. Pin 7 of U42 and the other end of resistor R208 are connected to the ground resistor R205 and one end of ferrite bead FB37 through the RS485_B6 port. The other end of ferrite bead FB37 is connected to the C_RS485_B6 port. Pin 8 of U42 and ground capacitor C173 are connected to the 3V3_5_485 port. Pin 1 and pin 3 of chip U43 are connected to the high end of capacitor C178 respectively, and pin 4 and pin 5 of chip U43 are connected to the two ends of capacitor C181 respectively. Pin 2 of chip U43 is connected to one end of capacitor C180, pin 6 of chip U43 is connected to one end of capacitor C182, and pin 16 of chip U43 is connected to one end of capacitor C179. The other end of capacitor C179, the other end of capacitor C180, the other end of capacitor C182 and pin 15 of chip U43 are grounded at the same time. Pin 14 of chip U43 is connected to one end of ferrite bead FB39 through RS232_TX7 port, and the other end of ferrite bead FB39 is connected to C_RS232 _TX7 port, its pin 13 is connected to one end of the ferrite bead FB40 through the RS232_RX7 port, and the other end of the ferrite bead FB40 is connected to the C_RS232_RX7 port, its pin 12 is connected to pin 6 of chip U58, and its pin 11 is connected to pin 7 of chip U58; pin 1 of chip U58 is connected to the SEN_VDD_3V3 interface, pin 2 of chip U58 is connected to the UART7_TX port, pin 3 of chip U58 is connected to the UART7_RX port, pins 4 and 5 of chip U58 are grounded, and pin 8 of chip U58 is connected to the SEN_VDD_3V3_UART interface; Pin 1 and pin 48 of chip U45, grounding capacitor C183 and grounding capacitor C185 are connected to the 3V3_6_SDI interface at the same time. Pin 3 of chip U45 is connected to grounding capacitor C190 and one end of crystal oscillator Y12 through RC14_6 interface. Its pin 4 is connected to the other end of crystal oscillator Y12 and grounding capacitor C192 through RC15_6 interface. Its pin 5 is connected to one end of crystal oscillator Y11 and grounding capacitor C189 through OSCIN6 interface. Its pin 6 is connected to the other end of crystal oscillator Y11 and grounding capacitor C191 through OSCOUT6 interface. Its pin 7 is connected to the circuit. One end of resistor R214 and grounded capacitor C187, pins 8, 23, and 47 of chip U45 are grounded, its pins 9, 24, the other end of resistor R214, and pin 1 of relay J15 are connected to the 3V3_6_SDI interface, its pin 12 is connected to the PA2_6 port, its pin 13 is connected to the PA3_6 port, its pin 29 is connected to the UART7_RX port, its pin 30 is connected to the UART7_TX port, its pins 34 and 37 are connected to pins 2 and 3 of relay J15 respectively, pin 4 of relay J15 is grounded, and pin 44 of chip U45 is connected to the grounded resistor R212; Pin 1 of chip U46 is connected to one end of resistor R62 and UART7_RX port at the same time, and the other end of resistor R62 is connected to 3V3_6_485 interface. Pin 2 of chip U46 is connected to its pin 3, the collector of transistor Q39 and one end of resistor R215 at the same time. The other end of resistor R215 is connected to 3V3_6_485 interface and one end of resistor R217 at the same time. The other end of resistor R217 is connected to one end of resistor R218 and UART7_TX port at the same time. The other end of resistor R218 is connected to the base of transistor Q39. The emitter of transistor Q39, pin 4 of chip U46 and pin 5 are grounded. Pin 6 of chip U46 and one end of resistor R216 are connected to resistor R211 and one end of ferrite bead FB41 through RS485_A7 port. The other end of resistor R211 is connected to 3V3_6_485 port. The other end of ferrite bead FB41 is connected to C_RS485_A7 port. Pin 7 of chip U46 and the other end of resistor R216 are connected to ground resistor R213 and one end of ferrite bead FB42 through RS485_B7 port. The other end of ferrite bead FB42 is connected to C_RS485_B7 port. Pin 8 of chip U46 and ground capacitor C188 are connected to 3V3_6_485 port. Pin 1 of chip U47 is connected to the 3V3_6_SDI interface, its pin 2 is grounded, its pin 3 is connected to the PA2_5 port, its pin 4 is connected to one end of the ferrite bead FB43 through the SDI_12_6 port, and the other end of the ferrite bead FB43 is connected to the grounding diode D48 and the C_SDI_12_6 port at the same time. Its pin 5 is connected to the PA3_6 interface, its pin 6 and the base of the transistor Q56 are connected to the VDD3.6_6 port at the same time, the emitter of the transistor Q56 is connected to one end of the resistor R232 and the collector of the transistor Q57 at the same time, the emitter of the transistor Q57 is grounded, and its base is connected to one end of the resistor R233, the other end of the resistor R233 is connected to the grounding resistor R238 and the 3V3_6_SDI interface at the same time, and the other end of the resistor R232 and the collector of the transistor Q56 are connected to the VDD_3.6V interface at the same time.

6. The data acquisition system for high-precision multi-protocol signal processing according to claim 1, characterized in that: The analog output module includes: Pin 1 of chip U62 is connected to one end of resistor R281, the other end of resistor R281 is connected to ground capacitor C241, and its pin 2 is connected to ground resistor R283 and one end of resistor R279. The other end of resistor R279 is connected to the cathode of diode D88, ground capacitor C246 and AVDD_20V interface at the same time. The anode of diode D88 is connected to one end of inductor L18 and is connected to pin 5 of chip U62 at the same time. The other end of inductor L18, ground capacitor C242, pin 6 of chip U62 and pin 3 are connected to one end of ferrite bead FB44 and one end of ferrite bead FB3 through the A5V interface at the same time. The other end of ferrite bead FB44 is connected to SEN_VDD_5V interface, and the other end of ferrite bead FB3 is connected to VDD_5V interface. Ground capacitor C243 is connected to pin 8 of chip U62, and pin 7 of chip U62 is grounded. Pin 1 of chip U63 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q42 and one end of resistor R312. The other end of resistor R312, the base of transistor Q42, and the collector of transistor Q58 are simultaneously connected. The collector of transistor Q42 and the emitter of transistor Q58 are simultaneously connected to pin 3 of chip U63. The base of transistor Q58 is simultaneously connected to one end of resistor R313 and grounding capacitor C251. The other end of resistor R313 is connected to grounding diode D8 through the IOUT_A interface. Pin 6 of chip U63 is connected to one end of resistor R315. The other end of resistor R315 is connected to grounding diode D1 through the VOUT_A interface. Pin 7 of chip U63 is connected to grounding resistor R316. Pin 9 of chip U63 is connected to grounding resistor R314. Pins 10 and 11 of chip U63 are grounded. Pin 1 of chip U64 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q43 and one end of resistor R320. The other end of resistor R320, the base of transistor Q43, and the collector of transistor Q41 are simultaneously connected. The collector of transistor Q43 and the emitter of transistor Q41 are simultaneously connected to pin 3 of chip U64. The base of transistor Q41 is simultaneously connected to one end of resistor R321 and grounding capacitor C253. The other end of resistor R321 is connected to grounding diode D5 through the IOUT_B interface. Pin 6 of chip U64 is connected to one end of resistor R317. The other end of resistor R317 is connected to grounding diode D2 through the VOUT_B interface. Pin 7 of chip U64 is connected to grounding resistor R318. Its pin 9 is connected to grounding resistor R319. Its pins 10 and 11 are grounded. Pin 1 of chip U65 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q45 and one end of resistor R327. The other end of resistor R327, the base of transistor Q45, and the collector of transistor Q44 are simultaneously connected. The collector of transistor Q45 and the emitter of transistor Q44 are simultaneously connected to pin 3 of chip U65. The base of transistor Q44 is simultaneously connected to one end of resistor R328 and grounding capacitor C255. The other end of resistor R328 is connected to grounding diode D9 through the IOUT_C interface. Pin 6 of chip U65 is connected to one end of resistor R324, and the other end of resistor R324 is connected to grounding diode D3 through the VOUT_C interface. Pin 7 of chip U65 is connected to grounding resistor R325, its pin 9 is connected to grounding resistor R326, and its pins 10 and 11 are grounded. Pin 1 of chip U66 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q47 and one end of resistor R334. The other end of resistor R334, the base of transistor Q47, and the collector of transistor Q46 are simultaneously connected. The collector of transistor Q47 and the emitter of transistor Q46 are simultaneously connected to pin 3 of chip U66. The base of transistor Q46 is simultaneously connected to one end of resistor R335 and grounding capacitor C257. The other end of resistor R335 is connected to grounding diode D7 through the IOUT_D interface. Pin 6 of chip U66 is connected to one end of resistor R331. The other end of resistor R331 is connected to grounding diode D4 through the VOUT_D interface. Pin 7 of chip U66 is connected to grounding resistor R332. Pin 9 of chip U66 is connected to grounding resistor R333. Pins 10 and 11 of chip U66 are grounded. Pin 1 of chip U7 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q48 and one end of resistor R295. The other end of resistor R295, the base of transistor Q48, and the collector of transistor Q59 are simultaneously connected. The collector of transistor Q48 and the emitter of transistor Q59 are simultaneously connected to pin 3 of chip U7. The base of transistor Q59 is simultaneously connected to one end of resistor R298 and grounding capacitor C8. The other end of resistor R298 is connected to grounding diode D29 through the IOUT_E interface. Pin 6 of chip U7 is connected to one end of resistor R297. The other end of resistor R297 is connected to grounding diode D25 through the VOUT_E interface. Pin 7 of chip U7 is connected to grounding resistor R299. Pin 9 of chip U7 is connected to grounding resistor R296. Pins 10 and 11 of chip U7 are grounded. Pin 1 of chip U12 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q60 and one end of resistor R300. The other end of resistor R300, the base of transistor Q60, and the collector of transistor Q61 are simultaneously connected. The collector of transistor Q60 and the emitter of transistor Q61 are simultaneously connected to pin 3 of chip U12. The base of transistor Q61 is simultaneously connected to one end of resistor R303 and grounding capacitor C9. The other end of resistor R303 is connected to grounding diode D30 through the IOUT_F interface. Pin 6 of chip U12 is connected to one end of resistor R302. The other end of resistor R302 is connected to grounding diode D26 through the VOUT_F interface. Pin 7 of chip U12 is connected to grounding resistor R304. Pin 9 of chip U12 is connected to grounding resistor R301. Pins 10 and 11 of chip U12 are grounded. Pin 1 of chip U15 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q62 and one end of resistor R305. The other end of resistor R305, the base of transistor Q62, and the collector of transistor Q63 are simultaneously connected. The collector of transistor Q62 and the emitter of transistor Q63 are simultaneously connected to pin 3 of chip U15. The base of transistor Q63 is simultaneously connected to one end of resistor R322 and grounding capacitor C11. The other end of resistor R322 is connected to grounding diode D31 through the IOUT_G interface. Pin 6 of chip U15 is connected to one end of resistor R311. The other end of resistor R311 is connected to grounding diode D27 through the VOUT_G interface. Pin 7 of chip U15 is connected to grounding resistor R323. Pin 9 of chip U15 is connected to grounding resistor R310. Pins 10 and 11 of chip U15 are grounded. Pin 1 of chip U21 is connected to the AVDD_20V interface, and its pin 2 is simultaneously connected to the emitter of transistor Q64 and one end of resistor R329. The other end of resistor R329, the base of transistor Q64, and the collector of transistor Q65 are simultaneously connected. The collector of transistor Q64 and the emitter of transistor Q65 are simultaneously connected to pin 3 of chip U21. The base of transistor Q65 is simultaneously connected to one end of resistor R337 and grounding capacitor C12. The other end of resistor R337 is connected to grounding diode D32 through the IOUT_H interface. Pin 6 of chip U21 is connected to one end of resistor R336. The other end of resistor R336 is connected to grounding diode D28 through the VOUT_H interface. Pin 7 of chip U21 is connected to grounding resistor R340. Pin 9 of chip U21 is connected to grounding resistor R330. Pins 10 and 11 of chip U21 are grounded. Pin 2 of chip U67 is grounded, and its pins 3 and 4 are connected to the ground A5V interface at the same time. Its pin 4 is also connected to the ground capacitor C681, and its pin 5 is connected to the ground capacitor C258, the ground capacitor C259 and the 5.0_VREF interface at the same time. The A5V interface is also connected to one end of resistor R339, grounded capacitor C260, grounded capacitor C261, pin 7 of chip U10, and pin 16 of chip U2. The other end of resistor R339 is connected to pin 15 of chip U10 and CBM53_CS interface at the same time. Pin 1 of chip U10 is connected to CBM53_DIN interface, its pin 2 is connected to CBM53_DOUT interface, its pin 3 is connected to VOUT_A interface, its pin 4 is connected to VOUT_B interface, its pin 5 is connected to VOUT_C interface, its pin 6 is connected to VOUT_D interface, its pin 11 is connected to VOUT_H interface, its pin 12 is connected to VOUT_G interface, its pin 13 is connected to VOUT_F interface, its pin 14 is connected to VOUT_E interface, its pin 10 is grounded, and its pins 9 and 8 are connected to 5.0_VREF interface. Pin 1 of chip U2 is connected to the VDD_3V3_R interface, its pin 3 is connected to the SPI2_SS0 interface, its pin 4 is connected to the SPI2_CLK interface, its pin 5 is connected to the SPI2_MOSI interface, its pin 6 is connected to the SPI2_MISO interface, its pins 8 and 9 are grounded, its pin 11 is connected to the CBM53_DOUT interface, its pin 12 is connected to the CBM53_DIN interface, its pin 13 is connected to the CBM53_CLK interface, and its pin 14 is connected to the CBM53_CS interface.

7. The data acquisition system for high-precision multi-protocol signal processing according to claim 1, characterized in that: The signal conversion module includes: Pin 108 of the J2B socket is connected to the SPI1_MISO port, pin 109 is connected to the SPI1_MOSI port, pin 110 is connected to the SPI1_SS0 port, pin 111 is connected to the SPI1_CLK port, pin 112 is connected to the DOUT5 port, pin 113 is connected to the DOUT4 port, pin 114 is connected to the DOUT3 port, pin 118 is connected to the DIN_5 port, pin 119 is connected to the DIN_4 port, pin 120 is connected to the DIN_3 port, pin 121 is connected to the LCD_DATA11 port, pin 122 is connected to the DIN_2 port, pin 123 is connected to the DIN_1 port, pin 124 is connected to the DIN_0 port, pin 126 is connected to the LCD_DATA7 port, and pin 127 is connected to the LCD_D ATA6 port, its pin 128 is connected to the LCD_DATA5 port, its pin 129 is connected to the LCD_DATA4 port, its pin 130 is connected to the LCD_DATA3 port, its pin 131 is connected to the DOUT2 port, its pin 132 is connected to the DOUT1 port, its pin 133 is connected to the DOUT0 port, its pin 135 is connected to the UART4_TX1 port, its pin 136 is connected to the UART4_RX1 port, its pin 138 is connected to the USB_VBUS_EN port, its pin 141 is connected to the SD1_D3 port, its pin 142 is connected to the SD1_D2 port, its pin 143 is connected to the SD1_D1 port, its pin 144 is connected to the SD1_D0 port, its pin 145 is connected to the SD1_CMD port, and its pin 146 is connected to the SD1_CLK port; Pin 47 of socket strip J2A is connected to one end of resistor R48, and the other end of resistor R48 is connected to the VDD_5V interface. Pin 48 of socket strip J2A is connected to the USB2_DN port, and its pin 49 is connected to the USB2_DP port. Its pin 52 is connected to one end of resistor R47, and the other end of resistor R47 is connected to the VDD_5V interface. Pin 53 of socket strip J2A is connected to one end of resistor R46, and the other end of resistor R46 is connected to the USB1_DN port. Pin 54 of socket strip J2A is connected to one end of resistor R45, and the other end of resistor R45 is connected to the USB1_DP port. Pin 63 of socket strip J2A is connected to the USER_CL_LED5 port, its pin 65 is connected to the USER_CL_LED6 port, and its pin 67 is connected to the VDD_MOBILE_PG port. , its pin 68 is connected to the VDD_MOBILE_EN port, its pin 69 is connected to the CPU_SEN_PWR_EN port, its pin 64 is connected to the USB1_OTG_ID port, its pin 72 is connected to the UART2_RXI port, its pin 73 is connected to the UART2_TXI port, its pin 74 is connected to the ENET1_RST port, its pin 77 is connected to the UART3_RXI, its pin 78 is connected to the UART3_TXI, its pin 79 is connected to the AC_DETECT port, its pin 80 is connected to the RST_LCS# port, its pin 82 is connected to the I2C1_SCL port, its pin 83 is connected to the I2C1_SDA port, its pin 84 is connected to the UART5_TXI port, and its pin 85 is connected to the UART5_RXI port; Pin 7 of the J2C socket is connected to the NET_STATUS_5G port, pin 8 is connected to the CPU_ONOFF_MOBILE port, pin 9 is connected to the CPU_EN_MOBILE port, pin 10 is connected to the VO_SETA port, pin 14 is connected to the SPI2_CLK port, pin 17 is connected to the SPI2_SS0 port, pin 19 is connected to the SPI2_MOSI port, pin 20 is connected to the SPI2_MISO port, pin 15 is connected to the CPU_RST_MOBILE port, pin 16 is connected to the NET_STATUS_4G port, pin 18 is connected to the AI_DRY port, pin 28 is connected to the UART1_TXD port, pin 27 is connected to the UART1_RXD port, and pin 30 is connected to the SD1_WP port. port, its pin 29 is connected to the SD1_CD port, its pin 97 is connected to the ENET_MDIO port, its pin 96 is connected to the ENET_MDCLK port, its pin 90 is connected to the ENET1_RXD0 port, its pin 93 is connected to the ENET1_RXD1 port, its pin 91 is connected to the ENET1_CRS_DV port, its pin 92 is connected to the ENET1_TXD0 port, its pin 87 is connected to the ENET1_TXD1 port, its pin 89 is connected to the ENET1_TXEN port, its pin 88 is connected to the ENET1_TXCLK port, its pin 94 is connected to the ENET1_RXER port, its pin 101 is connected to the UART6_TX1 port, its pin 102 is connected to the ENET6_RXI port, and its pin 105 is connected to the 12VOUT_CON port; Pin 2 of the socket strip J2D is connected to the VDD_COIN_3V interface, its pins 3 and 4 are also connected to the PS_5V interface, its pin 11 is connected to one end of the resistor R44, and the other end of the resistor R44 is connected to the VDD_3V3 interface, its pin 23 is connected to the PMIC_ON_REO port, its pin 42 is connected to the MODE0 port, its pin 43 is connected to the MODE1 port, its pin 32 is connected to the MX6_POR_B port, its pins 1, 5, 6, 12, 21, 26, 31, 39, 46, 51, 55, 62, 70, 76, 81, 86, 95, 98, 107, 134, 116 and 140 are all grounded, its pin 40 is connected to the ENET1_NINT port, its pin 37 is connected to the COUNTER1 port, and its pin 43 is connected to the COUNTER2 port.

8. The data acquisition system for high-precision multi-protocol signal processing according to any one of claims 1 to 7, characterized in that: The data acquisition system for high-precision multi-protocol signal processing further includes a power control module, which includes: A first DC-DC step-down circuit is used to step down the input voltage and output it to 5V; A second DC-DC step-down circuit is used to step down the 5V voltage and output it to 3V; The third DC-DC step-down circuit is used to step down the 5V voltage to 3.8V or 3.3V for supplying to the communication module; Real-time clock power supply switching unit, used to manage the power switch of the real-time clock; Power management switch circuit for controlling the switching of multiple voltage rails with a single button; The switch circuit of the external sensor power supply control is used to control the power switch of the external sensor.

9. The data acquisition system for high-precision multi-protocol signal processing according to claim 8, characterized in that: The first DC-DC step-down circuit includes: Pin 1 of chip U4 is connected to one end of capacitor C37, its pin 8 is simultaneously connected to the other end of capacitor C37, grounding diode D11 and one end of inductor L5, its pin 2 is simultaneously connected to grounding capacitor C45, grounding capacitor C40 and DC_BATT_IN interface, its pin 4 is connected to grounding capacitor C46, its pin 5 is connected to CAP_5V5_FB port, its pin 6 is simultaneously connected to one end of resistor R31 and grounding capacitor C38, its pin 7 and pin 9 are grounded, the other end of resistor R31 is connected to grounding capacitor C39, and the other end of inductor L5 is simultaneously connected to grounding capacitor C41, grounding capacitor C47, grounding capacitor C48, grounding capacitor C49, the anode of diode D10 and TS_5V 5 interface, the cathode of diode D10 is simultaneously connected to the PS_5V interface, one end of resistor R32, one end of capacitor C42, and the collector of transistor Q8. The other end of resistor R32, the other end of capacitor C42, and the emitter of transistor Q8 are simultaneously connected to the PWR_EN port. The base of transistor Q8 is simultaneously connected to grounded capacitor C43, grounded capacitor C44, one end of resistor R1, one end of capacitor C2, the collector of transistor Q7, and the VDD_5V interface. The other end of resistor R1, the other end of capacitor C2, and the emitter of transistor Q7 are simultaneously connected to the SEN_PWR_EN port. The TS_5V5 interface is connected to one end of resistor R28. The other end of resistor R28 is simultaneously connected to the CAP_5V5_FB port and grounded resistor R34. The second DC-DC step-down circuit includes: Pin 1 of chip U6 is connected to PS_3V3_FB port, its pin 6 is connected to one end of inductor L7, its pin 2 is simultaneously connected to the other end of inductor L7, grounding capacitor C58, grounding capacitor C59, the collector of transistor Q9 and TS_3V3 interface, the emitter of transistor Q9 is connected to PWR_EN port, its base is simultaneously connected to the collector of transistor Q3, grounding capacitor C55 and VDD_3V3 interface, and the emitter of transistor Q3 is connected to SEN_PWR_EN. N port, its base is connected to the ground capacitor C1 and the SEN_VDD_3V3 interface at the same time, pin 7 of chip U6 is grounded, its pin 3 is connected to one end of resistor R38, its pin 4 is connected to one end of resistor R41, its pin 5 is connected to the other end of resistor R38, the other end of resistor R41, ground capacitor C56, ground capacitor C57 and PS_5V interface at the same time, TS_3V3 interface is connected to one end of ground resistor R39, and the other end of resistor R39 and ground resistor R43 are connected to PS_3V3_FB port at the same time; The third DC-DC step-down circuit includes: pin 1 of chip U5 is connected to the TS_4G_FB port, its pin 6 is connected to one end of the inductor L6, its pin 2 is connected to the other end of the inductor L6, the grounding capacitor C52, the grounding inductor C3 and the VDD_4G interface, its pin 3 is simultaneously connected to the VDD_4G_PG port and one end of the resistor R33, its pin 5 is simultaneously connected to the other end of the resistor R33, the grounding capacitor C50, the grounding capacitor C51 and the VDD_5V interface, its pin 4 is simultaneously connected to the VDD_4G_ONOFF port and one end of the resistor R35, the other end of the resistor R35 is connected to the VDD_5V interface, the VDD_4G interface is connected to one end of the resistor R29, and the other end of the resistor R29 and the grounding resistor R36 are simultaneously connected to the TS_4G_FB port; The 4G power control unit includes: a VDD_4G_ONOFF port connected to the collector of the transistor Q10, the emitter of the transistor Q10 is grounded, the base of the transistor Q10 is connected to the ground resistor R42 and one end of the resistor R40, and the other end of the resistor R40 is connected to the VDD_MOBILE_EN port; The real-time clock power supply switching unit includes: pin 1 of the dual Schottky diode D6 is connected to the TS_3V3 interface, its pin 2 is connected to pin 1 of the socket J1, its common pin is connected to the VDD_COIN_3V interface, and pin 2 of the socket J1 is grounded; The power management switch circuit includes: the base of the transistor Q5 is connected to one end of the ground resistor R22 and one end of the resistor R16 at the same time, the other end of the resistor R16 is connected to the PMIC_ON_PEQ port, the emitter of the transistor Q5 is grounded, and its collector is connected to the PWR_EN port; The switching circuit for external sensor power control includes: the base of transistor Q2 is connected to one end of grounding resistor R19 and one end of resistor R18 at the same time, the other end of resistor R18 is connected to CPU_SEN_PWR_EN port, the emitter of transistor Q5 is grounded, and its collector is connected to SEN_PWR_EN port.

10. A data processing method for a data acquisition system for high-precision multi-protocol signal processing based on any one of claims 1 to 8, characterized in that: include: Receiving various signal data sent by external sensors, analyzing and processing the various signal data to obtain processed various signal data; Converting the processed signal data into digital signals, and performing differential amplification processing on the digital signals through a programmable gain amplifier to enhance the signal strength, thereby obtaining amplified digital signals; The amplified digital signal is converted into voltage or current.

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