Method, system and equipment for simulating E2PROM (electrically erasable programmable read-only memory) by Flash, medium and program product
By managing the state machine in the preset storage area of the Flash memory, the problem of insufficient E2PROM capacity is solved, and the rewritten function of Flash simulates E2PROM is realized, saving costs and properly keeping data.
Patent Information
- Application Number
- CN202510716611.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-08-19
AI Technical Summary
In the prior art, the E2PROM capacity is relatively low. Increasing the number of E2PROMs will increase the cost, making it difficult to efficiently simulate the E2PROM erase function in Flash memory.
By erasing data when the remaining space in the preset storage area of the Flash memory is insufficient and then writing data, and writing data directly when the remaining space is sufficient, the state machine manages the memory state, and the erase function of Flash simulates E2PROM is realized.
There is no need to increase the number of E2PROMs, and the erase function of efficiently simulates E2PROMs in Flash memory is realized, saving costs while properly custodializing important data.
Smart Images
Figure CN120508258A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of data storage, and in particular to a method, system, device, medium and program product for emulating E2PROM using Flash. Background Art
[0002] Since the software needs to quickly record log information and important parameters during operation, these data are generally stored in Flash or E2PROM (Electrically Erasable Programmable Read-Only Memory) in the existing technology. Since these data need to be properly preserved, although Flash and E2PROM in the existing technology are both non-volatile memories, they have significant differences in design and application. Flash memory requires erasing the entire storage area before each data is written, and although E2PROM can erase or write single byte data, its capacity is low. Increasing the number of E2PROMs will increase costs. Summary of the Invention
[0003] The technical problem to be solved by the present disclosure is to overcome the defect of low capacity of E2PROM in the prior art and provide a method, system, device, medium and program product for simulating E2PROM with Flash.
[0004] The present disclosure solves the above technical problems through the following technical solutions:
[0005] The present disclosure provides a method for emulating E2PROM using Flash memory, wherein the Flash memory includes a preset storage area for emulating E2PROM, including:
[0006] If the data to be stored is larger than the remaining space of the preset storage area, the data in the preset storage area is erased and then the data to be stored is written into the preset storage area;
[0007] If the data to be stored is not larger than the remaining space of the preset storage area, the data to be stored is directly written into the preset storage area.
[0008] Optionally, the method further comprises:
[0009] Initialize the preset storage area, where the starting address of the preset storage area is the lowest logical position in the clear state.
[0010] Optionally, the step of writing the data to be stored into the preset storage area includes:
[0011] The data to be stored is written into the preset storage area block by block according to the preset block size.
[0012] Optionally, the step of erasing the data in the preset storage area includes:
[0013] The data in the preset storage area is erased in sequence according to sectors starting from the starting address of the preset storage area.
[0014] Optionally, the Flash memory includes a state machine, and the state of the state machine includes at least one of the following: a default state, an erase state, an erase completion state, a write state, and a write completion state.
[0015] Optionally, the default state is used to indicate that the CPU currently has a memory in an idle state and data writing can be performed;
[0016] The erase state is used to indicate that the CPU is currently erasing the data in the preset storage area and cannot write data immediately;
[0017] The erase completion state is used to indicate to the CPU that the current memory has cleared the data in the preset storage area and data can be written;
[0018] The write state is used to indicate that the CPU memory is currently writing data into the preset storage area;
[0019] The write completion status is used to indicate that the CPU current memory has written the data to be stored into the preset storage area.
[0020] Optionally, the state machine is used to indicate the state of the Flash memory to the CPU.
[0021] The present disclosure further provides a memory, comprising a state machine, wherein a state of the state machine comprises at least one of the following: a default state, an erase state, an erase complete state, a write state, and a write complete state.
[0022] The present disclosure also provides a system for emulating E2PROM using Flash memory, wherein the Flash memory includes a preset storage area for emulating E2PROM, including:
[0023] A first execution module is configured to, when the data to be stored is larger than the remaining space of the preset storage area, erase the data in the preset storage area and then write the data to be stored into the preset storage area;
[0024] The second execution module is configured to directly write the data to be stored into the preset storage area if the data to be stored is not larger than the remaining space of the preset storage area.
[0025] Optionally, the first execution module and the second execution module are further configured to write the data to be stored into the preset storage area block by block according to a preset block size.
[0026] Optionally, the system for emulating E2PROM using Flash further includes:
[0027] The initialization module is used to initialize the preset storage area, and the starting address of the preset storage area is the lowest logical position in the clear state.
[0028] Optionally, the first execution module and the second execution module are further configured to: sequentially erase the data in the preset storage area by sectors starting from a starting address of the preset storage area.
[0029] Optionally, the Flash memory includes a state machine, and the state of the state machine includes at least one of the following: a default state, an erase state, an erase completion state, a write state, and a write completion state.
[0030] Optionally, the default state is used to indicate that the CPU currently has a memory in an idle state and data writing can be performed;
[0031] The erase state is used to indicate that the CPU is currently erasing the data in the preset storage area and cannot write data immediately;
[0032] The erase completion state is used to indicate to the CPU that the current memory has cleared the data in the preset storage area and data can be written;
[0033] The write state is used to indicate that the CPU memory is currently writing data into the preset storage area;
[0034] The write completion status is used to indicate that the CPU current memory has written the data to be stored into the preset storage area.
[0035] Optionally, the state machine is used to indicate the state of the Flash memory to the CPU.
[0036] The present disclosure further provides a memory, comprising a state machine, wherein a state of the state machine comprises at least one of the following: a default state, an erase state, an erase complete state, a write state, and a write complete state.
[0037] The present disclosure also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and used to run on the processor, wherein the processor implements the aforementioned method of emulating E2PROM with Flash when executing the computer program.
[0038] The present disclosure also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method of emulating E2PROM using Flash is implemented.
[0039] The present disclosure also provides a computer program product, including a computer program, which implements the aforementioned method of emulating E2PROM using Flash when executed by a processor.
[0040] On the basis of conforming to the common sense in this field, the above-mentioned preferred conditions can be arbitrarily combined to obtain the preferred embodiments of the present disclosure.
[0041] The positive progress of the present disclosure is that by erasing the data in the preset storage area when the remaining space in the preset storage area is insufficient and then writing the data to be stored, and directly writing the data to be stored when the remaining space in the preset storage area is sufficient, it is possible to achieve the effect of simulating the erasing and writing functions of the E2PROM through the Flash controller, thereby eliminating the need to increase the number of E2PROMs for data storage, and saving costs while recording and properly storing important data. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] Figure 1 A flowchart of a method for emulating E2PROM using Flash provided by an exemplary embodiment of the present disclosure;
[0043] Figure 2 A schematic diagram of a module of a system for emulating E2PROM using Flash provided by an exemplary embodiment of the present disclosure;
[0044] Figure 3 The present invention provides a structural diagram of an electronic device according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION
[0045] The present disclosure is further illustrated below by way of examples, but the present disclosure is not limited to the scope of the examples.
[0046] Prefixes such as "first" and "second" are used in the embodiments of the present disclosure only to distinguish different descriptive objects and do not limit the position, order, priority, quantity, or content of the described objects. The use of prefixes such as ordinal numbers to distinguish descriptive objects in the embodiments of the present disclosure does not limit the described objects. For a description of the described objects, please refer to the contextual description in the claims or embodiments, and the use of such prefixes should not constitute unnecessary restrictions.
[0047] Example 1
[0048] Figure 1 A flowchart of a method for emulating E2PROM using Flash memory is provided as an exemplary embodiment of the present disclosure. The Flash memory includes a preset storage area for emulating E2PROM. The method includes the following steps:
[0049] S1. Determine whether the data to be stored is larger than the remaining space in the preset storage area. If yes, proceed to step S21; if not, proceed to step S22.
[0050] S21 , after erasing the data in the preset storage area, writing the data to be stored into the preset storage area.
[0051] S22. Directly write the data to be stored into the preset storage area.
[0052] In an optional embodiment, the flash memory includes a state machine. The state machine can be a piece of program code in firmware written to the memory, which is used to generate corresponding state variables. The state machine states include at least one of the following: a default state (indicated by the code E2PROM_IDEL), an erase state (indicated by the code E2PROM_ERASE), an erase complete state (indicated by the code E2PROM_ERASE_DONE), a write state (indicated by the code E2PROM_PROGRAM), and a write complete state (indicated by the code E2PROM_PROGRAM_DONE). The flash memory can update the state of the state machine based on real-time state changes.
[0053] In an optional embodiment, when performing a write operation, the data to be stored is written into the preset storage area block by block according to a preset block size. The block size of each write can be set, for example, to a multiple of 8 bytes.
[0054] In an optional embodiment, when performing the erase operation, data in the preset storage area is erased in order of sectors starting from the starting address of the preset storage area, one sector at a time, and the erase operation ends when the entire preset storage area is completely erased.
[0055] In an optional embodiment, the method further comprises:
[0056] Initialize the preset storage area. The starting address of the preset storage area is the lowest logical position in the clear state. After configuring the parameters of the preset storage area, you need to initialize the preset storage area to find the starting address of the free block. If the entire preset storage area is full, clear the preset storage area first and locate the starting address at the lowest logical position.
[0057] In an optional embodiment, in the default state, the user can input an erase instruction to instruct the Flash memory to erase the preset storage area. This method can query whether the preset storage area is empty in response to the erase instruction. If it is not empty, the erase operation is performed. If it is empty, the execution is exited.
[0058] In an optional embodiment, the default state is used to indicate that the Flash memory is in an idle state and data writing can be performed; the erase state is used to indicate that the Flash memory is erasing data in the preset storage area and data cannot be written immediately; the erase completion state is used to indicate that the Flash memory has cleared the data in the preset storage area and data can be written; the write state is used to indicate that the Flash memory is writing data to the preset storage area; and the write completion state is used to indicate that the Flash memory has written the data to be stored into the preset storage area.
[0059] In an optional embodiment, the state machine is used to indicate the status of the Flash memory to the CPU.
[0060] In existing technologies, when writing data to memory, the CPU (central processing unit) is in a wait state, wasting resources. However, for high-efficiency algorithms such as those for motor control, such as MSPM (Microcontroller Signal Processing Module) and EPWM (Enhanced Pulse Width Modulation), CPU utilization can be significantly reduced. By generating the corresponding status, when the CPU needs to write data to memory, it no longer needs to wait for the data to be fully written before returning. Instead, it can query the status of the Flash memory execution to determine whether the data to be stored has been written.
[0061] In an optional embodiment, the step S1 further comprises:
[0062] S11. Determine whether the data to be stored is consistent with the data already stored in the preset storage area. If so, proceed to step S21 or S22; if not, exit the execution step. This prevents duplicate data storage. This step primarily determines whether the data at the current address is consistent with the data to be stored.
[0063] In an optional embodiment, the CPU's corresponding operation steps may include: querying the status generated by the Flash memory; calling a corresponding interface function and sending the first data to be stored to the Flash memory, the interface function being used to instruct the Flash to store the data in a preset storage area; and executing the main program. Alternatively, the CPU may periodically query the state of the state machine during intervals during the execution of the main program and perform corresponding operations based on the corresponding state.
[0064] If the CPU needs to store data during the execution of the main program, it can query the status of a specific storage address in the Flash memory at any time, and decide whether to store the data based on the status type corresponding to the status. If the current status is in the erase or write state, the data to be stored can be temporarily not sent, and the execution of the current main program can be returned to improve computing efficiency. The status can be queried at irregular intervals during the execution of the main program. When the status is in the erase completion state, write completion state or default state, the data to be stored is sent. After the CPU transfers the data to be stored to the internal cache (SRAM), there is no need to wait for the data to be completely written to the Flash memory, and the CPU can directly return to execute the main program. The registers in the CPU will write the data to be stored stored in the cache to the preset storage area of the Flash memory.
[0065] The execution status of the Flash memory is obtained by querying the status. When the CPU needs to write data in the memory, there is no need to wait for the data to be completely written before returning. The status can be queried at irregular intervals during the execution of the main program to determine whether the data has been written. Alternatively, the status can be queried to determine whether the current state is suitable for storing data. If it is not suitable for writing data, the main program will continue to execute, thereby reducing the CPU idle time and improving computing efficiency.
[0066] The embodiment of the present disclosure can achieve the effect of simulating the erasing and writing functions of E2PROM through the Flash controller by erasing the data in the preset storage area when the remaining space in the preset storage area is insufficient and then writing the data to be stored, and directly writing the data to be stored when the remaining space in the preset storage area is sufficient. Therefore, there is no need to increase the number of E2PROMs for data storage, and important data can be recorded and properly stored while saving costs.
[0067] Example 2
[0068] An exemplary embodiment of the present disclosure provides a memory, which includes a state machine, wherein the state of the state machine includes at least one of the following: a default state (which can be represented by code E2PROM_IDEL), an erase state (which can be represented by code E2PROM_ERASE), an erase completion state (which can be represented by code E2PROM_ERASE_DONE), a write state (which can be represented by code E2PROM_PROGRAM), and a write completion state (which can be represented by code E2PROM_PROGRAM_DONE).
[0069] The state machine may be a piece of program code in a firmware written into a memory, for generating corresponding state variables. The types of the memory may include Flash, E2PROM, and the like.
[0070] In an optional embodiment, the default state is used to indicate that the memory is in an idle state and data writing can be performed; the erase state is used to indicate that the memory is erasing the data in the preset storage area and data cannot be written immediately; the erase completion state is used to indicate that the memory has cleared the data in the preset storage area and data can be written; the write state is used to indicate that the memory is writing data to the preset storage area; the write completion state is used to indicate that the memory has written the data to be stored to the preset storage area.
[0071] In an optional embodiment, the state machine is used to indicate the status of the Flash memory to the CPU.
[0072] The disclosed embodiments improve CPU utilization by implementing a state machine in the memory. In existing technologies, when writing data to the memory, the CPU (central processing unit) is in a wait state, wasting resources. This significantly reduces CPU utilization for high-efficiency algorithms such as those for motors, such as MSPM (microcontroller signal processing module) and EPWM (enhanced pulse width modulation). By generating the corresponding state, when the CPU needs to write data to the memory, it no longer needs to wait for the data to be fully written before returning. Instead, it can query the state to obtain the execution status of the Flash memory and determine whether the data to be stored has been written, thereby improving utilization.
[0073] Example 3
[0074] Based on the aforementioned method embodiment of emulating E2PROM using Flash, the present disclosure also provides an embodiment of a system for emulating E2PROM using Flash.
[0075] Figure 3 A schematic diagram of a Flash control system according to an exemplary embodiment of the present disclosure is provided. The system includes:
[0076] The judgment module 1 is used to judge whether the data to be stored is larger than the remaining space of the preset storage area. If so, the first execution module is called; if not, the second execution module is called.
[0077] The first execution module 21 is configured to, when the data to be stored is larger than the remaining space of the preset storage area, erase the data in the preset storage area and then write the data to be stored into the preset storage area.
[0078] The second execution module 22 is configured to directly write the data to be stored into the preset storage area if the data to be stored is not larger than the remaining space of the preset storage area.
[0079] In an optional embodiment, the flash memory includes a state machine. The state machine can be a piece of program code in firmware written to the memory, which is used to generate corresponding state variables. The state machine states include at least one of the following: a default state (indicated by the code E2PROM_IDEL), an erase state (indicated by the code E2PROM_ERASE), an erase complete state (indicated by the code E2PROM_ERASE_DONE), a write state (indicated by the code E2PROM_PROGRAM), and a write complete state (indicated by the code E2PROM_PROGRAM_DONE). The flash memory can update the state of the state machine based on real-time state changes.
[0080] In an optional embodiment, the first execution module and the second execution module are further configured to, when performing a write operation, write the data to be stored into the preset storage area block by block according to a preset block size. The block size of each write operation can be set, for example, to a multiple of 8 bytes.
[0081] In an optional embodiment, the first execution module and the second execution module are further configured to, when performing an erase operation, sequentially erase data in the preset storage area, sector by sector, starting from a starting address of the preset storage area, erasing one sector at a time and ending the erase operation when the entire preset storage area is completely erased.
[0082] In an optional embodiment, the system further comprises:
[0083] The initialization module is used to initialize the preset storage area. The starting address of the preset storage area is the lowest logical position in the clear state. After configuring the parameters of the preset storage area, the preset storage area needs to be initialized to find the starting address of the free block. If the entire preset storage area is full, the preset storage area is cleared first and the starting address is positioned at the lowest logical position.
[0084] In an optional embodiment, in the default state, the user can input an erase instruction to instruct the Flash memory to erase the preset storage area. This method can query whether the preset storage area is empty in response to the erase instruction. If it is not empty, the erase operation is performed. If it is empty, the execution is exited.
[0085] In an optional embodiment, the default state is used to indicate that the Flash memory is in an idle state and data writing can be performed; the erase state is used to indicate that the Flash memory is erasing data in the preset storage area and data cannot be written immediately; the erase completion state is used to indicate that the Flash memory has cleared the data in the preset storage area and data can be written; the write state is used to indicate that the Flash memory is writing data to the preset storage area; and the write completion state is used to indicate that the Flash memory has written the data to be stored into the preset storage area.
[0086] In an optional embodiment, the state machine is used to indicate the status of the Flash memory to the CPU.
[0087] In existing technologies, when writing data to memory, the CPU (central processing unit) is in a wait state, wasting resources. However, for high-efficiency algorithms such as those for motor control, such as MSPM (Microcontroller Signal Processing Module) and EPWM (Enhanced Pulse Width Modulation), CPU utilization can be significantly reduced. By generating the corresponding status, when the CPU needs to write data to memory, it no longer needs to wait for the data to be fully written before returning. Instead, it can query the status of the Flash memory execution to determine whether the data to be stored has been written.
[0088] In an optional embodiment, the judgment module is further configured to:
[0089] Determines whether the data to be stored is consistent with the data already stored in the preset storage area. If so, invokes the first or second execution module; if not, exits execution. This prevents duplicate data storage. This function primarily determines whether the data at the current address is consistent with the data to be stored.
[0090] In an optional embodiment, the CPU's corresponding operations may include: querying the status generated by the Flash memory; calling a corresponding interface function and sending the first data to be stored to the Flash memory, the interface function being used to instruct the Flash to store the data in a preset storage area; and executing the main program. Alternatively, the CPU may periodically query the state of the state machine during the intervals between executions of the main program and perform corresponding operations based on the corresponding state.
[0091] If the CPU needs to store data during the execution of the main program, it can query the status of a specific storage address in the Flash memory at any time, and decide whether to store the data based on the status type corresponding to the status. If the current status is in the erase or write state, the data to be stored can be temporarily not sent, and the execution of the current main program can be returned to improve computing efficiency. The status can be queried at irregular intervals during the execution of the main program. When the status is in the erase completion state, write completion state or default state, the data to be stored is sent. After the CPU transfers the data to be stored to the internal cache (SRAM), there is no need to wait for the data to be completely written to the Flash memory, and the CPU can directly return to execute the main program. The registers in the CPU will write the data to be stored stored in the cache to the preset storage area of the Flash memory.
[0092] The execution status of the Flash memory is obtained by querying the status. When the CPU needs to write data in the memory, there is no need to wait for the data to be completely written before returning. The status can be queried at irregular intervals during the execution of the main program to determine whether the data has been written. Alternatively, the status can be queried to determine whether the current state is suitable for storing data. If it is not suitable for writing data, the main program will continue to execute, thereby reducing the CPU idle time and improving computing efficiency.
[0093] The embodiment of the present disclosure can achieve the effect of simulating the erasing and writing functions of E2PROM through the Flash controller by erasing the data in the preset storage area when the remaining space in the preset storage area is insufficient and then writing the data to be stored, and directly writing the data to be stored when the remaining space in the preset storage area is sufficient. Therefore, there is no need to increase the number of E2PROMs for data storage, and important data can be recorded and properly stored while saving costs.
[0094] Since the system embodiments generally correspond to the method embodiments, reference will be made to the description of the method embodiments for relevant details. The system embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separate, and the components of the units may or may not be physical units, i.e., they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the disclosed solution.
[0095] Example 4
[0096] Figure 3 This is a structural diagram of an electronic device shown in an example embodiment of the present disclosure. The electronic device includes a memory, a processor, and a computer program stored in the memory and used to run on the processor. When the processor executes the computer program, it implements the method of emulating E2PROM with Flash as described in any of the above embodiments. Figure 3The electronic device 90 shown is only an example and should not limit the functionality and scope of use of the embodiments of the present disclosure.
[0097] like Figure 3 As shown, the electronic device 90 may be a general-purpose computing device, such as a server device. Components of the electronic device 90 may include, but are not limited to, the at least one processor 91, the at least one memory 92, and a bus 93 connecting different system components (including the memory 92 and the processor 91).
[0098] The bus 93 includes a data bus, an address bus, and a control bus.
[0099] The memory 92 may include a volatile memory, such as a random access memory (RAM) 921 and / or a cache memory 922 , and may further include a read-only memory (ROM) 923 .
[0100] The memory 92 may also include a program tool 925 (or utility) having a set (at least one) of program modules 924, such program modules 924 including but not limited to: an operating system, one or more application programs, other program modules and program data, each of which or some combination may include an implementation of a network environment.
[0101] The processor 91 executes various functional applications and data processing by running the computer program stored in the memory 92, such as the method of emulating E2PROM with Flash provided in any of the above embodiments.
[0102] The electronic device 90 can also communicate with one or more external devices 94 (e.g., keyboards, pointing devices, etc.). Such communication can be performed through an input / output (I / O) interface 95. In addition, the electronic device 90 can also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter 96. Figure 3 As shown, the network adapter 96 communicates with other modules of the electronic device 90 via the bus 93. Figure 3 Not shown, other hardware and / or software modules may be used in conjunction with the electronic device 90, including but not limited to microcode, device drivers, redundant processors, external disk drive arrays, RAID (disk array) systems, tape drives, and data backup storage systems.
[0103] It should be noted that although several units / modules or sub-units / modules of the electronic device are mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more units / modules described above can be embodied in one unit / module. Conversely, the features and functions of one unit / module described above can be further divided and embodied by multiple units / modules.
[0104] Example 5
[0105] An embodiment of the present disclosure further provides a computer-readable storage medium having a computer program stored thereon. When the program is executed by a processor, the method of emulating E2PROM using Flash provided in any of the above embodiments is implemented.
[0106] The readable storage medium may include, but is not limited to, a portable disk, a hard disk, a random access memory, a read-only memory, an erasable programmable read-only memory, an optical storage device, a magnetic storage device, or any suitable combination thereof.
[0107] Example 6
[0108] The embodiments of the present disclosure further provide a computer program product, including a computer program, which, when executed by a processor, implements any of the above methods of emulating E2PROM using Flash.
[0109] The program code for executing the computer program product of the present disclosure may be written in any combination of one or more programming languages, and the program code may be executed entirely on the user device, partially on the user device, as a standalone software package, partially on the user device and partially on a remote device, or entirely on the remote device.
[0110] While specific embodiments of the present disclosure have been described above, those skilled in the art will appreciate that these are merely illustrative and that the scope of protection of the present disclosure is defined by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principles and essence of the present disclosure, and such changes and modifications are intended to fall within the scope of protection of the present disclosure.
Claims
1. A method for simulating E2PROM using Flash memory, wherein the Flash memory includes a preset storage area for simulating E2PROM, characterized in that: include: If the data to be stored is larger than the remaining space of the preset storage area, the data in the preset storage area is erased and then the data to be stored is written into the preset storage area; If the data to be stored is not larger than the remaining space of the preset storage area, the data to be stored is directly written into the preset storage area.
2. The method according to claim 1, wherein The method further comprises: Initializing the preset storage area, wherein the starting address of the preset storage area is the lowest logical position in an empty state; The step of writing the data to be stored into the preset storage area includes: Writing the data to be stored into the preset storage area block by block according to the preset block size; The step of erasing the data in the preset storage area includes: The data in the preset storage area is erased in sequence according to sectors starting from the starting address of the preset storage area.
3. The method according to claim 1, wherein The Flash memory includes a state machine, and the state of the state machine includes at least one of the following: a default state, an erase state, an erase complete state, a write state, and a write complete state.
4. The method according to claim 3, wherein The default state is used to indicate that the Flash memory is in an idle state and data writing can be performed; the erase state is used to indicate that the Flash memory is erasing data in the preset storage area and data cannot be written immediately; The erase complete state is used to indicate that the Flash memory has cleared the data in the preset storage area and can write data; The write state is used to indicate that the Flash memory is writing data into the preset storage area; The write completion status is used to indicate that the Flash memory has written the data to be stored into the preset storage area.
5. The method according to claim 4, wherein The state machine is used to indicate the state of the Flash memory to the CPU.
6. A memory, characterized in that: The memory includes a state machine, and a state of the state machine includes at least one of the following: a default state, an erase state, an erase complete state, a write state, and a write complete state.
7. A system for emulating E2PROM using Flash memory, wherein the Flash memory includes a preset storage area for emulating E2PROM, characterized in that: include: A first execution module is configured to, when the data to be stored is larger than the remaining space of the preset storage area, erase the data in the preset storage area and then write the data to be stored into the preset storage area; The second execution module is configured to directly write the data to be stored into the preset storage area if the data to be stored is not larger than the remaining space of the preset storage area.
8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and configured to run on the processor, wherein: When the processor executes the computer program, the method of emulating E2PROM using Flash as described in any one of claims 1 to 5 is implemented.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for emulating E2PROM using Flash as claimed in any one of claims 1 to 5 is implemented.
10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method for emulating E2PROM using Flash as claimed in any one of claims 1 to 5 is implemented.