Integrated circuit device and manufacturing method thereof

Abstract

An integrated circuit device includes a lower metal wiring layer, an upper insulating film and an upper metal wiring layer on the lower metal wiring layer, and a conductive contact plug passing through the upper insulating film in a vertical direction to contact the lower metal wiring layer and the upper metal wiring layer, and the conductive contact plug has a quadrilateral planar shape. Each of the first contact sidewalls of the conductive contact plug in the first lateral direction extends from a corresponding one of the upper line sidewalls of the upper metal wiring layer in the vertical direction to the lower metal wiring layer. And at least one of a pair of second contact sidewalls of the conductive contact plug in the second lateral direction extends from the bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined with respect to the vertical direction.

Description

Technical Field

[0001] The inventive concept relates to integrated circuit (IC) devices, and more particularly, to IC devices including metal wiring layers and methods of manufacturing the IC devices. Background Art

[0002] Due to the development of electronic technology, the shrinkage of IC devices has been rapidly progressing. As a result, the metal wiring layers included in IC devices have been reduced in line width and pitch. Therefore, there is a need to improve the electrical reliability of metal wiring structures. Summary of the Invention

[0003] Some example embodiments of the inventive concepts provide an integrated circuit (IC) device having a structure capable of improving electrical reliability of metal wiring structures by improving contact resistance of metal wiring structures connected to each other while reducing the possibility of short circuits between adjacent metal wiring structures.

[0004] Some example embodiments of the inventive concepts provide methods of manufacturing IC devices that may improve electrical reliability of metal wiring structures by improving contact resistance of metal wiring structures connected to each other while reducing the possibility of short circuits between adjacent metal wiring structures.

[0005] According to an example embodiment of the inventive concept, an IC device includes: a lower insulating film on a substrate; a lower metal wiring layer, which passes through the lower insulating film and extends longitudinally in a first lateral direction; an upper insulating film, which is on the lower insulating film and the lower metal wiring layer; the upper metal wiring layer, which extends longitudinally in a second lateral direction on the upper insulating film, wherein the second lateral direction is perpendicular to the first lateral direction; and a conductive contact plug, which passes through the upper insulating film in a vertical direction, the conductive contact plug contacts each of the lower metal wiring layer and the upper metal wiring layer, wherein the conductive contact plug has a quadrilateral shape when viewed from above, the conductive contact plug includes a pair of first contact sidewalls opposite to each other in the first lateral direction and a pair of second contact sidewalls opposite to each other in the second lateral direction, each of the pair of first contact sidewalls extending in the vertical direction from an upper line sidewall of the upper metal wiring layer to the lower metal wiring layer, and at least one of the pair of second contact sidewalls extending from a bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined relative to the vertical direction.

[0006] According to an example embodiment of the inventive concept, an IC device includes: a lower insulating film on a substrate; a first lower metal wiring layer and a second lower metal wiring layer, each of which passes through the lower insulating film and extends longitudinally in a first lateral direction, the first lower metal wiring layer and the second lower metal wiring layer being separated from each other in a second lateral direction, the second lateral direction being perpendicular to the first lateral direction; an upper insulating film on each of the lower insulating film, the first lower metal wiring layer and the second lower metal wiring layer; a first upper metal wiring layer and a second upper metal wiring layer on the upper insulating film, the first upper metal wiring layer and the second upper metal wiring layer overlapping with the first lower metal wiring layer and the second lower metal wiring layer in a vertical direction and extending longitudinally in the second lateral direction, and the first upper metal wiring layer and the second upper metal wiring layer being separated from each other in the first lateral direction; a first conductive contact plug passing through the upper insulating film in the vertical direction, the first conductive contact plug contacting each of the first lower metal wiring layer and the first upper metal wiring layer; and a second conductive contact plug passing through the upper insulating film in the vertical direction, the second conductive contact plug contacting the second lower metal wiring layer. each of the first and second upper metal wiring layers, wherein each of the first conductive contact plug and the second conductive contact plug has a quadrilateral shape when viewed from above, each of the first and second conductive contact plugs including a pair of first contact sidewalls and a pair of second contact sidewalls, the pair of first contact sidewalls opposing each other in a first lateral direction, the pair of second contact sidewalls opposing each other in a second lateral direction, in each of the first and second conductive contact plugs, each of the pair of first contact sidewalls extending in a vertical direction from a corresponding one of the pair of upper wire sidewalls of a corresponding one of the first and second upper metal wiring layers extending in the second lateral direction to a corresponding one of the first and second lower metal wiring layers, and in each of the first and second conductive contact plugs, at least one of the pair of second contact sidewalls extending in a direction inclined with respect to the vertical direction from a bottom surface of a corresponding one of the first and second upper metal wiring layers toward a corresponding one of the first and second lower metal wiring layers.

[0007] According to an example embodiment of the inventive concept, an IC device includes: a lower structure on a substrate; a lower insulating film on the lower structure; a lower metal wiring layer that passes through the lower insulating film and extends longitudinally in a first lateral direction; an upper insulating film on the lower insulating film and the lower metal wiring layer, the upper insulating film defining a line space and a via space connected to the line space, the via space extending from the line space to the lower metal wiring layer in a vertical direction; an upper metal wiring layer filling the line space, the upper metal wiring layer extending longitudinally in a second lateral direction, the second lateral direction being perpendicular to the first lateral direction; and a conductive contact plug that fills the via space and contacts each of the lower metal wiring layer and the upper metal wiring layer, wherein the upper metal wiring layer includes a conductive plug extending in the vertical direction from a top surface of the upper insulating film. A portion extending to the top surface of the conductive contact plug, the conductive contact plug having a quadrilateral shape when viewed from above, the conductive contact plug including a pair of first contact side walls and a pair of second contact side walls, the pair of first contact side walls being opposite to each other in a first lateral direction and facing the upper insulating film, the pair of second contact side walls being opposite to each other in a second lateral direction and facing the upper insulating film, each of the pair of first contact side walls extending in a vertical direction from a corresponding upper line side wall adjacent thereto among a pair of upper line side walls included in the upper metal wiring layer to the lower metal wiring layer, the pair of upper line side walls being opposite to each other in the first lateral direction, and at least one of the pair of second contact side walls extending from the bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined relative to the vertical direction.

[0008] According to an exemplary embodiment of the inventive concept, a method for manufacturing an IC includes forming a lower insulating film and a lower metal wiring layer on a substrate, the lower metal wiring layer passing through the lower insulating film and extending longitudinally on the substrate in a first lateral direction. An upper metal wiring structure is formed on the lower insulating film and the lower metal wiring layer. The upper metal wiring structure includes an upper metal wiring layer and a conductive contact plug, the upper metal wiring layer extending longitudinally on the lower insulating film and the lower metal wiring layer in a second lateral direction, the conductive contact plug being integrally connected to the upper metal wiring layer and contacting the lower metal wiring layer, wherein the second lateral direction is perpendicular to the first lateral direction. The conductive contact plug has a quadrilateral shape when viewed from above, and includes a pair of first contact side walls and a pair of second contact side walls, the pair of first contact side walls being opposite to each other in a first lateral direction, and the pair of second contact side walls being opposite to each other in a second lateral direction, each of the pair of first contact side walls extending in a vertical direction from a corresponding one of a pair of upper line side walls of the upper metal wiring layer to the lower metal wiring layer, the pair of upper line side walls of the upper metal wiring layer being opposite to each other in the first lateral direction, and at least one of the pair of second contact side walls extending from the bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined relative to the vertical direction.

[0009] According to an exemplary embodiment of the inventive concept, a method for manufacturing an IC device includes forming a lower insulating film, a first lower metal wiring layer, and a second lower metal wiring layer on a substrate, the first lower metal wiring layer and the second lower metal wiring layer extending longitudinally in a first lateral direction on the substrate through the lower insulating film and spaced apart from each other in a second lateral direction perpendicular to the first lateral direction; forming an upper insulating film on the lower insulating film, the first lower metal wiring layer, and the second lower metal wiring layer; and forming a plurality of upper metal wiring structures in the upper insulating film and on the lower insulating film, the first lower metal wiring layer, and the second lower metal wiring layer. The plurality of upper metal wiring structures includes: a first upper metal wiring layer and a second upper metal wiring layer vertically overlapping the first lower metal wiring layer and the second lower metal wiring layer, the first upper metal wiring layer and the second upper metal wiring layer extending longitudinally in the second lateral direction and spaced apart from each other in the first lateral direction; a first conductive contact plug contacting each of the first lower metal wiring layer and the first upper metal wiring layer; and a second conductive contact plug contacting each of the second lower metal wiring layer and the second upper metal wiring layer. Each of the first and second conductive contact plugs has a quadrilateral shape when viewed from above, and each of the first and second conductive contact plugs includes a pair of first contact sidewalls and a pair of second contact sidewalls, the pair of first contact sidewalls opposing each other in a first lateral direction and facing the upper insulating film, and the pair of second contact sidewalls opposing each other in a second lateral direction and facing the upper insulating film. In each of the first and second conductive contact plugs, each of the pair of first contact sidewalls extends in a vertical direction, and at least one of the pair of second contact sidewalls extends in a direction inclined relative to the vertical direction.

[0010] According to an exemplary embodiment of the inventive concept, a method for manufacturing an IC device includes: forming a lower insulating film, a first lower metal wiring layer, and a second lower metal wiring layer on a substrate, the first lower metal wiring layer and the second lower metal wiring layer extending longitudinally in a first lateral direction on the substrate through the lower insulating film, the first lower metal wiring layer and the second lower metal wiring layer being separated from each other in a second lateral direction perpendicular to the first lateral direction; forming a plurality of upper metal wiring structures on the lower insulating film, the first lower metal wiring layer, and the second lower metal wiring layer. Forming the plurality of upper metal wiring structures includes forming an upper insulating film including a line space and a via space on the lower insulating film and the first and second lower metal wiring layers, the line space being separated vertically from the lower insulating film and each of the first and second lower metal wiring layers, the via space being connected to the line space and exposing the first and second lower metal wiring layers; and forming a conductive layer containing a metal to fill the via space and the line space. The formation of an upper insulating film including a line space and a via space includes: forming an upper insulating film having a planarized top surface on a lower insulating film and first and second lower metal wiring layers; forming a first hard mask pattern including a first opening on the upper insulating film having the planarized top surface, the first opening exposing the top surface of the upper insulating film; forming a planarized hard mask layer to cover the upper insulating film and the first hard mask pattern; forming an inorganic hard mask pattern having a second opening on the planarized hard mask layer, the second opening overlapping the first opening in a vertical direction; and forming a second hard mask pattern having an expanded second opening from the inorganic hard mask pattern having the second opening by selectively increasing only the first width of the second opening in the first lateral direction from among the first width and the second width of the second opening in the first and second lateral directions, and wherein forming the second hard mask pattern having the expanded second opening includes performing an ion beam etching process in the first lateral direction while changing the ion beam incident direction within a range between 50° and 90° relative to a straight line parallel to the main surface of the substrate, and performing an ion beam etching process in the second lateral direction while the ion beam is incident in a direction perpendicular to the main surface of the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1A is a floor plan view of an integrated circuit (IC) device according to an example embodiment;

[0013] Figure 1B It is along Figure 1A A cross-sectional view taken along line X1-X1';

[0014] Figure 1C It is along Figure 1A A cross-sectional view taken along line Y1-Y1';

[0015] Figure 2 yes Figure 1A 、 Figure 1B and Figure 1C A partial perspective view of some components of the IC device shown in;

[0016] Figure 3A is a floor plan view of an IC device according to an example embodiment;

[0017] Figure 3B It is along Figure 3A A cross-sectional view taken along line X1-X1';

[0018] Figure 3C It is along Figure 3A A cross-sectional view taken along line Y1-Y1';

[0019] Figure 4 yes Figure 3A 、 Figure 3B and Figure 3C A partial perspective view of some components of the IC device shown in;

[0020] Figure 5A is a floor plan view of an IC device according to an example embodiment;

[0021] Figure 5B It is along Figure 5A A cross-sectional view taken along lines Y1-Y1' and Y2-Y2';

[0022] Figure 6A and Figure 6B is a cross-sectional view of an IC device according to an example embodiment;

[0023] Figure 7 is a floor plan view of an IC device according to an example embodiment;

[0024] Figure 8 It is along Figure 7 A cross-sectional view taken along line X1-X1';

[0025] Figure 9 It is along Figure 7 A cross-sectional view taken along line Y1-Y1';

[0026] Figure 10 is a cross-sectional view of an IC device according to an example embodiment;

[0027] Figure 11A 、 Figure 12A 、 Figure 13A 、 Figure 14A 、 Figure 15A 、 Figure 16A 、 Figure 17A 、 Figure 18A 、 Figure 19A and Figure 20A is a plan view of a process sequence of a method of manufacturing an IC device according to an example embodiment, Figure 11B 、 Figure 12B 、 Figure 13B 、 Figure 14B 、 Figure 15B 、 Figure 16B 、 Figure 17B 、 Figure 18B 、 Figure 19B and Figure 20B Along the Figure 11A 、 Figure 12A 、 Figure 13A 、 Figure 14A 、 Figure 15A 、 Figure 16A 、 Figure 17A 、 Figure 18A 、 Figure 19A and Figure 20A A cross-sectional view taken along line X1-X1', Figure 15C 、 Figure 16C 、 Figure 17C 、 Figure 18C 、 Figure 19C and Figure 20C Along the Figure 15A 、 Figure 16A 、 Figure 17A 、 Figure 18A 、 Figure 19A and Figure 20A A cross-sectional view taken along line Y1-Y1';

[0028] Figure 21 is a plan view illustrating a method of manufacturing an IC device according to an example embodiment; and

[0029] Figure 22 is a plan view illustrating a method of manufacturing an IC device according to example embodiments. DETAILED DESCRIPTION

[0030] Hereinafter, some example embodiments will be described in detail with reference to the accompanying drawings. The same reference numerals are used to denote the same elements in the drawings, and repeated descriptions thereof will be omitted.

[0031] Terms such as "first" and "second" are used here only to describe various constituent elements, but the constituent elements are not limited by the terms. These terms are only used to distinguish one constituent element from another constituent element. For example, without departing from the correct scope of the various example embodiments described below, a first constituent element may be referred to as a second constituent element, and vice versa. When constituent elements are referred to as first constituent elements and second constituent elements, respectively, in the following detailed description and claims, they are not the same constituent elements. Although the terms "same", "equal" or "equivalent" are used in the description of the example embodiments, it should be understood that there may be some imprecision. Therefore, when one element is referred to as being the same as another element, it should be understood that the element or value is the same as the other element or value within the desired manufacturing or operating limit range (e.g., ±10%).

[0032] When the terms "about," "substantially," or "approximately" are used in conjunction with a numerical value in this specification, it is intended that the associated numerical value include manufacturing or operating tolerances (e.g., ±10%) around the stated numerical value. Furthermore, when the terms "about," "substantially," or "approximately" are used in conjunction with a geometric shape, it is intended that the precision of the geometric shape is not required, but rather that tolerances in the shape are within the scope of the present disclosure. Furthermore, regardless of whether a numerical value or shape is modified as "about" or "substantially," it will be understood that these values ​​and shapes should be interpreted as including manufacturing or operating tolerances (e.g., ±10%) around the stated numerical value or shape.

[0033] As used herein, expressions such as "at least one of," when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Thus, for example, "at least one of A, B, or C" and "at least one of A, B, and C" both mean A, B, C, or any combination thereof. Similarly, A and / or B means A, B, or A and B.

[0034] Figure 1A is a floor plan view of IC device 100 according to an example embodiment. Figure 1B It is along Figure 1A A cross-sectional view taken along line X1-X1'. Figure 1C It is along Figure 1A A cross-sectional view taken along line Y1-Y1'. Figure 2 is a partial perspective view of some components of IC device 100.

[0035] refer to Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2, the IC device 100 may include a lower structure on a substrate 110. The lower structure may include a first lower etch stopper film 112, a first interlayer insulating film 114, a second lower etch stopper film 122, and a second interlayer insulating film 124 sequentially located on a main surface 110M of the substrate 110 in a vertical direction (Z direction), and a conductive structure 120 passing through the first interlayer insulating film 114 and the first lower etch stopper film 112 in the vertical direction (Z direction).

[0036] Substrate 110 may include a semiconductor element (such as silicon (Si) or germanium (Ge)) or a compound semiconductor (such as silicon germanium (SiGe), silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), or indium phosphide (InP)). Substrate 110 may include a conductive region (not shown). The conductive region may include a doped well, a doped structure, or a conductive layer. Substrate 110 may include circuit elements (not shown) such as a gate structure, an impurity region, and a contact plug.

[0037] Each of the first and second interlayer insulating films 114 and 124 may include a silicon oxide film. For example, each of the first and second interlayer insulating films 114 and 124 may include a silicon oxide-based material such as plasma-enhanced oxide (PEOX), tetraethyl orthosilicate (TEOS), boron TEOS (BTEOS), phospho TEOS (PTEOS), borophospho TEOS (BPTEOS), borosilicate glass (BSG), phospho silicate glass (PSG), and boron PSG (BPSG). In other example embodiments, each of the first and second interlayer insulating films 114 and 124 may include a low-k dielectric film (e.g., a SiOC film or a SiCOH film) having a low dielectric constant K of approximately 2.2 to approximately 3.0.

[0038] Each of the first lower etch stop film 112 and the second lower etch stop film 122 may include a material having an etch selectivity different from the constituent material of each of the first interlayer insulating film 114 and the second interlayer insulating film 124. For example, each of the first lower etch stop film 112 and the second lower etch stop film 122 may include a silicon nitride film, a carbon-doped silicon nitride film, or a carbon-doped silicon oxynitride film. In some example embodiments, each of the first lower etch stop film 112 and the second lower etch stop film 122 may include an insulating metal oxide film, an insulating metal nitride film, or a combination thereof. For example, the first lower etch stop film 112 and the second lower etch stop film 122 may include an aluminum oxide film (AlO film), an aluminum nitride film (AlN film), or a combination thereof.

[0039] In some example embodiments, the conductive structure 120 may be a wiring layer including a metal film and a conductive barrier film surrounding the metal film. In the conductive structure 120, the metal film may include copper (Cu), tungsten (W), molybdenum (Mo), ruthenium (Ru), cobalt (Co), aluminum (Al), or a combination thereof, and the conductive barrier film may include, but is not limited to, a titanium nitride (TiN) film, a tantalum nitride (TaN) film, a cobalt (Co) film, or a combination thereof. In some example embodiments, the conductive structure 120 may be electrically connected to a conductive region formed in the substrate 110. In other example embodiments, the conductive structure 120 may be connected to a source / drain region (not shown) or a gate electrode (not shown) of a transistor formed in the substrate 110.

[0040] The lower insulating film 126 may be on the second interlayer insulating film 124, and the plurality of lower metal wiring layers 130 may pass through the lower insulating film 126 in a vertical direction (Z direction). The plurality of lower metal wiring layers 130 may extend longitudinally in a first lateral direction (X direction) and be separated from each other in a second lateral direction (Y direction) perpendicular to the first lateral direction (X direction). The plurality of lower metal wiring layers 130 may extend parallel to each other.

[0041] An upper insulating film 140 may be formed on the lower insulating film 126 and the plurality of lower metal wiring layers 130. As used herein, the upper insulating film 140 may be referred to as an upper insulating structure ILS. The lower insulating film 126 and the upper insulating film 140 may be formed of the same or substantially similar materials as the first interlayer insulating film 114 and the second interlayer insulating film 124 described above.

[0042] A plurality of upper metal wiring structures 180 may be on the upper insulating film 140. Each of the plurality of upper metal wiring structures 180 may include an upper metal wiring layer 180L and a conductive contact plug 180C integrally connected to the upper metal wiring layer 180L.

[0043] The upper insulating film 140 may have a shape defining a line space LH and a via space VH connected to the line space LH. The via space VH may extend from the line space LH to the lower metal wiring layer 130 in a vertical direction (Z direction). The line space LH may extend longitudinally in a second lateral direction (Y direction). Figure 19B and Figure 19C, the cross-sectional shapes of the line spaces LH and via spaces VH defined by upper insulating film 140 in each of the first lateral direction (X direction) and the second lateral direction (Y direction) are more clearly shown. In each of the plurality of upper metal wiring structures 180, an upper metal wiring layer 180L may fill the line spaces LH defined by upper insulating film 140, and a conductive contact plug 180C may fill the via spaces VH defined by upper insulating film 140. Upper metal wiring layer 180L may include a portion extending in the vertical direction (Z direction) from top surface 140T of upper insulating film 140 to the top surface of conductive contact plug 180C.

[0044] In each of the plurality of upper metal wiring structures 180, an upper metal wiring layer 180L may vertically overlap at least one lower metal wiring layer 130 selected from the plurality of lower metal wiring layers 130. In the plurality of upper metal wiring structures 180, each of the plurality of upper metal wiring layers 180L may extend longitudinally in the second lateral direction (Y direction) and be separated from each other in the first lateral direction (X direction). The plurality of upper metal wiring layers 180L may extend parallel to each other. Each of the plurality of upper metal wiring layers 180L may overlap the plurality of lower metal wiring layers 130 in the vertical direction (Z direction) on the upper insulating film 140.

[0045] The conductive contact plug 180C may be located at an intersection between a selected lower metal wiring layer among the plurality of lower metal wiring layers 130 and an upper metal wiring layer 180L of a selected upper metal wiring structure among the plurality of upper metal wiring structures 180. Figure 1A In FIG. 1 , a plurality of conductive contact plugs 180C included in a plurality of upper metal wiring structures 180 are shown by dotted lines. Figure 1A As shown in , each of the plurality of conductive contact plugs 180C may have a quadrilateral shape when viewed from above (on the XY plane).

[0046] Each of the plurality of lower metal wiring layers 130 and the plurality of upper metal wiring layers 180L may include a metal film, a conductive metal nitride film, or a combination thereof. In some example embodiments, at least one of the plurality of lower metal wiring layers 130 or the plurality of upper metal wiring layers 180L may include a metal plug and a conductive barrier film surrounding the sidewalls and bottom surface of the metal plug. The metal plug may include copper (Cu), tungsten (W), molybdenum (Mo), ruthenium (Ru), cobalt (Co), aluminum (Al), or a combination thereof. For example, the metal plug may include copper (Cu). The conductive barrier film may include a TiN film, a TaN film, a Co film, or a combination thereof. For example, when the metal plug includes Cu, the conductive barrier film may have a multilayer structure including a TaN film and a Co film, but is not limited thereto.

[0047] Each of the plurality of conductive contact plugs 180C included in the plurality of upper metal wiring structures 180 may pass through the upper insulating film 140 in the vertical direction (Z direction) and contact a selected lower metal wiring layer among the plurality of lower metal wiring layers 130. Each of the plurality of conductive contact plugs 180C may extend in the vertical direction (Z direction) between a selected upper metal wiring layer 180L among the plurality of upper metal wiring layers 180L and a selected lower metal wiring layer 130 among the plurality of lower metal wiring layers 130 and contact each of the selected upper metal wiring layer 180L and the selected lower metal wiring layer 130.

[0048] For example, Figure 1A As shown, the plurality of conductive contact plugs 180C may include a first conductive contact plug 180CA and a second conductive contact plug 180CB. Figure 1A 、 Figure 1B and Figure 1C As shown, the first conductive contact plug 180CA can extend in the vertical direction (Z direction) between the first lower metal wiring layer 130A and the first upper metal wiring layer 180LA, and contact each of the first lower metal wiring layer 130A and the first upper metal wiring layer 180LA, the first lower metal wiring layer 130A being a selected lower metal wiring layer 130 among the multiple lower metal wiring layers 130, and the first upper metal wiring layer 180LA being a selected upper metal wiring layer 180L among the multiple upper metal wiring layers 180L. The second conductive contact plug 180CB can extend in the vertical direction (Z direction) between the second lower metal wiring layer 130B and the second upper metal wiring layer 180LB, and contact each of the second lower metal wiring layer 130B and the second upper metal wiring layer 180LB, the second lower metal wiring layer 130B is a selected lower metal wiring layer 130 among the multiple lower metal wiring layers 130, and the second upper metal wiring layer 180LB is a selected upper metal wiring layer 180L among the multiple upper metal wiring layers 180L.

[0049] like Figure 1B 、 Figure 1C and Figure 2 As shown in , each of the plurality of conductive contact plugs 180C may include a pair of first contact sidewalls 180VS and a pair of second contact sidewalls 180TS. The pair of first contact sidewalls 180VS may be opposite to each other in a first lateral direction (X direction) and each face the upper insulating film 140. The pair of second contact sidewalls 180TS may be opposite to each other in a second lateral direction (Y direction) and each face the upper insulating film 140.

[0050] Each of the plurality of upper metal wiring layers 180L may include a pair of upper wire sidewalls (refer to Figure 1B and Figure 2 The pair of upper line sidewalls 180LS may extend in a vertical direction (Z direction) on a plane (YZ plane), the vertical direction being a direction perpendicular to the main surface 110M of the substrate 110 .

[0051] In each of the plurality of conductive contact plugs 180C, each of the pair of first contact sidewalls 180VS may extend in a plane (YZ plane) in a vertical direction (Z direction) perpendicular to the main surface 110M of the substrate 110. Each of the pair of first contact sidewalls 180VS may extend in the vertical direction (Z direction) from the pair of upper wiring sidewalls (reference line) included in a corresponding one of the plurality of upper metal wiring layers 180L. Figure 1B and Figure 2 One upper line sidewall 180LS adjacent thereto among 180LS in the upper metal wiring layer 180 extends to a corresponding one of the plurality of lower metal wiring layers 130. As used herein, it will be understood that when a constituent element is referred to as corresponding to another constituent element, it may be connected to the other constituent element.

[0052] In each of the plurality of conductive contact plugs 180C, at least one of the pair of second contact sidewalls 180TS may extend in a direction inclined with respect to the vertical direction (Z direction) from the bottom surface of the corresponding one of the plurality of upper metal wiring layers 180L toward the corresponding one of the plurality of lower metal wiring layers 130. For example, Figure 1C and Figure 2 As shown, each of the pair of second contact sidewalls 180TS may have an inclined surface that approaches a vertical center axis of the conductive contact plug 180C toward (eg, as it approaches) a corresponding one of the lower metal wiring layers 130 .

[0053] like Figure 1B As shown, in the plurality of upper metal wiring structures 180, the upper metal wiring layers 180L and the conductive contact plugs 180C connected to each other may have the same width WX in a first lateral direction (X direction), and the width WX of each of the upper metal wiring layers 180L and the conductive contact plugs 180C in the first lateral direction (X direction) may be constant in a vertical direction (Z direction). In some example embodiments, the width of each of the plurality of conductive contact plugs 180C in a second lateral direction (Y direction) may gradually decrease toward the lower metal wiring layer 130 or the substrate 110.

[0054] When viewed from above (on the XY plane), the pair of first contact sidewalls 180VS of the conductive contact plug 180C may be arranged along a pair of first straight lines (eg, Figure 1A and Figure 2The pair of upper line sidewalls 180LS of the corresponding upper metal wiring layer 180L extend along the extension lines of the pair of first straight lines (LU).

[0055] Each of the plurality of lower metal wiring layers 130 may include a pair of lower wire sidewalls (refer to Figure 1C and Figure 2 When viewed from above (on the XY plane), portions of the pair of second contact sidewalls 180TS of the conductive contact plug 180C closest to the upper metal wiring layer 180L may be arranged along a pair of second straight lines (eg, Figure 1A and Figure 2 The pair of second dotted lines LL) in FIG. 1 extend along the extension lines, wherein the pair of lower line sidewalls 130S of the corresponding lower metal wiring layer 130 extend along the extension lines of the pair of second straight lines.

[0056] In some example embodiments, when viewed from above (on the XY plane), the planar shape of the conductive contact plug 180C may be the same as the planar shape of the region where the lower metal wiring layer 130 corresponding thereto and the upper metal wiring layer 180L corresponding thereto overlap in the vertical direction (Z direction). For example, Figure 1A As shown, the planar shape of the first conductive contact plug 180CA may be the same as the planar shape of the region where the first lower metal wiring layer 130A overlaps with the first upper metal wiring layer 180LA in the vertical direction (Z direction). In addition, the planar shape of the second conductive contact plug 180CB may be the same as the planar shape of the region where the second lower metal wiring layer 130B overlaps with the second upper metal wiring layer 180LB in the vertical direction (Z direction).

[0057] When viewed from above (on the XY plane), reference Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2The described IC device 100 may include a conductive contact plug 180C extending in the vertical direction (Z direction) between the lower metal wiring layer 130 and the upper metal wiring layer 180L to connect the lower metal wiring layer 130 to the upper metal wiring layer 180L in the region where the lower metal wiring layer 130 and the upper metal wiring layer 180L intersect, and the conductive contact plug 180C may have a planar shape (e.g., a quadrilateral planar shape) that is the same as the planar shape of the region where the lower metal wiring layer 130 overlaps with the upper metal wiring layer 180L in the vertical direction (Z direction). Therefore, the planar size of the conductive contact plug 180C configured to connect the lower metal wiring layer 130 to the upper metal wiring layer 180L can be increased or maximized as much as possible within a limited area without undesirable area loss, thereby reducing or minimizing contact resistance. In addition, by increasing the minimum separation distance (e.g., 10 ... Figure 1A By ensuring a minimum separation distance D1 between first conductive contact plug 180CA and second conductive contact plug 180CB in the plurality of conductive contact plugs 180C, sufficient insulation distance can be ensured between adjacent conductive contact plugs 180C in the plurality of conductive contact plugs 180C. Thus, the occurrence of undesirable short circuits between adjacent conductive contact plugs 180C in the plurality of conductive contact plugs 180C can be reduced or prevented. Consequently, the reliability of the electrical connection between lower metal wiring layer 130 and upper metal wiring layer 180L via conductive contact plugs 180C can be improved, and the reliability of IC device 100 can be improved.

[0058] Figure 3A is a planar layout diagram of an IC device 200A according to an example embodiment. Figure 3B It is along Figure 3A A cross-sectional view taken along line X1-X1'. Figure 3C It is along Figure 3A A cross-sectional view taken along line Y1-Y1'. Figure 4 FIG is a partial perspective view of some components of IC device 200A. Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 In the drawings, the same reference numerals are used to denote Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The same elements are shown in FIG. 1 and their detailed description is omitted.

[0059] refer to Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 , the IC device 200A may have a reference Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The IC device 200A may have a configuration that is the same or substantially similar to the IC device 100 described above. However, the IC device 200A may include a plurality of upper metal wiring structures 280A. Each of the plurality of upper metal wiring structures 280A may include an upper metal wiring layer 280L and a conductive contact plug 280C integrally connected to the upper metal wiring layer 280L. The conductive contact plug 280C may include a main contact portion 280M covering the top surface of the lower metal wiring layer 130 and a protruding contact portion 280P covering the sidewalls of the lower metal wiring layer 130. The protruding contact portion 280P may be between the lower metal wiring layer 130 and the lower insulating film 126. That is, the conductive contact plug 280C may cover the top surface and sidewalls of the lower metal wiring layer 130 corresponding thereto.

[0060] Each of the plurality of conductive contact plugs 280C may include a pair of first contact sidewalls 280VS and a pair of second contact sidewalls 280TS. The pair of first contact sidewalls 280VS may be opposite to each other in a first lateral direction (X direction) and face the upper insulating film 140. The pair of second contact sidewalls 280TS may be opposite to each other in a second lateral direction (Y direction) and face the upper insulating film 140.

[0061] In each of the plurality of conductive contact plugs 280C, each of the pair of first contact sidewalls 280VS may extend in a vertical direction (Z direction) on a plane (YZ plane) perpendicular to the main surface 110M of the substrate 110. Each of the pair of first contact sidewalls 280VS may extend in the vertical direction (Z direction) from a pair of upper wiring sidewalls (reference line) included in a corresponding one of the plurality of upper metal wiring layers 280L. Figure 3B and Figure 4 An upper line sidewall 280LS adjacent thereto among the upper line sidewalls 280LS in the embodiment of the present invention extends to a corresponding one of the plurality of lower metal wiring layers 130 .

[0062] In each of the plurality of conductive contact plugs 280C, one of the pair of second contact sidewalls 280TS may extend in a direction tilted with respect to the vertical direction (Z direction) from the bottom surface of the corresponding one of the plurality of upper metal wiring layers 280L toward the top surface of the corresponding one of the plurality of lower metal wiring layers 130. The other second contact sidewall 280TS of the pair of second contact sidewalls 280TS may extend in a direction tilted with respect to the vertical direction (Z direction) from the bottom surface of the corresponding one of the plurality of upper metal wiring layers 280L toward the sidewall of the corresponding one of the plurality of lower metal wiring layers 130. For example, as Figure 3C and Figure 4As shown, each of the pair of second contact sidewalls 280TS may have an inclined surface that approaches the vertical center axis of the conductive contact plug 280C toward (eg, as it approaches) the corresponding one of the lower metal wiring layers 130 .

[0063] When viewed from above (on the XY plane), the pair of first contact sidewalls 280VS of the conductive contact plug 280C may be arranged along a pair of first straight lines (eg, Figure 3A and Figure 4 The pair of upper line sidewalls 280LS of the upper metal wiring layer 280L extend along the pair of first straight lines. When viewed from above (on the XY plane), the pair of second contact sidewalls 280TS of the conductive contact plug 280C may extend along a pair of second straight lines (e.g., Figure 3A The pair of second imaginary lines LL2 are extended, wherein the pair of second straight lines are in a direction selected from the second transverse direction (Y direction) and a direction opposite to the second transverse direction (Y direction) (for example, by Figure 3A At a position offset by a distance greater than 0 from the pair of lower line sidewalls 130S of the lower metal wiring layer 130 corresponding thereto (in the direction indicated by arrow A2 in FIG).

[0064] The detailed configurations of the plurality of upper metal wiring layers 280L and the plurality of conductive contact plugs 280C included in the plurality of upper metal wiring structures 280A are the same as those already described with reference to the respective Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The detailed configurations of the described plurality of upper metal wiring layers 180L and the plurality of conductive contact plugs 180C are the same or substantially similar.

[0065] When viewed from above (on the XY plane), reference Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4The described IC device 200A may include a conductive contact plug 280C extending in the vertical direction (Z direction) between the lower metal wiring layer 130 and the upper metal wiring layer 280L to connect the lower metal wiring layer 130 to the upper metal wiring layer 280L in the region where the lower metal wiring layer 130 and the upper metal wiring layer 280L intersect, and the conductive contact plug 280C may have a quadrilateral planar shape. Therefore, the planar size of the conductive contact plug 280C configured to connect the lower metal wiring layer 130 to the upper metal wiring layer 280L can be increased or maximized as much as possible within a limited area without undesirable area loss, thereby reducing or minimizing contact resistance. In addition, by increasing the minimum separation distance between adjacent conductive contact plugs in the plurality of conductive contact plugs 280C (e.g., Figure 3A By ensuring a minimum separation distance D2A between two adjacent conductive contact plugs 280C in the plurality of conductive contact plugs 280C, sufficient insulation distance can be ensured between two adjacent conductive contact plugs in the plurality of conductive contact plugs 280C. Consequently, the occurrence of undesirable short circuits between adjacent conductive contact plugs in the plurality of conductive contact plugs 280C can be reduced or prevented. Consequently, the reliability of the electrical connection between the lower metal wiring layer 130 and the upper metal wiring layer 280L via the conductive contact plugs 280C can be improved, and the reliability of the IC device 200A can be improved.

[0066] Figure 5A is a planar layout diagram of an IC device 200B according to an example embodiment. Figure 5B It is along Figure 5A The cross-sectional view is taken along the lines Y1-Y1' and Y2-Y2'. Figure 5A and Figure 5B In the drawings, the same reference numerals are used to denote Figures 1A to 4 The same elements are shown in FIG. 1 and their detailed description is omitted.

[0067] refer to Figure 5A and Figure 5B , IC device 200B may have a reference Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The IC device 200B may have the same or substantially similar configuration as the described IC device 100. However, the IC device 200B may include a plurality of first upper metal wiring structures 280B1 and a plurality of second upper metal wiring structures 280B2.

[0068] Each of the plurality of first upper metal wiring structures 280B1 may include an upper metal wiring layer 280L and a first conductive contact plug 280C1 integrally connected to the upper metal wiring layer 280L. Each of the plurality of second upper metal wiring structures 280B2 may include an upper metal wiring layer 280L and a second conductive contact plug 280C2 integrally connected to the upper metal wiring layer 280L. Each of the first and second conductive contact plugs 280C1 and 280C2 may include a main contact portion 280M covering the top surface of the lower metal wiring layer 130 and a protruding contact portion 280P covering the sidewalls of the lower metal wiring layer 130. The protruding contact portion 280P may be between the lower metal wiring layer 130 and the lower insulating film 126. That is, each of the first and second conductive contact plugs 280C1 and 280C2 may cover the top surface and sidewalls of the corresponding lower metal wiring layer 130.

[0069] Similar to reference Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 Each of the plurality of conductive contact plugs 280C, the plurality of first conductive contact plugs 280C1, and the plurality of second conductive contact plugs 280C2 described above may have a pair of first contact sidewalls (corresponding to Figure 3B and Figure 4 The pair of first contact side walls 280VS shown in FIG1 are opposite to each other in a first lateral direction (X direction) and face the upper insulating film 140, and each of the pair of first contact side walls 280VS may extend in a vertical direction (Z direction) on a plane (YZ plane) perpendicular to the main surface 110M of the substrate 110. Each of the pair of first contact side walls may extend in the vertical direction (Z direction) from a pair of upper wiring side walls (corresponding to a pair of upper wiring side walls included in a corresponding one of the plurality of upper metal wiring layers 280L) Figure 3B and Figure 4 One of the pair of upper line sidewalls 280LS shown in FIG. 1 , adjacent thereto, extends to a corresponding one of the plurality of lower metal wiring layers 130 .

[0070] like Figure 5B As shown, each of the plurality of first conductive contact plugs 280C1 and the plurality of second conductive contact plugs 280C2 may include a pair of second contact sidewalls 280TS that are opposite to each other in the second lateral direction (Y direction) and face the upper insulating film 140. In each of the plurality of first conductive contact plugs 280C1 and the plurality of second conductive contact plugs 280C2, the detailed configuration of the pair of second contact sidewalls 280TS is the same as that of the reference numerals. Figure 3A and Figure 3CDetailed configurations of the pair of second contact sidewalls 280TS included in the described conductive contact plug 280C are the same or substantially similar.

[0071] When viewed from above (on the XY plane), a pair of first contact sidewalls of each of the plurality of first conductive contact plugs 280C1 and the plurality of second conductive contact plugs 280C2 may be arranged along a pair of first straight lines (eg, Figure 5A The pair of first dotted lines LU2 in FIG. 1 extend along the extended lines, wherein a pair of upper line sidewalls 280LS of the corresponding upper metal wiring layer 280L pass along the pair of first straight lines.

[0072] When viewed from above (on the XY plane), the pair of second contact sidewalls 280TS of each of the plurality of first conductive contact plugs 280C1 may be formed in a direction (eg, from the pair of lower wire sidewalls 130S of the lower metal wiring layer 130 corresponding thereto) along the line. Figure 5A At a position where the distance is greater than 0, along a pair of second straight lines (for example, Figure 5A The pair of second dotted lines LL2A) are extended.

[0073] When viewed from above (on the XY plane), a pair of second contact sidewalls 280TS of each of the plurality of second conductive contact plugs 280C2 may be formed from a pair of lower wire sidewalls 130S corresponding thereto along the second lateral direction (Y direction) (e.g., by Figure 5A At a position where the distance is greater than 0, along a pair of third straight lines (for example, Figure 5A The pair of third dotted lines LL2B) are extended.

[0074] The detailed configurations of the plurality of upper metal wiring layers 280L, the plurality of first conductive contact plugs 280C1, and the plurality of second conductive contact plugs 280C2 included in the plurality of first upper metal wiring structures 280B1 and the plurality of second upper metal wiring structures 280B2 are respectively the same as those described above with reference to FIG. Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The detailed configurations of the described plurality of upper metal wiring layers 180L and the plurality of conductive contact plugs 180C are the same or substantially similar.

[0075] When viewed from above (on the XY plane), reference Figure 5A and Figure 5BThe IC device 200B may include a first conductive contact plug 280C1 and a second conductive contact plug 280C2, each of which may have a quadrilateral planar shape. Each of the first conductive contact plug 280C1 and the second conductive contact plug 280C2 may extend in a vertical direction (Z direction) between a selected one of the plurality of lower metal wiring layers 130 and a selected one of the plurality of upper metal wiring layers 280L, thereby connecting the selected lower metal wiring layer 130 to the selected upper metal wiring layer 280L in a region where the plurality of lower metal wiring layers 130 intersect the plurality of upper metal wiring layers 280L. Therefore, the planar size of the first conductive contact plug 280C1 or the second conductive contact plug 280C2 configured to connect the lower metal wiring layer 130 to the upper metal wiring layer 280L may be increased or maximized as much as possible within a limited area without undesirable area loss, thereby reducing or minimizing contact resistance. Furthermore, by increasing the minimum separation distance (eg, Figure 5A The minimum separation distance D2B between the first conductive contact plugs 280C1 and the second conductive contact plugs 280C2 in the circuit board can ensure sufficient insulation distance therebetween, thereby reducing or preventing undesirable short circuits between adjacent conductive contact plugs in the plurality of first conductive contact plugs 280C1 and the plurality of second conductive contact plugs 280C2. Consequently, the reliability of the electrical connection between the lower metal wiring layer 130 and the upper metal wiring layer 280L via the first conductive contact plugs 280C1 and / or the second conductive contact plugs 280C2 can be improved, and the reliability of the IC device 200B can be improved.

[0076] Figure 6A and Figure 6B is a cross-sectional view of an IC device 300 according to an example embodiment. Figure 6A The IC device 300 corresponds to the Figure 1A The component is a portion of a cross section taken along line X1-X1'. Figure 6B The IC device 300 corresponds to the Figure 1A The component in the portion of the cross section taken along the line Y1-Y1'. Figure 6A and Figure 6B In the drawings, the same reference numerals are used to denote Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The same elements are shown in FIG. 1 and their detailed description is omitted.

[0077] refer to Figure 6A and Figure 6B, the IC device 300 may have a reference Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The IC device 300 may have the same or substantially similar configuration as the described IC device 100 . However, the IC device 300 may include an upper insulating structure ILS3 including an etch stop film 332 and an upper insulating film 340 .

[0078] In some example embodiments, the etch stop film 332 may have a multilayer structure in which a first insulating film containing metal, a second insulating film not containing metal, and a third insulating film containing metal are stacked in sequence. Each of the first and third insulating films may include an aluminum oxide film, an aluminum nitride film, or a combination thereof. For example, each of the first and third insulating films may include at least one of an aluminum oxide film, an aluminum nitride film, or a combination thereof. The second insulating film may include a silicon oxide film, a SiOC film, or a combination thereof. The thicknesses of the first and third insulating films may differ from each other in the vertical direction (Z direction). In some example embodiments, the thicknesses of the first, second, and third insulating films may differ from each other in the vertical direction (Z direction). For example, the thickness of the third insulating film may be greater than that of the first insulating film. However, the inventive concept is not limited thereto, and each of the first, second, and third insulating films may be formed to various thicknesses as desired. In other example embodiments, the etch stop film 332 may have a single-film structure including a metal-containing insulating film. For example, the etch stop film 332 may include an aluminum oxide film, an aluminum nitride film, or a combination thereof. In the upper insulating structure ILS3, the constituent material of the upper insulating film 340 may be the same as that already mentioned. Figure 1B and Figure 1C The constituent materials of the upper insulating film 140 described are the same.

[0079] Each of the plurality of conductive contact plugs 180C included in the plurality of upper metal wiring structures 180 may pass through the upper insulating film 340 and the etch stop film 332 in the vertical direction (Z direction) and contact the lower metal wiring layer 130 corresponding thereto.

[0080] Figure 7 is a floor plan view of an IC device 400 according to an example embodiment. Figure 8 It is along Figure 7 A cross-sectional view taken along line X1-X1'. Figure 9 It is along Figure 7 A cross-sectional view taken along the line Y1-Y1'. Figures 7 to 9 An IC device 400 is described that includes a field effect transistor (FET) having a gate-all-around structure, which includes an active region of the nanowire or nanosheet type and a gate surrounding the active region. Figures 7 to 9 In the drawings, the same reference numerals are used to denote Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The same elements are shown in FIG. 1 and their detailed description is omitted.

[0081] refer to Figures 7 to 9 IC device 400 may include multiple fin-type active regions F1 and multiple nanosheet stacks NSS. The multiple fin-type active regions F1 may protrude from substrate 402 and extend longitudinally in a first lateral direction (X direction). The multiple nanosheet stacks NSS may be vertically separated from the multiple fin-type active regions F1 in a vertical direction (Z direction) and face the fin top surfaces FT of the multiple fin-type active regions F1. As used herein, the term "nanosheet" refers to a conductive structure having a cross-section substantially perpendicular to the direction of current flow. Nanosheets may be interpreted as including nanowires.

[0082] Trenches T1 defining a plurality of fin-type active regions F1 may be formed in substrate 402. Trenches T1 may be filled with a device isolation film 412. Substrate 402 may include a semiconductor element (such as silicon (Si) or germanium (Ge)) or a compound semiconductor (such as silicon germanium (SiGe), silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), indium gallium arsenide (InGaAs), or indium phosphide (InP)). Substrate 402 may include a conductive region, such as a doped well or doped structure. Device isolation film 412 may include an oxide film, a nitride film, or a combination thereof.

[0083] A plurality of gate lines 460 may be on the plurality of fin-type active regions F1 , and each of the plurality of gate lines 460 may longitudinally extend in a second lateral direction (Y direction) intersecting the first lateral direction (X direction).

[0084] In the region where the plurality of fin active regions F1 intersect the plurality of gate lines 460, a plurality of nanosheet stacks NSS may be respectively located on the fin top surfaces FT of the plurality of fin active regions F1. Each of the plurality of nanosheet stacks NSS may include at least one nanosheet facing the fin top surface FT of the fin active region F1 at a position spaced apart from the fin top surface FT of the fin active region F1 in the vertical direction (Z direction).

[0085] In some example embodiments, each of the plurality of nanosheet stacks NSS may include a first nanosheet N1, a second nanosheet N2, and a third nanosheet N3 that overlap with each other in a vertical direction (Z direction) on the fin-type active region F1. Each of the plurality of gate lines 460 may surround the first nanosheet N1, the second nanosheet N2, and the third nanosheet N3 that overlap with each other in the vertical direction (Z direction) and are included in the nanosheet stack NSS.

[0086] Each of the plurality of gate lines 460 may include a main gate portion 460M and a plurality of sub-gate portions 460S. The main gate portion 460M may extend longitudinally in the second lateral direction (Y direction) while covering the top surface of the nanosheet stack NSS. The plurality of sub-gate portions 460S may be integrally connected to the main gate portion 460M and respectively located between the first nanosheet N1, the second nanosheet N2, and the third nanosheet N3, and between the first nanosheet N1 and the fin-type active region F1. In the vertical direction (Z direction), the thickness of each of the plurality of sub-gate portions 460S may be thinner than the thickness of the main gate portion 460M.

[0087] A plurality of grooves R1 may be formed in the fin active region F1. The lowermost surface of each of the plurality of grooves R1 may be at a vertical level lower than the fin top surface FT of the fin active region F1. A plurality of source / drain regions 430 may be within the plurality of grooves R1. Each of the plurality of source / drain regions 430 may be adjacent to at least one gate line 460 selected from the plurality of gate lines 460. Each of the plurality of source / drain regions 430 may be in contact with the first nanosheet N1, the second nanosheet N2, and the third nanosheet N3 included in the adjacent nanosheet stack NSS.

[0088] Each of the plurality of gate lines 460 may include a metal, a metal nitride, a metal carbide, or a combination thereof. The metal may be selected from titanium (Ti), tungsten (W), ruthenium (Ru), niobium (Nb), molybdenum (Mo), hafnium (Hf), nickel (Ni), cobalt (Co), platinum (Pt), ytterbium (Yb), terbium (Tb), dysprosium (Dy), erbium (Er), and palladium (Pd). The metal nitride may be selected from TiN and TaN. The metal carbide may include titanium aluminum carbide (TiAlC). However, the constituent materials of the plurality of gate lines 460 are not limited to the above examples. Each of the plurality of gate lines 460 may further include a gap-filling metal film. The gap-filling metal film may include a tungsten (W) film and an aluminum (Al) film. In some example embodiments, each of the plurality of gate lines 460 may include a TiN film, a stack structure of TiAlC / TiN / W, a stack structure of TiN / TaN / TiAlC / TiN / W, or a stack structure of TiN / TaN / TiN / TiAlC / TiN / W, but is not limited thereto.

[0089] The gate dielectric film 452 may be between the nanosheet stack NSS and the gate line 460. In some example embodiments, the gate dielectric film 452 may include a stacked structure of an interface dielectric film and a high-k dielectric film. The interface dielectric film may include a low-k dielectric material film having a dielectric constant of approximately 9 or less, such as a silicon oxide film, a silicon oxynitride film, or a combination thereof. In some example embodiments, the interface dielectric film may be omitted. The high-k dielectric film may include a material having a higher dielectric constant than the silicon oxide film. For example, the high-k dielectric film may have a dielectric constant of approximately 10 to approximately 25. The high-k dielectric film may include, but is not limited to, hafnium oxide.

[0090] Both sidewalls of the gate line 460 may be covered by insulating spacers 418. The insulating spacers 418 may cover both sidewalls of the main gate portion 460M on the top surface of each of the plurality of nanosheet stacks NSS. The insulating spacers 418 may be separated from the gate line 460 with a gate dielectric film 452 therebetween. The insulating spacers 418 may include silicon nitride, silicon oxide, silicon carbon nitride (SiCN), silicon boron nitride (SiBN), silicon oxynitride (SiON), silicon carbon oxynitride (SiOCN), silicon boron carbon nitride (SiBCN), silicon oxycarbide (SiOC), or a combination thereof.

[0091] A top surface of each of the gate dielectric film 452, the gate line 460, and the insulating spacer 418 may be covered by a capping insulating pattern 468. The capping insulating pattern 468 may contact a top surface of each of the gate dielectric film 452, the gate line 460, and the insulating spacer 418. The capping insulating pattern 468 may include a silicon nitride film.

[0092] Both sidewalls of each of the plurality of sub-gate portions 460S may be separated from the source / drain region 430 with a gate dielectric film 452 therebetween. The gate dielectric film 452 may be between the sub-gate portion 460S included in the gate line 460 and each of the first nanosheet N1, the second nanosheet N2, and the third nanosheet N3, and between the sub-gate portion 460S included in the gate line 460 and the source / drain region 430.

[0093] A plurality of nanosheet transistors may be formed on a portion of the substrate 402 where the plurality of fin-type active regions F1 intersect the plurality of gate lines 460. Each of the first nanosheet N1, the second nanosheet N2, and the third nanosheet N3 included in the nanosheet stack NSS may have a channel region. In some example embodiments, each of the first nanosheet N1, the second nanosheet N2, and the third nanosheet N3 included in the nanosheet stack NSS may include a silicon (Si) layer, a silicon germanium (SiGe) layer, or a combination thereof.

[0094] A metal silicide film 472 may be formed on the top surface of each of the plurality of source / drain regions 430. The metal silicide film 472 may include a metal including Ti, W, Ru, Nb, Mo, Hf, Ni, Co, Pt, Yb, Tb, Dy, Er, or Pd. For example, the metal silicide film 472 may include titanium silicide, but is not limited thereto.

[0095] An insulating liner 442 and an inter-gate dielectric film 444 may be sequentially located on the plurality of source / drain regions 430 and the plurality of metal silicide films 472. In some example embodiments, the insulating liner 442 may include silicon nitride (SiN), SiCN, SiBN, SiON, SiOCN, SiBCN, or a combination thereof, and the inter-gate dielectric film 444 may include a silicon oxide film, but is not limited thereto.

[0096] A plurality of source / drain contacts CA may be on the plurality of source / drain regions 430. Each of the plurality of source / drain contacts CA may penetrate the inter-gate dielectric film 444 and the insulating liner 442 in the vertical direction (Z direction) and contact the metal silicide film 472. Each of the plurality of source / drain contacts CA may be electrically connected to the source / drain region 430 through the metal silicide film 472. Each of the plurality of source / drain contacts CA may be separated from the main gate portion 460M in the first lateral direction (X direction) with an insulating spacer 418 located therebetween.

[0097] Each of the plurality of source / drain contacts CA may include a conductive barrier film 474 and a contact plug 476 sequentially stacked on the metal silicide film 472 . The conductive barrier film 474 may surround and contact the bottom surface and sidewalls of the contact plug 476 . In some example embodiments, the conductive barrier film 474 may include a metal or a metal nitride. For example, the conductive barrier film 474 may include titanium (Ti), tantalum (Ta), tungsten (W), titanium nitride (TiN), tantalum nitride (TaN), tungsten nitride (WN), tungsten carbonitride (WCN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tungsten silicon nitride (WSiN), or a combination thereof. The contact plug 476 may include a metal selected from molybdenum (Mo), copper (Cu), tungsten (W), cobalt (Co), ruthenium (Ru), manganese (Mn), titanium (Ti), tantalum (Ta), aluminum (Al), and combinations thereof.

[0098] The lower insulating structure 480 may be on the top surface of each of the plurality of source / drain contacts CA and the plurality of capping insulating patterns 468. The lower insulating structure 480 may include a lower etch stop film 482 and a first interlayer insulating film 484 sequentially stacked on the top surface of each of the plurality of capping insulating patterns 468. The lower etch stop film 482 may include silicon carbide (SiC), silicon nitride (SiN), nitrogen (N)-doped silicon carbide (SiC:N), silicon oxycarbide (SiOC), aluminum nitride (AlN), aluminum oxynitride (AlON), aluminum oxide (AlO), aluminum oxycarbide (AlOC), or a combination thereof. The constituent material of the first interlayer insulating film 484 may be the same as that of the reference 468. Figure 2 The constituent materials of the described first interlayer insulating film 114 are the same or substantially similar.

[0099] like Figure 8 As shown, a plurality of source / drain via contacts VA may be respectively on the plurality of source / drain contacts CA. Each of the plurality of source / drain via contacts VA may pass through the lower insulating structure 480 and contact the source / drain contact CA. Each of the plurality of source / drain regions 430 may be electrically connected to the source / drain via contact VA through the metal silicide film 472 and the source / drain contact CA.

[0100] like Figure 9 As shown, the gate contact CB may be on the gate line 460. The gate contact CB may pass through the lower insulating structure 480 and the capping insulating pattern 468 in a vertical direction (Z direction) and be connected to the gate line 460.

[0101] Each of the plurality of source / drain via contacts VA and gate contacts CB may include a contact plug comprising molybdenum (Mo), copper (Cu), tungsten (W), cobalt (Co), ruthenium (Ru), manganese (Mn), titanium (Ti), tantalum (Ta), aluminum (Al), combinations thereof, or alloys thereof, but the materials constituting the contact plugs are not limited thereto. In some example embodiments, each of the plurality of source / drain via contacts VA and gate contacts CB may further include a conductive barrier pattern surrounding a portion of the contact plug. The conductive barrier pattern included in each of the plurality of source / drain via contacts VA and gate contacts CB may include a metal or a metal nitride. For example, the conductive barrier pattern may include Ti, Ta, W, TiN, TaN, WN, WCN, TiSiN, TaSiN, WSiN, or combinations thereof, but is not limited thereto.

[0102] The second lower etch stopper film 122 and the second interlayer insulating film 124 may be sequentially stacked on each of the lower insulating structure 480, the source / drain via contact VA, and the gate contact CB. The lower insulating film 126, the plurality of lower metal wiring layers 130, the upper insulating film 140, and the plurality of upper metal wiring structures 180 may be on the second interlayer insulating film 124. Each of the plurality of upper metal wiring structures 180 may include an upper metal wiring layer 180L and a conductive contact plug 180C integrally connected to the upper metal wiring layer 180L.

[0103] Each of the plurality of conductive contact plugs 180C may include a pair of first contact sidewalls 180VS and a pair of second contact sidewalls 180TS. The pair of first contact sidewalls 180VS may be opposite to each other in a first lateral direction (X direction) and face the upper insulating film 140. The pair of second contact sidewalls 180TS may be opposite to each other in a second lateral direction (Y direction) and face the upper insulating film 140. Each of the pair of first contact sidewalls 180VS may extend in a plane (YZ plane) in a vertical direction (Z direction) perpendicular to the main surface 110M of the substrate 110. At least one second contact sidewall 180TS among the pair of second contact sidewalls 180TS may extend from the bottom surface of a corresponding one of the plurality of upper metal wiring layers 180L toward a corresponding one of the plurality of lower metal wiring layers 130 in a direction inclined with respect to the vertical direction (Z direction). The detailed configuration and effects of the plurality of upper metal wiring structures 180 are similar to those of reference 1. Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 Same as those described.

[0104] Figure 10 is a cross-sectional view of an IC device 500 according to an example embodiment. Figure 10 The IC device 500 corresponds to the Figure 1A The component in the portion of the cross section taken along the line Y1-Y1'. Figure 10 In the drawings, the same reference numerals are used to denote Figures 1A to 4 The same elements are shown in FIG. 1 and their detailed description is omitted.

[0105] refer to Figure 10 , the IC device 500 may have the same Figure 9The IC device 500 may have the same or substantially similar configuration as that of the IC device 400 described above. However, the IC device 500 may include a plurality of upper metal wiring structures 280A. Each of the plurality of upper metal wiring structures 280A may include an upper metal wiring layer 280L and a conductive contact plug 280C integrally connected to the upper metal wiring layer 280L. The conductive contact plug 280C may include a main contact portion 280M covering the top surface of the lower metal wiring layer 130 and a protruding contact portion 280P covering the sidewall of the lower metal wiring layer 130. The protruding contact portion 280P may be between the lower metal wiring layer 130 and the lower insulating film 126. That is, the conductive contact plug 280C may cover the top surface and sidewall of the lower metal wiring layer 130 corresponding thereto. The detailed configuration and effects of the plurality of upper metal wiring structures 280A are the same as those of reference 126. Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 Same as those described.

[0106] In reference Figures 7 to 10 In the IC devices 400 and 500 described, similar to the reference Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 In the described IC device 100, the planar dimensions of the conductive contact plugs 180C or 280C, which are configured to connect the lower metal wiring layer 130 to the upper metal wiring layer 180L or 280L, can be increased or maximized as much as possible within a limited area without undesirable area loss, thereby reducing or minimizing contact resistance. Furthermore, by increasing the minimum separation distance between adjacent conductive contact plugs in the plurality of conductive contact plugs 180C or 280C, sufficient insulation distance between adjacent conductive contact plugs in the plurality of conductive contact plugs 180C or 280C can be ensured, thereby reducing or preventing the occurrence of undesirable short circuits between adjacent conductive contact plugs in the plurality of conductive contact plugs 180C or 280C. Consequently, the reliability of the electrical connection between the lower metal wiring layer 130 and the upper metal wiring layer 180L or 280L via the conductive contact plugs 180C or 280C can be improved, and the reliability of the IC device 200A can be improved.

[0107] 11A to 20C are diagrams illustrating process steps of a method of manufacturing an IC device according to example embodiments. Figure 11A 、 Figure 12A 、 Figure 13A 、 Figure 14A 、 Figure 15A 、 Figure 16A 、 Figure 17A 、 Figure 18A 、 Figure 19A and Figure 20Aare plan views illustrating process steps of a method of manufacturing an IC device according to example embodiments. Figure 11B 、 Figure 12B 、 Figure 13B 、 Figure 14B 、 Figure 15B 、 Figure 16B 、 Figure 17B 、 Figure 18B 、 Figure 19B and Figure 20B Along the Figure 11A 、 Figure 12A 、 Figure 13A 、 Figure 14A 、 Figure 15A 、 Figure 16A 、 Figure 17A 、 Figure 18A 、 Figure 19A and Figure 20A A cross-sectional view taken along line X1-X1'. Figure 15C 、 Figure 16C 、 Figure 17C 、 Figure 18C 、 Figure 19C and Figure 20C Along the Figure 15A 、 Figure 16A 、 Figure 17A 、 Figure 18A 、 Figure 19A and Figure 20A A cross-sectional view taken along the line Y1-Y1'. 11A to 20C Describes the reference Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 An example of a method for manufacturing the IC device 100 is described. 11A to 20C In the drawings, the same reference numerals are used to denote Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The same elements are shown in FIG. 1 and their detailed description is omitted.

[0108] refer to Figure 11A and Figure 11BA first lower etch stop film 112 and a first interlayer insulating film 114 may be formed on the substrate 110, and a conductive structure 120 may be formed to pass through the first interlayer insulating film 114 and the first lower etch stop film 112 and electrically connect to a conductive region (not shown) of the substrate 110. Forming the conductive structure 120 may include partially etching the first interlayer insulating film 114 and the first lower etch stop film 112 to form an opening and filling the opening with a conductive material. The conductive structure 120 may be electrically connected to the conductive region formed in the substrate 110. In some other example embodiments, the conductive structure 120 may be a source / drain region, a source / drain contact, a via contact, or a gate contact of a transistor, but is not limited thereto.

[0109] A second lower etch stopper film 122 and a second interlayer insulating film 124 may be formed on the first interlayer insulating film 114. A lower insulating film 126 may be formed on the second interlayer insulating film 124. A plurality of lower metal wiring layers 130 may be formed to pass through the lower insulating film 126 in a vertical direction (Z direction).

[0110] refer to Figure 12A and Figure 12B , an upper insulating film 140 having a planarized top surface may be formed on the lower insulating film 126 and the plurality of lower metal wiring layers 130. Thereafter, a first hard mask pattern HM1 may be formed on the upper insulating film 140. The first hard mask pattern HM1 may include a plurality of first openings H1 having respective openings corresponding to the plurality of upper metal wiring layers (refer to FIG. Figure 1A 、 Figure 1B 、 Figure 1C and Figure 2 The top surface of the upper insulating film 140 may be exposed through a plurality of first openings H1 formed in the first hard mask pattern HM1. In some example embodiments, the first hard mask pattern HM1 may include a mask pattern containing a metal. For example, the first hard mask pattern HM1 may include a titanium nitride (TiN) film, a tungsten (W) film, a tungsten (W)-doped carbon film, or a combination thereof, but is not limited thereto.

[0111] refer to Figure 13A and Figure 13B , you can Figure 12A and Figure 12B A planarized hard mask layer 150 is formed on the resultant structure. In some example embodiments, the planarized hard mask layer 150 may include SOH (spin-on hard mask (SOH) film), but is not limited thereto.

[0112] An inorganic hard mask layer 160 may be formed on the planarized hard mask layer 150. In some example embodiments, the inorganic hard mask layer 160 may include a silicon oxynitride (SiON) film, but is not limited thereto.

[0113] A photoresist pattern RP may be formed on the inorganic hard mask layer 160. A plurality of second openings H2 may be formed in the photoresist pattern RP. The plurality of second openings H2 may be located on the plurality of lower metal wiring layers 130 to correspond to regions where the plurality of conductive contact plugs 180C will be formed. That is, the plurality of second openings H2 formed in the photoresist pattern RP may overlap with the plurality of first openings H1 formed in the first hard mask pattern HM1 in the vertical direction (Z direction).

[0114] In the first lateral direction (X direction), the planar dimensions (XY planar dimensions) of each of the plurality of second openings H2 formed in the photoresist pattern RP may be smaller than the planar dimensions (XY planar dimensions) of each of the plurality of conductive contact plugs 180C. The inorganic hard mask layer 160 may be exposed through the plurality of second openings H2. In some example embodiments, the photoresist pattern RP may be formed by exposure to extreme ultraviolet (EUV) light having a wavelength of 13.5 nm, but is not limited thereto.

[0115] In some example embodiments, in the first lateral direction (X direction), a width D2X of each of the plurality of second openings H2 formed in the photoresist pattern RP may be smaller than a width D1X of each of the plurality of first openings H1 formed in the first hard mask pattern HM1. In the second lateral direction (Y direction), a width D2Y of each of the plurality of second openings H2 formed in the photoresist pattern RP may be smaller than a width D1X of each of the plurality of first openings H1 formed in the first hard mask pattern HM1. Figure 14A ) may be substantially equal to the width of the lower metal wiring layer 130 .

[0116] refer to Figure 14A and Figure 14B ,exist Figure 13A and Figure 13B In the resulting structure, the inorganic hard mask layer 160 can be etched using the photoresist pattern RP as an etching mask to form an inorganic hard mask pattern 160P. Therefore, the plurality of second openings H2 can extend to a space passing through the inorganic hard mask pattern 160P in the vertical direction (Z direction), and the planarized hard mask layer 150 can be exposed through the plurality of second openings H2.

[0117] refer to Figure 15A 、 Figure 15B and Figure 15C ,exist Figure 14A and Figure 14BIn the resulting structure, only the width D2X of each of the plurality of second openings H2 in the first lateral direction (X direction) can be selectively increased from the width D2X of each of the plurality of second openings H2 in the second lateral direction (Y direction) and the width D2Y of each of the plurality of second openings H2 in the second lateral direction (Y direction). Therefore, a second hard mask pattern HM2 having a plurality of extended second openings EH2 can be obtained from the inorganic hard mask pattern 160P. The plurality of extended second openings EH2 can vertically penetrate the photoresist pattern RP and the second hard mask pattern HM2.

[0118] A width ED2X of each of the plurality of extended second openings EH2 in the first lateral direction (X direction) may be greater than a width D1X of each of the plurality of first openings H1 in the first lateral direction (X direction). A width ED2Y of each of the plurality of extended second openings EH2 in the second lateral direction (Y direction) may be substantially equal to a width D2Y of each of the plurality of first openings H1 in the second lateral direction (Y direction). In the profile of each of the plurality of extended second openings EH2, a portion intersecting the first openings H1 of the first hard mask pattern HM1 in the first lateral direction (X direction) may include a straight line along the first lateral direction (X direction).

[0119] In some example embodiments, to form the plurality of extended second openings EH2 by selectively increasing the width D2X of each of the plurality of second openings H2 in the first lateral direction (X direction), an etching process in an oblique or slanted direction (hereinafter, an oblique etching process) may be performed. To perform the oblique etching process, an etching process using an ion beam (hereinafter, an ion beam etching process) may be performed. In some example embodiments, the ion beam etching process may be an ion beam etching process using a reactive gas (e.g., a fluorine (F)-based gas) as an ion source. During the ion beam etching process, argon (Ar) may be used as the ion source in addition to the fluorine-based gas. Fluorocarbon-based gases such as CF4, C2F6, C3F8, C4F6, and C4F8 may be used as the fluorine-based gas, but are not limited thereto.

[0120] In some example embodiments, in order to form a plurality of extended second openings EH2 by selectively increasing a width D2X of each of the plurality of second openings H2 in the first lateral direction (X direction), as shown in FIG. Figure 15BAs shown, an ion beam etching process can be performed by varying the ion beam incident direction in a first lateral direction (X direction) within a range between the direction of dashed arrow IB11 and the direction of dashed arrow IB13, and within a range between the direction of dashed arrow IB12 and the direction of dashed arrow IB14. During the ion beam etching process, the range of variation of the ion beam incident direction in the first lateral direction (X direction) can be selected within a range from a first angle AG1 to a second angle AG2. The first angle can be an angle greater than 45° relative to a line parallel to the main surface 110M of the substrate 110, and the second angle AG2 can be an angle perpendicular to the main surface 110M of the substrate 110. For example, during the ion beam etching process, the range of variation of the ion beam incident direction in the first lateral direction (X direction) can be selected within a range from approximately 50° to approximately 90° relative to a line parallel to the main surface 110M of the substrate 110.

[0121] Unlike in the first lateral direction (X direction), in the second lateral direction (Y direction), the ion beam etching process may be performed while the ion beam is incident in the direction of the dotted arrow 1B (which is perpendicular to the main surface 110M of the substrate), as shown in FIG. Figure 15C shown.

[0122] refer to Figure 16A 、 Figure 16B and Figure 16C The planarized hard mask layer 150 can be etched using the second hard mask pattern HM2 as an etching mask, thereby forming a hard mask pattern 150P having a plurality of elliptical holes 150H that expose a portion of the first hard mask pattern HM1. As used herein, the hard mask pattern 150P may also be referred to as a third hard mask pattern. In the outline of each of the plurality of elliptical holes 150H in the hard mask pattern 150P, the portion of the first hard mask pattern HM1 that intersects the first opening H1 in the first lateral direction (X direction) may include a straight line along the first lateral direction (X direction).

[0123] After forming the hard mask pattern 150P including the plurality of elliptical holes 150H, residues of unnecessary films (e.g., the second hard mask pattern HM2 and the photoresist pattern RP) remaining on the hard mask pattern 150P may be removed. In some example embodiments, the photoresist pattern RP may be removed in advance before performing the etching process for forming the hard mask pattern 150P.

[0124] refer to Figure 17A 、 Figure 17B and Figure 17C ,exist Figure 16A 、 Figure 16B and Figure 16CIn the resulting structure, the upper insulating film 140 may be etched by a local thickness by an anisotropic etching process using the hard mask pattern 150P and the first hard mask pattern HM1 as etching masks, and thus, a plurality of recess holes 140R may be formed in local areas of the upper insulating film 140 .

[0125] In some example embodiments, the plurality of recess holes 140R may be formed in the upper insulating film 140 by using a plasma enhanced atomic layer etching (PEALE) process. In some example embodiments, forming the plurality of recess holes 140R in the upper insulating film 140 may include supplying an etching gas together with Ar gas to a loading Figure 16A 、 Figure 16B and Figure 16C On the surface to be etched in the reaction chamber of the resulting structure, by using Ar gas to purge the interior of the reaction chamber where the etching gas is supplied, supplying the reaction gas into the reaction chamber together with the Ar gas, and purging the interior of the reaction chamber where the reaction gas is supplied. In some example embodiments, the etching gas may include a fluorocarbon. For example, the etching gas may include CHF3, CH2F2, CH3F, CF4, C2F6, C4F8, C4F6, or a combination thereof, but is not limited thereto. The reaction gas may include O2, CO2, N2O, or a combination thereof, but is not limited thereto.

[0126] During supplying the etching gas into the reaction chamber together with the Ar gas, pulsed radio frequency (RF) power may be applied to the reaction chamber to generate reactive species of the reactive gas, and the surface of the upper insulating film 140 on which the etching gas is chemically adsorbed is brought into contact with the reactive species, so that the upper insulating film 140 is etched.

[0127] When the upper insulating film 140 is anisotropically etched to form the plurality of recess holes 140R, when viewed from a cross section taken along the first lateral direction (X direction), as shown in FIG. Figure 17B As shown, etching gas and / or reaction gas for etching the upper insulating film 140 can be supplied through a plurality of elliptical holes 150H having a relatively large width in the first lateral direction (X direction). In this case, a relatively large amount of etching gas and / or reaction gas can reach the upper insulating film 140, the film to be etched, through the plurality of elliptical holes 150H having a relatively large width in the first lateral direction (X direction). Therefore, in a cross-section taken along the first lateral direction (X direction), the upper insulating film 140 can be etched to have vertical sidewalls 140VS that align with the sidewalls of the first hard mask pattern HM1 and extend in the vertical direction (Z direction). Therefore, the width of each of the plurality of recess holes 140R in the first lateral direction (X direction) can be defined by the vertical sidewalls 140VS extending in the vertical direction (Z direction).

[0128] In contrast, when the upper insulating film 140 is anisotropically etched to form the plurality of recess holes 140R, Figure 17C As shown, when viewed from a cross-section taken along the second lateral direction (the Y direction), a reactive gas and / or an etching gas for etching the upper insulating film 140 can be supplied through a plurality of elliptical holes 150H having a relatively small width in the second lateral direction (the Y direction). In this case, a relatively small amount of etching gas and / or reactive gas can reach the upper insulating film 140, which is the film to be etched, through the plurality of elliptical holes 150H having a relatively small width in the second lateral direction (the Y direction). As a result, after forming a plurality of recessed holes 140R in the upper insulating film 140, a slanted sidewall 140TS defining the width of each of the plurality of recessed holes 140R in the second lateral direction (the Y direction) can be formed in the upper insulating film 140 in a cross-section taken along the second lateral direction (the Y direction). The width of each of the plurality of recessed holes 140R in the second lateral direction (the Y direction) can decrease toward the substrate 110.

[0129] refer to Figure 18A 、 Figure 18B and Figure 18C , can be obtained from Figure 17A 、 Figure 17B and Figure 17C The hard mask pattern 150P is removed from the resulting structure to expose the top surface 140T of the upper insulating film 140. When the hard mask pattern 150P includes a spin-on hard mask (SOH) film, the hard mask pattern 150P may be removed by using an ashing process and a stripping process.

[0130] refer to Figure 19A 、 Figure 19B and Figure 19C ,exist Figure 18A 、 Figure 18B and Figure 18C In the resultant structure, the upper insulating film 140 can be etched by using the first hard mask pattern HM1 as an etching mask, and thus a plurality of line spaces LH and a plurality of via spaces VH can be formed in the upper insulating film 140. The plurality of line spaces LH can be formed by etching the upper insulating film 140 from the upper insulating film 140. Figure 18B and Figure 18C The exposed top surface 140T in the resulting structure is obtained by etching a portion of the upper insulating film 140. The plurality of line spaces LH may be separated from the plurality of lower metal wiring layers 130 and the lower insulating film 126 in the vertical direction (Z direction). The plurality of via spaces VH may be formed by Figure 18B and Figure 18C The resultant structure is obtained by etching a portion of the upper insulating film 140 from the plurality of recess holes 140R. The lower metal wiring layer 130 may be exposed through each of the plurality of via spaces VH.

[0131] Similar to reference Figure 18A 、 Figure 18B and Figure 18C In the description provided, the plurality of via spaces VH may be defined by vertical sidewalls 140VS of the upper insulating film 140 in a cross section taken along a first lateral direction (X direction), and may be defined by inclined sidewalls 140TS of the upper insulating film 140 in a cross section taken along a second lateral direction (Y direction), wherein the vertical sidewalls 140VS are aligned with the sidewalls of the first hard mask pattern HM1 and extend in a vertical direction (Z direction). The width of each of the plurality of via spaces VH in the second lateral direction (Y direction) may decrease toward the substrate 110.

[0132] refer to Figure 20A 、 Figure 20B and Figure 20C ,exist Figure 19A 、 Figure 19B and Figure 19C In the resulting structure, a metal-containing conductive layer may be formed to fill the plurality of via spaces VH and the plurality of line spaces LH. The metal-containing conductive layer may include a metal plug and a conductive barrier film surrounding the sidewalls and bottom surface of the metal plug. The metal plug may include Cu, W, Mo, Ru, Co, Al, or a combination thereof. For example, the metal plug may include Cu. The conductive barrier film may include a TiN film, a TaN film, a Co film, or a combination thereof. For example, when the metal plug includes Cu, the conductive barrier film may include a multilayer structure including a TaN film and a Co film, but is not limited thereto.

[0133] Thereafter, the metal-containing conductive layer may be planarized so that a top surface of the upper insulating film 140 is exposed, and thus, a plurality of upper metal wiring structures 180 may be formed from the metal-containing conductive layer.

[0134] Figure 21 is a plan view illustrating a method of manufacturing an IC device according to an example embodiment. Figure 21 Description of manufacturing Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 An example of a method for an IC device 200A is shown. Figure 21 In the drawings, the same reference numerals are used to denote Figures 1A to 20C The same elements are shown in FIG. 1 and their detailed description is omitted.

[0135] refer to Figure 21 , you can execute the reference Figures 11A to 14B However, in reference Figure 13A and Figure 13BIn the process described above, a photoresist pattern RP2A may be formed instead of the photoresist pattern RP. A plurality of second openings H2A may be formed in the photoresist pattern RP2A. The plurality of second openings H2A may be positioned to correspond to the plurality of conductive contact plugs to be formed on the plurality of lower metal wiring layers 130 (refer to FIG. Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 In the first lateral direction (X direction), a planar dimension (XY planar dimension) of each of the plurality of second openings H2A may be smaller than a planar dimension (XY planar dimension) of each of the plurality of conductive contact plugs 280C.

[0136] When viewed from above (on the XY plane), each of the plurality of second openings H2A formed in the photoresist pattern RP2A may be formed in a direction selected from the second lateral direction (Y direction) and a direction opposite to the second lateral direction (Y direction) (e.g., by Figure 21 In the direction indicated by the arrow A2 in FIG) from a pair of lower line side walls (reference Figure 3C and Figure 4 130S in) is shifted to a position with a distance greater than 0.

[0137] Afterwards, according to the reference Figure 14A and Figure 14B Similar to the process described above, the inorganic hard mask layer can be etched by using the photoresist pattern RP2A as an etching mask (refer to Figure 13A and Figure 13B 160 in the middle) to form an inorganic hard mask pattern 160P. Therefore, the plurality of second openings H2A can extend to a space passing through the inorganic hard mask pattern 160P in the vertical direction (Z direction), and the planarized hard mask layer 150 can be exposed through the plurality of second openings H2A. Thereafter, Figure 21 The resulting structure performs a reference Figures 15A to 20C The described process can therefore produce reference Figure 3A 、 Figure 3B 、 Figure 3C and Figure 4 An IC device 200A is described.

[0138] Figure 22 is a plan view of a method of manufacturing an IC device according to an example embodiment. Figure 22 Described Figure 5A and Figure 5B An example of a method for manufacturing an IC device is shown in FIG. Figure 22 In the drawings, the same reference numerals are used to denote Figures 1A to 21The same elements are shown in FIG. 1 and their detailed description is omitted.

[0139] refer to Figure 22 , you can execute the reference Figures 11A to 14B However, in reference Figure 13A and Figure 13B In the process described above, a photoresist pattern RP2B may be formed instead of the photoresist pattern RP. A plurality of second openings H2B may be formed in the photoresist pattern RP2B. The plurality of second openings H2BA may be positioned to correspond to the plurality of first conductive contact plugs to be formed on the plurality of lower metal wiring layers 130 (refer to FIG. Figure 5A and Figure 5B 280C1) and a plurality of second conductive contact plugs (reference Figure 5A and Figure 5B A planar dimension (XY planar dimension) of each of the plurality of second openings H2B in the first lateral direction (X direction) may be smaller than a planar dimension (XY planar dimension) of each of the plurality of first conductive contact plugs 280C1 and the plurality of second conductive contact plugs 280C2.

[0140] When viewed from above (on the XY plane), each of some of the plurality of second openings H2B formed in the photoresist pattern RP2B may be formed in a direction opposite to the second lateral direction (Y direction) (eg, by Figure 22 In the direction indicated by the arrow A2A in FIG), a pair of lower wire sidewalls (reference Figure 5B When viewed from above (on the XY plane), each of some other second openings among the plurality of second openings H2B formed in the photoresist pattern RP2B may be formed in a second lateral direction (Y direction) (e.g., by Figure 22 In the direction indicated by the arrow A2B in FIG), a pair of lower wire side walls (reference Figure 5B 130S in) is shifted to a position with a distance greater than 0.

[0141] Subsequently, according to the reference Figure 14A and Figure 14B Similar to the process described above, the inorganic hard mask layer can be etched by using the photoresist pattern RP2B as an etching mask (refer to Figure 13A and Figure 13B160 in the middle) to form an inorganic hard mask pattern 160P. As a result, a plurality of second openings H2B may extend to a space passing through the inorganic hard mask pattern 160P in the vertical direction (Z direction), and the planarized hard mask layer 150 may be exposed through the plurality of second openings H2B. Thereafter, Figure 22 The resulting structure performs a reference Figures 15A to 20C The described process can therefore produce reference Figure 5A and Figure 5B The IC device 200B is described.

[0142] Although referenced Figures 11A to 22 Describes the manufacturing Figures 1A to 5B The method of the IC devices 100, 200A and 200B shown in FIG, but it will be understood that it is possible to modify the referenced IC devices 100, 200A and 200B within the scope of the inventive concept. Figures 11A to 22 The described process can be used with various modifications and variations to produce Figures 6A to 10 The IC devices 300, 400, and 500 shown in FIG. 1 and IC devices having various modified structures.

[0143] While the inventive concept has been particularly shown and described with reference to certain example embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.

[0144] CROSS-REFERENCE TO RELATED APPLICATIONS

[0145] This application is based on and claims the benefit of priority from Korean Patent Applications Nos. 10-2024-0025306 and 10-2024-0050914 filed on February 21, 2024, and April 16, 2024, in the Korean Intellectual Property Office, the disclosures of which are incorporated herein in their entirety by reference.

Claims

1. An integrated circuit device comprising: a lower insulating film on the substrate; a lower metal wiring layer passing through the lower insulating film and extending longitudinally in a first lateral direction; an upper insulating film on the lower insulating film and the lower metal wiring layer; an upper metal wiring layer extending longitudinally in a second lateral direction on the upper insulating film, wherein the second lateral direction is perpendicular to the first lateral direction; as well as a conductive contact plug penetrating the upper insulating film in a vertical direction, the conductive contact plug contacting each of the lower metal wiring layer and the upper metal wiring layer, wherein the conductive contact plug has a quadrilateral shape when viewed from above, The conductive contact plug includes a pair of first contact sidewalls opposite to each other in the first lateral direction and a pair of second contact sidewalls opposite to each other in the second lateral direction, Each of the pair of first contact sidewalls extends from an upper line sidewall of the upper metal wiring layer to the lower metal wiring layer in the vertical direction, and At least one of the pair of second contact side walls extends from the bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined with respect to the vertical direction.

2. The integrated circuit device according to claim 1, wherein The upper metal wiring layer and the conductive contact plug have the same width in the first lateral direction, The width of each of the upper metal wiring layer and the conductive contact plug in the first lateral direction is constant in the vertical direction, and The width of the conductive contact plug in the second lateral direction gradually decreases toward the lower metal wiring layer.

3. The integrated circuit device according to claim 1, wherein: When viewed from above, Each of the pair of first contact sidewalls of the conductive contact plug extends along an extension line of a first straight line, and the upper line sidewall of the upper metal wiring layer in the first lateral direction extends along the extension line of the first straight line, and Each of the pair of second contact sidewalls of the conductive contact plug extends along an extension line of a second straight line, and a lower line sidewall of the lower metal wiring layer in the second lateral direction extends along the extension line of the second straight line.

4. The integrated circuit device according to claim 1, wherein: When viewed from above, a planar shape of the conductive contact plug is the same as a planar shape of a region of the lower metal wiring layer that overlaps the upper metal wiring layer in the vertical direction.

5. The integrated circuit device according to claim 1, wherein: The conductive contact plug includes a main contact portion covering a top surface of the lower metal wiring layer and a protruding contact portion covering a sidewall of the lower metal wiring layer, the protruding contact portion being located between the lower metal wiring layer and the lower insulating film.

6. The integrated circuit device according to claim 1, wherein: When viewed from above, Each of the pair of first contact sidewalls of the conductive contact plug extends on an extension line of a first straight line, and the upper line sidewall of the upper metal wiring layer in the second lateral direction extends along the extension line of the first straight line, and At a position shifted from the lower line side wall of the lower metal wiring layer by a first distance greater than 0 in a selected direction among the second lateral direction and a direction opposite to the second lateral direction, each of the pair of second contact side walls of the conductive contact plug extends on an extension line of a second straight line, the extension line of the second straight line extends in the first lateral direction, and the lower line side wall of the lower metal wiring layer extends in the first lateral direction.

7. The integrated circuit device according to claim 1, wherein: The conductive contact plug is integrally connected to the upper metal wiring layer.

8. The integrated circuit device according to claim 1, further comprising: an etching stopper film between the lower insulating film and the upper insulating film, A portion of the conductive contact plug passes through the etching stop film.

9. An integrated circuit device comprising: a lower insulating film on the substrate; a first lower metal wiring layer and a second lower metal wiring layer, each passing through the lower insulating film and extending longitudinally in a first lateral direction, the first lower metal wiring layer and the second lower metal wiring layer being separated from each other in a second lateral direction, the second lateral direction being perpendicular to the first lateral direction; an upper insulating film on each of the lower insulating film, the first lower metal wiring layer, and the second lower metal wiring layer; a first upper metal wiring layer and a second upper metal wiring layer on the upper insulating film, the first upper metal wiring layer and the second upper metal wiring layer overlapping with the first lower metal wiring layer and the second lower metal wiring layer in a vertical direction and extending longitudinally in the second lateral direction, and the first upper metal wiring layer and the second upper metal wiring layer being separated from each other in the first lateral direction; a first conductive contact plug passing through the upper insulating film in the vertical direction, the first conductive contact plug contacting each of the first lower metal wiring layer and the first upper metal wiring layer; as well as a second conductive contact plug passing through the upper insulating film in the vertical direction, the second conductive contact plug contacting each of the second lower metal wiring layer and the second upper metal wiring layer, wherein each of the first conductive contact plug and the second conductive contact plug has a quadrilateral shape when viewed from above, Each of the first conductive contact plug and the second conductive contact plug includes a pair of first contact sidewalls and a pair of second contact sidewalls, the pair of first contact sidewalls being opposite to each other in the first lateral direction, and the pair of second contact sidewalls being opposite to each other in the second lateral direction. In each of the first conductive contact plug and the second conductive contact plug, each of the pair of first contact sidewalls extends in the vertical direction from a corresponding one of a pair of upper line sidewalls of a corresponding one of the first upper metal wiring layer and the second upper metal wiring layer extending in the second lateral direction to a corresponding one of the first lower metal wiring layer and the second lower metal wiring layer, and In each of the first conductive contact plug and the second conductive contact plug, at least one of the pair of second contact side walls extends from the bottom surface of a corresponding one of the first upper metal wiring layer and the second upper metal wiring layer toward a corresponding one of the first lower metal wiring layer and the second lower metal wiring layer in a direction inclined relative to the vertical direction.

10. The integrated circuit device according to claim 9, wherein A width of each of the first conductive contact plug and the second conductive contact plug in the first lateral direction is constant in the vertical direction, and A width of each of the first conductive contact plug and the second conductive contact plug in the second lateral direction gradually decreases toward the substrate.

11. The integrated circuit device according to claim 9, wherein: When viewed from above, in each of the first conductive contact plug and the second conductive contact plug, Each of the pair of first contact sidewalls extends along an extension line of a first straight line, and a corresponding one of the upper line sidewalls of the corresponding one of the first upper metal wiring layer and the second upper metal wiring layer extends along the extension line of the first straight line. Each of the pair of second contact sidewalls extends along an extension line of a second straight line, and a corresponding one of the lower line sidewalls of the corresponding one of the first lower metal wiring layer and the second lower metal wiring layer extends along the extension line of the second straight line.

12. The integrated circuit device according to claim 9, wherein: When viewed from above, The planar shape of the first conductive contact plug is the same as the planar shape of a region where the first lower metal wiring layer overlaps with the first upper metal wiring layer in the vertical direction, and The planar shape of the second conductive contact plug is the same as the planar shape of a region where the second lower metal wiring layer overlaps the second upper metal wiring layer in the vertical direction.

13. The integrated circuit device according to claim 9, wherein: At least one of the first conductive contact plug or the second conductive contact plug covers a top surface and a sidewall of a corresponding one of the first lower metal wiring layer and the second lower metal wiring layer.

14. The integrated circuit device according to claim 9, wherein: When viewed from above, in each of the first conductive contact plug and the second conductive contact plug, Each of the pair of first contact side walls extends along an extension line of a first straight line, a corresponding one of the upper line side walls of the corresponding one of the first upper metal wiring layer and the second upper metal wiring layer extends along the extension line of the first straight line, and The pair of second contact side walls extend on the extension line of the second straight line at a position shifted by a first distance greater than 0 from the lower line side wall of the corresponding one of the first lower metal wiring layer and the second lower metal wiring layer in a direction selected from the second lateral direction and a direction opposite to the second lateral direction, and the lower line side wall of the corresponding one of the first lower metal wiring layer and the second lower metal wiring layer extends in the first lateral direction.

15. An integrated circuit device comprising: a lower structure on a substrate; a lower insulating film on the lower structure; a lower metal wiring layer passing through the lower insulating film and extending longitudinally in a first lateral direction; an upper insulating film on the lower insulating film and the lower metal wiring layer, the upper insulating film defining a line space and a via space connected to the line space, the via space extending from the line space to the lower metal wiring layer in a vertical direction; an upper metal wiring layer filling the line space, the upper metal wiring layer extending longitudinally in a second lateral direction, the second lateral direction being perpendicular to the first lateral direction; as well as a conductive contact plug filling the via space and contacting each of the lower metal wiring layer and the upper metal wiring layer, wherein the upper metal wiring layer includes a portion extending from the top surface of the upper insulating film to the top surface of the conductive contact plug in the vertical direction, The conductive contact plug has a quadrilateral shape when viewed from above, The conductive contact plug includes a pair of first contact sidewalls and a pair of second contact sidewalls, the pair of first contact sidewalls being opposite to each other in the first lateral direction and facing the upper insulating film, and the pair of second contact sidewalls being opposite to each other in the second lateral direction and facing the upper insulating film. each of the pair of first contact sidewalls extends in the vertical direction from a corresponding one of a pair of upper line sidewalls included in the upper metal wiring layer adjacent thereto, the pair of upper line sidewalls being opposed to each other in the first lateral direction, to the lower metal wiring layer; and At least one of the pair of second contact side walls extends from the bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined with respect to the vertical direction.

16. The integrated circuit device according to claim 15, wherein The upper metal wiring layer and the conductive contact plug have the same width in the first lateral direction, The width of each of the upper metal wiring layer and the conductive contact plug in the first lateral direction is constant in the vertical direction, and The width of the conductive contact plug in the second lateral direction gradually decreases toward the lower metal wiring layer.

17. A method of manufacturing an integrated circuit device, the method comprising: forming a lower insulating film and a lower metal wiring layer on a substrate, the lower metal wiring layer passing through the lower insulating film and extending longitudinally along a first lateral direction on the substrate; as well as forming an upper metal wiring structure on the lower insulating film and the lower metal wiring layer, The upper metal wiring structure includes an upper metal wiring layer and a conductive contact plug, wherein the upper metal wiring layer extends longitudinally along a second lateral direction on the lower insulating film and the lower metal wiring layer, and the conductive contact plug is integrally connected to the upper metal wiring layer and contacts the lower metal wiring layer, wherein the second lateral direction is perpendicular to the first lateral direction. The conductive contact plug has a quadrilateral shape when viewed from above, The conductive contact plug includes a pair of first contact sidewalls and a pair of second contact sidewalls, the pair of first contact sidewalls being opposite to each other in the first lateral direction, and the pair of second contact sidewalls being opposite to each other in the second lateral direction, each of the pair of first contact sidewalls extends in a vertical direction from a corresponding one of a pair of upper line sidewalls of the upper metal wiring layer to the lower metal wiring layer, the pair of upper line sidewalls of the upper metal wiring layer being opposite to each other in the first lateral direction, and At least one of the pair of second contact side walls extends from the bottom surface of the upper metal wiring layer toward the lower metal wiring layer in a direction inclined with respect to the vertical direction.

18. The method according to claim 17, wherein The formation of the upper metal wiring structure is performed so that the upper metal wiring layer and the conductive contact plug have the same width in the first lateral direction, and the width of each of the upper metal wiring layer and the conductive contact plug in the first lateral direction is constant in the vertical direction.

19. The method according to claim 17, wherein The forming of the upper metal wiring structure includes forming the conductive contact plug such that a width of the conductive contact plug in the second lateral direction gradually decreases toward the lower metal wiring layer.

20. The method according to claim 17, wherein The forming of the upper metal wiring structure includes forming the conductive contact plug so that a planar shape of the conductive contact plug is the same as a planar shape of a region of the lower metal wiring layer overlapping the upper metal wiring layer in the vertical direction.

Images