Wafer gap vertex position determination method, device, equipment, medium and product

Abstract

The invention discloses a wafer gap vertex position determination method, device and equipment, a medium and a product, and relates to the technical field of wafer calibration. The method comprises the following steps: acquiring a first area image, a second area image and a third area image of a wafer gap; identifying a first convex defect containing a first inflection point from the first gap contour of the first region image based on the convex defect geometric feature, and identifying a second convex defect containing a second inflection point from the third gap contour of the third region image; and according to the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect, determining the position of a vertex in the second gap contour of the second area image. According to the method for determining the peak position of the wafer gap, the accuracy of the peak position of the wafer gap can be improved.

Description

Technical Field

[0001] The present application belongs to the field of wafer calibration technology, and in particular relates to a method, device, equipment, medium and product for determining the position of the vertex of a wafer notch. Background Art

[0002] During the semiconductor integrated circuit manufacturing process, when performing defect detection on unpatterned wafers, the translational and rotational errors generated during wafer transfer are not taken into account, resulting in errors in wafer position during each defect detection. It is worth noting that unpatterned wafers usually have a specific mark - the wafer notch. This wafer notch plays a key role in assisting positioning during the wafer positioning process. The position information of the wafer notch is crucial for accurately correcting the position and rotation angle of the wafer. Therefore, it is necessary to correct the position and angle of the wafer based on the position of the wafer notch vertex after the wafer is transferred.

[0003] Currently, by finding the place with the largest curvature in the wafer notch profile, the midpoint of the line connecting the inflection points on both sides of the wafer notch profile with the largest curvature is determined as the wafer notch vertex position.

[0004] However, this method is greatly affected by the wafer notch contour. When there is interference in the wafer notch contour, the point with maximum curvature is not necessarily the position corresponding to the wafer notch vertex, resulting in low accuracy of the wafer notch vertex position. Summary of the Invention

[0005] The embodiments of the present application provide a method, device, equipment, medium and product for determining the position of the vertex of a wafer notch, which can improve the accuracy of the position of the vertex of the wafer notch.

[0006] According to a first aspect of an embodiment of the present application, a method for determining a wafer notch vertex position is provided, the method comprising:

[0007] Acquire a first region image, a second region image, and a third region image of the wafer notch, wherein the first region image includes a first inflection point, the second region image includes a vertex of the wafer notch, and the third region image includes a second inflection point, the first inflection point and the second inflection point being inflection points on both sides of the vertex and farthest from the vertex on the wafer notch contour, and the vertex being the point on the wafer notch contour closest to the center of the wafer;

[0008] Based on the geometric features of the convex defect, a first convex defect including a first inflection point is identified from a first notch contour in the first region image, and a second convex defect including a second inflection point is identified from a third notch contour in the third region image, where the first notch contour and the third notch contour are local contours of the wafer notch contour in the first region image and the third region image, respectively;

[0009] According to the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect, the position of the vertex is determined from the second notch contour of the second area image, where the second notch contour is a local contour of the wafer notch contour in the second area image.

[0010] According to a second aspect of an embodiment of the present application, there is provided a device for determining a wafer notch vertex position, the device comprising:

[0011] An image acquisition module is used to acquire a first region image, a second region image, and a third region image of the wafer notch, wherein the first region image includes a first inflection point, the second region image includes a vertex of the wafer notch, and the third region image includes a second inflection point, wherein the first inflection point and the second inflection point are inflection points on both sides of the vertex on the wafer notch contour and are farthest from the vertex, and the vertex is the point on the wafer notch contour closest to the center of the wafer;

[0012] a convex defect recognition module, configured to recognize, based on geometric features of the convex defect, a first convex defect including a first inflection point from a first notch contour in a first region image, and to recognize a second convex defect including a second inflection point from a third notch contour in a third region image, wherein the first notch contour and the third notch contour are local contours of the wafer notch contour in the first region image and the third region image, respectively;

[0013] A position determination module is used to determine the position of the vertex from the second notch contour of the second area image based on the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect, where the second notch contour is a local contour of the wafer notch contour in the second area image.

[0014] According to a third aspect of an embodiment of the present application, an electronic device is provided, comprising: a memory and a program or instruction stored in the memory and executable on a processor, wherein when the program or instruction is executed by the processor, a method for determining the position of the vertex of a wafer notch as provided in any one of the above-mentioned embodiments of the present application is implemented.

[0015] According to a fourth aspect of the embodiments of the present application, a readable storage medium is provided, on which a program or instruction is stored. When the program or instruction is executed by a processor, a method for determining the position of the vertex of a wafer notch as provided in any aspect of the above-mentioned embodiments of the present application is implemented.

[0016] According to a fifth aspect of the embodiments of the present application, a computer program product is provided. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for determining the position of the vertex of a wafer notch provided in any aspect of the above-mentioned embodiments of the present application.

[0017] In the method for determining the vertex position of the wafer notch provided in the embodiment of the present application, the first area image, the second area image and the third area image of the wafer notch are first obtained to quickly locate the approximate position of the wafer notch in the wafer. Then, the first convex defect containing the first inflection point is identified from the first notch outline of the first area image, and the second convex defect containing the second inflection point is identified from the third notch outline of the third area image. In this way, the convex defects formed by the inflection points on both sides of the wafer notch can be accurately found. Thus, based on the first convex defect and the second convex defect, the vertex position of the wafer notch can be accurately determined from the second notch outline of the second area image. In summary, the present application adopts the method of convex defect detection to determine the vertex position of the wafer notch, and uses convex defects to accurately determine the inflection points on both sides of the wafer notch, so that it can be unaffected by the wafer outline and can improve the accuracy of the vertex position of the wafer notch. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 is a schematic diagram of a wafer notch profile provided by one embodiment of the present application;

[0020] Figure 2 1 is a flow chart of a method for determining a wafer notch vertex position provided by an embodiment of the present application;

[0021] Figure 3 is a schematic diagram of a first convex defect provided by an embodiment of the present application;

[0022] Figure 4 is a schematic diagram of a second convex defect provided by an embodiment of the present application;

[0023] Figure 5 This is a schematic diagram of the perpendicular median line of the target line provided by an embodiment of the present application;

[0024] Figure 6 1 is a schematic structural diagram of a device for determining the position of a wafer notch vertex provided by one embodiment of the present application;

[0025] Figure 7 This is a structural diagram of a device for determining the position of the wafer notch vertex provided in one embodiment of the present application. DETAILED DESCRIPTION

[0026] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present application by illustrating the examples of the present application.

[0027] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.

[0028] It should be noted that the acquisition, storage, use, and processing of data in the technical solution of this application comply with the relevant provisions of national laws and regulations.

[0029] It should be noted that in the embodiments of the present application, certain software, components, models and other existing solutions in the industry may be mentioned. They should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.

[0030] During semiconductor integrated circuit manufacturing, defect inspection of unpatterned wafers fails to account for translational and rotational errors during wafer transport, resulting in deviations in wafer position during each inspection. It is worth noting that unpatterned wafers often have a unique marking, a wafer notch, which serves as a key aid in wafer alignment.

[0031] like Figure 1As shown, a schematic diagram of the wafer notch profile is provided. A wafer notch refers to a small cut or groove on the edge of a wafer, which is used to identify the direction of the wafer. It often has multiple wafer notch elements such as a vertex 101, a first inflection point 102, and a second inflection point 103. The position information of the wafer notch, especially the vertex position, is of great significance for accurately correcting the wafer position and rotation angle. Therefore, after the wafer is transferred, the position and angle of the wafer should be quickly corrected based on the position of the wafer notch vertex.

[0032] Currently, by finding the place with the largest curvature in the wafer notch profile, the midpoint of the line connecting the inflection points on both sides of the wafer notch profile with the largest curvature is determined as the wafer notch vertex position.

[0033] However, this method relies too much on the integrity and regularity of the wafer notch profile, e.g. Figure 1 As shown in the figure, when there are interferences or irregularities in the wafer notch profile, the wafer notch profile will no longer be a smooth curve. In this case, the point of maximum curvature may deviate from the actual wafer notch vertex position. This results in low accuracy in determining the wafer notch vertex position, which in turn affects the subsequent wafer position and angle correction process. Specifically, this inaccuracy may cause alignment errors in the wafer during subsequent processing, thereby affecting the accuracy and yield of chip manufacturing.

[0034] The purpose of the present application is to provide a method, device, equipment, medium and product for determining the vertex position of a wafer notch. In the method for determining the vertex position of a wafer notch provided in an embodiment of the present application, firstly, the first area image, the second area image and the third area image of the wafer notch are obtained, and the approximate position of the wafer notch in the wafer is quickly located. Then, a first convex defect containing a first inflection point is identified from the first notch contour of the first area image, and a second convex defect containing a second inflection point is identified from the third notch contour of the third area image. In this way, the convex defects formed by the inflection points on both sides of the wafer notch can be accurately found. Thus, based on the first convex defect and the second convex defect, the vertex position of the wafer notch can be accurately determined from the second notch contour of the second area image. In summary, the present application adopts a convex defect detection method to determine the vertex position of the wafer notch, and uses convex defects to accurately determine the inflection points on both sides of the wafer notch, so that it can be unaffected by the wafer contour and can improve the accuracy of the vertex position of the wafer notch.

[0035] The following describes specific embodiments of the method, device, equipment, medium, and product for determining the wafer notch vertex position provided by the embodiments of the present application. The following first introduces the method for determining the wafer notch vertex position.

[0036] Figure 2A flow chart of a method for determining a wafer notch vertex position is provided. The method for determining a wafer notch vertex position can be applied to a server side and can include the following steps S201 to S203.

[0037] S201, obtaining the first area image, the second area image and the third area image of the wafer notch, wherein the first area image includes the first inflection point, the second area image includes the vertex of the wafer notch, and the third area image includes the second inflection point. The first inflection point and the second inflection point are inflection points on both sides of the vertex on the wafer notch contour and are farthest from the vertex. The vertex is the point on the wafer notch contour closest to the center position of the wafer.

[0038] In this embodiment, if Figure 1 As shown, the wafer notch is parabolic in shape. The first area image includes a first inflection point 102 on the wafer notch contour that is located on one side of the vertex and is farthest from the vertex. The second area image includes the vertex 101. The third area image includes a second inflection point 103 on the wafer notch contour that is located on the other side of the vertex and is farthest from the vertex.

[0039] As an example, the server first obtains three area images of the wafer notch. Specifically, the server controls the image acquisition device to move to the notch outline area of ​​the wafer notch, thereby capturing the first area image, the second area image, and the third area image.

[0040] The image acquisition device can be a high-resolution industrial camera equipped with an appropriate light source to ensure image clarity. The first and third region images correspond to the inflection points on either side of the notch vertex, respectively, while the second region image corresponds to the vertex region. This high-magnification, zoned acquisition method allows for more precise capture of key features of the wafer notch, minimizing the influence of the overall contour on vertex location determination.

[0041] S202, based on the geometric features of the convex defect, identify a first convex defect including a first inflection point from the first notch contour of the first area image, and identify a second convex defect including a second inflection point from the third notch contour of the third area image, the first notch contour and the third notch contour are local contours of the wafer notch contour in the first area image and the third area image, respectively.

[0042] In this embodiment, the convex defect geometric feature refers to a feature of a protruding geometric shape formed on the wafer notch contour. Specifically, image processing techniques such as edge detection and shape analysis can be used to identify and extract the convex defect.

[0043] The first and second inflection points represent points on the first and third notch profiles, respectively, where the slopes of the tangent lines on either side have opposite signs, meaning the direction of the tangent lines changes significantly at these points. In other words, when the curve transitions from concave to convex, or vice versa, this transition point is an inflection point.

[0044] The first notch contour is used to characterize a local contour of the wafer notch contour in the first region image, and the third notch contour is used to characterize a local contour of the wafer notch contour in the third region image.

[0045] The first convex defect is a convex defect formed by the first inflection point, that is, there must be an endpoint in the first convex defect that is the first inflection point; the second convex defect is a convex defect formed by the second inflection point, that is, there must be an endpoint in the second convex defect that is the second inflection point.

[0046] like Figure 3 As shown, a schematic diagram of a first convex defect is provided. The first inflection point 102 is connected to the boundary endpoint 302 of the first notch profile closest to the wafer notch vertex, forming a convex hull closed figure, namely the first convex defect 301. The line connecting the first inflection point 102 and the boundary endpoint 302 of the first notch profile closest to the wafer notch vertex is the convex hull 303 of the first convex defect 301.

[0047] like Figure 4 As shown, a schematic diagram of a second convex defect is provided. The second inflection point 103 is connected to the boundary endpoint 402 on the side of the third notch profile closest to the wafer notch vertex, forming a convex hull closed figure, namely the second convex defect 401. The line connecting the second inflection point 103 and the boundary endpoint 402 on the side of the third notch profile closest to the wafer notch vertex is the convex shell 303 of the second convex defect 401.

[0048] As an example, the server screens out first and second convex defects based on their geometric features. Specifically, the acquired first and third region images are preprocessed, including binarization and morphological opening operations, to remove noise and enhance edge features. The first and third notch outlines are then extracted from the processed first and third region images.

[0049] Then, using image processing algorithms such as edge detection and contour tracking, a first convex defect consisting of a first inflection point is identified from the first region image, and a second convex defect consisting of a second inflection point is identified from the third region image.

[0050] S203, determining the position of the vertex from the second notch contour of the second region image according to the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect, where the second notch contour is a local contour of the wafer notch contour in the second region image.

[0051] In this embodiment, the second notch contour is used to represent a local contour of the wafer notch contour in the second region image.

[0052] As an example, the server first determines the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect based on the identified first convex defect and the second convex defect.

[0053] Then, based on the positions of the two inflection points, the vertex position is determined from the second notch contour of the second region image. Specifically, the perpendicular bisector of the line connecting the two inflection points can be calculated, and then the intersection of the perpendicular bisector and the second notch contour of the second region image can be found and determined as the vertex position.

[0054] In the method for determining the vertex position of the wafer notch provided in this embodiment, the first area image, the second area image and the third area image of the wafer notch are first obtained to quickly locate the approximate position of the wafer notch in the wafer. Then, the first convex defect containing the first inflection point is identified from the first notch outline of the first area image, and the second convex defect containing the second inflection point is identified from the third notch outline of the third area image. In this way, the convex defects formed by the inflection points on both sides of the wafer notch can be accurately found. Therefore, based on the first convex defect and the second convex defect, the vertex position of the wafer notch can be accurately determined from the second notch outline of the second area image. In summary, the present application adopts the method of convex defect detection to determine the vertex position of the wafer notch, and uses convex defects to accurately determine the inflection points on both sides of the wafer notch, so that it can be unaffected by the wafer outline and can improve the accuracy of the vertex position of the wafer notch.

[0055] As an optional embodiment, S202 may specifically include:

[0056] extracting a first notch contour and a third notch contour from the first region image and the third region image, respectively, based on contour information of each edge contour in the first region image and the third region image, wherein the contour information includes at least one of a contour position, a contour shape, and a contour length;

[0057] identifying at least one convex defect from the first notch profile and identifying at least one convex defect from the third notch profile;

[0058] According to the convex defect information of the first notch profile, a first convex defect is screened out from the convex defects of the first notch profile, and according to the convex defect information of the third notch profile, a second convex defect is screened out from the convex defects of the third notch profile, where the convex defect information includes at least one of a convex defect area, a convex defect depth, and a convex defect length.

[0059] In this embodiment, an edge detection algorithm, such as the Canny algorithm or the Sobel algorithm, can be used to extract the wafer notch contour. However, due to noise, multiple edge contours may be detected in the region image. Therefore, it is necessary to combine the contour position, shape, and length information to accurately extract the wafer notch contour.

[0060] For example, first, the wafer notch outline is generally a curve shape; second, the outline position of the wafer notch outline generally starts from a certain edge of the image and ends at another edge, and will not suddenly appear in the middle; finally, the wafer notch outline should be a longer edge outline in the regional image.

[0061] When identifying convex defects, contour analysis techniques, such as the Douglas-Peucker algorithm, can be used to detect convex defects on the contour. However, due to noise, multiple convex defects may exist in the wafer notch contour. Therefore, it is necessary to combine the convex defect area, convex defect depth, and convex defect length to accurately extract the convex defects formed by the inflection points on both sides of the wafer notch.

[0062] For example, the convex defects formed by the inflection points on both sides of the wafer notch are generally the convex defects with the largest convex defect area, the deepest convex defect depth and the longest convex defect length.

[0063] As an example, the server first uses a high-resolution camera to capture an image of the wafer notch area. It then uses the Canny edge detection algorithm to extract edge contours. It then pre-defines contour filtering conditions based on the contour's position, shape, and length. This filtering condition is then used to select the first and third notch contours from each edge contour.

[0064] Next, the Douglas-Peucker algorithm is applied to identify convex defects in the first and third notch profiles. Finally, convex defect conditions are preset based on the convex defect area, convex defect depth, and convex defect length, and the first and second convex defects are selected from the convex defects using the convex defect conditions.

[0065] This embodiment first accurately extracts the notch contour by analyzing edge profile information, reducing interference in subsequent processing. Then, multiple convex defects are identified on the notch contour, expanding the candidate range. Finally, the geometric features of the convex defects are used for screening, accurately locating convex defects containing inflection points. This not only improves the accuracy of inflection point identification but also enhances the algorithm's robustness to wafer contour interference, providing a reliable foundation for subsequent determination of the wafer notch vertex position.

[0066] As an optional embodiment, screening out the first convex defect from the convex defects of the first notch profile according to the convex defect information of the first notch profile may specifically include:

[0067] Obtaining candidate inflection points on the first notch contour;

[0068] The candidate inflection point farthest from the vertex is determined as the first inflection point;

[0069] Selecting candidate convex defects including a first inflection point from the convex defects of the first notch profile;

[0070] The candidate convex defect with the largest convex defect area, the deepest convex defect depth or the longest convex defect length is determined as the first convex defect.

[0071] In this embodiment, the candidate inflection points are all inflection points included in the first notch profile, and the candidate convex defects are convex defects including the first inflection point among the convex defects of the first notch profile.

[0072] The convex defect area refers to the area occupied by the convex defect in the image plane, usually measured in pixels. A larger area indicates a wider spatial range of the convex defect on the contour, reflecting a more significant concave feature.

[0073] The depth of a convex defect is a metric that describes the degree of concavity of a convex defect. It can generally be measured by calculating the longest distance from the convex defect area to the corresponding position of the convex hull of the contour. The deeper the depth, the greater the degree of concavity of the convex defect in the direction perpendicular to the contour, that is, the more obvious the concavity.

[0074] The convex defect length refers to the extension length of the convex defect along the contour. It can be determined by measuring the length of the convex defect boundary along the contour direction. The longer the length, the wider the distribution range of the convex defect along the contour.

[0075] As an example, the server first calculates the curvature of each point on the first notch contour, sets a curvature threshold, and uses points whose absolute curvature value is greater than the threshold as candidate inflection points.

[0076] Then, for each candidate inflection point, calculate the Euclidean distance between it and the vertex. Euclidean distance is the straight-line distance between two points on a plane. It is calculated by taking the square root of the sum of the squares of the differences between the coordinates of the candidate inflection point and the vertex. Among all candidate inflection points, find the one farthest from the vertex and determine it as the first inflection point.

[0077] Next, a convex hull algorithm (such as the Graham scanning algorithm or the Jarvis stepping algorithm) is used to detect the convex hull of the first notch contour. Subsequently, by comparing the relationship between the points on the contour and the convex hull, the concave region on the contour located within the convex hull, i.e., the convex defect, is identified. For each detected convex defect, a determination is made as to whether the first inflection point lies within the region of the convex defect. This can be achieved by determining whether the coordinates of the first inflection point satisfy the region bounded by the convex defect boundary. Convex defects containing the first inflection point are then selected as candidate convex defects.

[0078] Finally, for each candidate convex defect, the polygon area calculation formula (such as the Shoelace formula) can be used to calculate its area; or the longest distance algorithm from the point to the corresponding position of the convex hull can be used to calculate the depth of the candidate convex defect; or along the contour direction, starting from a boundary point of the candidate convex defect, traverse the points on the contour in sequence until reaching another boundary point, calculate the number of contour points passed or calculate the path length according to the coordinates of the point, as the length of the candidate convex defect.

[0079] The candidate convex defects are sorted by area, depth or length respectively, and the candidate convex defect with the largest area, deepest depth or longest length is selected as the first convex defect.

[0080] Through this embodiment, the first convex defect is accurately determined through a series of steps, which can more accurately capture the key features of the contour, thereby providing a reliable basis for the subsequent determination of the wafer notch vertex position.

[0081] As an optional embodiment, S203 may specifically include:

[0082] Identifying a first position of a first inflection point in a reference coordinate system of the wafer notch from the first convex defect, and identifying a second position of a second inflection point in the reference coordinate system from the second convex defect;

[0083] The position of the vertex in the reference coordinate system is determined from the second notch contour of the second region image according to the first position and the second position.

[0084] In this embodiment, the reference coordinate system refers to a reference coordinate system used to locate the positions of various points on the wafer. For example, the reference coordinate system can be constructed with the center of the wafer as the origin, the horizontal rightward direction as the positive horizontal axis, and the vertical upward direction as the positive vertical axis. Alternatively, the reference coordinate system can be constructed with any feature point in any of the first, second, and third region images as the origin, the horizontal rightward direction as the positive horizontal axis, and the vertical upward direction as the positive vertical axis.

[0085] The first position is the coordinate position of the first inflection point in the reference coordinate system, and the second position is the coordinate position of the second inflection point in the reference coordinate system.

[0086] As an example, the server converts the inflection point positions of the identified first and second convex defects into a reference coordinate system, obtaining the first position of the first inflection point in the wafer notch reference coordinate system and the second position of the second inflection point in the wafer notch reference coordinate system. Specifically, this step involves converting between the image coordinate system and the reference coordinate system. Using a pre-established coordinate conversion relationship, the pixel coordinates in the image are converted to actual physical coordinates on the wafer. This conversion ensures the accuracy and consistency of the positional information, providing the foundation for subsequent vertex positioning.

[0087] Then, based on the first position and the second position, the vertex position is determined from the second notch contour of the second region image. Specifically, the perpendicular bisector of the line connecting the two inflection points can be calculated, and then the intersection of the perpendicular bisector and the second notch contour of the second region image can be found and determined as the vertex position.

[0088] Through this embodiment, the positions of the first and second inflection points are accurately identified, and the vertex position is determined based on this position information, which can more accurately describe the shape and position of the wafer notch and improve the accuracy of the wafer notch vertex position.

[0089] As an optional embodiment, identifying a first position of a first inflection point in a reference coordinate system of a wafer notch from the first convex defect may specifically include:

[0090] Obtain a third position of the first inflection point in the image coordinate system of the first region image;

[0091] Based on the conversion relationship between the image coordinate system and the reference coordinate system, the third position is converted into the first position.

[0092] In this embodiment, the third position is the coordinate position of the first inflection point in the image coordinate system of the first region image.

[0093] As an example, the server can use an edge detection algorithm (such as the Canny algorithm) to identify the outline of the first convex defect in the first area image, and then locate the first inflection point in the first convex defect through curvature analysis or a corner detection algorithm (such as Harris corner detection), thereby obtaining the third position of the first inflection point in the image coordinate system of the first area image.

[0094] Then, a mapping relationship is established between the image coordinate system of the first region image and the reference coordinate system. Specifically, the camera is first calibrated using a calibration plate or markers at known locations to obtain the camera's intrinsic and extrinsic parameter matrices. The corresponding relationship is then established using feature points on the wafer (such as other markers at known locations). Based on the camera's intrinsic and extrinsic parameter matrices and the corresponding relationship, a mathematical model such as an affine transformation or perspective transformation is used to describe the mapping relationship between the image coordinate system of the first region image and the reference coordinate system.

[0095] Finally, according to the mapping relationship between the image coordinate system of the first region image and the reference coordinate system, the third position of the first inflection point in the image coordinate system is converted to the first position of the first inflection point in the reference coordinate system.

[0096] This embodiment first determines the position of the first inflection point in the image coordinate system of the first region image, and then uses a coordinate system transformation relationship to convert it to the reference coordinate system, thereby solving the technical problem of determining the first position of the first inflection point in the reference coordinate system of the wafer notch. In this way, using image processing and coordinate system transformation techniques, the position information in the image can be accurately converted to the actual wafer coordinate system, improving the accuracy of determining the wafer notch vertex position.

[0097] As an optional embodiment, determining the position of the vertex in the reference coordinate system from the second notch contour in the second region image according to the first position and the second position may specifically include:

[0098] Determine a perpendicular midline of a target connecting line between the first inflection point and the second inflection point based on the first position and the second position;

[0099] The position of the target pixel point with the smallest distance from the perpendicular bisector among the pixel points of the second notch contour of the second region image in the reference coordinate system is determined as the position of the vertex in the reference coordinate system.

[0100] In this embodiment, the server first determines the perpendicular bisector of the target line connecting the first and second inflection points based on the first and second positions. Specifically, the coordinate difference between the first and second inflection points is calculated to obtain the distance between the two points. Based on the distance between the two points, the coordinates of the midpoint of the target line connecting the first and second inflection points are then determined. The negative reciprocal of the coordinate difference between the first and second inflection points is then used as the slope of the perpendicular bisector. Finally, the perpendicular bisector equation is constructed using the midpoint coordinates and slope.

[0101] Then, traverse each pixel point of the second notch outline in the second area image, calculate the distance between each pixel point and the perpendicular bisector, and record the pixel point with the smallest distance as the vertex of the wafer notch, thereby obtaining the position of the vertex of the wafer notch in the reference coordinate system.

[0102] Through this embodiment, the present application can accurately locate the vertex of the wafer notch in the presence of noise and contour irregularities. Compared with traditional methods, this application does not rely on calculating the curvature of the entire wafer contour. Instead, it uses two convex defects to infer the vertex position, greatly improving the accuracy and robustness of positioning. In addition, since only the pixels in the second region image need to be processed, the amount of calculation is significantly reduced, improving processing efficiency.

[0103] As an optional embodiment, determining the perpendicular bisector of the target connecting line between the first inflection point and the second inflection point according to the first position and the second position may specifically include:

[0104] Determining a target line connecting the first inflection point and the second inflection point and a midpoint position of the target line based on the first position and the second position;

[0105] Determine the slope of the perpendicular bisector based on the slope of the target line;

[0106] According to the midpoint position and the slope of the perpendicular bisector, a perpendicular bisector is constructed between the target lines of the first inflection point and the second inflection point.

[0107] In this embodiment, if Figure 5 As shown, a schematic diagram of the perpendicular bisector of the target line is provided. The server side first determines the target line 501 between the first inflection point 102 and the second inflection point 103 and the midpoint position 502 of the target line 501. Specifically, the target line 501 can be represented by a two-point straight line equation, that is, y=k1x+b, where k1 is the slope of the target line 501 and b is the y-intercept. The slope k1 can be calculated by (y2-y1) / (x2-x1), where (x1, y1) and (x2, y2) are the coordinates of the first inflection point 102 and the second inflection point 103, respectively. The midpoint position 502 can be calculated by ((x1+x2) / 2, (y1+y2) / 2).

[0108] Then, the slope of perpendicular bisector 503 is determined based on the slope of target line 501. Specifically, perpendicular bisector 503 is perpendicular to target line 501, so the product of their slopes is -1. If the slope of target line 501 is k, the slope of perpendicular bisector 503 is -1 / k.

[0109] Finally, using the midpoint position 502 and the slope of the perpendicular bisector 503, the perpendicular bisector 503 of the target line 501 connecting the first inflection point 102 and the second inflection point 103 is constructed. Specifically, the perpendicular bisector 503 can be expressed using the point-slope straight line equation y-y0=k2(x-x0), where (x0, y0) are the midpoint coordinates and k2 is the slope of the perpendicular bisector 503.

[0110] Through this embodiment, geometric calculations are performed based on the two determined inflection point positions, which does not directly rely on the contour information in the image. Therefore, the midline can be determined more stably and accurately, thereby improving the positioning accuracy of the wafer notch vertex position.

[0111] As an optional embodiment, S201 may specifically include:

[0112] Controlling the image acquisition device to move to the notch outline area of ​​the wafer notch;

[0113] Taking the first boundary point in the wafer notch contour area as the image acquisition starting point, controlling the image acquisition device to sequentially move a preset step length in the direction of the second boundary point to perform image acquisition until the wafer notch contour area is traversed, the first boundary point and the second boundary point being two boundary points in the wafer notch contour area located on the wafer notch contour;

[0114] The first region image, the second region image, and the third region image acquired by the image acquisition device are acquired.

[0115] In this embodiment, the server first uses an image processing algorithm to analyze the entire wafer image, determines the wafer center position through edge detection and circle fitting algorithms, and obtains a preset orientation relationship between the wafer notch and the wafer center position. The preset orientation relationship is used to represent the relative position between the wafer notch and the wafer center position preset before the wafer is transferred. For example, the preset orientation relationship can be that the wafer notch is located at 270° in a polar coordinate system with the wafer center as the origin.

[0116] The server then sends a control signal to control the movement of the image acquisition device. Specifically, the image acquisition device is first controlled to move to the center of the wafer, and then moves according to a preset orientation until the notch outline area of ​​the wafer notch begins to appear in the image acquisition device's field of view.

[0117] Then, after the notch contour area begins to appear in the field of view of the image acquisition device, the image acquisition device takes the first boundary point in the wafer notch contour area as the image acquisition starting point, and first acquires the image of the first area; then, after moving a preset step length in the direction of the second boundary point, the image of the second area is acquired; then, after continuing to move a preset step length in the direction of the second boundary point, the image of the third area is acquired.

[0118] Among them, the preset step size of the movement can be determined according to the size of the image, so that the first area image and the third area image constitute a complete graphic of the notch contour area of ​​the wafer notch, and the second area image includes half of the first area image on the side close to the wafer notch vertex, and half of the third area image on the side close to the wafer notch vertex.

[0119] Through this embodiment, the first area image, the second area image and the third area image captured by the image acquisition device in the notch contour area are obtained, and the original low-magnification image is replaced with a high-magnification image, which can improve the image accuracy and thus improve the accuracy of the wafer notch vertex position.

[0120] As an optional embodiment, after S201, the method for determining the wafer notch vertex position further includes:

[0121] performing binarization processing and morphological opening operation processing on the first region image, the second region image, and the third region image, respectively, to obtain a first processed image, a second processed image, and a third processed image;

[0122] S202 may specifically include:

[0123] A first convex defect including a first inflection point is identified from a first notch contour of the first processed image, and a second convex defect including a second inflection point is identified from a third notch contour of the third processed image.

[0124] In this embodiment, the server first obtains three images captured by an image capture device within the notch outline area. Specifically, a high-resolution camera or dedicated image capture device can be used to capture images within the pre-set notch outline area. During the capture process, factors such as lighting conditions and focus adjustment can be considered to ensure clear original images.

[0125] Next, the captured image is binarized. Various algorithms can be used for binarization, such as global thresholding and adaptive thresholding. Choosing the appropriate binarization method is crucial for subsequent processing, as it directly impacts the quality of the gap outline extraction. For example, based on the image's grayscale histogram, an optimal threshold can be selected for binarization, converting the image to black and white to highlight the gap outline.

[0126] Finally, the binary image is subjected to a morphological opening operation. This opening operation, consisting of an erosion followed by a dilation operation, removes small objects and noise while preserving the shape of larger objects. In practice, an appropriately sized structuring element can be selected for the opening operation based on the characteristic size of the wafer notch to achieve optimal denoising results.

[0127] This embodiment introduces binarization and morphological opening, significantly improving the image quality of the wafer notch region. Compared to directly using the original image, this method more effectively removes noise and irrelevant details, highlighting the key features of the notch outline. This not only improves the accuracy of subsequent vertex position determination but also enhances the robustness of the algorithm, enabling it to adapt to wafer images under different lighting conditions and surface conditions. Furthermore, because the processed image is clearer and more regular, the probability of misjudgment and misidentification can be reduced, thereby helping to improve the efficiency and quality of subsequent processing and inspection steps.

[0128] Based on the method for determining the position of the vertex of the wafer notch, the present application also provides a specific embodiment of the device for determining the position of the vertex of the wafer notch.

[0129] like Figure 6 As shown, the device 600 for determining the wafer notch vertex position provided in the embodiment of the present application includes an image acquisition module 610 , a convex defect recognition module 620 and a position determination module 630 .

[0130] An image acquisition module 610 is configured to acquire a first region image, a second region image, and a third region image of the wafer notch, wherein the first region image includes a first inflection point, the second region image includes a vertex of the wafer notch, and the third region image includes a second inflection point. The first and second inflection points are inflection points on either side of the vertex of the wafer notch contour and are farthest from the vertex. The vertex is the point on the wafer notch contour closest to the center of the wafer.

[0131] a convex defect recognition module 620 for identifying, based on geometric features of the convex defects, a first convex defect including a first inflection point from a first notch contour in the first region image, and identifying a second convex defect including a second inflection point from a third notch contour in the third region image, where the first notch contour and the third notch contour are local contours of the wafer notch contour in the first region image and the third region image, respectively;

[0132] The position determination module 630 is used to determine the position of the vertex from the second notch contour of the second area image based on the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect. The second notch contour is a local contour of the wafer notch contour in the second area image.

[0133] As an optional embodiment, the convex defect recognition module 620 specifically includes the following units:

[0134] a contour extraction unit, configured to extract a first gap contour and a third gap contour from the first region image and the third region image, respectively, based on contour information of each edge contour in the first region image and the third region image, wherein the contour information includes at least one of a contour position, a contour shape, and a contour length;

[0135] a convex defect recognition unit, configured to recognize at least one convex defect from the first notch profile and at least one convex defect from the third notch profile;

[0136] The convex defect screening unit is used to screen out a first convex defect from the convex defects of the first notch profile based on the convex defect information of the first notch profile, and to screen out a second convex defect from the convex defects of the third notch profile based on the convex defect information of the third notch profile, where the convex defect information includes at least one of a convex defect area, a convex defect depth, and a convex defect length.

[0137] As an optional embodiment, the convex defect screening unit is specifically used to:

[0138] Obtaining candidate inflection points on the first notch contour;

[0139] The candidate inflection point farthest from the vertex is determined as the first inflection point;

[0140] Selecting candidate convex defects including a first inflection point from the convex defects of the first notch profile;

[0141] The candidate convex defect with the largest convex defect area, the deepest convex defect depth or the longest convex defect length is determined as the first convex defect.

[0142] As an optional embodiment, the location determination module 630 specifically includes the following units:

[0143] an inflection point identification unit, configured to identify a first position of a first inflection point in a reference coordinate system of the wafer notch from the first convex defect, and to identify a second position of a second inflection point in the reference coordinate system from the second convex defect;

[0144] The position determining unit is configured to determine the position of the vertex in the reference coordinate system from the second notch contour of the second region image according to the first position and the second position.

[0145] As an optional embodiment, the inflection point identification unit is specifically configured to:

[0146] Obtain a third position of the first inflection point in the image coordinate system of the first region image;

[0147] Based on the conversion relationship between the image coordinate system and the reference coordinate system, the third position is converted into the first position.

[0148] As an optional embodiment, the position determination unit is specifically configured to:

[0149] Determine a perpendicular midline of a target connecting line between the first inflection point and the second inflection point based on the first position and the second position;

[0150] The position of the target pixel point with the smallest distance from the perpendicular bisector among the pixel points of the second notch contour of the second region image in the reference coordinate system is determined as the position of the vertex in the reference coordinate system.

[0151] As an optional embodiment, the image acquisition module 610 includes the following units:

[0152] An equipment moving unit, used for controlling the image acquisition equipment to move to a notch contour area of ​​the wafer notch;

[0153] An image acquisition unit is configured to use a first boundary point in the wafer notch contour area as an image acquisition starting point, control the image acquisition device to sequentially move a preset step length in the direction of the second boundary point, and then perform image acquisition until the wafer notch contour area is traversed, wherein the first boundary point and the second boundary point are two boundary points in the wafer notch contour area located on the wafer notch contour;

[0154] The image acquisition unit is used to acquire the first region image, the second region image and the third region image acquired by the image acquisition device.

[0155] As an optional embodiment, after acquiring the first region image, the second region image, and the third region image of the wafer notch, the apparatus 600 for determining the vertex position of the wafer notch further includes the following modules:

[0156] an image processing module, configured to perform binarization processing and morphological opening operation processing on the first region image, the second region image, and the third region image, respectively, to obtain a first processed image, a second processed image, and a third processed image;

[0157] The convex defect recognition module 620 is specifically used to:

[0158] A first convex defect including a first inflection point is identified from a first notch contour of the first processed image, and a second convex defect including a second inflection point is identified from a third notch contour of the third processed image.

[0159] Based on the method for determining the position of the vertex of the wafer notch, the present application also provides a specific embodiment of the device for determining the position of the vertex of the wafer notch.

[0160] Figure 7A schematic diagram of the hardware structure of a device for determining the wafer notch vertex position provided in an embodiment of the present application is shown.

[0161] The device for determining the wafer notch vertex position may include a processor 701 and a memory 702 storing computer program instructions.

[0162] Specifically, the processor 701 may include a central processing unit (CPU), or an application-specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0163] The memory 702 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 702 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 702 may include removable or non-removable (or fixed) media. Where appropriate, the memory 702 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 702 is a non-volatile solid-state memory.

[0164] The processor 701 reads and executes computer program instructions stored in the memory 702 to implement any one of the methods for determining the position of the wafer notch vertex in the above embodiments.

[0165] In one example, the device for determining the wafer notch vertex position may further include a communication interface 703 and a bus 710. Figure 7 As shown, the processor 701, the memory 702, and the communication interface 703 are connected via a bus 710 and communicate with each other.

[0166] The communication interface 703 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0167] Bus 710 includes hardware, software or both, and the parts of the determination equipment of wafer notch vertex position are coupled to each other.For example, and not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industry standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industry standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 710 may include one or more buses. Although the present application embodiment describes and shows specific bus, the application considers any suitable bus or interconnection.

[0168] In addition, in conjunction with the method for determining the wafer notch vertex position in the above-mentioned embodiments, embodiments of the present application may provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by a processor, any of the methods for determining the wafer notch vertex position in the above-mentioned embodiments is implemented.

[0169] In addition, in combination with the method for determining the position of the vertex of the wafer notch in the above-mentioned embodiments, the embodiments of the present application may provide a computer program product for implementation. When the instructions in the computer program product are executed by the processor of an electronic device, the electronic device executes the method for determining the position of the vertex of the wafer notch provided in any aspect of the above-mentioned embodiments of the present application.

[0170] It should be understood that the present application is not limited to the specific configurations and processes described above and illustrated in the figures. For the sake of brevity, a detailed description of known methods is omitted here. In the above embodiments, several specific steps are described and illustrated as examples. However, the method process of the present application is not limited to the specific steps described and illustrated. Those skilled in the art can make various changes, modifications, and additions, or change the order of the steps after understanding the spirit of the present application.

[0171] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROMs, flash memories, erasable ROMs (EROMs), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0172] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps. In other words, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0173] Aspects of the present disclosure have been described above with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit. It is also understood that each box in the block diagram and / or flowchart and the combination of the boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs the specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0174] The above description is only a specific embodiment of the present application. Those skilled in the art will clearly understand that for the convenience and brevity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the scope of protection of the present application.

Claims

1. A method for determining the position of a wafer notch vertex, characterized in that: The method comprises: Acquire a first region image, a second region image, and a third region image of the wafer notch, wherein the first region image includes a first inflection point, the second region image includes a vertex of the wafer notch, and the third region image includes a second inflection point, the first inflection point and the second inflection point being inflection points on both sides of the vertex on the wafer notch contour and farthest from the vertex, and the vertex being the point on the wafer notch contour closest to the center of the wafer; Based on the convex defect geometric features, a first convex defect including the first inflection point is identified from a first notch contour in the first regional image, and a second convex defect including the second inflection point is identified from a third notch contour in the third regional image, where the first notch contour and the third notch contour are local contours of the wafer notch contour in the first regional image and the third regional image, respectively; According to the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect, the position of the vertex is determined from the second notch contour of the second area image, where the second notch contour is a local contour of the wafer notch contour in the second area image.

2. The method according to claim 1, characterized in that The step of identifying a first convex defect including the first inflection point from a first notch contour of the first region image and identifying a second convex defect including the second inflection point from a third notch contour of the third region image based on the convex defect geometric features includes: extracting the first notch contour and the third notch contour from the first region image and the third region image, respectively, based on contour information of each edge contour in the first region image and the third region image, wherein the contour information includes at least one of a contour position, a contour shape, and a contour length; identifying at least one convex defect from the first notch profile, and identifying at least one convex defect from the third notch profile; According to the convex defect information of the first notch profile, a first convex defect is screened out from the convex defects of the first notch profile, and according to the convex defect information of the third notch profile, a second convex defect is screened out from the convex defects of the third notch profile, wherein the convex defect information includes at least one of a convex defect area, a convex defect depth, and a convex defect length.

3. The method according to claim 2, characterized in that The step of selecting a first convex defect from the convex defects of the first notch profile according to the convex defect information of the first notch profile includes: Obtaining candidate inflection points on the first notch contour; Determine the candidate inflection point farthest from the vertex as the first inflection point; Selecting candidate convex defects including the first inflection point from the convex defects of the first notch profile; The candidate convex defect with the largest convex defect area, the deepest convex defect depth, or the longest convex defect length is determined as the first convex defect.

4. The method according to claim 1, wherein The determining the position of the vertex from the second notch contour of the second region image according to the position of the first inflection point in the first convex defect and the position of the second inflection point in the second convex defect includes: Identifying, from the first convex defect, a first position of the first inflection point in a reference coordinate system of the wafer notch, and identifying, from the second convex defect, a second position of the second inflection point in the reference coordinate system; The position of the vertex in the reference coordinate system is determined from a second notch contour in the second region image according to the first position and the second position.

5. The method according to claim 4, characterized in that The step of identifying, from the first convex defect, a first position of the first inflection point in a reference coordinate system of the wafer notch includes: Acquire a third position of the first inflection point in the image coordinate system of the first region image; The third position is converted into the first position based on a conversion relationship between the image coordinate system and the reference coordinate system.

6. The method according to claim 4, characterized in that Determining the position of the vertex in the reference coordinate system from a second notch outline in the second region image according to the first position and the second position includes: Determine a perpendicular midline of a target connecting line between the first inflection point and the second inflection point based on the first position and the second position; The position of the target pixel point with the smallest distance from the perpendicular bisector among the pixel points of the second notch contour of the second region image in the reference coordinate system is determined as the position of the vertex in the reference coordinate system.

7. The method according to any one of claims 1 to 6, characterized in that The step of acquiring the first region image, the second region image, and the third region image of the wafer notch includes: Control the image acquisition device to move to the wafer notch outline area; Taking a first boundary point in the wafer notch contour area as an image acquisition starting point, controlling the image acquisition device to sequentially move a preset step length in the direction of a second boundary point to perform image acquisition until the wafer notch contour area is traversed, the first boundary point and the second boundary point being two boundary points in the wafer notch contour area located on the wafer notch contour; The first region image, the second region image, and the third region image acquired by the image acquisition device are acquired.

8. The method according to any one of claims 1 to 6, characterized in that: After acquiring the first region image, the second region image, and the third region image of the wafer notch, the method further includes: performing binarization processing and morphological opening operation processing on the first region image, the second region image, and the third region image, respectively, to obtain a first processed image, a second processed image, and a third processed image; The step of identifying a first convex defect including the first inflection point from the first notch contour of the first region image, and identifying a second convex defect including the second inflection point from the third notch contour of the third region image, comprises: A first convex defect including the first inflection point is identified from the first notch contour of the first processed image, and a second convex defect including the second inflection point is identified from the third notch contour of the third processed image.

9. An electronic device, characterized in that: The device includes: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method for determining the wafer notch vertex position as described in any one of claims 1 to 8 is implemented.

10. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for determining the wafer notch vertex position as described in any one of claims 1 to 8.

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