Fan control circuit of server and server

Abstract

This application discloses a fan control circuit for a server and a server in general. The fan control circuit includes a processor, a multiplexer, and a control module. The control module includes a variable resistor and a pulse generator. The processor is connected to both the multiplexer and the variable resistor, and the pulse generator is also connected to both the variable resistor and the multiplexer. The multiplexer is also connected to the fan. The processor sends a first control signal to the multiplexer and determines the resistance value of the variable resistor based on the first control signal. The pulse generator outputs a second control signal based on the resistance value of the variable resistor. The multiplexer controls the fan based on the first control signal when the processor is working normally, and controls the fan based on the second control signal when the processor malfunctions. This application enables stable fan speed control even when the processor malfunctions, thereby controlling the overall system temperature.

Description

Technical Field

[0001] This application relates to the field of computer server technology, and in particular to a fan control circuit for a server and a server. Background Technology

[0002] An edge microserver is a small, low-power server device deployed at the network edge, focusing on providing computing, storage, and networking services close to the data source or end user. Its core objectives are to reduce latency, improve response speed, reduce bandwidth consumption, and support real-time data processing, making it suitable for scenarios such as the Internet of Things (IoT), the Industrial Internet, and smart cities. In its design, edge microservers often use processors to control system power-on / off and status monitoring, fan control, and heater control, in order to balance cost. In extreme cases, such as processor failure, the fans may not be effectively controlled, leading to an increase in overall system temperature and potentially irreversible damage to components.

[0003] To solve this problem, traditional technologies typically use three controllers. The first controller reads the current temperature and transmits the current temperature and fan control strategy to the third controller. The third controller controls the fan speed according to the first controller's control strategy. When the first controller malfunctions, the third controller can directly read the sensor's temperature and control the fan accordingly.

[0004] However, in traditional technology, if the second controller fails, it will directly affect the temperature readings of the first and third controllers. Therefore, in traditional technology, when one of the processors fails, the fan cannot be effectively controlled. Summary of the Invention

[0005] This application provides a fan control circuit and a server to solve the problem in related technologies where the fan cannot be effectively controlled when the processor malfunctions, leading to an increase in the overall temperature of the machine.

[0006] This application provides a fan control circuit for a server, including a processor, a multiplexer, and a control module. The control module includes a variable resistor and a pulse generator. The processor is connected to both the multiplexer and the variable resistor. The pulse generator is connected to both the variable resistor and the multiplexer. The multiplexer is also connected to a fan.

[0007] The processor is used to send a first control signal to the multiplexer and determine the resistance value of the variable resistor based on the first control signal;

[0008] The pulse generator is used to output a second control signal based on the resistance value of the variable resistor;

[0009] The multiplexer is used to control the fan according to a first control signal when the processor is working normally, and to control the fan according to a second control signal when the processor is malfunctioning.

[0010] In one embodiment, the processor's pulse signal pin is connected to the first channel of the multiplexer, and the pulse generator's output pin is connected to the second channel of the multiplexer.

[0011] In one embodiment, the pulse generator is a 555 timer, a variable resistor is connected to the discharge pin of the 555 timer, and the variable resistor is also connected to the threshold pin of the 555 timer through a voltage divider resistor.

[0012] In one embodiment, the processor is configured to determine the resistance value of the variable resistor based on a first control signal and a voltage divider resistor.

[0013] In one embodiment, the circuit also includes a watchdog chip, wherein,

[0014] The processor is also used to send pulse signals to the watchdog chip;

[0015] Watchdog chips are used to monitor the processor's status based on pulse signals. When a processor abnormality is detected, a reset signal is sent to the processor's reset pin.

[0016] In one embodiment, the processor's reset pin is connected to the channel selection pin of a multiplexer. The multiplexer is used to control the fan speed according to a first control signal when the reset signal is invalid, and to control the fan speed according to a second control signal when the reset signal is valid.

[0017] In one embodiment, the processor is also configured to configure the resistance value of the variable resistor into the register of the variable resistor.

[0018] In one embodiment, the processor is further configured to, when the first control signal changes, redetermine the resistance value of the variable resistor according to the new first control signal, and update the redetermined resistance value to the register of the variable resistor.

[0019] In one embodiment, the control module further includes a counter and a NAND gate connected to the counter. The clock signal of the counter is connected to the reset pin of the processor, the output of the counter is connected to the input of the NAND gate, and the output of the NAND gate is connected to the power supply chip.

[0020] This application also provides a server, including a fan and a fan control circuit for any of the above-described servers.

[0021] This application enables a dual control mechanism: a processor generates a first control signal, and a pulse generator generates a second control signal. When the processor is functioning normally, it directly controls the fan; in case of an anomaly, it automatically switches to the second control signal, ensuring stable fan operation under all conditions and preventing fan stoppage due to processor failure, thus improving server heat dissipation reliability. Furthermore, this application allows for synchronous adjustment of a variable resistor based on the first control signal during normal processor operation. The pulse generator determines the second control signal based on the variable resistor's resistance, ensuring a high degree of consistency between the second and first control signals. When the processor malfunctions, the multiplexer automatically switches to the second control signal to control the fan. Because the first and second control signals are consistent, this application ensures control continuity and consistency, achieving seamless transition of fan control logic from normal to abnormal states, preventing fan control interruptions or parameter abrupt changes due to processor failure, and guaranteeing stable heat dissipation. Attached Figure Description

[0022] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 A schematic diagram of a fan control circuit for a server provided in an embodiment of this application;

[0024] Figure 2 A schematic diagram of a fan control circuit for another server provided in an embodiment of this application;

[0025] Figure 3 This is a circuit diagram of the protection power supply chip provided in an embodiment of this application. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0027] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0028] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] Embodiments of this application provide a fan control circuit for a server, such as... Figure 1 As shown, the system includes a processor, a multiplexer, and a control module. The control module includes a variable resistor and a pulse generator. The processor is connected to both the multiplexer and the variable resistor. The pulse generator is also connected to both the variable resistor and the multiplexer. The multiplexer is also connected to a fan. The processor sends a first control signal to the multiplexer and determines the resistance value of the variable resistor based on the first control signal. The pulse generator outputs a second control signal based on the resistance value of the variable resistor. The multiplexer controls the fan based on the first control signal when the processor is working normally, and controls the fan based on the second control signal when the processor malfunctions.

[0030] The definition of a multiplexer (MUX) is as follows: A multiplexer is another name for a data selector. In the process of transmitting multiple data streams, a circuit that can select any one of them as needed is called a data selector, also known as a multiplexer or multiplexer switch.

[0031] A pulse generator is a system used to generate signals, an instrument that produces electrical test signals with required parameters.

[0032] A variable resistor is a resistor whose resistance can be adjusted, used in situations where it is necessary to regulate the circuit current or change the circuit resistance. In this application, the variable resistor can be a DigiPOT (Digital Potentiometer).

[0033] In this application, the multiplexer can select the control signal according to the processor's operating status. When the processor is working normally, the first control signal is used to control the fan; when the processor is malfunctioning, it automatically switches to the second control signal to ensure that the fan does not stop working.

[0034] The processor can be an MCU (Micro Controller Unit), a CPLD (Complex Programmable Logic Device), or another processor. On one hand, the processor sends a first control signal to the multiplexer; on the other hand, it determines the resistance value of the variable resistor based on the first control signal and adjusts the variable resistor to achieve the corresponding resistance value, preparing backup control in case of processor malfunction.

[0035] The control module is primarily responsible for generating the second control signal and other control mechanisms. The control module includes a variable resistor and a pulse generator. The resistance of the variable resistor can be adjusted by the processor, and its change affects the output of the pulse generator. The pulse generator generates the second control signal based on the real-time resistance value of the variable resistor, serving as a backup control signal in case of processor malfunction. The second control signal is indirectly obtained from the first control signal; therefore, the second control signal and the first control signal can maintain consistency in certain parameters, such as the high-level duration or duty cycle. Thus, controlling the fan through the second control signal ensures the consistency and stability of fan control.

[0036] Specifically, during normal operation, the processor reads the temperature value from the temperature sensor, generates a first control signal based on this value, and transmits the first control signal to the multiplexer via channel A. The multiplexer then controls the fan speed according to the first control signal. Simultaneously, based on the parameters of the first control signal, the processor calculates the resistance value of the variable resistor and adjusts it to achieve the desired resistance.

[0037] Furthermore, when the processor malfunctions (such as crashing or powering down) and can no longer output the first control signal, the multiplexer automatically detects the processor abnormality and switches to the path of the second control signal. Since the processor has previously adjusted the resistance of the variable resistor to match the first control signal, the pulse generator can use this resistance value to output a second control signal that matches the first control signal. This second control signal is then transmitted to channel B of the multiplexer, which in turn continues to control the fan according to the second control signal, ensuring that the fan operates as originally planned and preventing heat dissipation interruption.

[0038] In one embodiment, please continue to refer to Figure 1 The processor's pulse signal pin is connected to the first channel of the multiplexer, and the pulse generator's output pin is connected to the second channel of the multiplexer.

[0039] Among them, the processor's pulse signal pin refers to the pin on the processor specifically used to output pulse signals, which can generate pulse electrical signals of a specific frequency and width.

[0040] The first channel of a multiplexer refers to the first input channel of the multiplexer, such as... Figure 1 Channel A in the multiplexer is used to receive external signals. The second channel of the multiplexer refers to the second input channel on the multiplexer, such as... Figure 1 Channel B, located alongside the first channel, is used to receive another external signal.

[0041] Specifically, the processor connects the signal to the first channel of the multiplexer via its pulse signal pin, and the pulse generator connects the signal to the second channel of the multiplexer via its output pin. The multiplexer can then select one of the channels for output as needed.

[0042] In one embodiment, such as Figure 2 As shown, the pulse generator is a 555 timer, and the variable resistor is connected to the discharge pin of the 555 timer (e.g. Figure 2 The variable resistor is connected to pin 7 of the timer, and is also connected to the threshold pin of the 555 timer (e.g., via a voltage divider resistor). Figure 2 Connect to pin 6 in the middle.

[0043] Wherein, the voltage divider resistor is Figure 2 In this context, RB represents the resistance of the variable resistor. Figure 2 In this context, RA refers to a voltage divider resistor. A voltage divider resistor is a resistor element used for voltage division. By connecting it in series with other resistors, it proportionally distributes the input voltage to produce the desired output voltage value. Its function is to adjust the voltage signal in the circuit to meet the operating requirements of subsequent components.

[0044] The discharge pin of the 555 timer is the pin in the pulse generator used to release the charge from energy storage components (such as capacitors). During pulse generation, when it is necessary to end a pulse cycle or reset the circuit, this pin will turn on, allowing components such as capacitors to discharge quickly in preparation for the next pulse cycle.

[0045] The threshold pin of the pulse generator is used to set the trigger threshold voltage of the pulse generator. When the voltage input to this pin reaches the set threshold, the pulse generator will trigger a specific action (such as starting to output pulses, changing the pulse frequency, etc.). The operating parameters of the pulse generator can be changed by adjusting the voltage of this pin.

[0046] Furthermore, pin 3 of the 555 timer is an output pin, used to output the generated second control signal to channel B of the multiplexer.

[0047] This application connects a variable resistor to the discharge pin of a 555 timer, allowing adjustment of the discharge rate of the energy storage element, thereby changing the pulse width or period. The variable resistor is also connected to the threshold pin of the 555 timer via a voltage divider; changing the threshold voltage adjusts the triggering conditions of the pulse generator, indirectly altering parameters such as the pulse frequency.

[0048] The beneficial effect of this embodiment is that it can flexibly and accurately control key parameters such as the width, period, and frequency of the pulse output by the pulse generator by adjusting the variable resistor, so that the pulse generator can output a signal that matches the first control signal, and continue to control the fan through the second control signal when the processor is abnormal.

[0049] In one embodiment, the processor is configured to determine the resistance value of the variable resistor based on a first control signal and a voltage divider resistor.

[0050] The duty cycle of the first control signal refers to the proportion of the time the signal is at a high level (or effective level) within a pulse signal cycle, which is usually expressed as a percentage.

[0051] Specifically, the formula for determining the resistance value of the variable resistor based on the first control signal and the voltage divider resistors is as follows:

[0052] TH = 0.693 * (RA + RB) * C;

[0053] Where TH is the duration of the high level of the first control signal, RA is the resistance value of the variable resistor, RB is the resistance value of the voltage divider resistor, and C is... Figure 1 The capacitor C1 in the middle.

[0054] Furthermore, the pulse generator is used to output a second control signal based on the resistance value of the variable resistor. Specifically, the high-level duration of the second control signal is determined based on the resistance value of the variable resistor and the voltage divider resistor, the low-level duration of the second control signal is determined based on the voltage divider resistor and the capacitor C, and then the duty cycle of the second control signal is determined based on the high-level and low-level durations. The second control signal is then output based on the duty cycle of the second control signal. The relationship between the low-level duration of the second control signal and the voltage divider resistor is as follows:

[0055] TL = 0.693 * RB * C;

[0056] Where TL is the low-level duration, RB is the voltage divider resistor, and C is... Figure 1 The capacitor C1 in the middle.

[0057] In one embodiment, such as Figure 2As shown, the circuit also includes a watchdog chip, wherein the processor is also used to send pulse signals to the watchdog chip, and the watchdog chip is used to monitor the status of the processor according to the pulse signals. When an abnormality is detected in the processor, a reset signal is sent to the processor's reset pin.

[0058] A watchdog chip, also known as a watchdog timer, is a timer circuit that typically has one input and one output. The input is called the "feed the dog," and the output is usually connected to the reset pin of another part, typically a microcontroller. The watchdog's function is to periodically check the internal state of the chip and send a reset signal to the chip if an error occurs. Watchdog commands have the highest priority in program interrupts.

[0059] The reset pin is used to receive an external reset signal. When this signal is received, the processor will terminate all current operations, restore to the initial state, and restart operation.

[0060] In this application, the processor needs to periodically send pulse signals to the watchdog chip. The watchdog chip continuously monitors this pulse signal. If it receives the signal on time, it means that the processor is operating normally. If it does not receive the signal for a long time (i.e., the processor is abnormal, such as crashing or program crashing), the watchdog chip will send a reset signal to the processor's reset pin. Specifically, the watchdog chip can pull the reset signal low to force the processor to restart.

[0061] The beneficial effect of this embodiment is that when the processor crashes or freezes due to an unexpected error, the watchdog chip can automatically detect and force it to reset, preventing the system from being paralyzed for a long time, thereby reducing the duration of the fault and ensuring that the device can quickly return to normal operation.

[0062] In one embodiment, such as Figure 2 As shown, the processor's reset pin is connected to the channel selection pin of the multiplexer. The multiplexer is used to control the fan speed according to the first control signal when the reset signal is invalid, and to control the fan speed according to the second control signal when the reset signal is valid.

[0063] When the reset signal is invalid, i.e. the processor is running normally and no reset is triggered, the multiplexer adjusts the fan speed according to the first control signal.

[0064] When the reset signal is valid, i.e. the processor is forcibly reset and in the abnormal recovery phase, the multiplexer switches to another mode and adjusts the fan speed according to the second control signal.

[0065] like Figure 2As shown, assuming the reset signal is active low, when the processor is working normally, the reset signal output by the watchdog chip is high. At this time, the channel selection pin of the multiplexer is high, and thus the A channel of the multiplexer is turned on. The multiplexer adjusts the fan speed according to the first control signal.

[0066] When the processor malfunctions, the watchdog chip can detect the malfunction and output a low-level reset signal. At this time, the channel selection pin of the multiplexer is low, and the B channel of the multiplexer is turned on. The multiplexer adjusts the fan speed according to the second control signal.

[0067] The beneficial effect of this embodiment is that when the processor is abnormally reset, the fan automatically switches to speed regulation by the second control signal, which solves the problem in the traditional technology that when the processor is abnormal, the fan cannot be effectively controlled, resulting in an increase in the temperature of the whole machine.

[0068] In one embodiment, the processor is also configured to configure the resistance value of the variable resistor into the register of the variable resistor.

[0069] The register is a storage unit inside the variable resistor used to store the resistance value parameter.

[0070] Specifically, the processor can generate a corresponding digital control signal based on the calculated resistance value of the variable resistor, and transmit the generated digital signal to the register of the variable resistor. The variable resistor automatically adjusts its actual resistance value according to the resistance parameter stored in the register, thus completing the configuration.

[0071] The advantage of this embodiment is that the processor can directly set the resistance value of the variable resistor through software instructions, without the need for manual adjustment, thus improving the convenience of resistance adjustment.

[0072] In one embodiment, the processor is further configured to, when the first control signal changes, redetermine the resistance value of the variable resistor according to the new first control signal, and update the redetermined resistance value to the register of the variable resistor.

[0073] In this application, when the first control signal changes, the processor recalculates the resistance value of the variable resistor based on the new first control signal and updates the new resistance value in the register of the variable resistor, so that the actual resistance value of the variable resistor changes with the change of the first control signal.

[0074] The beneficial effect of this embodiment is that it can ensure real-time response to changes in the first control signal, and by quickly updating the resistance value of the variable resistor, it can achieve linkage control of subsequent pulse generators, fans, etc., making the control of the entire circuit more flexible and timely.

[0075] In one embodiment, the processor is connected to the variable resistor via a serial communication bus. This serial communication bus can be an I²C (Inter-Integrated Circuit) bus.

[0076] In this application, the resistance value of the variable resistor is configured into the register of the variable resistor via a serial communication bus.

[0077] In one embodiment, such as Figure 3 As shown, the control module also includes a counter and a NAND gate connected to the counter. The clock signal of the counter is connected to the reset pin of the processor, the output of the counter is connected to the input of the NAND gate, and the output of the NAND gate is connected to the power chip (the power chip of the motherboard).

[0078] A counter is an electronic component that counts input signals (usually clock signals), records the number of pulse signals, and outputs a specific signal when a preset value is reached. Specifically, counters can be 2-bit, 4-bit, or other bit-based counters; no specific limitation is made here.

[0079] A NAND gate is a basic logic circuit with multiple inputs and one output. The output is low only when all inputs are high; otherwise, the output is high.

[0080] The enable pin of a power chip is a control pin on the power chip. It controls whether the power chip works by inputting a specific signal. When a valid signal (such as a high level) is received, the power chip outputs voltage normally; when the signal is invalid (such as a low level), the power chip stops outputting.

[0081] The power chip is a core component on the motherboard that provides stable voltage to the motherboard and other circuit components. It is responsible for converting the input voltage into the voltage required by the devices.

[0082] Specifically, when the processor malfunctions, the watchdog chip outputs a low-level reset signal to the processor. This reset signal is then passed to the clock signal of the counter. In other words, the signal generated during processor reset serves as the counter's trigger signal. The counter's output is connected to the input of a NAND gate, and the NAND gate's output is connected to the enable pin of the motherboard's power supply chip. When the counter reaches a preset threshold (e.g., the number of processor resets exceeds the preset threshold), the NAND gate's output signal changes, causing the power supply chip's enable pin to receive an invalid signal. At this point, the power supply chip stops outputting voltage, and the entire system loses power, thus protecting the hardware.

[0083] Specifically, such as Figure 3As shown, when the watchdog chip releases the reset signal and the processor can resume normal operation, channel A of the multiplexer is selected again, and the processor resumes control of the fan. If the processor still cannot resume normal operation after the watchdog chip releases the reset signal, the watchdog chip continues to pull the reset signal low. When the number of times the reset signal is pulled low is less than a preset threshold (e.g., 15 times), the fault indicator light will flash, indicating to maintenance personnel that the equipment is in a fault state.

[0084] When the reset signal is pulled low a certain number of times, the counter will output high levels from outputs Q0 to Q3. After passing through a NAND gate, the outputs will become low levels. This signal controls the enable pin of the power chip. At this time, the power chip will stop outputting, and the entire device will lose power to protect the hardware.

[0085] The beneficial effect of this embodiment is that when the processor frequently triggers resets due to serious faults (such as repeated crashes or unstable operation), the counter records the number of resets. After reaching a preset threshold, the power supply chip is controlled to shut down via a NAND gate, forcing the entire device to power down. This avoids continuous current surges or abnormal power consumption caused by repeated processor resets, and prevents hardware (such as chips, capacitors, etc.) from being damaged due to long-term abnormal operation, thereby protecting the device hardware safety.

[0086] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0087] Embodiments of this application also provide a server, including a fan and a fan control circuit for the server in any of the above embodiments.

[0088] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0089] The fan control circuit for the server provided in this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A fan control circuit for a server, characterized in that, The system includes a processor, a multiplexer, and a control module. The control module includes a variable resistor and a pulse generator. The processor is connected to both the multiplexer and the variable resistor. The pulse generator is connected to both the variable resistor and the multiplexer. The multiplexer is also connected to a fan. The pulse generator is a 555 timer. The variable resistor is connected to the discharge pin of the 555 timer. The variable resistor is also connected to the threshold pin of the 555 timer via a voltage divider resistor. The variable resistor is also connected to a capacitor via the voltage divider resistor. The capacitor is grounded. The processor is configured to send a first control signal to the multiplexer, and determine the sum of the resistance values ​​of the variable resistor and the voltage divider resistor based on the ratio of the high-level duration of the first control signal to the capacitance value, and then determine the resistance value of the variable resistor based on the resistance value. The pulse generator is used to output a second control signal according to the resistance value of the variable resistor; The multiplexer is used to control the fan according to the first control signal when the processor is working normally, and to control the fan according to the second control signal when the processor is malfunctioning. The control module also includes a counter and a NAND gate connected to the counter. The clock signal of the counter is connected to the reset pin of the processor, the output of the counter is connected to the input of the NAND gate, and the output of the NAND gate is connected to the power supply chip.

2. The fan control circuit for a server according to claim 1, characterized in that, The processor's pulse signal pin is connected to the first channel of the multiplexer, and the pulse generator's output pin is connected to the second channel of the multiplexer.

3. The fan control circuit for a server according to claim 1, characterized in that, The circuit also includes a watchdog chip, wherein... The processor is also used to send pulse signals to the watchdog chip; The watchdog chip is used to monitor the state of the processor based on the pulse signal, and when an abnormality is detected in the processor, it sends a reset signal to the reset pin of the processor.

4. The fan control circuit for a server according to claim 3, characterized in that, The processor's reset pin is connected to the channel selection pin of the multiplexer. The multiplexer is used to control the fan speed according to the first control signal when the reset signal is invalid, and to control the fan speed according to the second control signal when the reset signal is valid.

5. The fan control circuit for a server according to claim 1, characterized in that, The processor is also configured to configure the resistance value of the variable resistor into the register of the variable resistor.

6. The fan control circuit for a server according to claim 5, characterized in that, The processor is further configured to, when the first control signal changes, redetermine the resistance value of the variable resistor according to the new first control signal, and update the redetermined resistance value to the register of the variable resistor.

7. A server, characterized in that, Includes a fan and a fan control circuit for a server as described in any one of claims 1-6.

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