Manufacturing method of printed circuit board and printed circuit board

Abstract

The invention discloses a manufacturing method of a printed circuit board and the printed circuit board, and the method comprises the steps: removing at least part of a dielectric layer at a corresponding window position in a target core board, so as to form a hole in the target core board; filling the hole with an anti-plating layer; laminating the plurality of non-target core boards and the target core board up and down to obtain a multi-layer board; drilling the multilayer board from the first surface to the second surface along the vertical direction so as to form a first through hole in the multilayer board; primary electroplating and oil removing are conducted on the multilayer board, the anti-plating layer in the multilayer board is removed, and a cut-off groove is formed in the position, corresponding to the anti-plating layer, of the inner wall of the first through hole. Therefore, the cut-off groove is firstly formed in the target core board, and the electroplated layer is not easy to adhere to the cut-off groove in the subsequent electroplating step, so that residual electroplated metal in the printed circuit board can be effectively reduced after back drilling, and the problem of signal integrity of the printed circuit board caused by residual copper left in the via hole section after back drilling can be improved.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a method for manufacturing a printed circuit board and the printed circuit board. Background Art

[0002] As printed circuit boards (PCBs) evolve toward higher frequencies and higher speeds, the demand for signal integrity is rapidly increasing. Secondary backdrilling is being added to the PCB manufacturing process to further reduce or eliminate the via stubs that aren't fully resolved by the initial backdrilling, ensuring that the boards meet customer demands for high-frequency, high-speed signals.

[0003] In the existing technology, secondary back drilling leaves certain processing risks, and due to the guiding effect of the through hole, the secondary back drilling may fail to drill part of the hole copper, resulting in the inability to effectively remove the through hole stubs. Therefore, there is an urgent need for a method that can effectively remove the through hole stubs after back drilling of printed circuit boards. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a method for manufacturing a printed circuit board, which can effectively improve the signal integrity of the printed circuit board.

[0005] The present invention further provides a printed circuit board.

[0006] According to an embodiment of the present invention, a method for manufacturing a printed circuit board includes: etching a target core board in a printed circuit board to form a window; removing at least a portion of a dielectric layer in the target core board corresponding to the position of the window to form a hole in the target core board; filling the hole with a plating resist; laminating a plurality of non-target core boards and the target core board up and down to obtain a multilayer board, and positioning the target core board at a target layer of the multilayer board; drilling the multilayer board in an up-down direction from a first surface to a second surface to form a first through hole in the multilayer board, the first through hole passing through at least a portion of the plating resist in an up-down direction, the first through hole extending from the first surface toward the second surface, and reaching the second surface, wherein the The first surface and the second surface correspond to each other in the up-down direction of the multilayer board; the multilayer board is electroplated and degreased once to remove the anti-plating layer in the multilayer board, and a cut-off groove is formed on the inner wall of the first through hole at a position corresponding to the anti-plating layer, and the cut-off groove is connected to the first through hole; the multilayer board is electroplated twice to provide a first electroplating layer on the inner wall of the first through hole; the multilayer board is back-drilled from the second surface to the first surface along the up-down direction to the position of the cut-off groove to obtain a second through hole, the second through hole extends from the second surface toward the first surface and reaches the cut-off groove, and the second through hole, the cut-off groove and the first through hole are connected; the multilayer board is packaged and patterned.

[0007] Therefore, by first setting a plating resistance layer on the target core board, a cut-off groove will be formed in the target layer of the printed circuit board during back drilling. The electroplating layer is not easily attached to the cut-off groove in the subsequent electroplating step, and the residual electroplated metal in the printed circuit board can be effectively reduced after back drilling, thereby improving the signal integrity problem of the printed circuit board caused by the residual copper left in the via section after back drilling.

[0008] According to some embodiments of the present invention, the step of etching the target core board in the printed circuit board to form the window includes: the window is a semicircular window.

[0009] According to some embodiments of the present invention, the multilayer board is drilled in the up-down direction from the first surface to the second surface to form a first through hole in the multilayer board, the first through hole passes through at least a portion of the anti-plating layer in the up-down direction, the first through hole extends from the first surface toward the second surface and reaches the second surface, wherein the steps of the first surface and the second surface corresponding to each other in the up-down direction of the multilayer board include: setting the aperture of the first through hole to D1, the diameter of the semicircular window to D2, and D1 and D2 satisfying the relationship: D1<D2.

[0010] According to some embodiments of the present invention, the multilayer board is back-drilled from the second surface toward the first surface along the up and down direction to the position of the cut-off groove to obtain a second through hole, the second through hole extends from the second surface toward the first surface and reaches the cut-off groove, and the step of connecting the second through hole, the cut-off groove and the first through hole includes: setting the aperture of the second through hole to D3, the aperture of the first through hole to D1, and D1 and D3 satisfy the relationship: D1<D3.

[0011] According to some embodiments of the present invention, the multilayer board is subjected to electroplating and degreasing once to remove the anti-plating layer in the multilayer board, a cut-off groove is formed on the inner wall of the first through hole corresponding to the position of the anti-plating layer, and the step of connecting the cut-off groove with the first through hole includes: performing copper electroplating on the multilayer board to deposit a second electroplating layer on the inner wall of the first through hole; and performing degreasing on the multilayer board to remove the anti-plating layer.

[0012] According to some embodiments of the present invention, the step of performing secondary electroplating on the multilayer board to provide a first electroplating layer on the inner wall of the first through hole includes: setting the thickness of the first electroplating layer to L1, the thickness of the second electroplating layer to L2, and L1 and L2 satisfy the relationship: L1>L2.

[0013] According to some embodiments of the present invention, the step of etching the target core board in the printed circuit board to form a window includes: exposing the window position of the target core board and etching the metal layer of the target core board corresponding to the window.

[0014] According to some embodiments of the present invention, the step of removing at least a portion of the dielectric layer in the target core board corresponding to the window position to form a hole in the target core board includes: using a laser machining ablation process to remove the dielectric layer in the target core board corresponding to the window position to form a hole in the target core board.

[0015] According to some embodiments of the present invention, the anti-plating layer includes but is not limited to anti-plating ink.

[0016] The printed circuit board according to the present invention is applicable to the above-mentioned method for manufacturing the printed circuit board.

[0017] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments with reference to the following drawings, in which: Figure 1 is a schematic diagram of a target core board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 2 is a partial schematic diagram of a target core board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 3 is a partial schematic diagram of a target core board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 4 is a partial schematic diagram of a target core board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 5 is a partial schematic diagram of a target core board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 6 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 7 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 8 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 9 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 10 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 11 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 12 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 13 is a partial schematic diagram of a multilayer board in a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 14 is a partial schematic diagram of another perspective of a target core board in the method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 15 is a flow chart of a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figure 16 This is a comparison chart of simulation results of insertion loss of a printed circuit board obtained by the method for manufacturing a printed circuit board according to an embodiment of the present invention and a printed circuit board obtained by normal back drilling in the prior art; Figure 17This is a comparison chart of simulation results of return loss of a printed circuit board obtained by the method for manufacturing a printed circuit board according to an embodiment of the present invention and a printed circuit board obtained by normal back drilling in the prior art.

[0019] Reference numerals: 100, printed circuit board; 1001, multilayer board; 1002, first side; 1003, second side; 10. Target core board; 11. Dielectric layer; 12. Metal layer; 13. Window; 14. Hole; 20. non-target core board; 30. anti-plating layer; 40. first through hole; 50. cut-off groove; 60. First electroplating layer; 70. Second through hole; 80. Second electroplating layer; 90. Adhesive layer; 110. Resin; 120. Connecting pad. DETAILED DESCRIPTION

[0020] The embodiments of the present invention will be described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. The embodiments of the present invention will be described in detail below.

[0021] Reference below Figures 1-17 A method for manufacturing a printed circuit board 100 according to an embodiment of the present invention will be described. The printed circuit board 100 in the embodiment of the present invention is suitable for the method for manufacturing the printed circuit board 100 .

[0022] Combine Figures 1-15 As shown, the manufacturing method of the printed circuit board 100 according to the embodiment of the present invention may mainly include: Etching the target core board 10 in the printed circuit board 100 to form a window 13; removing at least a portion of the dielectric layer 11 at a position corresponding to the window 13 in the target core board 10 to form a hole 14 in the target core board 10 ; Filling the hole 14 with a plating resist 30; Laminating a plurality of non-target core boards 20 and a target core board 10 up and down to obtain a multilayer board 1001, and making the target core board 10 be located at a target layer of the multilayer board 1001; The multilayer board 1001 is drilled in a vertical direction from the first surface 1002 toward the second surface 1003 to form a first through hole 40 in the multilayer board 1001. The first through hole 40 passes through at least a portion of the anti-plating layer 30 in the vertical direction. The first through hole 40 extends from the first surface 1002 toward the second surface 1003 and reaches the second surface 1003. The first surface 1002 and the second surface 1003 correspond to each other in the vertical direction of the multilayer board 1001. The multilayer board 1001 is electroplated and degreased, and the resist layer 30 in the multilayer board 1001 is removed. A cut-off groove 50 is formed on the inner wall of the first through hole 40 corresponding to the position of the resist layer 30, and the cut-off groove 50 is connected to the first through hole 40; Performing secondary electroplating on the multilayer board 1001 to provide a first electroplating layer 60 on the inner wall of the first through hole 40; The multilayer board 1001 is back-drilled from the second surface 1003 toward the first surface 1002 in the vertical direction to the position of the cut-off groove 50 to obtain a second through hole 70. The second through hole 70 extends from the second surface 1003 toward the first surface 1002 and reaches the cut-off groove 50. The second through hole 70, the cut-off groove 50, and the first through hole 40 are connected. The multilayer board 1001 is packaged and patterned.

[0023] Specifically, the printed circuit board 100 in the embodiment of the present invention is a multilayer board 1001 structure obtained by laminating multiple core boards, wherein the core board is a dielectric layer 11 with copper clad on both sides, wherein the dielectric layer 11 of the core board includes, but is not limited to, one or more layers of a prepreg structure. Prior to lamination, the metal layer 12 on the target core board 10 can be etched to form a window 13 on the target core board 10, wherein the target core board 10 is the core board at the end position of the copper-clad interconnection section through the hole 14 in the multilayer board 1001, and the etching position is the position on the target core board 10 corresponding to the hole 14 area in the multilayer board 1001.

[0024] Furthermore, the semi-cured sheet at the position corresponding to the window 13 in the target core board 10 is removed, so that a hole 14 can be formed at the position corresponding to the window 13 on the target core board 10, and then the anti-plating layer 30 is filled in the hole 14. The anti-plating layer 30 can prevent metal from being deposited in the hole 14.

[0025] After the target core board 10 is filled with the plating resist 30, the target core board 10 and a plurality of non-target core boards 20 can be laminated together to form a multilayer board 1001, with the target core board 10 being located at a target position in the multilayer board 1001. The target position is the end position of the copper-clad interconnection section passing through the hole 14 in the multilayer board 1001. This ensures that the end position of the copper-clad interconnection section passing through the hole 14 in the multilayer board 1001 is not susceptible to metal adhesion during the subsequent electroplating process, thereby effectively removing residual copper left in the via section after backdrilling of the printed circuit board 100.

[0026] In an embodiment of the present invention, an adhesive layer 90 is laid between two adjacent core boards, and the adhesive layer 90 includes but is not limited to a prepreg. After the two adjacent core boards are stacked up and down, they are heated or pressurized to completely cure the prepreg between the two adjacent core boards, thereby bonding the two adjacent core boards. A board curing sheet is also laid between the target core board 10 and the non-target core board 20 above it, and the anti-plating layer 30 is present in the adhesive layer 90 between the target core board 10 and the non-target core board 20 above it, so that the distance between the anti-plating layer 30 and the end position of the interconnection section through the first electroplating layer 60 in the first through hole 40 can be closer, so as to further reduce the electroplated metal remaining in the first through hole 40 after back drilling.

[0027] Furthermore, after lamination to obtain the multilayer board 1001, drilling can be performed on the multilayer board 1001. The multilayer board 1001 is provided with a first surface 1002 and a second surface 1003 on opposite sides in the vertical direction. A hole is drilled from the first surface 1002 toward the second surface 1003 in the vertical direction. In this way, a first through hole 40 extending from the first surface 1002 to the second surface 1003 and reaching the second surface 1003 can be formed in the multilayer board 1001. The first through hole 40 passes through at least a portion of the plating resist 30 in the vertical direction. This not only facilitates the subsequent electroplating process of the multilayer board 1001, but also facilitates position alignment during back drilling.

[0028] Furthermore, after drilling the multilayer board 1001 to obtain the first through hole 40, the multilayer board 1001 can be electroplated and degreased once, so that the anti-plating layer 30 in the multilayer board 1001 can be removed. After the anti-plating layer 30 is removed, a cut-off groove 50 is formed in the multilayer board 1001 at the position where the anti-plating layer 30 was originally set, and because the first through hole 40 passes through at least part of the anti-plating layer 30, the opening of the cut-off groove 50 is located on the inner wall of the first through hole 40, and the cut-off groove 50 is connected to the first through hole 40.

[0029] Furthermore, a secondary electroplating is performed on the multilayer board 1001. In the secondary electroplating process, since no metal is deposited in the cut-off groove 50 during the primary electroplating, the inner wall of the cut-off groove 50 is not energized. This prevents the metal ions in the secondary electroplating from obtaining electrons on the inner wall of the cut-off groove 50, and further prevents the electroplated metal from depositing on the inner wall of the cut-off groove 50. Therefore, in the secondary electroplating process, only the inner wall of the first through hole 40 is deposited with the first electroplating layer 60.

[0030] Furthermore, after the secondary electroplating, the multilayer board 1001 is back-drilled. During back-drilling, the multilayer board 1001 is drilled from the second surface 1003 in the vertical direction toward the first surface 1002, and the back-drilling stops at the position corresponding to the dielectric slot in the first through-hole 40, thereby obtaining a second through-hole 70 in the multilayer board 1001 and retaining the length of the first electroplated layer 60 remaining after back-drilling of the corresponding specifications in the first through-hole 40. The secondary back-drilling can remove the first electroplated layer 60 in the first through-hole 40 except for the interconnection section through the first electroplated layer 60, and the electroplated layer is no longer present in the cut-off groove 50 connected to the second through-hole 70. This configuration can effectively prevent the presence of residual electroplated metal in the multilayer board 1001 except for the interconnection section adjacent to the first electroplated layer 60, thereby reducing the reflected signal at the first through-hole 40, suppressing signal transmission delay and scattering, and effectively improving the signal integrity of the entire link, thereby meeting the high-frequency and high-speed signal requirements of the printed circuit board 100.

[0031] In an embodiment of the present invention, the first through hole 40, the second through hole 70 and the cut-off groove 50 are connected, and the multilayer board 1001 is plugged with resin 110 to fill the first through hole 40, the second through hole 70 and the cut-off groove 50. This can ensure the circuit reliability in the printed circuit board 100. Finally, the outer layer pattern of the multilayer board 1001 is produced, and the connecting pad 120 is produced.

[0032] According to some embodiments of the present invention, Figure 14 and Figure 15 As shown, the step of etching the target core board 10 in the printed circuit board 100 to form the window 13 includes: The window 13 is a semicircular window.

[0033] Specifically, after etching the metal layer 12 on the target core board 10, the window 13 on the target core board 10 is semicircular. In this way, after drilling the multilayer board 1001 from the first surface 1002 to the second surface 1003 to obtain the first through hole 40, it can not only ensure that the position corresponding to the target core board 10 in the first through hole 40 is at least partially circumferentially provided with an anti-plating layer 30 to ensure that after the degreasing process, the target core board 10 can be provided with a cut-off groove 50 connected to the first through hole 40 at a position close to the first through hole 40, but also reduce the difficulty of degreasing, which is beneficial to reduce the difficulty of the manufacturing method of the printed circuit board 100 and improve the production efficiency of the printed circuit board 100.

[0034] According to an embodiment of the present invention, Figure 11 、 Figure 14 and Figure 15As shown, the multilayer board 1001 is drilled in the vertical direction from the first surface 1002 to the second surface 1003 to form a first through hole 40 on the multilayer board 1001. The first through hole 40 passes through at least a portion of the anti-plating layer 30 in the vertical direction. The first through hole 40 extends from the first surface 1002 toward the second surface 1003 and reaches the second surface 1003. The steps of correspondingly forming the first surface 1002 and the second surface 1003 in the vertical direction of the multilayer board 1001 include: The aperture of the first through hole 40 is set to D1, the diameter of the semicircular window is set to D2, and D1 and D2 satisfy the relationship: D1<D2.

[0035] Specifically, in an embodiment of the present invention, the aperture of the first through hole 40 is set to be smaller than the diameter of the semicircular window on the target core board 10. In this way, when the first through hole 40 passes through at least part of the semicircular window in the up and down directions, it can be ensured that part of the anti-plating layer 30 remains around the first through hole 40, so as to form a cut-off groove 50 around the first through hole 40 in the subsequent process.

[0036] According to an embodiment of the present invention, Figure 11 and Figure 15 As shown, the multilayer board 1001 is back-drilled from the second surface 1003 to the first surface 1002 in the up-down direction to the position of the cut-off groove 50 to obtain the second through hole 70. The second through hole 70 extends from the second surface 1003 toward the first surface 1002 and reaches the cut-off groove 50. The steps of connecting the second through hole 70, the cut-off groove 50 and the first through hole 40 include: The aperture of the second through hole 70 is set to D3, and the aperture of the first through hole 40 is set to D1. D1 and D3 satisfy the relationship: D1<D3.

[0037] Specifically, in an embodiment of the present invention, the aperture of the second through hole 70 is set to be larger than the aperture of the first through hole 40, so that the first electroplating layer 60 between the core boards of other layers that do not need to be interconnected through the first electroplating layer 60 in the first through hole 40 can be removed by back drilling to ensure that the first electroplating layer 60 is only attached between the core boards that need to be interconnected through the first electroplating layer 60 in the first through hole 40. In this way, the circuit reliability in the printed circuit board 100 can be guaranteed.

[0038] According to an embodiment of the present invention, Figure 8 、 Figure 9 and Figure 15 As shown, the multilayer board 1001 is electroplated and de-oiled once, the anti-plating layer 30 in the multilayer board 1001 is removed, and a cut-off groove 50 is formed on the inner wall of the first through hole 40 corresponding to the position of the anti-plating layer 30. The steps of connecting the cut-off groove 50 to the first through hole 40 include: Performing copper electroplating on the multilayer board 1001 to deposit a second electroplating layer 80 on the inner wall of the first through hole 40; The multilayer board 1001 is subjected to a degreasing process to remove the plating resist 30 .

[0039] Specifically, before degreasing the multilayer board 1001, the multilayer board 1001 is first electroplated. Through the electroplating, the second electroplating layer 80 can be attached to the inner wall of the first through hole 40 and the side of the anti-plating layer 30 close to the first through hole 40. Then, the multilayer board 1001 with the second electroplating layer 80 attached is degreasing. After the degreasing is completed, there is no anti-plating layer 30 in the multilayer board 1001, and a cut-off groove 50 is formed at the position where the anti-plating layer 30 was originally provided in the multilayer board 1001. At this time, in the first through hole 40, there is no second electroplating layer 80 at the position corresponding to the inner wall of the first through hole 40 and the cut-off groove 50. In the subsequent electroplating process, the second electroplating layer 80 in the first through hole 40 is energized, so that the core board corresponding to the cut-off groove 50 in the multilayer board 1001 in the first through hole 40 can be disconnected from the power supply in the first through hole 40, thereby preventing the position corresponding to the cut-off groove 50 in the first through hole 40 from adhering to metal in the subsequent process, thereby ensuring that there is no electroplating layer at the end position of the interconnection section through the first electroplating layer 60 in the first through hole 40, thereby effectively reducing the residual electroplated metal in the printed circuit board 100 after back drilling, thereby improving the signal integrity problem of the printed circuit board 100 caused by the residual copper left in the via section after back drilling.

[0040] According to an embodiment of the present invention, Figure 9 、 Figure 10 and Figure 15 As shown, the steps of performing secondary electroplating on the multilayer board 1001 to provide the first electroplating layer 60 on the inner wall of the first through hole 40 include: The thickness of the first electroplating layer 60 is set to L1, and the thickness of the second electroplating layer 80 is set to L2. L1 and L2 satisfy the relationship: L1>L2.

[0041] Specifically, in an embodiment of the present invention, the thickness of the first electroplating layer 60 formed by the secondary electroplating is set to be greater than the thickness of the second electroplating layer 80 of the primary electroplating layer. In this way, after ensuring that there is no attached metal layer 12 in the cut-off groove 50, the multilayer board 1001 can be thickened by electroplating, so that the thickness of the first electroplating layer 60 finally formed in the first through hole 40 meets the requirements of the printed circuit board 100.

[0042] According to an embodiment of the present invention, Figure 1 and Figure 2 As shown, the step of etching the target core board 10 in the printed circuit board 100 to form the window 13 includes: The window 13 position of the target core board 10 is exposed, and the metal layer 12 of the target core board 10 corresponding to the window 13 is etched.

[0043] Specifically, the core board in the embodiment of the present invention is composed of a metal layer 12 and a dielectric layer 11, wherein the dielectric layer 11 of the core board includes but is not limited to one or more layers of a semi-cured sheet structure, and the material of the semi-cured sheet includes but is not limited to resin 110 and glass fiber. Metal layers 12 are attached to the upper and lower sides of the dielectric layer 11, and the metal layer 12 includes but is not limited to a copper layer.

[0044] Furthermore, the inner layer pattern back-drilling position of the target core board 10 is first double-sided exposed, and the metal layer 12 of the corresponding pattern is etched away at the same time to form a window 13 at the corresponding back-drilling position on the target core board 10. This makes it easier to remove the dielectric layer 11 of the target core board 10 corresponding to the window 13 pattern in the subsequent process to form a hole 14 in the target core board 10.

[0045] According to an embodiment of the present invention, Figure 3 As shown, the step of removing at least a portion of the dielectric layer 11 at a position corresponding to the window 13 in the target core board 10 to form a hole 14 on the target core board 10 includes: The dielectric layer 11 at the position corresponding to the window 13 in the target core board 10 is removed by a laser ablation process to form a hole 14 in the target core board 10 .

[0046] Specifically, the laser ablation process utilizes a high-energy-density laser beam to irradiate the surface of the dielectric layer 11 exposed at the position corresponding to the window 13 of the target core board 10, causing the prepreg exposed at the position corresponding to the window 13 of the target core board 10 to be locally and rapidly heated and melted. Furthermore, the prepreg exposed at the position corresponding to the window 13 of the target core board 10 can be removed to penetrate the prepreg at the position corresponding to the window 13 in the core board, thereby forming a hole 14 at the position corresponding to the window 13 on the target core board 10. The laser ablation technology used in the embodiment of the present invention has the advantages of non-contact processing, small heat-affected zone, high processing precision, and strong controllability, which is conducive to improving the operational accuracy and operational safety of the manufacturing method of the printed circuit board 100.

[0047] According to an embodiment of the present invention, the plating resist 30 includes but is not limited to plating resist ink. Specifically, the plating resist ink can prevent certain areas of the printed circuit board 100 from being metallized during the electroplating process. After the hole 14 of the target core board 10 is filled with anti-plating ink, the window 13 is drilled from the first surface 1002 to the second surface 1003 to obtain the first through hole 40. At this time, the inner wall of the first through hole 40 corresponding to the position of the target core board 10 is at least partially provided with anti-plating ink around the inner wall. In this way, during one electroplating process, the second electroplating layer 80 of the inner wall of the first through hole 40 corresponding to the position of the target core board 10 will adhere to the anti-plating ink. The multilayer board 1001 is then degreased to remove the anti-plating ink. In this way, no metal will be attached to the position of the target core board 10 corresponding to the cut-off groove 50. Therefore, after back drilling, the copper-covered hole 14 corresponding to the target core board 10 in the multilayer board 1001 can be ensured to be cut off, which can effectively reduce the residual copper left at the end position of the interconnection section through the first electroplating layer 60 in the first through hole 40, and thus can effectively improve the signal integrity problem of the printed circuit board 100 caused by the residual copper left in the via section after back drilling.

[0048] According to an embodiment of the present invention, a printed circuit board 100 is suitable for a method for manufacturing the printed circuit board 100. In the method for manufacturing the printed circuit board 100 in the embodiment of the present invention, a plating resist 30 is first provided on a target core board 10, so that a cut-off groove 50 is formed in the target layer of the printed circuit board 100 during backdrilling. This can reduce the amount of residual electroplated metal in the printed circuit board 100 after backdrilling, thereby improving signal integrity issues of the printed circuit board 100 caused by residual copper left in the via section after backdrilling.

[0049] Furthermore, after simulation verification using high-frequency electromagnetic simulation software, it can be confirmed that the printed circuit board 100 manufactured by the manufacturing method of the printed circuit board 100 of the embodiment of the present invention can effectively reduce the reflection reaction of the residual copper left in the via section after back drilling to the first through hole 40 signal, thereby reducing the insertion loss at the position of the first through hole 40, and making the printed circuit board 100 meet the requirements of high-frequency and high-speed products. The simulation results of the return loss performance and insertion loss performance of the printed circuit board 100 manufactured by the manufacturing method of the printed circuit board 100 of the embodiment of the present invention and the printed circuit board 100 obtained by normal back drilling in the prior art are shown in FIG. Figure 16 and Figure 17 , wherein the dotted line is a simulation result of the printed circuit board 100 obtained by normal back drilling in the prior art, and the solid line is a simulation result of the printed circuit board 100 manufactured by the manufacturing method of the printed circuit board 100 according to an embodiment of the present invention.

[0050] Combine Figure 16As shown, compared with the simulation results of the printed circuit board 100 obtained by normal back drilling in the prior art, the printed circuit board 100 manufactured by the manufacturing method of the printed circuit board 100 according to the embodiment of the present invention has obvious improvement in insertion loss.

[0051] Combine Figure 17 As shown, compared with the simulation results of the printed circuit board 100 obtained by normal back drilling in the prior art, the printed circuit board 100 manufactured by the manufacturing method of the printed circuit board 100 according to the embodiment of the present invention has obvious improvement in return loss.

[0052] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "circumferential", "radial", "circumferential" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0053] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "example," "specific example," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0054] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the claims and their equivalents.

Claims

1. A method for manufacturing a printed circuit board, characterized in that: The following steps are involved: etching a target core board in a printed circuit board to form a window; removing at least a portion of the dielectric layer in the target core board corresponding to the window position to form a hole in the target core board; filling the hole with a plating resist; Laminating a plurality of non-target core boards and the target core board up and down to obtain a multilayer board, and making the target core board be located at a target layer of the multilayer board; Drilling the multilayer board in a vertical direction from the first surface to the second surface to form a first through hole in the multilayer board, wherein the first through hole passes through at least a portion of the plating resist in the vertical direction, and the first through hole extends from the first surface toward the second surface and reaches the second surface, wherein the first surface and the second surface correspond to each other in the vertical direction of the multilayer board; Performing electroplating and degreasing on the multilayer board to remove the anti-plating layer in the multilayer board, forming a cut-off groove on the inner wall of the first through hole corresponding to the position of the anti-plating layer, and the cut-off groove is connected to the first through hole; performing secondary electroplating on the multilayer board to provide a first electroplating layer on the inner wall of the first through hole; Back-drilling the multilayer board from the second surface toward the first surface in the vertical direction to the position of the cut-off groove to obtain a second through hole, wherein the second through hole extends from the second surface toward the first surface and reaches the cut-off groove, and the second through hole, the cut-off groove, and the first through hole are connected; The multilayer board is packaged and patterned.

2. The method for manufacturing a printed circuit board according to claim 1, wherein: The step of etching the target core board in the printed circuit board to form a window includes: The window is a semicircular window.

3. The method for manufacturing a printed circuit board according to claim 2, wherein: The step of drilling the multilayer board in a vertical direction from the first surface to the second surface to form a first through hole in the multilayer board, wherein the first through hole passes through at least a portion of the anti-plating layer in the vertical direction, and the first through hole extends from the first surface toward the second surface and reaches the second surface, wherein the first surface and the second surface correspond to each other in the vertical direction of the multilayer board comprises: The aperture of the first through hole is set to D1, the diameter of the semicircular window is set to D2, and D1 and D2 satisfy the relationship: D1<D2.

4. The method for manufacturing a printed circuit board according to claim 3, wherein: The step of back-drilling the multilayer board from the second surface toward the first surface in the vertical direction to the position of the cut-off groove to obtain a second through hole, wherein the second through hole extends from the second surface toward the first surface and reaches the cut-off groove, and the second through hole, the cut-off groove, and the first through hole are connected comprises: The aperture of the second through hole is set to D3, the aperture of the first through hole is set to D1, and D1 and D3 satisfy the relationship: D1<D3.

5. The method for manufacturing a printed circuit board according to claim 1, wherein: The step of performing electroplating and degreasing on the multilayer board once to remove the anti-plating layer in the multilayer board, forming a cut-off groove on the inner wall of the first through hole corresponding to the position of the anti-plating layer, and connecting the cut-off groove to the first through hole comprises: Performing copper electroplating on the multilayer board to deposit a second electroplating layer on the inner wall of the first through hole; The multilayer board is subjected to a degreasing process to remove the anti-plating layer.

6. The method for manufacturing a printed circuit board according to claim 5, wherein: The step of performing secondary electroplating on the multilayer board to provide a first electroplating layer on the inner wall of the first through hole includes: The thickness of the first electroplating layer is set to L1, and the thickness of the second electroplating layer is set to L2. L1 and L2 satisfy the relationship: L1>L2.

7. The method for manufacturing a printed circuit board according to claim 1, wherein: The step of etching the target core board in the printed circuit board to form a window includes: The window position of the target core board is exposed, and the metal layer of the target core board corresponding to the window is etched.

8. The method for manufacturing a printed circuit board according to claim 7, wherein: The step of removing at least a portion of the dielectric layer corresponding to the window position in the target core board to form a hole in the target core board includes: A laser ablation process is used to remove the dielectric layer in the target core board corresponding to the window position to form a hole in the target core board.

9. The method for manufacturing a printed circuit board according to claim 1, wherein: The anti-plating layer includes but is not limited to anti-plating ink.

10. A printed circuit board, characterized in that: A method for manufacturing a printed circuit board according to any one of claims 1 to 9.

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