Back contact solar cell and cell assembly
By setting up the boss and interface optimization structure in the back contact solar cell, the carrier transmission performance degradation caused by improper settings of p and n regions is solved, the current output efficiency and battery life are improved, and the printing yield and passivation film uniformity are achieved.
Patent Information
- Application Number
- CN202511063237.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-31
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2045-07-31
AI Technical Summary
In existing back contact solar cells, improper settings of p and n regions can easily affect carrier transmission performance, increase subsequent process difficulty, and affect battery current output performance and power generation efficiency.
The boss structure and interface optimization structure are arranged in the isolation area of the back contact solar cell, which increases the printing area of the polar region, optimizes the doping concentration gradient, improves carrier separation and transmission efficiency, and enhances the reliability of the electrode and the uniformity of the passivation film.
It improves carrier transmission and current output efficiency, reduces the difficulty of electrode printing, enhances the overall performance and service life of the battery, and improves the effect of the passivation film.
Smart Images

Figure CN120568930A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of solar cells, and in particular to back-contact solar cells and cell modules. Background Art
[0002] Back-contact solar cells (BC cells) are a new type of solar cell technology that moves both the positive and negative electrode contacts to the back of the cell. This not only avoids shading losses from the front grid lines, improving optical performance, but also offers improved aesthetics, making it suitable for distributed applications. Back-contact solar cells have interdigitated positive and negative electrodes on the back. To prevent short circuits between the positive and negative electrodes, an isolation region is typically placed between the n- and p-regions. The rationality of the isolation region design is a key factor in determining cell performance.
[0003] In existing back-contact solar cells, when the width of the isolation region is small, insufficient isolation often occurs, causing doped atoms of different polarities to interconnect and cause short circuit leakage; when the width of the isolation region is large, the effective area of the p-region structure and the n-region structure on both sides of the isolation region is narrowed, which will lead to a decrease in the efficiency of photon separation to form holes and electrons, and a weakening of the carrier transport performance; at the same time, when the electrode material is screen-printed on the effective area, the effective contact area of the screen slurry is small, which increases the difficulty of printing alignment, affects the subsequent passivation film performance and the conductive performance and service life of the electrode, and makes it difficult to guarantee the current output performance and power generation efficiency of the battery. Summary of the Invention
[0004] In view of this, the present disclosure provides a back-contact solar cell and a battery assembly to solve the problem in existing back-contact solar cells that improper settings of the p-region and n-region easily affect the carrier transport performance, increase the difficulty of subsequent processes, and affect the battery current output performance and power generation efficiency.
[0005] In the first aspect, the present disclosure provides a back-contact solar cell, including a cell substrate, the cell substrate having a light-receiving surface and a backlight surface relatively arranged, the backlight surface including a first polarity region and a second polarity region alternately arranged, an isolation region formed by being recessed inward from the backlight surface between the first polarity region and the second polarity region, the cell substrate also including: a boss structure and an interface optimization structure, the boss structure being formed by protruding from the surface of the first polarity region and / or the second polarity region toward the isolation region; the interface optimization structure being protruding on at least a portion of the side wall surface of the isolation region and being arranged close to the boss structure, the interface optimization structure including at least one optimization unit, one end of the optimization unit being connected to the boss structure, and the other end being spaced apart from the bottom surface of the isolation region; when the interface optimization structure includes a plurality of optimization units stacked in sequence in a direction perpendicular to the side wall surface of the isolation region, the spacing distance between the plurality of optimization units and the bottom surface of the isolation region increases progressively in the stacking direction of the plurality of optimization units.
[0006] In an optional embodiment, the length of the interface optimization structure is less than or equal to 2 / 3 of the length of the sidewall surface of the isolation region.
[0007] In an optional embodiment, the sidewall surface of the isolation region has a slope structure.
[0008] In an optional embodiment, in the arrangement direction of the first polarity region and the second polarity region, the width of the boss structure ranges from 0.1 to 50 μm; the thickness of the boss structure ranges from 0.05 to 5.0 μm.
[0009] In an optional embodiment, it further includes: a buffer portion, which is arranged between the boss structure and the interface optimization structure; and the cross-sectional size of the buffer portion gradually decreases in the direction from the backlight surface toward the light-receiving surface.
[0010] In an optional embodiment, the width of the intersection plane of the buffer portion and the boss structure is in the range of 0.1 to 10 μm, and the thickness of the buffer portion is in the range of 0.05 to 5 μm.
[0011] In an optional embodiment, a surface of the buffer portion relatively close to the isolation region has an uneven texture structure.
[0012] In an optional embodiment, the battery matrix includes: a base layer and a passivation contact structure located on one surface of the base layer, and the side where the passivation contact structure is located is the backlight side of the battery matrix.
[0013] In an optional embodiment, the passivation contact structure includes a tunneling oxide layer and a doping layer that are stacked, the tunneling oxide layer is relatively close to the base layer; and the base layer forms an inner expansion layer in a surface connected to the passivation contact structure.
[0014] In an optional embodiment, the thickness of the doping layer is in the range of 100-300 nm, the thickness of the tunneling oxide layer is in the range of 1-10 nm, and the thickness of the inner diffusion layer is in the range of 0.1-2 μm.
[0015] In an optional embodiment, in the direction from the backlight surface toward the light-receiving surface, the boss structure is correspondingly arranged on the doped layer, the tunneling oxide layer and at least a portion of the inner diffusion layer.
[0016] In an optional embodiment, in the direction from the backlight surface toward the light-receiving surface, the boss structure is correspondingly arranged on the doped layer and at least a portion of the tunneling oxide layer.
[0017] In an optional embodiment, in the direction from the backlight surface toward the light-receiving surface, the boss structure is correspondingly arranged on at least a portion of the doped layer.
[0018] In a second aspect, the present disclosure further provides a battery assembly comprising a plurality of the above-mentioned back-contact solar cells.
[0019] Beneficial Effects: The back-contact solar cell disclosed herein has a raised platform structure formed on the upper surfaces of the first and second polarity regions, extending from the main polarity regions toward the isolation region. This increases the effective printing area of the first and second polarity regions, allowing more metal paste to contact them during subsequent screen printing, improving carrier transport and collection performance. Furthermore, it further reduces the difficulty of electrode positioning during printing, thereby increasing printing yield.
[0020] Furthermore, an interface optimization structure is provided on the lower side of the boss structure, and the interface optimization structure includes one or more optimization units. The interface optimization structure is provided on the side wall surface of the isolation region near one end of the boss structure. On the one hand, it ensures that it is connected to the boss structure and plays an effective supporting role, reduces the concentrated stress at the intersection of the boss structure and the polarity region, thereby improving the strength of the effective area used for printing electrodes in the first polarity region and the second polarity region, ensuring the reliability of the printed electrodes, and making the smooth side wall surface of the isolation region present a texture structure, reducing the reflection of light incident on the side wall surface of the isolation region, and improving the double-sidedness; on the other hand, the interface optimization structure is provided on at least part of the side wall surface of the isolation region near the boss structure, further increasing the area of the pn junction during the diffusion process, thereby enhancing the efficiency of the built-in electric field to separate electron-hole pairs, that is, helping to improve the carrier separation and transmission efficiency, thereby improving the current output efficiency and overall electrical performance of the battery, and the boss structure and the interface optimization structure also help to ensure that the doped atoms can diffuse evenly from the outside to the inside during the diffusion process, reducing the occurrence of abnormal phenomena such as accumulation and clustering of localized doped atoms in narrow corners, and improving the battery yield and service life. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the specific embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0022] Figure 1 Schematic diagram of the structure of a back-contact solar cell with a boss structure and an interface optimization structure having an optimization unit disclosed in the present invention; Figure 2 Schematic diagram of the structure of a back-contact solar cell with a boss structure and an interface optimization structure having two optimization units disclosed in the present invention; Figure 3 1. It is a schematic structural diagram of a back-contact solar cell provided with a boss structure, a buffer portion, and an interface optimization structure having an optimization unit according to the present disclosure; Figure 4 Schematic diagram of the structure of a back-contact solar cell provided with a boss structure, a buffer portion, and an interface optimization structure having two optimization units disclosed herein; Figure 5 Schematic diagram of a curve showing the variation of dopant atom concentration with depth after boron diffusion disclosed herein; Figures 6 to 16 Schematic diagram of the structure of the boss structure, buffer portion and interface optimization structure in different settings in the present disclosure.
[0023] Description of reference numerals: 100, battery substrate; 101, light-receiving surface; 102, backlight surface; 103, first polarity region; 104, second polarity region; 105, isolation region; 1051, velvet structure; 1052, slope structure; 106, boss structure; 107, buffer; 108, interface optimization structure; 1081a, first optimization unit; 1081b, second optimization unit; 1. Base layer; 2. Inner diffusion layer; 3. Tunneling oxide layer; 4. Doping layer. DETAILED DESCRIPTION
[0024] The present disclosure will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific examples described herein are intended only to illustrate the present disclosure and are not intended to limit it. It should also be noted that, for ease of description, the drawings only illustrate some, but not all, structures relevant to the present disclosure. In the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion about the concepts of the present disclosure. The accompanying drawings illustrate various schematic diagrams of structures according to embodiments of the present disclosure. These figures are not drawn to scale; certain details are exaggerated and may be omitted for clarity. The shapes, relative sizes, and positional relationships of the various regions and layers shown in the figures are merely illustrative and may vary in practice due to manufacturing tolerances or technical limitations. Those skilled in the art may design regions / layers with different shapes, sizes, and relative positions based on actual needs. In the context of the present disclosure, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or an intervening layer / element may exist between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element would be "below" the other layer / element.
[0025] In related back-contact solar cells, if the width of the isolation region is set to be small, it is easy for the doping atoms of different polarities to be insufficiently isolated, resulting in short circuit leakage; when the width of the isolation region is set to be large, the effective area of the p-region and n-region on both sides is narrowed, the efficiency of photon separation to form holes and electrons is reduced, and the carrier transmission performance is weakened. At the same time, it also makes it more difficult to align the electrode material when screen printing on the effective area, which is likely to affect the current output performance and power generation efficiency of the battery.
[0026] Based on this, the present disclosure provides a back-contact solar cell, which increases the surface printing area of the first polarity region and the second polarity region on both sides of the isolation by setting a boss structure, reduces the difficulty of electrode printing and ensures the reliability of the electrode; at the same time, an interface optimization structure is set under the boss structure. On the one hand, the interface optimization structure helps to increase the effective area of the internal area of the first polarity region and the second polarity region on the backlight side, that is, it helps to increase the pn junction area at this position, thereby increasing the carrier separation and transmission efficiency. At the same time, since the doping concentration is lower the closer to the light-receiving surface, the interface optimization structure also optimizes the overall doping concentration gradient, reducing the occurrence of abnormal situations such as accumulation and clustering of localized doping atoms in narrow corners; on the other hand, the interface optimization structure is set on the side wall surface of the isolation area under the boss structure. While improving the full-angle light trapping performance of the battery, it also helps to enhance the strength performance of the boss structure, thereby ultimately improving the overall performance of the battery.
[0027] Example 1 refer to Figures 1 to 16The back-contact solar cell provided in this embodiment includes a cell substrate 100, which has a light-receiving surface 101 and a backlight surface 102 arranged opposite to each other, and the backlight surface 102 includes first polarity regions 103 and second polarity regions 104 arranged alternately, and an isolation region 105 is formed between the first polarity regions 103 and the second polarity regions 104, which is recessed inward from the backlight surface 102; the cell substrate 100 also includes: a boss structure 106 and an interface optimization structure 108, the boss structure 106 is formed by protruding from the surfaces of the first polarity regions 103 and the second polarity regions 104 toward the isolation region 105; the interface optimization structure 108 is protruded on at least a portion of the side wall surface of the isolation region 105 and is arranged close to the boss structure 106, and the interface optimization structure 108 includes at least one optimization unit, one end of the optimization unit is connected to the boss structure 106, and the other end is spaced apart from the bottom surface of the isolation region 105.
[0028] Specifically, the battery substrate 100 includes a silicon wafer and various film layer structures formed on the silicon wafer, that is, the battery substrate 100 is a battery structure before printing the gate electrode. Figure 1 and Figure 2 The battery substrate 100 includes a light-receiving surface 101 that directly receives sunlight and a backlight surface 102 opposite to the light-receiving surface 101. A first polarity region 103 and a second polarity region 104 of different polarities are formed on the backlight surface 102. The first polarity region 103 and the second polarity region 104 are isolated by an isolation region 105. That is, the first polarity regions 103 and the second polarity regions 104 of different polarities are alternately arranged. For example, if the first polarity region 103 is an n-type region, the second polarity region 104 is a p-type region, or if the first polarity region 103 is a p-type region, the second polarity region 104 is an n-type region. On this basis, Figure 1 From the perspective shown, the upper surfaces of the first polarity region 103 and the second polarity region 104 of this embodiment form a boss structure 106 that extends from the main part of the polarity region toward the isolation region 105. On the one hand, the boss structure 106 increases the effective printing area of the first polarity region 103 and the second polarity region 104, allowing more metal paste to contact it during subsequent screen printing, thereby improving carrier transport and collection performance, and further reducing the difficulty of positioning electrode printing and improving printing yield. Furthermore, an interface optimization structure 108 is provided on the lower side of the boss structure 106, as shown in FIG. Figure 1 As shown, the interface optimization structure 108 includes an optimization unit; Figure 2As shown, the interface optimization structure 108 may also include two or more optimization units. The optimization unit may be set as a strip structure to achieve complete bonding with the side wall surface of the isolation region 105 to reduce the generation of interface defects. One end of the optimization unit is connected to the boss structure 106, and the other end is at a certain distance from the bottom surface of the isolation region 105, that is, the interface optimization structure 108 is set on the side wall surface of the isolation region 105 close to the end of the boss structure 106. On the one hand, it ensures that it is connected to the boss structure 106 to play an effective supporting role, reduces the concentrated stress at the intersection of the boss structure 106 and the polarity region, and thus improves the strength of the effective area used to print electrodes in the first polarity region 103 and the second polarity region 104, ensures the reliability of the printed electrodes, and makes the smooth side wall surface of the isolation region 105 present a texture structure, reduces the reflection of light incident on the side wall surface of the isolation region 105, and improves High bifaciality; on the other hand, during the molding process of the battery matrix 100, a diffusion process will be carried out on the side of the backlight surface 102, and the doping concentration will gradually decrease from the surface of the backlight surface 102 to the inside. Correspondingly, the efficiency of the pn junction in separating electron-hole pairs in the built-in electric field is also reduced. Based on this, an interface optimization structure 108 is set on at least part of the side wall surface of the isolation region 105 close to the boss structure 106, which further increases the area of the pn junction during the diffusion process, thereby enhancing the efficiency of the built-in electric field in separating electron-hole pairs, which is helpful to improve the carrier separation and transmission efficiency, thereby improving the current output efficiency and overall electrical performance of the battery. In addition, the boss structure 106 and the interface optimization structure 108 also help in the diffusion process. The doping atoms can diffuse evenly from the outside to the inside, reducing the occurrence of abnormal phenomena such as accumulation and clustering of local doping atoms in narrow corners, thereby improving the battery yield and service life.
[0029] On the other hand, the boss structure 106 and the interface optimization structure 108 can also enable the battery substrate 100 to form an isolation area 105 with a small opening and a large internal isolation space on the backlight surface 102, so that the exchange between plasma and the outside world is reduced in the subsequent process of depositing the passivation film layer on the backlight surface 102, thereby realizing the localized distribution of the mobile hydrogen content of the passivation film layer, reducing the mobile hydrogen content of the passivation film layer in the isolation area 105, and reducing the related hydrogen defects formed by excessive diffusion of hydrogen atoms into the silicon wafer, while the mobile hydrogen content of the passivation film layer on the remaining areas is higher, so as to achieve the best passivation effect.
[0030] In one embodiment, the interface optimization structure 108 includes a plurality of optimization units stacked in sequence in a direction perpendicular to the sidewall surface of the isolation region 105; in the stacking direction of the plurality of optimization units, the spacing distance between the plurality of optimization units and the bottom surface of the isolation region 105 increases.
[0031] That is, the interface optimization structure 108 includes a plurality of optimization units stacked in sequence on the sidewall of the isolation region 105, and among the plurality of optimization units, the closer the optimization unit is to the sidewall surface of the isolation region 105, the smaller the distance between it and the bottom surface of the isolation region 105. This arrangement makes the surface of the interface optimization structure 108 and the sidewall surface of the isolation region 105 present a smooth transition gradient change as a whole. In the direction from the backlight surface 102 to the light receiving surface 101, that is, Figure 1 and Figure 2 In the direction indicated by the middle arrow, the interface optimization structure 108 is set between the exposed side wall surface of the platform structure 106 and the isolation region 105 itself, and it has multiple stacked optimization units, so that the side surface of the first polarity region 103 and the second polarity region 104 is changed from the sudden change surface from the original platform structure 106 to the isolation region 105 side wall surface to the overall smooth change surface from the platform structure 106, multiple optimization units to the isolation region 105 side wall surface, thereby making the polar regions on both sides of the isolation region 105 in the area with the platform structure 106 and the interface optimization structure 108. The horizontal cross-section of the domain has a gradually decreasing change, which matches the gradually decreasing concentration of doping atoms in the first polarity region 103 and the second polarity region 104. The gradient change of multiple optimized unit lengths further enhances the matching with the gradually decreasing concentration of doping atoms, and also expands the pn junction area of the polarity region at this position, thereby improving the separation and transmission efficiency of carriers; the overall smooth transition of the side surface of the polarity region also allows the doping atoms to diffuse evenly, reducing the occurrence of abnormal phenomena such as accumulation and clustering of local doping atoms in narrow corners.
[0032] For example, Figure 2 As shown, the interface optimization structure 108 includes a first optimization unit 1081a and a second optimization unit 1081b stacked in a direction perpendicular to the sidewall surface of the isolation region 105. The first optimization unit 1081a is arranged on the sidewall surface of the isolation region 105, and the second optimization unit 1081b is arranged on the first optimization unit 1081a. The distance between the second optimization unit 1081b and the bottom surface of the isolation region 105 is greater than the distance between the first optimization unit 1081a and the bottom surface of the isolation region 105. Compared with the first optimization unit 1081a, the second optimization unit 1081b is generally closer to the surface of the backlight surface 102, corresponding to an area with a higher dopant atom concentration, while the first optimization unit 1081a corresponds to an area with a lower dopant atom concentration. The pn junction area at the high-concentration location is effectively increased, improving carrier separation and transmission efficiency. In addition, the gradient structure configuration helps to improve diffusion uniformity.
[0033] Furthermore, the length of the interface optimization structure 108 is less than or equal to 2 / 3 of the length of the sidewall of the isolation region 105. Figures 1 to 4, assuming the length of the sidewall of isolation region 105 is L and the length of interface optimization structure 108 is L1, the following relationship holds: L1 ≤ 2L / 3, where the sidewall length L of isolation region 105 is the total length from the backlight surface 102 to the bottom of isolation region 105. The length of interface optimization structure 108 accounts for a maximum of 2 / 3 of the total sidewall length. This ensures that while providing auxiliary support, light trapping, and enhanced built-in electric field strength, the interface optimization structure 108 maintains a sufficient distance from the bottom of isolation region 105 to ensure effective isolation.
[0034] In addition, a velvet structure 1051 is provided on the bottom surface of the isolation region 105 to enhance the light trapping effect.
[0035] In one implementation, reference Figures 1 to 16 The sidewalls of the isolation region 105 have a sloped structure 1052, resulting in the initial form of the isolation region 105 being a groove that is larger near the opening end and smaller at the bottom. This facilitates the subsequent formation of structural morphologies such as the aforementioned boss structure 106 and interface optimization structure 108 at the opening end of the isolation region 105, thereby flexibly adjusting the final form of the isolation region 105. Compared to the initial vertical sidewalls of the isolation region 105, the initial sloped structure 1052 of the sidewalls of the isolation region 105 maintains the distance between the first polarity region 103 and the second polarity region 104 at the bottom of the isolation region 105 while further increasing the distance between them at the top. This effectively prevents short circuit conduction between the first polarity region 103 and the second polarity region 104, reducing the risk of leakage. Furthermore, this opening design facilitates the subsequent preparation of related structures and the uniform deposition of the passivation film. When the sidewalls of the isolation region 105 are vertical planes, it is difficult for the passivation film to effectively and uniformly cover the corresponding positions during the deposition process.
[0036] The slope structure 1052 has an inclination range, i.e., an angle with the vertical direction, of 20° to 70°. Due to the inclination of the slope structure 1052, the area of the pn junction formed gradually decreases as the degree of inward diffusion decreases from the surface during the diffusion process. That is, the closer to the backlight surface 102, the smaller the pn junction area, but the higher the doping concentration. This can lead to a mismatch between structural parameters and battery performance. Therefore, the interface optimization structure 108 and the boss structure 106 are provided to achieve a gradual decrease in concentration and a corresponding decrease in junction area, helping to ensure the strength of the built-in electric field, reduce current transmission resistance, and thereby improve current output and overall battery performance.
[0037] The reason for the formation of the aforementioned sloped structure 1052 is that during the formation of the isolation region 105, a p-type structure is generally deposited at high temperature, followed by laser patterning and grooving, and finally wet cleaning to form the groove surface morphology. An n-region structure is then formed within the groove, separating the p-region structure, forming the isolation region 105 between the p- and n-regions. Finally, wet cleaning is performed to form the final morphology of the isolation region 105. During the wet cleaning process, the hydroxide ions in the alkaline solution do not corrode the laser grooved area in a single vertical direction, but also simultaneously corrode it in a lateral direction. This results in the sloped structure 1052 forming on the sidewalls of the final isolation region 105, giving the entire isolation region 105 an "inverted trapezoidal" cross-section.
[0038] Furthermore, in the arrangement direction of the first polarity region 103 and the second polarity region 104 , the width of the boss structure 106 ranges from 0.1 to 50 μm; and the thickness of the boss structure 106 ranges from 0.05 to 5.0 μm.
[0039] refer to Figure 1 and Figure 2 Taking the area to the right of oblique line a as the main portion of first polarity region 103 and the area to the left as the specific topographical structure formed in this embodiment, the width W1 of the platform structure 106 extending from the upper end of the main portion of first polarity region 103 toward isolation region 105 ranges from 0.1 to 50 μm. Platform structure 106 within this width range can effectively increase the printing area of first polarity region 103 while ensuring the size of the open end of isolation region 105 to achieve isolation. The thickness H1 of platform structure 106 ranges from 0.05 to 5.0 μm. The appropriate thickness of platform structure 106 within this range is determined based on different process requirements to ensure its strength.
[0040] refer to Figure 3 and Figure 4 In one embodiment, the back-contact solar cell further includes: a buffer portion 107 disposed between the boss structure 106 and the interface optimization structure 108; the cross-sectional size of the buffer portion 107 gradually decreases in the direction from the backlight surface 102 toward the light-receiving surface 101.
[0041] That is, Figure 3 and Figure 4 In the direction indicated by the middle arrow, the horizontal cross-sectional dimension of the buffer portion 107 gradually decreases, so that the buffer portion 107 forms a triangular stable support between the boss structure 106 and the side wall of the isolation region 105, effectively alleviating the concentrated stress of the boss structure 106 at the intersection line with the side wall of the isolation region 105, and improving the reliability of the effective printing area of the boss structure 106 and even the entire first polarity region 103, ultimately improving battery performance and extending battery life. For example, in this embodiment, Figure 3In the cross-sectional schematic diagram shown, the cross-sectional shape of the buffer portion 107 is an inverted triangle or an inverted trapezoid. When the side wall surface of the isolation region 105 is a vertical surface, the cross-sectional shape of the buffer portion 107 is an inverted right triangle or an inverted right trapezoid; when the side wall surface of the isolation region 105 is a slope, the cross-sectional shape of the buffer portion 107 is an inverted ordinary triangle or an inverted ordinary trapezoid.
[0042] In some optional embodiments, the boss structure 106, the interface optimization structure 108 and the buffer portion 107 are only formed in the first polarity region 103, or the boss structure 106, the interface optimization structure 108 and the buffer portion 107 are only formed on the second polarity region 104, and the settings can be made according to specific process requirements.
[0043] refer to Figure 3 and Figure 4 On the basis of the above solution, the width of the intersection plane of the buffer portion 107 and the boss structure 106 is in the range of 0.1-10 μm, and the thickness of the buffer portion 107 is in the range of 0.05-5 μm.
[0044] Specifically, the intersection plane of the buffer portion 107 and the boss structure 106 is Figure 1 The upper end surface of the buffer portion 107 shown in FIG has the largest width within the buffer portion 107. Thus, the width W2 of the upper end surface of the buffer portion 107 ranges from 0.1 to 50 μm, and the thickness H2 of the buffer portion 107 ranges from 0.05 to 5 μm. In other words, the maximum width W2 of the buffer portion 107 can be equal to or less than the width W1 of the boss structure 106. This ensures reasonable control of the support effect on the boss structure 106 while ensuring the isolation effect of the isolation region 105. This prevents the boss structure 106 from breaking or collapsing, which could affect the subsequent placement of the passivation film or electrodes, thereby improving battery performance.
[0045] In one embodiment, the surface of the buffer portion 107 relatively close to the isolation region 105 has an uneven texture. Figure 3 and Figure 4 At the angle shown, the surface of the buffer portion 107 presents an uneven texture structure, such as a ridged shape from top to bottom or other morphology, thereby increasing the surface light trapping effect of the buffer portion 107, and helping to further enhance the separation and transmission efficiency of carriers in the polar region next to the isolation region 105, thereby improving battery performance.
[0046] In one embodiment, reference Figures 6 to 16 The following description will only take the first polarity region 103 of the battery substrate 100 as an example, where the first polarity region 103 is a p-region.
[0047] In the above-mentioned back-contact solar cell, the cell substrate 100 includes: a base layer 1 and a passivation contact structure located on one surface of the base layer 1 , and the side where the passivation contact structure is located is the backlight surface 102 of the cell substrate 100 .
[0048] The base layer 1 may be a silicon base, and the passivation contact structure may be a combination of a tunnel oxide layer and a doped polysilicon layer, or a combination of an intrinsic amorphous silicon layer and a doped amorphous silicon layer, depending on the design requirements of the battery.
[0049] For example, refer to Figures 6 to 16 In one embodiment, the passivation contact structure includes a stacked tunneling oxide layer 3 and a doping layer 4, wherein the tunneling oxide layer 3 is relatively close to the base layer 1; the base layer 1 forms an inner expansion layer 2 in the surface connected to the passivation contact structure.
[0050] That is, an inner expansion layer 2 is formed on the upper surface of the base layer 1, a tunneling oxide layer 3 is provided on the inner expansion layer 2, and a doping layer 4 is provided on the tunneling oxide layer 3. The tunneling oxide layer 3 is ultra-thin silicon oxide, and the doping layer 4 is p-type doped polysilicon.
[0051] The thickness of the doped layer 4 is in the range of 100-300 nm, the thickness of the tunnel oxide layer 3 is in the range of 1-10 nm, and the thickness of the inner extension layer 2 is in the range of 0.1-2 μm.
[0052] The morphology of the above-mentioned platform structure 106, buffer portion 107 and interface optimization structure 108 can be formed by methods such as etching. When forming on the p-region side, it can also be formed by controlling the wet process. For example, the platform structure 106 is a boron-doped area, and the corresponding hole or positive charge concentration is relatively high. During the wet etching process, that is, during the redox reaction of gaining and losing electrons, the reaction rate of this area will be slower than that of the base layer 1 of the silicon material, thereby forming the platform structure 106 on the surface. For the buffer portion 107, the boron doping concentration during the boron diffusion process will decrease from the surface layer to the inner layer, and the corresponding wet etching rate will also decrease, thereby forming a buffer portion 107 that is wide at the top and narrow at the bottom. The interface optimization structure 108 can also be formed by controlling the area of wet etching.
[0053] Accordingly, the boron doping process needs to be controlled. In one embodiment, the following steps may be specifically adopted: S1, select a double-sided polished silicon wafer.
[0054] Specifically, an N-type single crystal silicon wafer cut with diamond wire is placed in an alkaline polishing tank for double-side polishing at a temperature of 75-85° C. for 6-8 minutes to obtain a base layer 1.
[0055] S2, single boron diffusion, oxygen-free shallow advancement.
[0056] First, a boron diffusion is performed on the back side of the substrate layer 1 to deposit a portion of the boron source on the shallow surface of the substrate layer 1. The boron diffusion conditions here are: temperature range 800-950 ° C, diffusion time range 5-20 min, boron chloride flow range 10-50 sccm, oxygen flow range 100-500 sccm; then, an oxygen-free shallow push is performed to slightly advance the boron source into the interior of the substrate layer 1, paving the way for the subsequent deposition of a high-quality tunnel oxide layer 3; if this step is omitted and the tunnel oxide layer 3 is directly deposited, a large amount of boron atoms in the boron source will be "rebounded" to the tunnel oxide layer 3. The conditions for the oxygen-free shallow push are: temperature range 900-1050 ° C, time range 2-10 min.
[0057] S3, depositing a tunnel oxide layer 3 and intrinsic polysilicon.
[0058] The tunnel oxide layer 3 deposition conditions are as follows: LPCVD with an oxygen flow rate of 10,000–80,000 sccm, a temperature range of 400–800°C, a deposition time of 200–1000 s, and a thickness range of 1–10 nm. The intrinsic polysilicon deposition conditions are as follows: LPCVD with a tetrahydrosilicon flow rate of 300–2000 sccm, a temperature range of 500–700°C, a deposition time of 2–4 h, and a pressure range of 100–500 mTorr. The intrinsic polysilicon thickness range is 100–300 nm.
[0059] S4, secondary boron diffusion and deep oxidation advancement.
[0060] Finally, a secondary boron diffusion and deep oxidation drive are performed. Since the initial boron diffusion already provides a boron source on the surface of the base layer 1, a secondary boron diffusion step in step S4 minimizes the damage to the tunneling oxide layer 3 formed in step S3, ensuring its passivation properties. This step also allows sufficient boron atoms to diffuse into the base layer 1, creating a gradual boron doping gradient and further improving film performance. The secondary boron diffusion conditions are as follows: a boron diffusion temperature range of 800-950°C, a diffusion time range of 5-50 minutes, a boron chloride flow rate range of 20-100 sccm, and an oxygen flow rate range of 100-1000 sccm. The subsequent deep oxidation drive step is performed at a temperature range of 900-1050°C, an oxygen flow rate range of 5000-30000 sccm, and a drive time range of 30-80 minutes, resulting in the doped layer 4 and the final deep oxidation layer 2. The surface borosilicate glass layer is then removed for patterning.
[0061] In summary, by performing the above-mentioned oxygen-free shallow-drive first diffusion and oxidation deep-drive second diffusion, coupled with the wet cleaning process, an interface optimization structure 108 with a gradient change is formed on the sidewall surface of the isolation region 105, thereby achieving matching of structural parameters with battery performance. Figure 12 Schematic diagram of the curve showing the concentration of boron doped atoms changing with depth after boron diffusion. The doping concentration of the passivation contact structure and the inner diffusion layer changes relatively smoothly.
[0062] On this basis, in the stacking direction of the four-layer structure of doped layer 4, tunneling oxide layer 3, inner expansion layer 2, and base layer 1, for convenience of description, the doped layer 4 is used as the first layer, the tunneling oxide layer 3 is used as the second layer, the inner expansion layer 2 is used as the third layer, and the base layer 1 is used as the fourth layer. The back-contact solar cell comprising the aforementioned boss structure 106, interface optimization structure 108, and buffer portion 107 is used as an example for explanation. The structural composition of these three structures can be various, and they can be formed by methods such as etching. The following description is based on the composition of the boss structure 106. It should be noted that the base layer 1 here refers to the portion outside the inner expansion layer 2.
[0063] refer to Figure 6 In an optional embodiment, the platform structure 106 may include a different three-layer structure. That is, in the direction from the backlight surface 102 to the light-receiving surface 101, the platform structure 106 includes the doped layer 4, the tunneling oxide layer 3, and at least a portion of the inner expansion layer 2. In a specific embodiment, the platform structure 106 includes the entire thickness of the doped layer 4, the entire thickness of the tunneling oxide layer 3, the entire thickness of the inner expansion layer 2, and a portion of the thickness of the base layer 1.
[0064] In another embodiment, the mesa structure 106 includes the entire thickness of the doped layer 4 , the entire thickness of the tunnel oxide layer 3 , and the entire thickness of the inner extension layer 2 .
[0065] In another embodiment, the boss structure 106 includes the entire thickness of the doped layer 4, the entire thickness of the tunnel oxide layer 3, and a portion of the thickness of the inner extension layer 2. Figure 6 shown.
[0066] In this embodiment, the third type, that is, the boss structure 106 includes the entire thickness of the doping layer 4, the entire thickness of the tunneling oxide layer 3 and a portion of the thickness of the inner expansion layer 2. The doped structural layer is easier to process graphically, reducing the process difficulty of the boss structure 106, the buffer portion 107 and the interface optimization structure 108. At the same time, it is convenient for the interface optimization structure 108 to better enhance the built-in electric field strength. Of course, when the interface optimization structure 108 corresponds to the base layer 1, it can also guide the separation and transmission of hole-electron pairs.
[0067] On this basis, the sizes of the buffer portion 107 and the interface optimization structure 108 below the boss structure 106 can be set according to the process requirements, that is, the buffer portion 107 can include one layer, such as only the inner expansion layer 2 material; or two different layers, including the inner expansion layer 2 and the base layer 1. Figure 6 For example, the thickness of the buffer portion 107 only includes the remaining thickness of the inner expansion layer 2 , and the interface optimization structure 108 is formed on the base layer 1 .
[0068] refer to Figures 7 to 9 In another alternative embodiment, the platform structure 106 may comprise a two-layer structure, with the second layer being either full or partial. Specifically, in the direction from the backlight surface 102 toward the light-receiving surface 101, the platform structure 106 comprises the doped layer 4 and at least a portion of the tunneling oxide layer 3. Based on this, the dimensions of the buffer portion 107 and the interface optimization structure 108 beneath the platform structure 106 can be adjusted based on process requirements.
[0069] In a specific embodiment, the boss structure 106 includes the entire thickness of the doped layer 4 and the entire thickness of the tunnel oxide layer 3. In this case, the buffer portion 107 may include two different layers, that is, the entire inner expansion layer 2 and a portion of the base layer 1, and the interface optimization structure 108 only includes a portion of the base layer 1. Alternatively, the buffer portion 107 includes a single layer structure, that is, including all or part of the third layer, such as Figure 7 For example, the buffer portion 107 includes a portion of the inner expansion layer 2, and the interface optimization structure 108 includes another portion of the inner expansion layer 2 and a portion of the base layer 1; when the buffer portion 107 includes the entire inner expansion layer 2, the interface optimization structure 108 also only includes a portion of the base layer 1.
[0070] In another specific embodiment, the boss structure 106 includes the entire thickness of the doped layer 4 and a portion of the thickness of the tunneling oxide layer 3. In this case, the buffer portion 107 may include a different three-layer structure, namely, another portion of the tunneling oxide layer 3, the entire inner expansion layer 2, and a portion of the base layer 1, and the interface optimization structure 108 includes a portion of the base layer 1. Alternatively, the buffer portion 107 includes a different two-layer structure, namely, another portion of the tunneling oxide layer 3 and all or part of the inner expansion layer 2. Figure 8 The buffer portion 107 includes another portion of the tunnel oxide layer 3 and a portion of the inner expansion layer 2. The interface optimization structure 108 may include another portion of the thickness of the inner expansion layer 2 and a portion of the thickness of the base layer 1. Of course, the buffer portion 107 may also include only another portion of the tunnel oxide layer 3, such as Figure 9 shown.
[0071] refer to Figures 10 to 16In another optional embodiment, the platform structure 106 includes all or part of the first layer structure. That is, in the direction from the backlight surface 102 to the light-receiving surface 101, the platform structure 106 includes at least part of the doped layer 4. Based on this, the dimensions of the buffer portion 107 and the interface optimization structure 108 below the platform structure 106 can be set according to process requirements.
[0072] In a specific embodiment, the boss structure 106 includes the entire thickness of the doped layer 4. In this case, the buffer portion 107 may include different three-layer structures, namely, the entire tunneling oxide layer 3, the entire inner expansion layer 2, and a portion of the base layer 1, and the interface optimization structure 108 includes a portion of the base layer 1. Alternatively, the buffer portion 107 may include different two-layer structures, namely, the entire tunneling oxide layer 3 and the entire or partial inner expansion layer 2. Figure 10 The buffer portion 107 includes the entire tunnel oxide layer 3 and a portion of the inner diffusion layer 2. Alternatively, the buffer portion 107 may include only the entire or a portion of the tunnel oxide layer 3. Figure 11 The buffer portion 107 includes the entire structure of the tunnel oxide layer 3. Figure 12 The case where the buffer portion 107 includes a portion having a layer structure of the tunnel oxide layer 3 is shown.
[0073] In another specific embodiment, the boss structure 106 includes a portion of the thickness of the doped layer 4. In this case, the buffer portion 107 may include a different four-layer structure, namely, another portion of the doped layer 4, the entire tunnel oxide layer 3, the entire inner expansion layer 2, and a portion of the base layer 1, and the interface optimization structure 108 includes a portion of the base layer 1. Alternatively, the buffer portion 107 may include a different three-layer structure, namely, another portion of the doped layer 4, the entire tunnel oxide layer 3, and all or part of the inner expansion layer 2. Figure 13 The buffer portion 107 is shown to include another portion of the doped layer 4, the entire tunnel oxide layer 3, and a portion of the inner diffusion layer 2. Alternatively, the buffer portion 107 may also include a different two-layer structure, namely, another portion of the doped layer 4 and the entire or partial tunnel oxide layer 3. Figure 14 The buffer portion 107 is shown to include another portion of the doped layer 4 and the entire tunnel oxide layer 3. In this case, the interface optimization structure 108 can be a portion of the inner expansion layer 2, or the entire inner expansion layer 2, or the entire inner expansion layer 2 and a portion of the base layer 1. Figure 15 The buffer portion 107 is shown to include another portion of the doped layer 4 and a portion of the tunnel oxide layer 3. Alternatively, the buffer portion 107 may also include only the portion of the doped layer 4. Figure 16 The diagram shows a case where the buffer portion 107 only includes another portion of the doped layer 4 . In this case, the interface optimization structure 108 is a two-layer structure. Of course, in other cases, the interface optimization structure 108 may also be a three-layer structure or a one-layer structure.
[0074] In the above embodiments, the interface optimization structure 108 preferably corresponds to at least a portion of the doped structural layer, that is, the end of the interface optimization structure 108 close to the bottom surface of the isolation region 105 is preferably higher than or equal to the interface between the inner expansion layer 2 and the base layer 1.
[0075] This embodiment also provides a battery assembly, comprising a plurality of the above-mentioned back-contact solar cells.
[0076] The battery assembly of this embodiment includes a plurality of the aforementioned back-contact solar cells. The upper surfaces of the first polarity region 103 and the second polarity region 104 in the back-contact solar cells form a raised platform structure 106 extending from the main portion of the polarity region toward the isolation region 105. This increases the effective printing area of the first polarity region 103 and the second polarity region 104, allowing more metal paste to contact them during subsequent screen printing, improving carrier transport and collection performance. It also further reduces the difficulty of positioning the electrode during printing, thereby improving printing yield. Furthermore, a support structure is provided at the intersection of the lower surface of the platform structure 106 and the sidewall of the isolation region 105 to reduce the cantilever size of the platform structure 106 and the concentrated stress at the intersection of the platform structure 106 and the polarity region. This increases the strength of the effective area of the first polarity region 103 and the second polarity region 104 used for printing electrodes, ensuring the reliability of the printed electrodes and ultimately improving the output performance and power generation efficiency of the battery.
[0077] In summary, electrical performance tests were conducted using the battery of Comparative Example 1, the battery of Example 1, and the battery of Example 2. All three batteries had the same membrane layer, boss structure 106, and buffer portion 107. However, the battery of Comparative Example 1 did not include the interface optimization structure 108. The interface optimization structure 108 of Example 1 included one optimization unit, while the interface optimization structure 108 of Example 2 included two optimization units. The data from the electrical performance tests are shown in the following table:
[0078] As can be seen from the table above, compared with Comparative Example 1, the batteries of Example 1 and Example 2 have a higher conversion efficiency ( η )、Open circuit voltage( V oc )、Short-circuit current density( J sc ), fill factor ( FF ) and various current performance parameters such as bifaciality are better than those of comparative example 1, that is, the interface optimization structure 108 adopted in this embodiment 1 and embodiment 2 can effectively improve the performance of the back-contact solar cell, and the interface optimization structure 108 is set to two layers for the best performance of the optimized unit cell and has a better bifaciality.
[0079] The further functional description of each of the above parts is the same as that of the above corresponding embodiments and will not be repeated here.
[0080] While the above description does not provide detailed technical details regarding patterning and etching of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to form the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.
[0081] Although the embodiments of the present disclosure have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations are all within the scope defined by the appended claims.
Claims
1. A back contact solar cell, characterized in that: include: A battery substrate, the battery substrate having a light-receiving surface and a backlight surface disposed opposite to each other, the backlight surface including first polarity regions and second polarity regions arranged alternately, and an isolation region formed by being recessed inward from the backlight surface between the first polarity regions and the second polarity regions; The battery matrix further comprises: a boss structure, wherein the boss structure is formed by protruding from a surface of the first polarity region and / or the second polarity region toward the isolation region; An interface optimization structure, wherein the interface optimization structure is protruded on at least a portion of the side wall surface of the isolation region and is arranged close to the boss structure; the interface optimization structure includes at least one optimization unit, one end of the optimization unit is connected to the boss structure, and the other end is spaced apart from the bottom surface of the isolation region; when the interface optimization structure includes a plurality of optimization units stacked in sequence in a direction perpendicular to the side wall surface of the isolation region, the spacing distance between the plurality of optimization units and the bottom surface of the isolation region increases in the stacking direction of the plurality of optimization units.
2. The back contact solar cell according to claim 1, wherein: The length of the interface optimization structure is less than or equal to 2 / 3 of the length of the sidewall surface of the isolation region.
3. The back contact solar cell according to claim 1, wherein: The sidewall surface of the isolation region is in a slope structure.
4. The back contact solar cell according to claim 1, wherein: In the arrangement direction of the first polarity region and the second polarity region, the width of the boss structure ranges from 0.1 to 50 μm; the thickness of the boss structure ranges from 0.05 to 5.0 μm.
5. The back contact solar cell according to claim 1, wherein: Also includes: A buffer portion is provided between the boss structure and the interface optimization structure; and a cross-sectional size of the buffer portion gradually decreases in a direction from the backlight surface toward the light-receiving surface.
6. The back contact solar cell according to claim 5, characterized in that The width of the intersection plane of the buffer portion and the boss structure is in the range of 0.1 to 10 μm, and the thickness of the buffer portion is in the range of 0.05 to 5 μm.
7. The back contact solar cell according to claim 6, characterized in that A surface of the buffer portion relatively close to the isolation region has an uneven texture structure.
8. The back contact solar cell according to claim 7, characterized in that The battery matrix includes: a base layer and a passivation contact structure located on one side of the base layer. The side where the passivation contact structure is located is the backlight side of the battery matrix.
9. The back contact solar cell according to claim 8, characterized in that The passivation contact structure includes a tunneling oxide layer and a doping layer that are stacked. The tunneling oxide layer is relatively close to the base layer. The base layer forms an inner expansion layer in a surface connected to the passivation contact structure.
10. The back contact solar cell according to claim 9, characterized in that The thickness of the doping layer is in the range of 100-300 nm, the thickness of the tunneling oxide layer is in the range of 1-10 nm, and the thickness of the inner diffusion layer is in the range of 0.1-2 μm.
11. The back contact solar cell according to claim 10, characterized in that In the direction from the backlight surface toward the light-receiving surface, the boss structure is correspondingly arranged on the doping layer, the tunneling oxide layer and at least a portion of the inner diffusion layer.
12. The back contact solar cell according to claim 10, characterized in that In the direction from the backlight surface toward the light-receiving surface, the boss structure is correspondingly arranged on the doping layer and at least a portion of the tunneling oxide layer.
13. The back contact solar cell according to claim 10, characterized in that In a direction from the backlight surface toward the light-receiving surface, the boss structure is correspondingly disposed on at least a portion of the doping layer.
14. A battery assembly, characterized in that: include: A back-contact solar cell according to any one of claims 1 to 13.
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