Impedance detection circuit, transmitter output calibration device and transmitter equipment

Abstract

The invention discloses an impedance detection circuit, a transmitter output calibration device and transmitter equipment, and belongs to the field of testing. The impedance detection circuit provided by the invention comprises an interface chip and a reference detection module which are arranged on a PCB (Printed Circuit Board), the interface chip is provided with a first output pin and a second output pin, and the first output pin and the second output pin are connected with the reference detection module through PCB wiring; the interface chip comprises a transmitter, an analog-to-digital conversion module, an adjustable resistor module and a read-out control module; a first transmitting port of the transmitter is connected with the first output pin, and a second transmitting port of the transmitter is connected with the second output pin; the analog-to-digital conversion module is connected with the adjustable resistor module and the read-out control module; the read-out control module is connected with the adjustable resistor module; and the interface chip is used for reading out the first data output by the control module, the current source voltage signal measured by the reference detection module and the known reference current based on the resolution of the analog-to-digital conversion module, and calculating to obtain the output path impedance.

Description

Technical Field

[0001] The present application belongs to the field of testing, and specifically relates to an impedance detection circuit, a transmitter output calibration device and a transmitter device. Background Art

[0002] Interface chips typically consist of two circuits: a transmitter and a receiver. To improve the performance of the transmitter circuitry on an interface chip and eliminate variations between different interface chips, it's often necessary to calibrate characteristics such as the transmitter's output impedance and output amplitude. In practical applications, interface chips typically have output path impedance, which primarily includes the contact impedance between the interface chip's output pins and the circuit board, resulting from soldering or pressure, as well as the circuit board trace impedance. This can cause errors in the calibration results of transmitter output impedance and output amplitude due to the presence of output path impedance. Therefore, testing the output path impedance of interface chips is essential.

[0003] To mitigate the impact of output path impedance, current techniques typically add chip test circuitry and test pins to the transmitter portion of the interface chip to directly measure the output path impedance. However, this approach requires integrating additional, bulky calibration circuitry and increasing the interface chip area and packaging costs. Summary of the Invention

[0004] The embodiments of the present application provide an impedance detection circuit, a transmitter output calibration device, and a transmitter device, which directly utilize the resolution of the analog-to-digital conversion module inside the interface chip to achieve output path impedance measurement without the need for additional chip test pins, with high integration and low cost.

[0005] In a first aspect, an embodiment of the present application provides an impedance detection circuit, comprising: an interface chip and a reference detection module, both of which are disposed on a PCB; the interface chip having a first output pin and a second output pin, the first output pin and the second output pin being connected to the reference detection module via PCB traces; The interface chip includes a transmitter, an analog-to-digital conversion module, an adjustable resistor module, and a readout control module; the transmitter has a first transmit port and a second transmit port, the first transmit port is connected to the first output pin, and the second transmit port is connected to the second output pin; the analog-to-digital conversion module has a first input port, a second input port, and an output port, the first input port is connected to the first output pin and the first end of the adjustable resistor module, the second input port is connected to the second output pin and the second end of the adjustable resistor module, and the output port is connected to the readout control module; the readout control module is connected to the third end of the adjustable resistor module; In which, when the impedance detection circuit is in a measuring state, the interface chip is used to calculate the output path impedance between the interface chip and the reference detection module based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current.

[0006] In a second aspect, an embodiment of the present application provides a transmitter output calibration device, which may include a transmitter output calibration circuit and the impedance detection circuit as described in the first aspect; The impedance detection circuit is used to measure the output path impedance between the interface chip and the reference detection module; The transmitter output calibration circuit is used to calibrate the output parameters of the transmitter and correct the output parameters according to the output path impedance during the calibration process; The output parameter includes at least one of output impedance and output amplitude.

[0007] In a third aspect, an embodiment of the present application provides a transmitter device, which may include a transmitter output calibration device as described in the second aspect. The transmitter device is used to control the adjustable resistance module and the analog-to-digital conversion module to be in a disconnected state when the output parameter calibration of the transmitter is completed, so that the transmitter can operate normally.

[0008] In an embodiment of the present application, an impedance detection circuit includes an interface chip and a reference detection module, both of which are arranged on a PCB board; the interface chip has a first output pin and a second output pin, and the first output pin and the second output pin are connected to the reference detection module through PCB board wiring; the interface chip includes a transmitter, an analog-to-digital conversion module, an adjustable resistor module, and a readout control module; the transmitter has a first transmit port and a second transmit port, the first transmit port is connected to the first output pin, and the second transmit port is connected to the second output pin; the analog-to-digital conversion module has a first input port, a second input port, and an output port, the first input port is connected to the first output pin and the first end of the adjustable resistor module, the second input port is connected to the second output pin and the second end of the adjustable resistor module, and the output port is connected to the readout control module; the readout control module is connected to the third end of the adjustable resistor module; wherein, when the impedance detection circuit is in a measurement state, the interface chip is used to calculate the output path impedance between the interface chip and the reference detection module based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and a known reference current. In this way, since the output path impedance between the interface chip and the reference detection module can be obtained based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current, the resolution of the analog-to-digital conversion module inside the interface chip can be directly used to achieve the measurement of the output path impedance without the need for additional chip test pins, resulting in high integration and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A schematic structural diagram of an impedance detection circuit provided in some embodiments of the present application; Figure 2 A schematic structural diagram of an impedance detection circuit provided in some embodiments of the present application; Figure 3 A schematic structural diagram of an impedance detection circuit provided in some embodiments of the present application; Figure 4-1 A schematic structural diagram of an impedance detection circuit provided in some embodiments of the present application; Figure 4-2 A schematic structural diagram of an impedance detection circuit provided in some embodiments of the present application; Figure 5 A schematic structural diagram of an impedance detection circuit provided in some embodiments of the present application; Figure 6 A schematic structural diagram of a transmitter output calibration device provided in some embodiments of the present application; Figure 7 A schematic structural diagram of a transmitter device provided for some embodiments of the present application.

[0010] Description of reference numerals: 10 - Impedance detection circuit; 100 - Interface chip; TXP - First output pin of the interface chip; TXN - Second output pin of the interface chip; 110 - Transmitter; TX+ - First transmission port of the transmitter; TX- - Second transmission port of the transmitter; 120 - Analog-to-digital conversion module; A1 - First input port of the analog-to-digital conversion module; A2 - Second input port of the analog-to-digital conversion module; A3 - Output port of the analog-to-digital conversion module; 130 - Readout control module; 131 - Sampling storage circuit; 132 - Data comparison circuit; 133 - Logic control circuit; R SA - adjustable resistance module; 140 - first switching module; 200 - reference detection module; 210 - current source; R P -Output path impedance between the interface chip and the reference detection module; R1-Contact impedance of the first output pin TXP; R2-Trace impedance of the first output pin TXP on the circuit board; R3-Contact impedance of the second output pin TXN; R4-Trace impedance of the second output pin TXN on the circuit board; 220-Analog-to-digital conversion chip; B1-First input pin of the analog-to-digital conversion chip; B2-Second input pin of the analog-to-digital conversion chip; 300-Second switching module; 20-Transmitter output calibration circuit; 600-Transmitter output calibration device; 700-Transmitter equipment. DETAILED DESCRIPTION

[0011] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0012] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0013] The terms used in the implementation section of this application are only used to explain the specific embodiments of this application and are not intended to limit this application.

[0014] The following is an explanation of the terms involved in the embodiments of the present application.

[0015] Interface chip: An interface chip is an Ethernet chip with data transmission and reception functions. An interface chip usually consists of two circuits: a transmitter and a receiver. In order to improve the performance of the transmitter circuit on the interface chip and eliminate the differences between different interface chips, it is usually necessary to calibrate the output impedance, output amplitude and other characteristics of the transmitter circuit of the interface chip. The output path impedance R generated by the interface chip on the circuit board P The accuracy of the calibration results may be affected.

[0016] Output path impedance R P : In the case where the interface chip has a first output pin TXP and a second output pin TXN, the output path impedance R P It may be composed of a contact impedance R1 corresponding to the first output pin TXP, a trace impedance R2 corresponding to the first output pin TXP on the circuit board, a contact impedance R3 corresponding to the second output pin TXN, and a trace impedance R4 corresponding to the second output pin TXN on the circuit board.

[0017] Transmitter: It is a functional module inside the interface chip that transmits signals at a certain frequency.

[0018] Analog-to-digital conversion module: It is a functional module inside the interface chip that converts the transmitted signal from an analog signal to a digital signal.

[0019] The resolution of an analog-to-digital converter is the minimum voltage signal that the module can distinguish and quantize. For example, an 8-bit analog-to-digital converter has a range of 0-5V. When the input voltage is 0V, the output is 0; when the input voltage is 5V, the output is 255. When the output increases by 1, the input voltage actually increases by 5V / 256 = 0.0195V. The minimum voltage signal that the module can distinguish and quantize is 0.0195V, corresponding to the resolution of the module.

[0020] The readout control module is a functional module used to read the output data from the analog-to-digital conversion module. The readout control module can be composed of a sampling and storage circuit, a data comparison circuit, and a logic control circuit. The sampling and storage circuit is responsible for sampling data synchronously using the analog-to-digital conversion module's clock and storing it in a register. The data comparison circuit is responsible for extracting the data from the register and comparing it with the maximum range of the analog-to-digital conversion module. If the extracted data is close to but less than the maximum range of the analog-to-digital conversion module, the analog-to-digital conversion module is operating at optimal accuracy and outputs data Cout. If the extracted data exceeds the maximum range of the analog-to-digital conversion module, the analog-to-digital conversion module is determined to be operating in a distorted state, and signal conversion fails. When the analog-to-digital conversion module is in a distorted state, the logic control circuit uses an impedance adjustment signal to change the resistance value of the adjustable resistor until the data extracted by the data comparison circuit is close to but less than the maximum range of the analog-to-digital conversion module, thereby improving the conversion accuracy of the analog-to-digital conversion module.

[0021] Adjustable resistor module: The adjustable resistor module is set at the differential input port of the analog-to-digital conversion module, and the adjustable resistor module is used to adjust the conversion accuracy of the analog-to-digital conversion module.

[0022] Benchmark detection module: The benchmark detection module includes a current source and an analog-to-digital conversion chip, which is used to provide the environment required to detect the output path impedance.

[0023] Current source: The current source is connected to the first output pin TXP and the second output pin TXN of the interface chip to provide an accurate and constant reference current.

[0024] Analog-to-digital converter chip: This is a functional module outside the interface chip that tests and records voltage signals. The analog-to-digital converter chip is connected to the current source and the output pins of the interface chip to test and record the differential voltage signal output by the transmitter within the interface chip.

[0025] The impedance detection circuit provided in the embodiment of the present application is described in detail below through specific embodiments and application scenarios in conjunction with the accompanying drawings.

[0026] Figure 1 A schematic structural diagram of an impedance detection circuit provided in an embodiment of the present application.

[0027] like Figure 1 As shown, the impedance detection circuit 10 provided in the embodiment of the present application may include: an interface chip 100 and a reference detection module 200; the interface chip 100 has a first output pin TXP and a second output pin TXN, and the first output pin TXP and the second output pin TXN of the interface chip 100 are connected to the reference detection module 200 through PCB board wiring; The interface chip 100 may include a transmitter 110, an analog-to-digital conversion module 120, an adjustable resistance module R SA and a readout control module 130; the transmitter 110 has a first transmission port TX+ and a second transmission port TX-, the first transmission port TX+ of the transmitter 110 is connected to the first output pin TXP of the interface chip 100, and the second transmission port TX- of the transmitter 110 is connected to the second output pin TXN of the interface chip 100; the analog-to-digital conversion module 120 has a first input port A1, a second input port A2 and an output port A3, the first input port A1 of the analog-to-digital conversion module 120 is connected to the first output pin TXP of the interface chip 100, the adjustable resistor module R SA The first end of the analog-to-digital conversion module 120 is connected to the second input port A2 of the interface chip 100 and the second output pin TXN of the adjustable resistance module R SA The second end of the analog-to-digital conversion module 120 is connected to the output port A3 of the analog-to-digital conversion module 120 and the readout control module 130; the readout control module 130 is connected to the adjustable resistance module R SA The third end is connected; When the impedance detection circuit 10 is in the measurement state, the interface chip 100 is used to convert the impedance of the analog-to-digital converter module 120 into a fixed value. AD , the first data Cout_RSA output by the read control module 130, and the current source voltage signal V measured by the reference detection module 200 DC and the known reference current I E , calculate the output path impedance R between the interface chip 100 and the reference detection module 200 P .

[0028] In the embodiment of the present application, the first output pin TXP and the second output pin TXN of the interface chip 100 can be a pair of differential output ports. The first transmit port TX+ and the second transmit port TX- of the transmitter 110 can be a pair of differential transmit ports. The first input port A1 and the second input port A2 of the analog-to-digital conversion module 120 can be a pair of differential input ports.

[0029] In the embodiment of the present application, when the impedance detection circuit 10 is in the measurement state, the transmitter 110 is in the off state, the reference detection module 200 provides a reference power supply, and the reference current I output by the reference detection module 200 is E The voltage is returned to the reference detection module 200 in sequence through the PCB trace, the first output pin TXP of the interface chip 100, the first input port A1 of the analog-to-digital conversion module 120, the second input port A2 of the analog-to-digital conversion module 120, the second output pin TXN of the interface chip 100, and the PCB trace. Based on this, the differential voltage signal V1 of the differential input port of the analog-to-digital conversion module 120 can be obtained by the power supply voltage signal VDC Subtract the output path impedance R P The corresponding voltage divider V3 is represented by the output path impedance R P The corresponding divided voltage V3 can be obtained by the known reference current I E And the output path impedance R between the interface chip 100 and the reference detection module 200 P The product of .

[0030] In some embodiments of the present application, the resolution S of the analog-to-digital conversion module 120 is AD The resolution S of the analog-to-digital conversion module 120 is the minimum voltage signal that can be distinguished and quantized. AD It can be a pre-obtained, known value. In the case of reading the first data Cout_RSA output by the control module 130, the first data Cout_RSA is proportional to the resolution S of the analog-to-digital conversion module 120. AD The multiplication can obtain the differential voltage signal of the differential input port of the analog-to-digital conversion module 120. P The resolution S of the analog-to-digital conversion module 120 can be AD , the first data Cout_RSA output by the analog-to-digital conversion module 120, and the current source voltage signal V measured by the reference detection module 200 DC And the reference current I output by the benchmark detection module 200 E get.

[0031] Thus, due to the output path impedance R between the interface chip 100 and the reference detection module 200 P Based on the resolution S of the analog-to-digital conversion module AD , the first data Cout_RSA output by the analog-to-digital conversion module, the current source voltage signal V measured by the reference detection module 200 DC and the known reference current I E The output path impedance can be measured by directly utilizing the resolution of the analog-to-digital conversion module in the interface chip without adding additional chip test pins, thereby achieving high integration and low cost.

[0032] An impedance detection circuit provided in an embodiment of the present application may include an interface chip and a reference detection module, both of which are arranged on a PCB board; the interface chip has a first output pin and a second output pin, the first output pin and the second output pin being connected to the reference detection module via PCB board traces; the interface chip includes a transmitter, an analog-to-digital conversion module, an adjustable resistor module, and a readout control module; the transmitter has a first transmit port and a second transmit port, the first transmit port being connected to the first output pin, and the second transmit port being connected to the second output pin; the analog-to-digital conversion module has a first input port, a second input port, and an output port, the first input port being connected to the first output pin and a first end of the adjustable resistor module, the second input port being connected to the second output pin and a second end of the adjustable resistor module, and the output port being connected to the readout control module; the readout control module being connected to a third end of the adjustable resistor module; wherein, when the impedance detection circuit is in a measurement state, the interface chip is configured to calculate the output path impedance between the interface chip and the reference detection module based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and a known reference current. In this way, since the output path impedance between the interface chip and the reference detection module can be obtained based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current, the resolution of the analog-to-digital conversion module inside the interface chip can be directly used to achieve the measurement of the output path impedance without the need for additional chip test pins, resulting in high integration and low cost.

[0033] In some specific embodiments of the present application, the benchmark detection module 200 may include a current source 210 and an analog-to-digital conversion chip 220; the first output pin TXP and the second output pin TXN are connected to the current source 210 through PCB board wiring; the analog-to-digital conversion chip 220 has a first input pin B1 and a second input pin B2; the first input pin B1 of the analog-to-digital conversion chip 220 is connected to one end of the current source 210, and the second input pin B2 of the analog-to-digital conversion chip 220 is connected to the other end of the current source 210.

[0034] When the impedance detection circuit 10 is in the measurement state, the transmitter 110 is in the off state and the current source 210 is in the on state; the current source 210 is used to output the reference current I E The analog-to-digital conversion module 120 is used to convert the first differential voltage signal V1 between the first input port A1 and the second input port A2 into a first digital voltage signal; the readout control module 130 is used to sample the first digital voltage signal to obtain first data and output the first data Cout_RSA; the analog-to-digital conversion chip 220 is used to measure the current source voltage signal V across the current source 210. DC ; The interface chip 100 is used for the resolution S based on the analog-to-digital conversion module 120. AD The product of the first data Cout_RSA and the first differential voltage signal V1 is obtained; based on the current source voltage signal V at both ends of the current source 210 DC The difference between the voltage value of the first differential voltage signal V1 and the voltage value of the first differential voltage signal V3 is obtained; based on the third differential voltage signal value V3 and the reference current I E The output path impedance R is calculated P ; Wherein, the reference current I E is the constant current output by the current source 210 .

[0035] The resolution S of the analog-to-digital conversion module 120 is AD is a known value. The first data Cout_RSA may be binary data. For example, if the analog-to-digital conversion module 120 is an analog-to-digital conversion module with an 8-bit resolution, the first data Cout_RSA may be any binary data between 0 and 255.

[0036] In this way, the embodiment of the present application can be based on V1=R P ×I E , V3=V DC -V1;V3=Cout_RSA×S AD , calculate R P =[V DC -(Cout_RSA×S AD )] / I E Since the output path impedance R is calculated in the embodiment of the present application P When using the calculation parameters given inside the interface chip, that is, the first data Cout_RSA, which is the binary data output by the analog-to-digital conversion module, does not require a precise quantized voltage value, which greatly reduces the design complexity of the analog-to-digital conversion module inside the interface chip and can be implemented in a simple circuit architecture.

[0037] In some embodiments of the present application, Figure 2 or Figure 3 As shown, the output path impedance R P During the measurement process, the current source 210 can be a constant current source I DC Compared with voltage source and resistor, constant current source I DC It has the advantages of strong anti-noise interference ability and high precision. DC The output reference current can be a stable current value, thereby improving the measurement output path impedance R P accuracy.

[0038] In some embodiments of the present application, the output path impedance R P Before measuring, the embodiment of the present application can first use the analog-to-digital conversion chip outside the interface chip 100 to quantize the resolution S of the analog-to-digital conversion module 120. AD .like Figure 2 or Figure 3 As shown, the impedance detection circuit 10 provided in the embodiment of the present application may further include an analog-to-digital conversion chip 220; the analog-to-digital conversion chip 220 has a first input pin B1 and a second input pin B2; the first input pin B1 of the analog-to-digital conversion chip 220 is connected to one end of the current source 210, and the second input pin B2 of the analog-to-digital conversion chip 220 is connected to the other end of the current source 210.

[0039] The impedance detection circuit 10 has a debugging state. When the impedance detection circuit 10 is in the debugging state, the transmitter 110 is in the on state, the current source 210 is in the off state, and the interface chip 100 is used to detect the second differential voltage signal V based on the analog-to-digital conversion chip 220. TX And the second data output by the read control module 130 is calculated as Cout_TX to obtain the resolution S of the analog-to-digital conversion module 120 AD .

[0040] In a specific embodiment, when the impedance detection circuit 10 is in the debugging state, the first input pin B1 and the second input pin B2 of the analog-to-digital conversion chip 220 can obtain the second differential voltage signal V output by the first transmission port TX+ and the second transmission port TX- of the transmitter 110. TX , and then the analog-to-digital conversion chip 220 can detect and record the second differential voltage signal V TX The specific value of .

[0041] The analog-to-digital conversion module 120 is used to convert the second differential voltage signal V TX Converted into a second digital voltage signal; the readout control module 130 is used to sample the second digital voltage signal to obtain second data Cout_TX, and output the second data Cout_TX.

[0042] The interface chip 100 is used to convert the second differential voltage signal V measured by the analog-to-digital conversion chip 220. TX And the second data output by the read control module 130 is calculated as Cout_TX to obtain the resolution S of the analog-to-digital conversion module 120 AD .

[0043] For example, when the impedance detection circuit 10 is in a debugging state, the transmitter 110 is configured to output the second differential voltage signal V TX; The analog-to-digital conversion chip 220 is used to output the second differential voltage signal V TX The analog-to-digital conversion module 120 is used to convert the second differential voltage signal V between the first input port A1 and the second input port A2 TX Converted into a second digital voltage signal; the readout control module 130 is used to sample the second digital voltage signal to obtain second data Cout_TX and output the second data Cout_TX; The resolution S of the analog-to-digital conversion module 120 is AD is the second differential voltage signal V TX The ratio of the second data Cout_TX to the first data Cout_TX.

[0044] Thus, the embodiment of the present application uses the analog-to-digital conversion chip 220 to measure and record the second differential voltage signal V output by the transmitter 110. TX and record the second differential voltage signal V TX The read control module outputs the second data Cout_TX, and the resolution S of the analog-to-digital conversion module inside the measurement and recording interface chip 100 is AD .

[0045] In actual applications, due to the fact that the transmitter is not calibrated and there are process deviations between different interface chips, the voltage signal emitted by the transmitter may be too large or too small, and the offset voltage of the analog-to-digital conversion module of each interface chip is also different. In order to ensure the working state and accuracy of each analog-to-digital conversion module, some embodiments of the present application can use the readout control module to adjust the adjustable resistance module until the second data Cout_TX output by the analog-to-digital conversion module is close to and less than the maximum range of the analog-to-digital conversion module, thereby improving the conversion accuracy of the analog-to-digital conversion module. Specifically, the readout control module 130 is also used to adjust the adjustable resistance module R SA until the second data Cout_TX is less than or equal to the preset data, which is obtained based on the maximum range of the analog-to-digital conversion module 120. SA until the second data Cout_TX output by the read control module 130 is close to and smaller than the maximum range of the analog-to-digital conversion module, thereby improving the conversion accuracy of the analog-to-digital conversion module.

[0046] For example, if Figure 3As shown, in the impedance detection circuit 10 provided in the embodiment of the present application, the readout control module 130 may include: a sampling storage circuit 131, a data comparison circuit 132 and a logic control circuit 133; the output port A3 of the analog-to-digital conversion module 120 is connected to the sampling storage circuit 131; the sampling storage circuit 131 is connected to the data comparison circuit 132; the data comparison circuit 132 is connected to the logic control circuit 133, and the logic control circuit 133 is connected to the adjustable resistance module R SA The third end is connected.

[0047] For example, if Figure 3 As shown, in the impedance detection circuit 10 provided in the embodiment of the present application, the adjustable resistance module R SA The adjustable resistance module R has a first end, a second end and a third end. SA The first end of the adjustable resistance module R is connected to the first input port A1 of the analog-to-digital conversion module 120; SA The second end of the adjustable resistance module R is connected to the second input port A2 of the analog-to-digital conversion module 120; SA The third end is connected to the logic control circuit 133.

[0048] When the impedance detection circuit is in the debugging state, the sampling and storage circuit 131 is used to sample the second digital voltage signal output by the analog-to-digital conversion module 120 to obtain the second data Cout_TX, and store the second data Cout_TX in the register; the data comparison circuit 132 is used to extract the second data Cout_TX from the register, and compare the second data Cout_TX with the preset data, wherein the preset data is obtained based on the maximum range of the analog-to-digital conversion module 120; when the second data Cout_TX is less than or equal to the preset data, the second data Cout_TX is output; when the data comparison circuit 132 determines that the second data Cout_TX is greater than the preset data, the logic control circuit 133 is used to control the adjustable resistance module R SA The resistance value is adjusted so that the second data Cout_TX is less than or equal to the preset data.

[0049] For example, when the impedance detection circuit 10 is in the debugging state, the analog-to-digital conversion module 120 is used to convert the second differential voltage signal V outputted by the first transmitting port TX+ and the second transmitting port TX- of the transmitter 110 into TX The analog-to-digital conversion module 120 converts the digital signal into a digital signal and outputs the clock signal and the digital signal to the readout control module 130. Afterwards, the sampling storage circuit 131 in the readout control module 130 is responsible for synchronously sampling the digital signal using the clock signal of the analog-to-digital conversion module 120 to obtain the second data and stores the second data in the register. Next, the data comparison circuit 132 is responsible for extracting the second data from the register and then comparing it with the preset data.

[0050] The preset data may be determined based on the maximum range of the analog-to-digital conversion module 120. For example, the maximum range of the analog-to-digital conversion module 120 with an 8-bit output corresponds to 255, and the preset data may be a number close to but less than 255. For example, the preset data may be 254, and may also be 250, 251, 252, or 253, etc. The present application does not impose any restrictions on the specific value of the preset data.

[0051] When the second data Cout_TX extracted by the data comparison circuit 132 is close to but less than the preset data 254 determined based on the maximum range of the analog-to-digital conversion module 120, it indicates that the analog-to-digital conversion module 120 is operating in a state with optimal accuracy. At this time, the analog-to-digital conversion module 120 can output the data Cout, that is, output the valid second data Cout_TX.

[0052] When the second data Cout_TX extracted by the data comparison circuit 132 exceeds the preset data 254 determined based on the maximum range of the analog-to-digital conversion module 120 , it indicates that the analog-to-digital conversion module 120 is operating in a distorted state and the signal conversion function fails.

[0053] When the analog-to-digital conversion module is in a distorted state, some embodiments of the present application can use the logic control circuit 133 in the readout control module 130 to adjust the adjustable resistance module R SA until the second data Cout_TX output by the analog-to-digital conversion module 120 is close to and smaller than the preset data determined based on the maximum range of the analog-to-digital conversion module.

[0054] Specifically, when the data comparison circuit 132 determines that the extracted second data Cout_TX is greater than the preset data, it indicates that the analog-to-digital conversion module 120 is operating in a distorted state. In this case, the logic control circuit 133 can adjust the adjustable resistance module R SA The resistance value is adjusted until the second data Cout_TX is less than or equal to the preset data.

[0055] In this way, the logic control circuit 133 can use the impedance adjustment signal to change the adjustable resistance module R SA until the second data extracted by the data comparison circuit 132 is close to but less than the maximum range of the analog-to-digital conversion module.

[0056] It should be noted that in some embodiments of the present application, when the impedance detection circuit 10 is in the debugging state, the transmitter 110 inside the interface chip 100 starts to send a voltage signal, the current source 210 does not work, and the analog-to-digital conversion chip 220 starts and tests and records the voltage signal V TXSince the transmitter 110 is not calibrated and there are process deviations between different interface chips, the voltage signal sent by the transmitter may be too large or too small, and the offset voltage of the analog-to-digital conversion circuit of each interface chip is also different. At this time, the logic control circuit 133 of the readout control module 130 uses the impedance adjustment signal to change the adjustable resistance module R according to the received second data. SA The resistance value of the analog-to-digital conversion module makes the second data Cout_TX output by the analog-to-digital conversion module close to and less than the maximum range of the analog-to-digital conversion module, thereby improving the conversion accuracy of the analog-to-digital conversion module. At this time, the resolution S of the analog-to-digital conversion module 120 in the interface chip is calculated. AD =V TX / Cout_TX.

[0057] Thus, the embodiment of the present application integrates the readout control module 130 and the adjustable resistance module R in the interface chip 100. SA , which ensures the working state and conversion accuracy of the analog-to-digital conversion module 120, and also makes the analog-to-digital conversion module 120 unnecessary to undergo an additional calibration and zeroing process, thereby effectively avoiding the impact of process deviations.

[0058] In addition, when the transmitter 110 in the interface chip 100 is in a normal working state, the logic control circuit 133 is used to control the adjustable resistance module R SA The analog-to-digital conversion module 120 is disconnected. For example, the logic control circuit 133 can use the impedance adjustment signal to adjust the adjustable resistance module R SA The resistance value is adjusted to infinity, the adjustable resistance module R SA In high resistance state, adjustable resistance module R SA The first input port A1 and the second input port A2 of the analog-to-digital conversion module 120 are disconnected to avoid affecting the output impedance of the transmitter 110 .

[0059] In addition, in practical applications, the impedance detection circuit provided in the embodiments of the present application can be extended to apply to scenarios where multiple transmitters are integrated in a single interface chip.

[0060] For example, in some embodiments of the present application, Figure 4-1 As shown, in the interface chip 100, there are multiple transmitters 110. The interface chip 100 further includes a first switching module 140 , and each of the multiple transmitters 110 is connected to the analog-to-digital conversion module 120 via the first switching module 140 ; ​​each of the multiple transmitters 110 is connected to a first output pin TXP and a second output pin TXN of the interface chip 100 via the first switching module 140 ; When the impedance detection circuit 10 is in the measurement state, the interface chip 100 is used to calculate the output path impedance between the interface chip 100 and the reference detection module 200 based on the resolution of the analog-to-digital conversion module 120, the first data output by the readout control module 130, the current source voltage signal measured by the reference detection module 200, and the known reference current.

[0061] For example, in some embodiments of the present application, Figure 4-2 As shown, in the interface chip 100, there are multiple transmitters 110, and the interface chip 100 includes multiple pairs of differential output pins, each pair of differential output pins includes a first output pin TXP and a second output pin TXN; one transmitter 110 among the multiple transmitters 110 is connected to a pair of differential output pins among the multiple pairs of differential output pins; The interface chip 100 further includes a first switching module 140 , through which each transmitter 110 of the plurality of transmitters is connected to the analog-to-digital conversion module 120 to obtain an output path impedance between a target differential output pin and the reference detection module 200 ; In the benchmark detection module 200, there are multiple current sources 210 and multiple analog-to-digital conversion chips 220. Each pair of differential output pins of the multiple pairs of differential output pins of the interface chip 100 is connected to a current source 210, and one current source 210 is connected to one analog-to-digital conversion chip 220.

[0062] Among them, the number of transmitters in the interface chip can be set according to actual needs, and this application does not impose any specific restrictions on this.

[0063] For example, when the impedance detection circuit 10 is in a measurement state, the interface chip 100 is used to calculate the output path impedance between the target differential output pin of the interface chip 100 and the reference detection module 200 based on the resolution of the analog-to-digital conversion module 120, the first data output by the readout control module 130, the current source voltage signal measured by the reference detection module 200, and a known reference current; wherein the target differential output pin is any pair of differential output pins among multiple pairs of differential output pins.

[0064] In this way, the impedance detection circuit provided in the embodiment of the present application can add a first switching module in the interface chip to measure the output path impedances corresponding to multiple transmitters 110 in a single interface chip through gating control.

[0065] In addition, in practical applications, the impedance detection circuit provided in the embodiments of the present application can be extended to apply to scenarios where multiple interface chips are integrated on the same circuit board.

[0066] For example, in some embodiments of the present application, Figure 5As shown, there are multiple interface chips 100, and the impedance detection circuit 10 may further include a second switching module 300. Each interface chip 100 in the multiple interface chips 100 is connected to the benchmark detection module 200 via the second switching module 300 to obtain the output path impedance between the target interface chip and the benchmark detection module 200.

[0067] Among them, the number of interface chips can be set according to actual needs, and this application does not impose any specific restrictions on this.

[0068] For example, when the impedance detection circuit 10 is in a measurement state, the target interface chip is used to calculate the output path impedance between the target interface chip and the reference detection module 200 based on the resolution of the analog-to-digital conversion module 120, the first data output by the readout control module 130, the current source voltage signal measured by the reference detection module 200, and the known reference current; wherein the target interface chip is any one interface chip 100 among the multiple interface chips.

[0069] In this way, the impedance detection circuit provided in the embodiment of the present application can add a second switching module to measure the output path impedance between any one of the multiple interface chips 100 and the reference detection module 200 through gating control.

[0070] In addition, the impedance detection circuit provided by the embodiments of the present application uses a small number of hardware configurations outside the interface chip and is highly versatile, making it easy to be compatible with other calibration or test processes of the interface chip. For example, in some embodiments of the present application, after the calculation is completed, the output path impedance R P After that, the output path impedance R P It can be used to improve the accuracy of calibration of circuit characteristics such as transmitter output impedance and output amplitude.

[0071] Based on the same technical concept as the impedance detection circuit provided in the above embodiment, an embodiment of the present application provides a transmitter output calibration device.

[0072] like Figure 6 As shown, the transmitter output calibration device 600 provided in the embodiment of the present application includes a transmitter output calibration circuit 20 and an impedance detection circuit 10; The impedance detection circuit 10 is used to measure the output path impedance between the interface chip and the reference detection module; The transmitter output calibration circuit 20 is used to calibrate the output parameters of the transmitter and correct the output parameters according to the output path impedance during the calibration process; The output parameter includes at least one of output impedance and output amplitude.

[0073] Thus, after the impedance detection circuit 10 completes the calculation, it outputs the path impedance R P Then, the output path impedance R detected by the impedance detection circuit 10 is P It can be used to improve the accuracy of calibration of circuit characteristics such as transmitter output impedance and output amplitude.

[0074] For example, in the application scenario of calibrating the output impedance of the transmitter, the output impedance can be directly subtracted from the output path impedance R P value to correct the result.

[0075] For example, in the application scenario of calibrating the output amplitude of the transmitter, the output path impedance R can be quantified by calculating the ratio of the impedance divider voltage. P The voltage error introduced thereby corrects the target voltage value required for output amplitude calibration.

[0076] In addition, based on the same technical concept as the impedance detection circuit provided in the above embodiments, an embodiment of the present application provides a transmitter device, which may include the transmitter output calibration device provided in any of the above embodiments.

[0077] like Figure 7 As shown, the transmitter device 700 provided in an embodiment of the present application may include the transmitter output calibration device 600 provided in any of the above embodiments.

[0078] The transmitter device 700 is used to control the adjustable resistance module R SA The analog-to-digital conversion module 120 is disconnected to allow the transmitter to operate normally.

[0079] For example, the logic control circuit 133 can use the impedance adjustment signal to adjust the adjustable resistance module R SA The resistance value is adjusted to infinity, the adjustable resistance module R SA In high resistance state, adjustable resistance module R SA The first input port A1 and the second input port A2 of the analog-to-digital conversion module 120 are disconnected to avoid affecting the output impedance of the transmitter 110 so that the transmitter can operate normally.

[0080] It should be noted that the test equipment provided in the embodiments of the present application may include the impedance detection circuit provided in any of the above embodiments, and may implement all the functions of the impedance detection circuit provided in any of the above embodiments. To avoid repetition, they will not be described here.

[0081] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0082] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. An impedance detection circuit, characterized in that: The invention comprises an interface chip (100) and a reference detection module (200) both of which are arranged on a PCB board; the interface chip (100) has a first output pin (TXP) and a second output pin (TXN); the first output pin (TXP) and the second output pin (TXN) are connected to the reference detection module (200) via PCB board wiring; The interface chip (100) comprises a transmitter (110), an analog-to-digital conversion module (120), an adjustable resistance module (R SA ) and a readout control module (130); the transmitter (110) has a first transmission port (TX+) and a second transmission port (TX-), the first transmission port (TX+) is connected to the first output pin (TXP), and the second transmission port (TX-) is connected to the second output pin (TXN); the analog-to-digital conversion module (120) has a first input port (A1), a second input port (A2) and an output port (A3), the first input port (A1) is connected to the first output pin (TXP), the adjustable resistance module (R SA ), the second input port (A2) is connected to the second output pin (TXN), the adjustable resistance module (R SA ), the output port (A3) is connected to the readout control module (130); the readout control module (130) is connected to the adjustable resistance module (R SA ) is connected to the third end of Wherein, when the impedance detection circuit is in a measurement state, the interface chip (100) is used to calculate the output path impedance between the interface chip (100) and the reference detection module (200) based on the resolution of the analog-to-digital conversion module (120), the first data output by the readout control module (130), the current source voltage signal measured by the reference detection module (200), and a known reference current.

2. The impedance detection circuit according to claim 1, wherein: The reference detection module (200) comprises a current source (210) and an analog-to-digital conversion chip (220); the first output pin (TXP) and the second output pin (TXN) are connected to the current source (210) via PCB board wiring; the analog-to-digital conversion chip (220) has a first input pin (B1) and a second input pin (B2); the first input pin (B1) of the analog-to-digital conversion chip (220) is connected to one end of the current source (210), and the second input pin (B2) of the analog-to-digital conversion chip (220) is connected to the other end of the current source (210).

3. The impedance detection circuit according to claim 2, wherein: When the impedance detection circuit is in a measuring state, the transmitter (110) is in a closed state, and the current source (210) is in an open state; The analog-to-digital conversion module (120) is used to convert a first differential voltage signal between the first input port (A1) and the second input port (A2) into a first digital voltage signal; The readout control module (130) is used to sample the first digital voltage signal to obtain first data, and output the first data; The analog-to-digital conversion chip (220) is used to measure the current source voltage signal at both ends of the current source (210); The interface chip (100) is used to obtain the voltage value of the first differential voltage signal based on the product of the resolution of the analog-to-digital conversion module (120) and the first data; Obtaining a third differential voltage signal value based on a difference between the current source voltage signal at both ends of the current source (210) and the voltage value of the first differential voltage signal; Calculating the output path impedance based on a ratio of the third differential voltage signal value to the reference current; The reference current is a constant current output by the current source (210).

4. The impedance detection circuit according to claim 2, wherein: When the impedance detection circuit is in a debugging state, the transmitter (110) is in an on state, the current source (210) is in an off state, and the interface chip (100) is used to calculate the resolution of the analog-to-digital conversion module (120) based on the second differential voltage signal measured by the analog-to-digital conversion chip (220) and the second data output by the readout control module (130).

5. The impedance detection circuit according to claim 4, wherein: When the impedance detection circuit is in a debugging state, the analog-to-digital conversion chip (220) is used to measure a second differential voltage signal output by the transmitter (110); the analog-to-digital conversion module (120) is used to convert the second differential voltage signal into a second digital voltage signal; the readout control module (130) is used to sample the second digital voltage signal to obtain second data and output the second data; the interface chip (100) is used to calculate the resolution of the analog-to-digital conversion module (120) based on the ratio between the second differential voltage signal and the second data; Wherein, the readout control module (130) is further used to adjust the adjustable resistance module (R SA ) until the second data output by the readout control module is less than or equal to the preset data; wherein the preset data is obtained based on the maximum range of the analog-to-digital conversion module (120).

6. The impedance detection circuit according to claim 5, wherein: The readout control module (130) includes a sampling storage circuit (131), a data comparison circuit (132), and a logic control circuit (133); the output port (A3) of the analog-to-digital conversion module (120) is connected to the sampling storage circuit (131); the sampling storage circuit (131) is connected to the data comparison circuit (132); the data comparison circuit (132) is connected to the logic control circuit (133), and the logic control circuit (133) is connected to the adjustable resistance module (R SA ) is connected to the third end of When the impedance detection circuit is in a debugging state, the sampling storage circuit (131) is used to sample the second digital voltage signal output by the analog-to-digital conversion module (120) to obtain second data, and store the second data in a register; The data comparison circuit (132) is used to extract the second data from the register, compare the second data with the preset data, and output the second data when the second data is less than or equal to the preset data; When the data comparison circuit (132) determines that the second data is greater than the preset data, the logic control circuit (133) is used to control the adjustable resistance module (R SA ) is adjusted so that the second data is less than or equal to the preset data.

7. The impedance detection circuit according to claim 1, wherein: In the interface chip (100), the number of the transmitters (110) is plural; the interface chip (100) includes multiple pairs of differential output pins, each pair of differential output pins including one first output pin (TXP) and one second output pin (TXN); one of the multiple transmitters (110) is connected to one pair of differential output pins among the multiple pairs of differential output pins; The interface chip (100) further includes a first switching module (140), and each of the plurality of transmitters (110) is connected to the analog-to-digital conversion module (120) via the first switching module (140) to obtain an output path impedance between a target differential output pin and a reference detection module (200); The target differential output pin is any pair of differential output pins among multiple pairs of differential output pins.

8. The impedance detection circuit according to claim 1, wherein: There are multiple interface chips (100); the impedance detection circuit further includes a second switching module (300); each of the multiple interface chips (100) is connected to the reference detection module (200) via the second switching module (300) to obtain the output path impedance between the target interface chip and the reference detection module (200); The target interface chip is any one interface chip (100) among the plurality of interface chips.

9. A transmitter output calibration device, characterized in that: comprising a transmitter output calibration circuit and an impedance detection circuit according to any one of claims 1 to 8; The impedance detection circuit is used to measure the output path impedance between the interface chip (100) and the reference detection module (200); The transmitter output calibration circuit is used to calibrate the output parameters of the transmitter and to correct the output parameters according to the output path impedance during the calibration process; The output parameter includes at least one of output impedance and output amplitude.

10. A transmitter device, characterized in that: The transmitter output calibration device according to claim 9 is included, wherein the transmitter device is used to control the adjustable resistance module (R SA ) is in a disconnected state from the analog-to-digital conversion module (120) so that the transmitter can operate normally.

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