A method and system for automatically generating graphics for test design rules.

By automating the identification and generation of test patterns, the problem of time-consuming and labor-intensive manual creation in integrated circuit design is solved, achieving efficient and accurate test pattern generation and improving the efficiency and accuracy of design rule verification.

CN120597808BActive Publication Date: 2025-12-02NINGBO LIANFANG ELECTRONIC TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202511106546.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-08-08
Publication Date
2025-12-02
Estimated Expiration
2045-08-08

AI Technical Summary

Technical Problem

In integrated circuit design, existing technologies often involve time-consuming and labor-intensive manual creation of test patterns, which is difficult to fully cover complex rules. Automated methods lack versatility, have high migration costs, and require re-creation of patterns when design rules change, resulting in low verification efficiency and poor accuracy.

Method used

By acquiring graphic units, the system automatically identifies and filters graphic regions based on design rules, calculates the scaling factor of graphic elements, and generates and filters test graphics that conform to the design rules. The system includes a graphic acquisition module, an identification module, a region filtering module, a coefficient calculation module, and a graphic generation module.

Benefits of technology

It enables efficient, accurate, and automated creation of test graphics, improves the efficiency and accuracy of design rule verification, reduces labor costs, and enhances the flexibility and reliability of verification graphic generation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120597808B_ABST
    Figure CN120597808B_ABST
Patent Text Reader

Abstract

This invention relates to the field of integrated circuit layout design, specifically disclosing a method and system for automatically generating graphics for testing design rules. Based on design rules, the system automatically performs a series of automated steps, including identifying graphic units, filtering graphic regions, calculating primitive scaling factors, generating test graphics that conform to the design rules, and finally selecting valid test graphics. This achieves efficient, accurate, and automated creation of test graphics. It solves key problems inherent in traditional manual test graphics development, such as repetitive work, long development cycles, high time costs, susceptibility to human error, and poor adaptability to different processes or rule size variations. Therefore, this method can improve the development efficiency and accuracy of integrated circuit design rule verification graphics, reduce development costs and manpower input, and enhance the flexibility and reliability of verification graphics generation.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of integrated circuit layout design, and in particular to a method and system for automatically generating graphics for testing design rules. Background Technology

[0002] In the field of integrated circuit design, design rule checking is a critical step in ensuring that chip layout design complies with manufacturing process constraints. To verify the accuracy and reliability of DRC tools, a large number of specific test patterns need to be constructed, including cases of compliance and violation. Traditionally, these test patterns are mainly created manually by designers, which is not only time-consuming and labor-intensive but also difficult to comprehensively cover various complex rules. Existing automated test pattern generation methods are mostly targeted at specific types of design rules, lacking universality; or they rely on specific rule description languages, resulting in high migration costs; some methods can generate test patterns but cannot automatically determine whether the patterns actually violate the target rules, still requiring manual verification. Furthermore, when design rules change, test patterns need to be recreated, adding an extra burden to design verification. Therefore, there is an urgent need for a method that can automatically generate test patterns based on design rules to improve the efficiency and accuracy of DRC verification. Summary of the Invention

[0003] The purpose of this invention is to provide a method and system for automatically generating graphics for testing design rules, thereby improving the development efficiency and accuracy of integrated circuit design rule verification graphics and reducing labor costs.

[0004] This invention provides a method for automatically generating graphics for testing design rules, the method comprising:

[0005] Obtain the graphics unit;

[0006] Based on design rules, identify convertible graphic units;

[0007] Analyze the design rules and filter the graphic areas;

[0008] Calculate the primitive scaling factor based on the graphic region size and design rule size;

[0009] The graphic unit is scaled based on the primitive scaling factor to generate a test graphic that conforms to the design rules;

[0010] Filter out valid test images.

[0011] Furthermore, based on design rules, the convertible graphic units identified include:

[0012] The design rules are parsed into a recognizable structure; wherein the recognizable structure includes a main instruction; and a recognition layer is extracted based on the main instruction.

[0013] Parse the graphic units in the graphic unit library to obtain the recognition layer set for each graphic unit; and,

[0014] The identification layer is compared with the layer set of each graphic unit, and convertible graphic units are selected based on the comparison results.

[0015] Furthermore, the design rules are analyzed, and the graphic areas are filtered, including:

[0016] Based on the analysis of the convertible graphic unit according to the main instruction, the detection result of the graphic unit is obtained;

[0017] Get the main instruction constraints;

[0018] Based on the constraints of the main instruction, the detection results are filtered; and,

[0019] The filtered detection results are marked as graphic region size.

[0020] Furthermore, the detection results are filtered, and the filtered detection results are marked with graphic region sizes including:

[0021] When the main instruction constraint is a less than or equal to operator or a less than operator, the maximum value of the detection result is obtained as the size of the graphic region;

[0022] When the main instruction constraint is a greater than or equal to operator, a greater than operator, or an equal to operator, the minimum value of the detection result is obtained as the size of the graphic region.

[0023] Furthermore, calculating the primitive scaling factor based on the graphic region size and design rule size includes:

[0024] Obtain the main instruction constraint value of the design rule;

[0025] The design rule dimensions are calculated based on the master instruction constraint values ​​and the master instruction constraint conditions; wherein, the design rule dimensions include target dimensions that satisfy the design rules and target dimensions that do not satisfy the design rules; and,

[0026] Based on the target size that satisfies the design rules and the graphic area size, calculate the scaling factor of the primitives that satisfy the design rules; based on the target size that does not satisfy the design rules and the graphic area size, calculate the scaling factor of the primitives that do not satisfy the design rules.

[0027] Furthermore, based on the master instruction constraint value and the master instruction constraint condition, calculating the target size that satisfies the design rules includes:

[0028] When the main instruction constraint is greater than, the target size that satisfies the design rule is equal to the main instruction constraint value plus the first grid point value;

[0029] When the main instruction constraint is greater than or equal to, the target size that satisfies the design rule is equal to the main instruction constraint value;

[0030] When the main instruction constraint is less than, the target size that satisfies the design rule is equal to the main instruction constraint value minus the first grid point value;

[0031] When the main instruction constraint is less than or equal to, the target size that satisfies the design rule is equal to the main instruction constraint value;

[0032] When the master instruction constraint is equal to, the target size that satisfies the design rule is equal to the master instruction constraint value;

[0033] The first grid point value is a preset minimum size unit.

[0034] Furthermore, based on the master instruction constraint value and the master instruction constraint condition, calculating the target size that does not satisfy the design rule includes:

[0035] When the main instruction constraint is greater than, the target size that does not meet the design rule is equal to the main instruction constraint value;

[0036] When the main instruction constraint is greater than or equal to, the target size that does not meet the design rules is equal to the main instruction constraint value minus the grid value;

[0037] When the main instruction constraint is less than, the target size that does not meet the design rule is equal to the main instruction constraint value;

[0038] When the main instruction constraint is less than or equal to, the target size that does not meet the design rule is equal to the main instruction constraint value plus the grid point value;

[0039] When the master instruction constraint is equal to, the target size that does not meet the design rules is equal to the master instruction constraint value plus or minus the grid point value;

[0040] The second grid point value is a preset minimum size unit.

[0041] Furthermore, scaling the graphic unit based on the primitive scaling factor to generate a test graphic that conforms to the design rules includes:

[0042] Obtain the total size parameter of each of the convertible graphic units;

[0043] Multiply the total size parameter of the convertible graphic unit by the primitive scaling factor that satisfies the design rules to generate a comparison set that satisfies the design rules;

[0044] The total size parameter is multiplied by the scaling factor of the primitives that do not meet the design rules to generate a comparison set that does not meet the design rules.

[0045] Furthermore, the selection of valid test patterns based on the aforementioned design rules includes:

[0046] Parse the conditional instructions in the recognizable structure;

[0047] Determine whether the comparison pattern in the test pattern satisfies the condition instruction;

[0048] When it is determined that the comparison pattern in the test pattern does not meet the condition instruction, the test pattern is removed from the test pattern set.

[0049] Furthermore, when there are no conditional instructions in the design rules, the test pattern is retained.

[0050] In another aspect, the present invention also discloses an apparatus for automatically generating graphics for testing design rules, the apparatus comprising:

[0051] The graphics acquisition module is used to acquire graphics units;

[0052] A graphic recognition module is used to identify convertible graphic units based on the design rules.

[0053] The region filtering module is used to parse design rules and filter graphic regions;

[0054] The coefficient calculation module is used to calculate the primitive scaling factor based on the graphic area size and the design rule size;

[0055] A graphics generation module is used to generate test graphics that conform to the design rules based on the primitive scaling factor; and,

[0056] The image filtering module is used to filter valid test images.

[0057] Compared with the prior art, the present invention has at least the following technical effects:

[0058] This invention achieves efficient, accurate, and automated creation of test patterns through a series of automated steps, including acquiring graphic units, automatically identifying graphic units, filtering graphic regions, calculating primitive scaling factors based on design rules, generating test patterns that conform to the design rules, and selecting valid test patterns. This effectively solves key problems inherent in traditional manual test pattern development, such as repetitive work, long development cycles, high time costs, susceptibility to human error, and poor adaptability to different processes or rule size variations. Therefore, this method can improve the development efficiency and accuracy of integrated circuit design rule verification patterns, reduce development costs and manpower input, and enhance the flexibility and reliability of verification pattern generation. Attached Figure Description

[0059] Figure 1 This is a flowchart illustrating the method for automatically generating graphics for test design rules in Embodiment 1 of the present invention. Detailed Implementation

[0060] The following description, with reference to schematic diagrams, illustrates a method and system for automatically generating graphics for test design rules according to the present invention, wherein preferred embodiments of the invention are shown. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention.

[0061] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0062] Example 1

[0063] This embodiment discloses a method for automatically generating graphics for testing design rules, the method comprising:

[0064] S1. Obtain the graphics unit;

[0065] S2. Identify convertible graphic units based on design rules;

[0066] S3. Analyze the design rules and filter the graphic areas;

[0067] S4. Calculate the primitive scaling factor based on the graphic area size and design rule size;

[0068] S5. Generate a test graphic based on the primitive scaling factor;

[0069] S6. Filter valid test graphics.

[0070] In this embodiment, by acquiring graphic units and automatically performing a series of automated steps based on design rules—including graphic unit identification, graphic region filtering, and primitive scaling factor calculation—to generate test graphics that conform to the design rules and filter out valid graphics, efficient, accurate, and automated creation of test graphics is achieved. This effectively solves key problems inherent in traditional manual test graphic development, such as repetitive labor, long development cycles, high time costs, susceptibility to human error, and poor adaptability to different processes or rule size variations. Therefore, this method can improve the development efficiency and accuracy of integrated circuit design rule verification graphics, reduce development costs and manpower input, and enhance the flexibility and reliability of verification graphic generation.

[0071] In step S1, the graphical unit refers to a set of basic, predefined graphical elements or templates that the system first needs to acquire at the beginning of the entire method for automatically generating graphics for testing design rules. These graphical units are typically stored in a graphical unit library.

[0072] In one specific implementation, the shape of the graphic unit can be a rectangle, square, circle, polygon, etc., and no specific limitation is made here.

[0073] Furthermore, in step S2, based on design rules, the convertible graphic units are identified, including:

[0074] S21. Parse the design rules into a recognizable structure; wherein, the recognizable structure includes a main instruction; S22. Extract the recognition layer based on the main instruction;

[0075] S23. Parse the graphic unit to obtain the recognition layer set for each graphic unit; and,

[0076] S24. Compare the recognition layer with the layer set of each graphic unit, and filter out the convertible graphic units based on the comparison results.

[0077] In step S2, the design rules are a set of geometric constraints and electrical parameter specifications defined and provided by the chip manufacturer. These rules define the minimum dimensions, minimum spacing, stack-up relationships, and other geometric and electrical characteristics of various graphic elements (such as transistors, metal interconnects, vias, etc.) in the layout under a specific manufacturing process. Typically, design rules are used by electronic design automation tools for design rule checking.

[0078] The convertible graphic units refer to those original graphic templates or basic graphic elements selected from the graphic unit library that are relevant to the currently being processed design rules and suitable for generating test graphics through scaling or other transformations. Whether a graphic unit is "convertible" depends on whether the layout layers it contains match the "identification layers" extracted from the design rules.

[0079] In step S21, the identifiable structure refers to the internal data structure obtained after parsing the original design rule text or data. This structure can clearly distinguish the various components of the design rule. For example, the identifiable structure includes the instruction type, action layer, constraint conditions, and constraint values ​​in the design rule.

[0080] The master instruction defines the basic geometric features or relationships that the design rule is to constrain, as well as the related layers. For example, if the design rule is "the minimum width of metal layer 1 is 0.1 micrometers", then the master instruction may be resolved to focus on "the width of metal layer 1".

[0081] In step S22, the identification layer refers to the set of specific layout layers (Layers) extracted from the master instruction of the design rule and used to identify the specific layout layers to which the rule applies.

[0082] Extracting the identification layer based on the main instruction means: analyzing and determining which manufacturing slab layers (such as metal layer 1, polysilicon layer, etc.) are specifically constrained by this rule, and extracting the information of these layers so that relevant graphic units can be screened and geometric analysis and measurement can be performed only on these specific layers.

[0083] The following is a specific example of steps S21-S24:

[0084] Suppose the design rule specifies that "the minimum width of metal layer 1 (M1) must be 0.05 micrometers, and this width constraint only applies when metal layer 1 is adjacent to the active region." In step S21, this rule is parsed into an identifiable structure, which clearly separates the master instruction—"the minimum width of metal layer 1 is 0.05 micrometers." In step S22, the identification layer is extracted from the master instruction "the minimum width of metal layer 1 is 0.05 micrometers," where the identification layer refers to "metal layer 1." In step S23, the system traverses the pattern unit library. Suppose the pattern unit library contains a pattern unit A, which is a simple metal layer 1 strip structure with an identification layer set of only {M1}; a pattern unit B, which is a complex structure containing stacked metal layers 1 and 2 (M2), with a layer set of {M1, M2}; and a pattern unit C, which contains only a polysilicon layer, with a layer set of {Poly}. In step S24, the layer set of each graphic unit is compared with the layer set of the identification layer (M1): the layer set {M1} of graphic unit A contains the identification layer M1, so it is selected as a convertible graphic unit for the current design rule master instruction; the layer set {M1,M2} of graphic unit B also contains the identification layer M1, so it is also a convertible graphic unit; while the layer set {Poly} of graphic unit C does not contain the identification layer M1, so it is not a convertible graphic unit for the rule about the width of M1 and will be excluded.

[0085] Furthermore, in step S3, the steps of parsing design rules and filtering graphic areas include:

[0086] S31. Based on the main instruction, analyze the convertible graphic unit to obtain the detection result;

[0087] S32. Obtain the main instruction constraints;

[0088] S33. Based on the main instruction constraints of the design rules, the detection results are filtered;

[0089] S34. Mark the filtered detection results as the graphic region size.

[0090] In step S31, the detection result refers to the information obtained after analyzing the convertible graphic unit based on the master instruction. It represents which geometric features or regions related to the master instruction were actually found in a specific graphic unit, and the actual measured values ​​of these features. For example, for the master instruction "width of metal layer 1," if several lines of metal layer 1 are found in a specific "convertible graphic unit," then the detection result could be the set of actual width values ​​of these lines, or the lines themselves. If no detection result is output, then the current graphic unit can be considered unsuitable for the design rule.

[0091] In step S32, the master instruction constraint is the part of the design rules closely related to the master instruction. It specifies the quantitative criteria that the geometric features described by the master instruction should meet, and usually includes a comparison operator. For example, operators such as greater than, less than, equal to, greater than or equal to, and less than or equal to.

[0092] The graphic region size is one or a set of feature sizes extracted from the original graphic unit that are most relevant to the current design rules, and it will serve as the benchmark for subsequent calculation of the primitive scaling factor.

[0093] In a specific example, the step S32, "filtering the detection results and marking the filtered detection results as the graphic region size," includes:

[0094] When the main instruction constraint is less than or equal to or less than the operator, the maximum value of the detection result is obtained as the size of the graphic region; and,

[0095] When the main instruction constraint is a greater than or equal to, greater than or equal to operator, the minimum value of the detection result is obtained as the size of the graphic region.

[0096] The following is a specific example of steps S31-S33:

[0097] In step S31, assuming the design rule that "the width of metal layer 1 must be greater than or equal to 0.10 micrometers", when analyzing a graphic unit containing three metal layer 1 traces, the actual widths of 0.08 micrometers, 0.12 micrometers, and 0.09 micrometers are first measured and recorded as the detection results.

[0098] Next, in step S32, based on the "greater than or equal to" constraint in the rule, the system will filter out the minimum value of 0.08 micrometers from these detection results; finally, this filtered 0.08 micrometers is officially marked as the graphic area size of the graphic unit, as the benchmark for generating test graphics in the future.

[0099] Finally, in step S33, this selected 0.08 micrometers is officially designated as the graphic region size of the graphic unit.

[0100] Furthermore, in step S4, calculating the primitive scaling factor based on the graphic region size and design rule size includes:

[0101] S41. Obtain the main instruction constraint value V0 of the design rule;

[0102] S42. Calculate the size that satisfies the design rule based on the master instruction constraint value and the master instruction constraint condition, wherein the design rule size includes a target size V1 that satisfies the design rule and a target size V2 that does not satisfy the design rule; and,

[0103] S43. Based on the target size that satisfies the design rules and the graphic area size, calculate the primitive scaling factor that satisfies the design rules; and based on the target size that does not satisfy the design rules and the graphic area size, calculate the primitive scaling factor that does not satisfy the design rules.

[0104] In step S41, the master instruction constraint value is a specific numerical value directly related to the master instruction and used to specify the geometric features described by the master instruction that should be achieved. In this embodiment, the master instruction constraint value will constrain the size of the graphic area together with the master instruction constraint conditions.

[0105] In step S42, please refer to Table 1. Calculating the target size that satisfies the design rules based on the master instruction constraint value and the master instruction constraint conditions includes:

[0106] When the main instruction constraint is greater than, the target size V1 that satisfies the design rule is equal to the main instruction constraint value V0 plus the first grid point value g1.

[0107] When the main instruction constraint is greater than or equal to, the target size V1 that satisfies the design rule is equal to the main instruction constraint value V0.

[0108] When the main instruction constraint is less than, the target size V1 that satisfies the design rule is equal to the main instruction constraint value V0 minus the first grid point value g1.

[0109] When the main instruction constraint is less than or equal to, the target size V1 that satisfies the design rule is equal to the main instruction constraint value V0.

[0110] When the master instruction constraint is equal to, the target size V1 that satisfies the design rule is equal to the master instruction constraint value V0.

[0111] Furthermore, the step of calculating the target size that does not satisfy the design rules based on the master instruction constraint value and the master instruction constraint conditions includes:

[0112] When the main instruction constraint is greater than, the target size V2 that does not satisfy the design rule is equal to the main instruction constraint value V0.

[0113] When the main instruction constraint is greater than or equal to, the target size V2 that does not meet the design rules is equal to the main instruction constraint value V0 minus the second grid point value g2.

[0114] When the main instruction constraint is less than, the target size V2 that does not meet the design rule is equal to the main instruction constraint value V0.

[0115] When the main instruction constraint is less than or equal to, the target size V2 that does not meet the design rules is equal to the main instruction constraint value V0 plus the second grid point value g2.

[0116] When the main instruction constraint is equal to, the target size V2 that does not meet the design rules is equal to the main instruction constraint value V0 plus or minus the second grid point value g2.

[0117] Among them, the first grid point value g1 and the second grid point value g2 are the smallest size units in integrated circuit layout design and manufacturing, in order to generate test patterns that just meet the design rules and just do not meet the design rules.

[0118] Table 1

[0119]

[0120] In step S43, the primitive scaling factor is obtained based on the target size that satisfies the design rules and the size of the graphic area. Where X1 is the detection result, and f1 is the primitive scaling factor that satisfies the design rules.

[0121] Based on the target size that does not meet the design rules and the size of the graphic region, the scaling factor of the primitive that does not meet the design rules is obtained. f2 is the scaling factor for primitives that do not meet the design rules.

[0122] The following is a specific example of steps S41-S43:

[0123] Assuming the width of metal layer M1 needs to be greater than or equal to 0.10 micrometers and the graphic area size is 0.08 micrometers, firstly, in step S41, the main instruction constraint value V0 is obtained as 0.10 micrometers; in step S42, based on the main instruction constraint value V0 being 0.01 micrometers, the main instruction constraint condition being a greater than or equal to operator, and the grid value being 0.09 micrometers, the target size V1 that satisfies the design rules is the main instruction constraint value V0 itself, i.e., 0.10 micrometers; while the target size that does not satisfy the design rules is V0 minus the grid value, i.e., 0.10 - 0.01 = 0.09 micrometers; next, in step S43, the system uses the target size V1 that satisfies the rules and the graphic area size X1 to calculate the primitive scaling factor f that satisfies the design rules as 0.10 / 0.08 = 1.25; and uses the target size that does not satisfy the rules and the graphic area size X1 to calculate the primitive scaling factor f that does not satisfy the design rules as 0.09 / 0.08 = 1.125. These two scaling factors will be used to adjust the original graphic to generate an accurate test graphic.

[0124] Furthermore, in step S5, generating the test graphic based on the primitive scaling factor includes:

[0125] S51. Obtain the total size parameter of each of the convertible graphic units;

[0126] S52. Multiply the total size parameters by the primitive scaling factors that satisfy the design rules to generate a comparison set that satisfies the design rules;

[0127] S53. Multiply the total size parameter by the scaling factor of the primitive that does not meet the design rules to generate a comparison set that does not meet the design rules.

[0128] In a specific embodiment of S51, the overall size parameters include all geometric and technological parameters defining the graphic unit, such as its width, length, spacing, area, layer information, coordinate position information, and geometric shape feature parameters. Those skilled in the art can select different overall size parameters according to actual circumstances, and no specific limitations are imposed here.

[0129] In steps S52 and S53, the primitive scaling factor is the factor by which the test graphic set is magnified or reduced.

[0130] The main purpose of steps S52 and S53 is to process graphic units with different scaling factors to generate test graphic sets that satisfy and do not satisfy the design rules. By multiplying the total size parameter of the graphic unit by different scaling factors, step S52 creates a set of test graphic sets that satisfy the design rules as correct examples, while step S53 creates a set of test graphic sets that do not satisfy the design rules. These two sets of test graphic sets together constitute a complete verification system used to evaluate the effectiveness of the design rules and help designers understand the application boundaries of the rules.

[0131] In step S6, the conditional instructions in the identifiable structure are parsed:

[0132] S61. Parse the conditional instructions in the recognizable structure;

[0133] S62. Determine whether the comparison pattern in the test pattern satisfies the condition instruction;

[0134] S63. When it is determined that the comparison pattern in the test pattern does not meet the condition instruction, the test pattern is removed from the test pattern set.

[0135] In step S61, the conditional command can be used to constrain the positional relationship between the various graphic units in the test graphic. For example, the conditional command specifies that graphic unit A and graphic unit B have an overlapping area; or, for another example, the conditional command specifies that graphic unit A and graphic unit B are adjacent but do not overlap.

[0136] In steps S62 and S63, determining whether the conditional instruction is effective in the test pattern means that the system checks whether all the graphic units mentioned in the conditional instruction exist in the current test pattern, and whether the actual geometric relationship between these graphic units meets the spatial relationship required by the conditional instruction. Only when the graphic units in the test pattern exist simultaneously and the spatial relationship between them meets the requirements of the conditional instruction is the conditional instruction considered to be effective in this test pattern; otherwise, the test pattern is considered invalid and removed from the test pattern set.

[0137] For example, suppose there is a conditional instruction that states: "Contact hole A must physically overlap with metal connection B, and the width of the overlapping area must not be less than 0.04 micrometers." After the system generates a test pattern according to the conditional instruction, step S6 will perform the following judgment: First, it will determine whether the test pattern simultaneously contains two graphic units named contact hole A and metal connection B. If both graphic units exist, the actual positional relationship between them will be analyzed through geometric operations to calculate the actual overlapping area of ​​contact hole A and metal connection B, and the width of the overlapping area will be measured. Only when these two graphic units do exist, do overlap, and the measured width of the overlapping area is greater than or equal to 0.04 micrometers, is the conditional instruction considered effective in the test pattern, and the test pattern is therefore considered valid and retained in the test pattern set.

[0138] Furthermore, if there are no conditional instructions in the design rules, this step can be ignored, and the test pattern can be retained.

[0139] After traversing all design rules and their corresponding test pattern sets according to steps S1-S6, the final test pattern set can be obtained. This test pattern set is used to comprehensively verify the correctness, completeness and consistency of the design rules, help designers identify potential design defects, ensure that the final product meets all manufacturing process constraints, and serve as a benchmark test case for design rule checking tools, thereby improving the quality assurance level in the design process of integrated circuits or other complex systems.

[0140] Example 2

[0141] This embodiment discloses an apparatus for automatically generating graphics for test design rules, implementing the method for automatically generating graphics for test design rules disclosed in Embodiment 1. The apparatus includes:

[0142] The graphics acquisition module is used to acquire graphics units;

[0143] A graphic recognition module is used to identify convertible graphic units based on the design rules.

[0144] The region filtering module is used to parse design rules and filter graphic regions;

[0145] The coefficient calculation module is used to calculate the primitive scaling factor based on the graphic area size and the design rule size;

[0146] The graphics generation module scales the graphics unit based on the primitive scaling factor to generate a test graphic that conforms to the design rules.

[0147] The graphic filtering module is used to filter valid test graphics based on the design rules.

[0148] It is understood that the technical effects achieved by the above-described apparatus for automatically generating graphics for testing design rules are the same as those achieved by the method for generating graphics for testing design rules disclosed in Embodiment 1, and will not be repeated here.

[0149] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A method for automatically generating graphics for testing design rules, characterized in that, The method includes: Obtain the graphics unit; Based on design rules, convertible graphic units are identified; wherein, the convertible graphic units are original graphic templates or basic graphic elements selected from the graphic unit library, related to the design rule currently being processed, and capable of generating test graphics through scaling or other transformations. Analyze the design rules and filter the graphic areas; Calculate the primitive scaling factor based on the graphic region size and design rule size; The graphic unit is scaled based on the primitive scaling factor to generate test graphics that satisfy and do not satisfy the design rules; Valid test graphics are selected based on the design rules.

2. The method for automatically generating graphics for testing design rules according to claim 1, characterized in that, Based on design rules, the following convertible graphic units are identified: The design rules are parsed into a recognizable structure; wherein, the recognizable structure includes the main instruction; The main instruction is used to define the basic set characteristics or relationships to be constrained by the design rule, as well as the related layers; Extract the recognition layer based on the main instruction; Parse the graphic units in the graphic unit library to obtain the recognition layer set for each graphic unit; and, The identification layer is compared with the layer set of each graphic unit, and convertible graphic units are selected based on the comparison results.

3. The method for automatically generating graphics for testing design rules according to claim 2, characterized in that, Analysis of design rules and filtering of graphic areas include: Based on the analysis of the convertible graphic unit according to the main instruction, the detection result of the graphic unit is obtained; Get the main instruction constraints; Based on the constraints of the main instruction, the detection results are filtered; and, The filtered detection results are marked as graphic region size.

4. The method for automatically generating graphics for testing design rules according to claim 3, characterized in that, The detection results are filtered, and the filtered detection results are marked with graphic area sizes including: When the main instruction constraint is less than or equal to or less than operator, the maximum value of the detection result is obtained as the size of the graphic region; When the main instruction constraint is a greater than or equal to, greater than or equal to operator, the minimum value of the detection result is obtained as the size of the graphic region.

5. The method for automatically generating graphics for testing design rules according to claim 3, characterized in that, The calculation of the primitive scaling factor based on the graphic region size and design rule size includes: Obtain the main instruction constraint value of the design rule; The design rule dimensions are calculated based on the master instruction constraint values ​​and the master instruction constraint conditions; wherein, the design rule dimensions include target dimensions that satisfy the design rules and target dimensions that do not satisfy the design rules; and, Based on the target size that meets the design rules and the graphic area size, calculate the scaling factor of the primitives that meet the design rules; based on the target size that does not meet the design rules and the graphic area size, calculate the scaling factor of the primitives that do not meet the design rules.

6. The method for automatically generating graphics for testing design rules according to claim 5, characterized in that, Based on the master instruction constraint value and the master instruction constraint condition, the target size that satisfies the design rules is calculated as follows: When the main instruction constraint is greater than, the target size that satisfies the design rule is equal to the main instruction constraint value plus the first grid point value; When the main instruction constraint is greater than or equal to, the target size that satisfies the design rule is equal to the main instruction constraint value; When the main instruction constraint is less than, the target size that satisfies the design rule is equal to the main instruction constraint value minus the first grid point value; When the main instruction constraint is less than or equal to, the target size that satisfies the design rule is equal to the main instruction constraint value; When the master instruction constraint is equal to, the target size that satisfies the design rule is equal to the master instruction constraint value; The first grid point value is a preset minimum size unit.

7. The method for automatically generating graphics for testing design rules according to claim 5, characterized in that, Based on the master instruction constraint value and the master instruction constraint condition, the target size that does not satisfy the design rule is calculated as follows: When the main instruction constraint is greater than, the target size that does not meet the design rule is equal to the main instruction constraint value; When the main instruction constraint is greater than or equal to, the target size that does not meet the design rules is equal to the main instruction constraint value minus the second grid point value; When the main instruction constraint is less than, the target size that does not meet the design rule is equal to the main instruction constraint value; When the main instruction constraint is less than or equal to, the target size that does not meet the design rule is equal to the main instruction constraint value plus the second grid point value; When the master instruction constraint is equal to, the target size that does not meet the design rule is equal to the master instruction constraint value plus or minus the second grid point value; The second grid point value is a preset minimum size unit.

8. The method for automatically generating graphics for testing design rules according to claim 5, characterized in that, Scaling the graphic unit based on the primitive scaling factor to generate a test diagram that conforms to the design rules includes: Obtain the total size parameter of each of the convertible graphic units; Multiply the total size parameter of the convertible graphic unit by the primitive scaling factor that satisfies the design rules to generate a comparison set that satisfies the design rules; The total size parameter of the convertible graphic unit is multiplied by the scaling factor of the primitive that does not meet the design rules to generate a comparison set that does not meet the design rules.

9. The method for automatically generating graphics for testing design rules according to claim 2, characterized in that, Valid test graphics are selected based on the aforementioned design rules, including: Parse the conditional instructions in the recognizable structure; The conditional instructions are used to constrain the positional relationships between the graphic units in the test graphic. Determine whether the comparison pattern in the test pattern satisfies the condition instruction; When it is determined that the comparison pattern in the test pattern does not meet the condition instruction, the test pattern is removed from the test pattern set.

10. The method for automatically generating graphics for testing design rules as described in claim 9, characterized in that, If no conditional instructions are present in the design rules, the test pattern is retained.

11. An apparatus for automatically generating graphics for testing design rules, characterized in that, include: The graphics acquisition module is used to acquire graphics units; A graphic recognition module is used to identify convertible graphic units based on the design rules; wherein the convertible graphic units are original graphic templates or basic graphic elements selected from the graphic unit library, related to the design rules currently being processed, and capable of generating test graphics through scaling or other transformations. The region filtering module is used to parse design rules and filter graphic regions; The coefficient calculation module is used to calculate the primitive scaling factor based on the graphic area size and the design rule size; The graphics generation module scales the graphics units based on the primitive scaling factor to generate test graphics that satisfy and do not satisfy the design rules. The graphic filtering module is used to filter valid test graphics based on the design rules.

Citation Information

Patent Citations

  • DRC test pattern generation method and device, electronic equipment and storage medium

    CN115705462A

  • Method, system and device for automatically generating IC test pattern and storage medium

    CN116738931A