Preparation method of barrier layer of contact hole

Abstract

A preparation method of a barrier layer of a contact hole comprises the steps that a wafer is provided, a semiconductor device is formed on the wafer, an insulating layer covers the semiconductor device, a groove is formed in the insulating layer, and the groove is used for forming the contact hole; forming a first metal layer through a PVD (Physical Vapor Deposition) process, wherein the first metal layer covers the insulating layer and the surface of the groove; the first metal layer is trimmed through reverse sputtering, and the protrusions, at the openings of the grooves, of the first metal layer are thinned; forming a second metal layer on the surface of the first metal layer through a PVD (Physical Vapor Deposition) process, wherein the first metal layer and the second metal layer are made of the same material; forming a third metal layer on the surface of the second metal layer through a PVD (Physical Vapor Deposition) process, wherein the third metal layer and the first metal layer are made of different materials; the third metal layer is trimmed through reverse sputtering, and the protrusions, at the openings of the grooves, of the third metal layer are thinned; and forming a fourth metal layer on the surface of the third metal layer through a PVD (Physical Vapor Deposition) process, wherein the fourth metal layer and the third metal layer are made of the same material.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices and integrated circuits, and in particular to a method for preparing a barrier layer of a contact hole. Background Art

[0002] In the back-end of line (BEOL) process of semiconductor integrated circuit manufacturing, metal interconnects are formed to connect electrodes within a device. Metal interconnects are multiple metal layers formed within an insulating layer. Contact holes (CTs) are used to electrically connect the upper and lower metal layers, as well as the upper metal layer and the device electrodes.

[0003] Typically, during the contact hole fabrication process, a barrier layer is first formed in the trench to prevent metal elements in the contact hole from diffusing into the insulating layer. The trench is then filled with metal to form the contact hole. However, after the barrier layer is formed on the trench surface, it becomes thicker at the trench opening than at the trench bottom, resulting in an overhang at the opening. Furthermore, contact hole trenches typically have a high aspect ratio (the ratio of depth to width is typically greater than 4). This can lead to premature sealing during the subsequent metal filling process, resulting in void defects and impacting the reliability and yield of device products. Summary of the Invention

[0004] The present application provides a method for solving the problem of protrusion defects easily generated at the groove opening of the contact hole after depositing the barrier layer in the contact hole preparation method provided in the related art. The method comprises:

[0005] A wafer is provided, wherein a semiconductor device is formed on the wafer, the semiconductor device is covered with an insulating layer, a groove is formed in the insulating layer, and the groove is used to form a contact hole;

[0006] forming a first metal layer by a PVD process, wherein the first metal layer covers the surface of the insulating layer and the groove;

[0007] trimming the first metal layer by reverse sputtering to reduce the protrusion of the first metal layer at the opening of the groove;

[0008] forming a second metal layer on the surface of the first metal layer by a PVD process, wherein the first metal layer and the second metal layer are made of the same material;

[0009] forming a third metal layer on the surface of the second metal layer by a PVD process, wherein the third metal layer and the first metal layer are made of different materials;

[0010] trimming the third metal layer by reverse sputtering to reduce the protrusion of the third metal layer at the opening of the groove;

[0011] A fourth metal layer is formed on the surface of the third metal layer by a PVD process, and the fourth metal layer and the third metal layer are made of the same material.

[0012] In some embodiments, the first metal layer and the second metal layer include titanium metal layers.

[0013] In some embodiments, the third metal layer and the fourth metal layer include titanium nitride layers.

[0014] In some embodiments, during the formation of the first metal layer by the PVD process, the radio frequency power is less than 600 watts.

[0015] In some embodiments, during the trimming of the first metal layer by reverse sputtering, the radio frequency power is greater than 600 watts.

[0016] In some embodiments, during the formation of the second metal layer by the PVD process, the radio frequency power is less than 600 watts.

[0017] In some embodiments, during the formation of the third metal layer by the PVD process, the radio frequency power is less than 600 watts.

[0018] In some embodiments, during the trimming of the third metal layer by reverse sputtering, the radio frequency power is greater than 600 watts.

[0019] In some embodiments, during the formation of the fourth metal layer by the PVD process, the radio frequency power is less than 600 watts.

[0020] The technical solution of this application has at least the following advantages:

[0021] By forming a first metal layer after forming a groove for a contact hole in the back-end process of a semiconductor integrated circuit, trimming the protrusion of the first metal layer at the groove opening by reverse sputtering, and then forming a second metal layer and a third metal layer, trimming the third metal layer by reverse sputtering, and then forming a fourth metal layer to form a barrier layer, the problem that the protrusion of the groove opening easily causes hole defects in the subsequent metal layer filling is solved, thereby improving the reliability and yield of the device product. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0023] Figure 1 is a flow chart of a method for preparing a barrier layer for a contact hole provided by an exemplary embodiment of the present application;

[0024] Figures 2 to 7 It is a schematic diagram of the preparation process of the barrier layer of the contact hole provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0025] The following is a clear and complete description of the technical solutions in this application in conjunction with the accompanying drawings. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application.

[0026] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0027] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal connections between two components; they can refer to wireless connections or wired connections. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0028] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0029] refer to Figure 1, which shows a flow chart of a method for preparing a barrier layer of a contact hole provided by an exemplary embodiment of the present application, as shown in FIG. Figure 1 As shown, the method includes:

[0030] Step S1 , providing a wafer, on which a semiconductor device is formed, and on which an insulating layer covers the semiconductor device, wherein a groove is formed in the insulating layer, and the groove is used to form a contact hole.

[0031] Step S2: forming a first metal layer by a PVD process, wherein the first metal layer covers the surface of the insulating layer and the groove.

[0032] refer to Figure 2 , which shows a cross-sectional schematic diagram after forming the first metal layer. Figure 2 As shown, the insulating layer 210 is formed on the wafer ( Figure 2 A first metal layer 211 is formed on the surface of the insulating layer 210 and the groove by physical vapor deposition (PVD) after a groove is formed in the insulating layer 210 by a photolithography process.

[0033] The first metal layer 211 includes a titanium (Ti) metal layer, which can be deposited on the surface of the insulating layer 210 and the groove by a magnetron sputtering process to form the first metal layer 211. In the process of forming the first metal layer 211 by the PVD process, the radio frequency power is less than 600 watts (W), and the gas introduced includes argon (Ar). The first metal layer 211 forms a protrusion (such as Figure 2 (shown by the dotted line in the middle).

[0034] Step S3: trimming the first metal layer by reverse sputtering, and thinning the protrusion of the first metal layer at the opening of the groove.

[0035] refer to Figure 3 , which shows a cross-sectional schematic diagram of the first metal layer after trimming. Figure 3 As shown, during the process of trimming the first metal layer 211 by reverse sputtering, the radio frequency power is greater than 600 watts. After trimming, the protrusion at the groove opening is thinned.

[0036] Step S4 , forming a second metal layer on the surface of the first metal layer by a PVD process, wherein the first metal layer and the second metal layer are made of the same material.

[0037] refer to Figure 4 , which shows a cross-sectional schematic diagram after forming the second metal layer. Figure 4As shown, a titanium metal layer can be deposited on the surface of the first metal layer 211 by a magnetron sputtering process to form the second metal layer 212. During the PVD process to form the second metal layer 212, the radio frequency power is less than 600 watts, and the gas introduced includes argon. After the second metal layer 212 is formed, the outer layer of the barrier layer (composed of the first metal 211 and the second metal layer 212) reaches the target thickness.

[0038] Step S5 , forming a third metal layer on the surface of the second metal layer by a PVD process, wherein the third metal layer and the first metal layer are formed of different materials.

[0039] refer to Figure 5 , which shows a cross-sectional schematic diagram after forming the third metal layer. Figure 5 As shown, a titanium nitride (TiN) layer can be deposited on the surface of the second metal layer 212 by a magnetron sputtering process to form a third metal layer 213. During the process of forming the third metal layer 213 by the PVD process, the radio frequency power is less than 600 watts, and the gases introduced include nitrogen (N2) and argon. The third metal layer 213 is formed with a protrusion (such as Figure 5 (shown by the dotted line in the middle).

[0040] Step S6: trimming the third metal layer by reverse sputtering, and thinning the protrusion of the third metal layer at the opening of the groove.

[0041] refer to Figure 6 , which shows a cross-sectional schematic diagram of the first metal layer after trimming. Figure 6 As shown, during the process of trimming the third metal layer 213 by reverse sputtering, the radio frequency power is greater than 600 watts. After trimming, the protrusion at the groove opening is thinned.

[0042] Step S7: forming a fourth metal layer on the surface of the third metal layer by a PVD process. The fourth metal layer and the third metal layer are made of the same material.

[0043] refer to Figure 7 , which shows a cross-sectional schematic diagram after forming the fourth metal layer. Figure 7 As shown, a titanium nitride layer can be deposited on the surface of the third metal layer 213 by a magnetron sputtering process to form the fourth metal layer 214. During the PVD process to form the fourth metal layer 214, the radio frequency power is less than 600 watts, and the gases introduced include nitrogen and argon. After the fourth metal layer 214 is formed, the second layer of the barrier layer (composed of the third metal 213 and the fourth metal layer 214) reaches the target thickness.

[0044] To summarize, in the embodiments of the present application, in the back-end process of the semiconductor integrated circuit, after forming the groove of the contact hole, the first metal layer is first formed, the protrusion of the first metal layer at the groove opening is trimmed by reverse sputtering, and then the second metal layer and the third metal layer are formed, the third metal layer is trimmed by reverse sputtering, and then the fourth metal layer is formed to form a barrier layer, thereby solving the problem that the protrusion of the groove opening easily causes hole defects in the subsequent metal layer filling, and improving the reliability and yield of the device product.

[0045] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of this application.

Claims

1. A method for preparing a barrier layer for a contact hole, characterized in that: include: A wafer is provided, wherein a semiconductor device is formed on the wafer, the semiconductor device is covered with an insulating layer, a groove is formed in the insulating layer, and the groove is used to form a contact hole; forming a first metal layer by a PVD process, wherein the first metal layer covers the surface of the insulating layer and the groove; trimming the first metal layer by reverse sputtering to reduce the protrusion of the first metal layer at the opening of the groove; forming a second metal layer on the surface of the first metal layer by a PVD process, wherein the first metal layer and the second metal layer are made of the same material; forming a third metal layer on the surface of the second metal layer by a PVD process, wherein the third metal layer and the first metal layer are made of different materials; trimming the third metal layer by reverse sputtering to reduce the protrusion of the third metal layer at the opening of the groove; A fourth metal layer is formed on the surface of the third metal layer by a PVD process, and the fourth metal layer and the third metal layer are made of the same material.

2. The method according to claim 1, characterized in that The first metal layer and the second metal layer include titanium metal layers.

3. The method according to claim 2, characterized in that The third metal layer and the fourth metal layer include titanium nitride layers.

4. The method according to any one of claims 1 to 3, characterized in that: During the formation of the first metal layer by the PVD process, the radio frequency power is less than 600 watts.

5. The method according to claim 4, characterized in that During the process of trimming the first metal layer by reverse sputtering, the radio frequency power is greater than 600 watts.

6. The method according to claim 5, characterized in that During the formation of the second metal layer by the PVD process, the radio frequency power is less than 600 watts.

7. The method according to claim 6, characterized in that During the formation of the third metal layer through the PVD process, the radio frequency power is less than 600 watts.

8. The method according to claim 7, characterized in that During the process of trimming the third metal layer by reverse sputtering, the radio frequency power is greater than 600 watts.

9. The method according to claim 8, characterized in that During the formation of the fourth metal layer through the PVD process, the radio frequency power is less than 600 watts.

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