Solar cell piece and manufacturing method thereof, laminated cell and photovoltaic module

Abstract

The embodiment of the invention relates to the photovoltaic field, and provides a solar cell piece and a manufacturing method thereof, a laminated cell and a photovoltaic module, and the solar cell piece comprises the steps: providing a substrate which comprises a first surface and a second surface which are opposite, and the first surface comprises first regions and second regions which are alternately arranged; forming a protective layer on the first surface; etching the protective layer and the substrate in the second region to form a first groove; forming a first doped conductive layer, wherein the first doped conductive layer is located in the first groove; and forming a first electrode, wherein the first electrode is electrically connected with the first doped conductive layer. The performance of the formed solar cell can be improved.

Description

Technical Field

[0001] The present disclosure relates to the photovoltaic field, and in particular to a solar cell and a manufacturing method thereof, a laminated cell, and a photovoltaic module. Background Art

[0002] Photovoltaic power generation refers to the conversion of solar energy into electrical energy through the photovoltaic effect of semiconductors. For example, TOPCON (Tunnel Oxide Passivated Contact) cells have attracted increasing attention due to their excellent photoelectric conversion performance.

[0003] However, the doped conductive layer and the substrate are currently damaged during the process of forming the doped conductive layer, which affects the short-circuit current and conversion efficiency of the battery. Therefore, it is necessary to provide a method for manufacturing solar cells to reduce the damage to the doped conductive layer and the substrate. Summary of the Invention

[0004] The embodiments of the present disclosure provide a solar cell and a manufacturing method thereof, a stacked cell, and a photovoltaic module, which can at least reduce damage to the doped conductive layer during the formation of the solar cell, thereby improving the performance of the formed solar cell.

[0005] According to some embodiments of the present disclosure, on one hand, the embodiments of the present disclosure provide a method for manufacturing a solar cell, including: providing a substrate, the substrate including a first surface and a second surface relative to each other, the first surface including first areas and second areas arranged alternately; forming a protective layer, the protective layer being located on the first surface; etching the protective layer and the substrate located in the second area to form a first groove; forming a first doped conductive layer, the first doped conductive layer being located in the first groove; and forming a first electrode, the first electrode being electrically connected to the first doped conductive layer.

[0006] In some embodiments, the method for forming the protective layer includes: performing oxidation treatment, and the process parameters of the oxidation treatment include: process time of 3000s~4500s, process temperature of 850℃~1000℃, and oxygen gas flow rate of 2000sccm~20000sccm.

[0007] In some embodiments, the method of forming the first groove includes: performing a first laser process, wherein the first laser process irradiates the protective layer located in the second area; and performing a first etching process, wherein the first etching process etches the protective layer located in the second area and the substrate.

[0008] In some embodiments, the parameters of the first laser processing include: power of 30W~40W, laser type of green laser or purple laser; the parameters of the first etching processing include: volume percentage concentration of the etching solution of 8%~13%.

[0009] In some embodiments, after forming the first doped conductive layer, the method further includes: forming a tunneling layer, wherein the tunneling layer at least covers a portion of the second surface; and forming a second doped conductive layer, wherein the second doped conductive layer covers the surface of the tunneling layer.

[0010] In some embodiments, before forming the protective layer, it also includes: performing a first texturing treatment, wherein the first texturing treatment forms a first pyramid structure on the first surface; after forming the second doped conductive layer, it also includes: performing a second texturing treatment, wherein the second texturing treatment forms a second pyramid structure on the second surface, and the base size of the first pyramid structure is smaller than the base size of the second pyramid structure.

[0011] In some embodiments, the process parameters of the first texturing treatment include: process temperature of 70°C~75°C, volume percentage concentration of texturing solution of 0.4%~0.7%, volume percentage concentration of the first additive of 0.2%~0.5%; the process parameters of the second texturing treatment include: process temperature of 75°C~80°C, volume percentage concentration of texturing solution of 0.4%~0.7%, volume percentage concentration of the second additive of 0.2%~0.5%, and the protection ability of the first additive is greater than that of the second additive.

[0012] In some embodiments, before forming the first doped conductive layer, the method further includes: performing a third texturing process, wherein the third texturing process forms a third pyramid structure in the first groove, and the base size of the third pyramid structure is smaller than or equal to the base size of the first pyramid structure.

[0013] In some embodiments, the method of forming the second doped conductive layer includes: forming a second initial doped conductive layer, the second initial doped conductive layer covering the surface of the tunneling layer; removing the second initial doped conductive layer located in the first region, and the remaining second initial doped conductive layer serves as the second doped conductive layer.

[0014] In some embodiments, the method of removing a portion of the second initial doped conductive layer includes: performing a second laser treatment, wherein the second laser treatment irradiates the surface of the second initial doped conductive layer located in the first region; and performing a second etching treatment, wherein the second etching treatment etches the second initial doped conductive layer located in the first region.

[0015] According to some embodiments of the present disclosure, on the other hand, embodiments of the present disclosure further provide a solar cell, which is formed using a method for manufacturing a solar cell such as part or all of the above, and includes: a substrate, the substrate including a first surface and a second surface relative to each other, the first surface including first areas and second areas arranged alternately, and the substrate also including a first groove; a first doped conductive layer, the first doped conductive layer being located in the first groove; and a first electrode, the first electrode being in contact and electrically connected to the first doped conductive layer.

[0016] In some embodiments, the base further includes: a first pyramid structure, the first pyramid structure is located on the first surface; a second pyramid structure, the second pyramid structure is located on the second surface, and the base size of the first pyramid structure is smaller than the base size of the second pyramid structure.

[0017] In some embodiments, the base further includes: a third pyramid structure, the third pyramid structure is located in the first groove, and the base size of the third pyramid structure is smaller than or equal to the base size of the first pyramid structure.

[0018] According to some embodiments of the present disclosure, another aspect of the embodiments of the present disclosure further provides a stacked cell, comprising: a bottom cell, a composite layer, and a perovskite top cell stacked in sequence along a preset direction; wherein the bottom cell is a solar cell formed by the manufacturing method of part or all of the above-mentioned solar cell, or part or all of the above-mentioned solar cell.

[0019] According to some embodiments of the present disclosure, on the other hand, the embodiments of the present disclosure further provide a photovoltaic component, a cell string, the cell string comprising: a plurality of solar cells formed by the manufacturing method of the solar cells as described above, or a plurality of solar cells as described above, or a plurality of stacked cells as described above; a welding ribbon, the welding ribbon is electrically connected to at least two solar cells or stacked cells to connect adjacent solar cells or stacked cells in series; an encapsulation film, the encapsulation film is used to cover the surface of the cell string; and a cover plate, the cover plate is used to cover the surface of the encapsulation film away from the cell string.

[0020] The technical solution provided by the embodiment of the present disclosure has at least the following advantages: first, a protective layer is first formed on the first surface of the substrate, and the protective layer protects the substrate that does not need to be etched during the process of forming the first groove. Then, a first doped conductive layer is formed in the first groove. By first defining the position of the first doped conductive layer, secondary processing of the first doped conductive layer in the subsequent process of forming the first doped conductive layer is avoided. At the same time, the protective layer also serves as a barrier layer in the process of forming the first doped conductive layer, and can also prevent the substrate from being damaged in the process of forming the first doped conductive layer, thereby avoiding affecting the reliability of the first region, thereby improving the reliability of the solar cell; secondly, by forming the first groove, the overflow of glue in the process of forming the first electrode is reduced when forming the first electrode, thereby reducing the loss of glue. At the same time, the first doped conductive layer is formed in the first groove, so that the first electrode can contact the first doped conductive layer more deeply, and the protrusion of the first region can reduce unnecessary contact between the first electrode and the substrate, and can also avoid leakage current. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 This is a schematic structural diagram of a substrate in one embodiment of the present disclosure; Figure 2 A schematic diagram of a structure for forming a protective layer in an embodiment of the present disclosure; Figure 3 This is a structural schematic diagram of forming a first groove in one embodiment of the present disclosure; Figure 4 This is a schematic structural diagram of forming a first doped conductive layer in one embodiment of the present disclosure; Figure 5 This is a schematic diagram of a structure formed after a back-polishing process in one embodiment of the present disclosure; Figure 6 A schematic diagram of a structure for forming an initial tunneling layer and a second semiconductor layer in one embodiment of the present disclosure; Figure 7 This is a schematic structural diagram of forming a second initial doped conductive layer in one embodiment of the present disclosure; Figure 8 In one embodiment of the present disclosure, a portion of the second initial doped conductive layer is removed; Figure 9 A schematic diagram of a structure formed by performing a second texturing process in one embodiment of the present disclosure; Figure 10 In one embodiment of the present disclosure, a first electrode and a second electrode are formed; Figure 11 A schematic structural diagram of a stacked battery provided in one embodiment of the present disclosure.

[0023] Description of reference numerals: 100. Substrate; 110. First surface; 120. Second surface; 130. First region; 140. Second region; 101. Protective layer; 150. First groove; 102. First doped conductive layer; 103. First electrode; 160. First pyramid structure; 170. Third pyramid structure; 104. Tunneling layer; 105. Second doped conductive layer; 115. Second initially doped conductive layer; 114. Initial tunneling layer; 125. Second semiconductor layer; 106. Glass layer; 180. Second pyramid structure; 108. Passivation layer; 107. Second electrode.

[0024] 400, bottom cell; 401, composite layer; 402, perovskite top cell; 412, hole transport layer; 422, perovskite absorption layer; 432, electron transport layer; 442, electrode; 404, back electrode. DETAILED DESCRIPTION

[0025] As can be seen from the background technology, in the process of forming a local first doped conductive layer, a first doped conductive layer covering the entire surface of the substrate is usually formed first, and then part of the first doped conductive layer is removed by laser etching to form a local first doped conductive layer. However, the method of forming first and then laser etching will not only cause damage to the first doped conductive layer, but also cause damage to the substrate.

[0026] In the embodiment of the present disclosure, first, a protective layer is formed on the first surface of the substrate. The protective layer protects the substrate that does not need to be etched during the process of forming the first groove. Then, a first doped conductive layer is formed in the first groove. By first defining the position of the first doped conductive layer, secondary processing of the first doped conductive layer in the subsequent process of forming the first doped conductive layer is avoided. At the same time, the protective layer also serves as a barrier layer in the process of forming the first doped conductive layer, and can also prevent the substrate from being damaged in the process of forming the first doped conductive layer, thereby avoiding affecting the reliability of the first area of ​​the substrate, thereby improving the reliability of the solar cell. Secondly, by forming the first groove, when forming the first electrode, the overflow of glue in the process of forming the first electrode is reduced, thereby reducing the loss of glue. At the same time, the first doped conductive layer is formed in the first groove, so that the first electrode can contact the first doped conductive layer more deeply, and the protrusion of the first area can reduce unnecessary contact between the first electrode and the substrate, and can also avoid leakage current.

[0027] In the description of the embodiments of the present disclosure, technical terms such as "first" and "second" are used solely to distinguish between different objects and should not be understood to indicate or imply relative importance or to implicitly specify the quantity, specific order, or primary and secondary relationship of the technical features indicated. In the description of the embodiments of the present disclosure, "plurality" means more than two, unless otherwise specifically defined.

[0028] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present disclosure. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] In the description of the embodiments of the present disclosure, the term "and / or" is merely a description of an association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0030] In the description of the embodiments of the present disclosure, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0031] In the description of the embodiments of the present disclosure, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the embodiments of the present disclosure.

[0032] In the description of the embodiments of the present disclosure, unless otherwise expressly specified or limited, technical terms such as "installed," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and they can refer to internal connectivity between two components or interaction between two components. Those skilled in the art can understand the specific meanings of the above terms in the embodiments of the present disclosure based on specific circumstances.

[0033] In the accompanying drawings corresponding to the embodiments of the present disclosure, the thickness and area of ​​layers are exaggerated for better understanding and ease of description. When a component (such as a layer, film, region, or substrate) is described as being on or on the surface of another component, the component may be "directly" located on the surface of the other component, or a third component may be present between the two components. Conversely, when a component is described as being on the surface of another component, or as being formed or disposed on the surface of one component, it indicates that there is no third component between the two components. Furthermore, when a component is described as being "substantially" formed on another component, this means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0034] In the description of the embodiments of the present disclosure, when a component is referred to as "including" another component, unless otherwise specified, this does not exclude other components, and other components may further be included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on" another component, it may be "directly on" the other component (i.e., located on the surface of the other component with no other components between them) or another component may be present between them. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "directly on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, this means that no other components are located between them.

[0035] The terms used in the description of the various embodiments described herein are intended only to describe the specific embodiments and are not intended to be limiting. As used in the description and claims of the various embodiments described herein, "the component" is intended to include the plural form unless the context clearly indicates otherwise. A component includes a layer, film, region, or plate.

[0036] The following describes various embodiments of the present disclosure in detail with reference to the accompanying drawings. However, those skilled in the art will appreciate that many technical details are provided in the various embodiments of the present disclosure to facilitate a better understanding of the present disclosure. However, even without these technical details and the various variations and modifications based on the following embodiments, the technical solutions claimed in the present disclosure can still be implemented.

[0037] refer to Figures 1 to 10 , Figures 1 to 10 A schematic structural diagram corresponding to each step of a method for manufacturing a solar cell provided in one embodiment of the present disclosure.

[0038] In some embodiments, a method for manufacturing a solar cell may include providing a substrate 100 , wherein the substrate 100 includes a first surface 110 and a second surface 120 opposite to each other, and the first surface 110 includes first areas 130 and second areas 140 arranged alternately.

[0039] The method for manufacturing a solar cell may further include: forming a protective layer 101 , where the protective layer 101 is located on the first surface 110 .

[0040] The method for manufacturing a solar cell may further include etching the protection layer 101 and the substrate 100 in the second region 140 to form a first groove 150 .

[0041] The method for manufacturing a solar cell may further include: forming a first doped conductive layer 102 , where the first doped conductive layer 102 is located in the first groove 150 .

[0042] The method for manufacturing a solar cell may further include: forming a first electrode 103 , wherein the first electrode 103 is electrically connected to the first doped conductive layer 102 .

[0043] In the embodiment of the present disclosure, first, a protective layer 101 is formed on the first surface 110 of the substrate 100. The protective layer 101 protects the substrate 100 that does not need to be etched during the process of forming the first groove 150. Then, a first doped conductive layer 102 is formed in the first groove 150. By first defining the position of the first doped conductive layer 102, secondary processing of the first doped conductive layer 102 is avoided during the subsequent formation of the first doped conductive layer 102. At the same time, the protective layer 101 also serves as a barrier layer in the process of forming the first doped conductive layer 102, and can also prevent the substrate 100 from being etched during the formation of the first doped conductive layer 102. The mixed conductive layer 102 is damaged during the process of forming the first region 130, thereby avoiding affecting the reliability of the first region 130, thereby improving the reliability of the solar cell; secondly, by forming the first groove 150, the slurry overflow during the formation of the first electrode 103 is reduced when the first electrode 103 is formed, thereby reducing the loss of the slurry. At the same time, the first doped conductive layer 102 is formed in the first groove 150, so that the first electrode 103 can contact the first doped conductive layer 102 more deeply, and the protrusion of the first region 130 can reduce unnecessary contact between the first electrode 103 and the substrate 100, and can also avoid leakage current.

[0044] refer to Figure 1 , Figure 1 Schematic diagram of the structure of a substrate in one embodiment of the present disclosure.

[0045] In some embodiments, the material of substrate 100 can be an elemental semiconductor material. Specifically, an elemental semiconductor material is composed of a single element, such as silicon or germanium. Elemental semiconductor materials can be in single-crystalline, polycrystalline, amorphous, or microcrystalline states (a state that possesses both single-crystalline and amorphous states is referred to as a microcrystalline state). For example, silicon can be at least one of single-crystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon. The material of substrate 100 can also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenide, and the like.

[0046] The substrate 100 may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type dopant element, which may be at least one of Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). The P-type semiconductor substrate is doped with a P-type dopant element, which may be at least one of Group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0047] In some embodiments, a first texturing treatment is also performed to form a first pyramid structure 160 on the first surface 110. Performing the first texturing treatment on the first surface 110 can enhance the light absorption efficiency of the first surface 110 of the substrate 100. The first pyramid structure 160, corresponding to the surface velvet structure of the substrate 100, can reduce the reflectivity of the substrate 100 surface and form a light trap, thereby enhancing the substrate 100's absorption of incident light and improving the photoelectric conversion efficiency of the solar cell.

[0048] In some embodiments, the process parameters of the first texturing treatment include: the process temperature is 70°C~75°C, for example, 70°C, 71°C, 72°C, 73°C, 74°C or 75°C, the volume percentage concentration of the texturing solution is 0.4%~0.7%, for example, 0.4%, 0.5%, 0.6% or 0.7%, and the volume percentage concentration of the first additive is 0.2%~0.5%, for example, 0.2%, 0.3%, 0.4% or 0.5%.

[0049] The process temperature provides an etching environment for the first texturing treatment to facilitate the formation of the first pyramid structure 160. The texturing solution is used to etch a portion of the substrate 100 to form the first pyramid structure 160. The first additive is used to protect the substrate 100 to avoid excessive damage to the substrate 100 caused by the first texturing treatment, while controlling the formation of the first pyramid structure 160 on the surface of the substrate 100.

[0050] In some embodiments, the first surface 110 can be the front surface, and the second surface 120 can be the back surface. The front surface can serve as the light-receiving surface of the solar cell for receiving incident light, and the back surface can serve as the backlight surface. In other embodiments, the solar cell is a bifacial cell, and both the first surface 110 and the second surface 120 can serve as light-receiving surfaces, and can both be used to receive incident light. It is understandable that the backlight surface referred to in the embodiments of the present application can also receive incident light, but the degree of reception of the incident light is weaker than that of the light-receiving surface, and therefore is defined as the backlight surface.

[0051] The first area 130 and the second area 140 of the substrate 100 can be divided according to whether they are directly opposite to the first electrode 103 to be formed later. For example, the position staggered from the first electrode 103 is defined as the first area 130, and the position directly opposite to the first electrode 103 is defined as the second area 140.

[0052] In some embodiments, along the arrangement direction of the first electrodes 103 , the width of the second region 140 may be greater than the width of the first electrodes 103 to reduce the difficulty of alignment when forming the first electrodes 103 , thereby reducing the difficulty of manufacturing the solar cell.

[0053] refer to Figure 2 , Figure 2 For an embodiment of the present disclosure Figure 1 Schematic diagram of the structure of forming a protective layer on the basis of

[0054] In some embodiments, the method for forming the protective layer 101 may include: performing an oxidation treatment, the process parameters of the oxidation treatment include: a process time of 3000s~4500s, for example, 3000s, 3200s, 3500s, 3800s, 4000s or 4500s, etc., a process temperature of 850℃~1000℃, for example, 850℃, 900℃, 930℃, 950℃, 980℃ or 1000℃, etc., an oxygen gas flow rate of 2000sccm~20000sccm, for example, 2000sccm, 5000sccm, 7000sccm, 10000sccm, 12000sccm, 15000sccm, 18000sccm or 20000sccm, etc.

[0055] By converting part of the substrate 100 into a protective layer 101 through oxidation treatment, the density and uniformity of the formed protective layer 101 can be improved, thereby improving the protection capability of the protective layer 101. The higher the density, the stronger the ability to block etching and diffuse ions. In the subsequent process of forming the first doped conductive layer 102, the possibility of the substrate 100 being affected is also lower.

[0056] As for the process time, the longer the process time, the thicker the thickness of the protective layer 101 formed, and the shorter the process time, the thinner the thickness of the protective layer 101 formed. If the process time is less than 3000s, the thickness of the protective layer 101 formed will be too thin, which will reduce the protection ability of the protective layer 101 and the improvement effect will not achieve the expected effect; if the process time is greater than 4500s, the thickness of the substrate 100 converted into the protective layer 101 may be too thick, resulting in a reduction in the ability of the substrate 100 to generate photogenerated carriers, which will cause the performance of the formed solar cell to be reduced.

[0057] As for the process temperature, the higher the process temperature, the faster the rate of forming the protective layer 101, and the lower the process temperature, the slower the rate of forming the protective layer 101. If the process temperature is less than 850°C, the effect of forming the protective layer 101 will be too slow, resulting in too long a time required to form the protective layer 101 of the target thickness, thereby reducing the efficiency of the solar cell manufacturing method. If the process temperature is greater than 1000°C, it may have a certain impact on the substrate 100 itself, and may reduce the reliability of the formed solar cell. Therefore, setting the process temperature between 850°C and 1000°C improves the reliability of the formed solar cell while taking into account the efficiency of forming the protective layer 101.

[0058] As for the oxygen gas flow rate, the higher the oxygen gas flow rate, the faster the rate of forming the protective layer 101, and the lower the oxygen gas flow rate, the slower the rate of forming the protective layer 101. If the oxygen gas flow rate is less than 2000 sccm, the rate of forming the protective layer 101 may be too slow. If the oxygen gas flow rate is greater than 20000 sccm, it may cause waste of oxygen. Due to the limitation of the reaction rate, it will lead to excessive oxygen. At the same time, excessive oxygen gas flow rate will make the process of forming the protective layer 101 difficult to control, resulting in too much substrate 100 being converted into the protective layer 101.

[0059] In some embodiments, the protective layer 101 may be formed by deposition. The deposition method can facilitate control of the thickness of the protective layer 101 to form a protective layer 101 of a desired thickness.

[0060] The material of the protective layer 101 can be silicon oxide, etc., and can be changed according to needs or the material of the substrate 100.

[0061] refer to Figure 3 , Figure 3 An embodiment of the present disclosure provides Figure 2 Schematic diagram of the structure of forming the first groove on the basis of.

[0062] In some embodiments, the method for forming the first groove 150 includes: performing a first laser treatment, wherein the first laser treatment irradiates the protective layer 101 located in the second region 140; and performing a first etching treatment, wherein the first etching treatment etches the protective layer 101 and the substrate 100 located in the second region 140. The first laser treatment can modify the protective layer 101 and the substrate 100 to facilitate removal by the first etching treatment. The first laser treatment can also reduce the difficulty of removing the protective layer 101 and the substrate 100, thereby facilitating the formation of the first groove 150. Furthermore, by removing a portion of the substrate 100, any damage to the substrate 100 during the first laser treatment can be removed, thereby improving the reliability of the resulting solar cell.

[0063] It should be noted that the modification here may refer to changing the state of the materials of the protective layer 101 and the substrate 100 by laser processing, so that the protective layer 101 and the substrate 100 located in the second area 140 become looser to facilitate etching.

[0064] Here, the protection layer 101 located in the second area 140 means that its orthographic projection on the surface of the substrate 100 is located in the second area 140 .

[0065] In some embodiments, the parameters of the first laser processing include: power of 30W~40W, for example, 30W, 32W, 34W, 36W, 38W or 40W, etc., and the laser type is green laser or purple laser; the parameters of the first etching processing include: the volume percentage concentration of the etching solution is 8%~13%, for example, 8%, 9%, 10%, 11%, 12% or 13%.

[0066] As for power, the greater the power, the stronger the modification ability of the first laser treatment, and the smaller the power, the worse the modification effect. Therefore, the power is set to be greater than or equal to 30w so that the first laser treatment has a better modification effect. At the same time, if the power is greater than 40w, the first laser treatment may cause excessive damage to the substrate 100.

[0067] Regarding the laser type, compared with the green laser, the purple laser has a smaller wavelength, a smaller penetration depth into the film layer, and the energy of the purple laser is more concentrated on the surface of the film layer, which is beneficial to reducing the probability of the first laser causing greater laser damage to the substrate 100.

[0068] Regarding the volume percentage concentration of the etching solution, the volume percentage concentration here refers to the volume ratio of the solute to the solvent. Taking hydrofluoric acid as the etching solution as an example, here it refers to the ratio of the volume of hydrofluoric acid to the volume of the aqueous solvent. The higher the volume percentage concentration of the etching solution, the faster the etching rate, and the greater the probability of damage to the substrate 100. Therefore, the volume percentage concentration of the etching solution is set to 8%~13%, taking into account the processing rate of the first etching process and the reliability of the formed solar cell.

[0069] In some embodiments, the etching solution is an acidic solution. Taking a hydrofluoric acid solution as an example, the water content in the etching solution may be 400L-500L, and the hydrofluoric acid content may be 40L-50L.

[0070] refer to Figure 4 , Figure 4 For Figure 3 Schematic diagram of the structure of forming a first doped conductive layer on the basis of.

[0071] In some embodiments, the process of forming the first doped conductive layer 102 may include: performing a diffusion process, in which the doping ions are doped into a partial thickness of the substrate 100 to convert the partial substrate 100 into the first doped conductive layer 102. It can be understood that since the protective layer 101 is formed before the first doped conductive layer 102 is formed, the diffusion process is only performed on the substrate 100 exposed by the first groove 150 to directly form the first doped conductive layer 102 located in the first groove 150.

[0072] Compared with related solutions, forming the first doped conductive layer 102 by directly performing a diffusion process reduces the step of laser etching the first doped conductive layer 102, thereby reducing mechanical damage caused by the laser etching process and avoiding damage to the substrate 100 by the laser etching process, thereby improving the reliability of the formed solar cell.

[0073] In some embodiments, the process of forming the first doped conductive layer 102 may further include: forming a first semiconductor layer, the first semiconductor layer covering the protective layer 101 and the surface of the substrate 100 exposed by the first groove 150, then removing the first semiconductor layer located on the surface of the protective layer 101, and performing a diffusion process to convert the first semiconductor layer located within the first groove 150 into the first doped conductive layer 102. Similarly, the first semiconductor layer located on the surface of the protective layer 101 is removed before the diffusion process. The presence of the protective layer 101 can prevent damage to the substrate 100. The protective layer 101 can also prevent dopant ions from diffusing into the substrate 100 during the diffusion process, thereby improving the reliability of the resulting solar cell.

[0074] In some embodiments, before forming the first doped conductive layer 102, a third texturing process may be performed to form a third pyramid structure 170 within the first groove 150. The base size of the third pyramid structure 170 is smaller than or equal to the base size of the first pyramid structure 160. By forming the third pyramid structure 170 within the first groove 150, the light reflectivity of the formed solar cell is further reduced, thereby improving the substrate 100's absorption of incident light.

[0075] In some embodiments, the third texturing process may be the same as the first texturing process, so that the size of the base of the third pyramid structure 170 is equal to the size of the base of the first pyramid structure 160. Setting the third texturing process to be the same as the first texturing process can reduce the process complexity of the solar cell. In some embodiments, the third texturing process may be different from the first texturing process, for example, the third additive introduced is more protective, so that the size of the base of the third pyramid structure 170 is smaller than the size of the base of the first pyramid structure 160. For the substrate 100 exposed by the first groove 150, the first doped conductive layer 102 and the first electrode 103 will be formed in the first groove 150, which will cause shading to the substrate 100 corresponding to the first groove 150. Therefore, the flatness of the surface of the substrate 100 in the first groove 150 can be improved by reducing the size of the base of the third pyramid structure 170, and the uniformity of the first doped conductive layer 102 formed by depositing the first semiconductor layer can be improved.

[0076] The third texturing process may be the same as the first texturing process, which may mean the same process temperature, the same type and volume percentage concentration of the texturing solution, and the same type and volume percentage concentration of the first additive and the third additive.

[0077] refer to Figure 5 , Figure 5 exist Figure 4 Schematic diagram of the structure formed after back-polishing process based on the above.

[0078] In some embodiments, the back polishing process removes the first pyramid structure 160 formed on the second surface 120 by the first texturing treatment and removes the protection layer 101 on the back side, so as to form a structural layer on the second surface 120 .

[0079] refer to Figures 6 to 9 , forming a tunneling layer 104 and a second doped conductive layer 105.

[0080] In some embodiments, after forming the first doped conductive layer 102, the following steps are further performed: forming a tunneling layer 104, wherein the tunneling layer 104 at least partially covers the second surface 120; and forming a second doped conductive layer 105, wherein the second doped conductive layer 105 covers the surface of the tunneling layer 104. The tunneling layer 104 chemically passivates the substrate 100 by saturating the dangling bonds on the back surface of the substrate 100, reducing the defect state density on the back surface of the substrate 100, and reducing the recombination centers on the surface of the substrate 100, thereby reducing the carrier recombination rate. The second doped conductive layer 105 also has a field passivation effect. Specifically, the second doped conductive layer 105 forms an electrostatic field on the back surface of the substrate 100 directed toward the interior of the substrate 100, causing minority carriers to escape from the interface, thereby reducing the minority carrier concentration and the carrier recombination rate at the interface of the substrate 100. This increases the open circuit voltage, short circuit current, and fill factor of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

[0081] The material of the tunneling layer 104 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or magnesium fluoride. The material of the second doped conductive layer 105 may include at least one of amorphous silicon, polycrystalline silicon, or silicon carbide.

[0082] In some embodiments, a method for forming the second doped conductive layer 105 includes: forming a second initial doped conductive layer 115, where the second initial doped conductive layer 115 covers the surface of the tunneling layer 104; and removing the second initial doped conductive layer 115 located in the first region 130, with the remaining second initial doped conductive layer 115 serving as the second doped conductive layer 105. By first forming the second initial doped conductive layer 115 and then forming the second doped conductive layer 105 by removing a portion of the second initial doped conductive layer 115, the difficulty of forming the second doped conductive layer 105 can be reduced. Simultaneously, the second initial doped conductive layer 115 located in the first region 130 is removed while the second initial doped conductive layer 115 located in the second region 140 is retained, so that the first doped conductive layer 102 located on the first surface and the second doped conductive layer 105 located on the second surface are directly opposite each other, which facilitates the collection of carriers within the substrate and improves carrier transmission efficiency.

[0083] refer to Figure 6 and Figure 7 , Figure 6 For Figure 5 A schematic diagram of the structure of the initial tunneling layer and the second semiconductor layer formed on the basis of Figure 7 For Figure 6 Schematic diagram of the structure of forming a second initial doped conductive layer on the basis of.

[0084] In some embodiments, the initial tunneling layer 114 covers the entire second surface 120 , and the second initial doped conductive layer 115 covers a surface of the initial tunneling layer 114 .

[0085] In some embodiments, the method of forming the second initial doped conductive layer 115 may include forming a second semiconductor layer 125 and performing a doping process to convert the second semiconductor layer 125 into the second initial doped conductive layer 115 .

[0086] It can be understood that in the process of forming the second initial doped conductive layer 115, a glass layer 106 will also be formed. The glass layer 106 is located on the surface of the second initial doped conductive layer 115 away from the substrate 100. The glass layer 106 is related to the doping process. For example, when the doping process dopes phosphorus into the second semiconductor layer 125, a phosphosilicate glass layer will be formed.

[0087] refer to Figure 8 , Figure 8 For Figure 7 On this basis, a portion of the second initial doped conductive layer 115 is removed.

[0088] In some embodiments, the method for removing a portion of the second initial doped conductive layer 115 includes: performing a second laser treatment, wherein the second laser treatment irradiates the surface of the second initial doped conductive layer 115 located in the first region 130; and performing a second etching treatment, wherein the second etching treatment etches the second initial doped conductive layer 115 located in the first region 130. It will be appreciated that a glass layer 106 is formed during the formation of the second initial doped conductive layer 115, and the glass layer 106 may affect the etching efficiency of the second etching treatment. Therefore, the second laser treatment can modify the glass layer 106 to facilitate removal of the glass layer 106 and the second initial doped conductive layer 115 by the second etching treatment.

[0089] refer to Figure 9 , Figure 9 For Figure 8 Schematic diagram of the structure formed by performing the second texturing treatment on the basis of.

[0090] In some embodiments, after forming the second doped conductive layer 105, the process further includes: performing a second texturing process, wherein the second texturing process forms a second pyramid structure 180 on the second surface 120, wherein the base size of the first pyramid structure 160 is smaller than the base size of the second pyramid structure 180. By forming the second pyramid structure 180 on the second surface 120, wherein the base size of the second pyramid structure 180 is larger than the base size of the first pyramid structure 160, a differentiated texture surface of the first surface 110 and the second surface 120 is formed, and the second pyramid structure 180 with a larger base size can improve the reflectivity of the second surface 120. When light is transmitted from the first surface 110 to the second surface 120 inside the substrate 100, the second pyramid structure 180 can reflect the light back into the substrate 100, thereby improving the bifaciality of the formed solar cell and further improving the switching voltage of the formed solar cell.

[0091] In some embodiments, the process parameters of the second texturing treatment include: the process temperature is 75°C~80°C, for example, 75°C, 76°C, 77°C, 78°C, 79°C or 80°C, the volume percentage concentration of the texturing solution is 0.4%~0.7%, for example, 0.4%, 0.5%, 0.6% or 0.7%, the volume percentage concentration of the second additive is 0.2%~0.5%, for example, 0.2%, 0.3%, 0.4% or 0.5%, and the protective ability of the first additive is greater than that of the second additive.

[0092] The process temperature provides an etching environment for the second texturing treatment to facilitate the formation of the second pyramid structure 180. The texturing solution is used to etch a portion of the substrate 100 to form the second pyramid structure 180. The second additive is used to protect the substrate 100 to avoid excessive damage to the substrate 100 caused by the second texturing treatment, while controlling the formation of the second pyramid structure 180 on the surface of the substrate 100.

[0093] For the second additive, since the protection ability of the second additive is less than that of the first additive, when forming the second pyramid structure 180, the etching effect of the second texturing treatment will be faster to form the second pyramid structure 180 with a larger tower base structure size.

[0094] refer to Figure 10 , Figure 10 For Figure 9 The first electrode and the second electrode are formed on the basis of

[0095] The first electrode 103 and the second electrode 107 may be made of metal, such as copper, silver, nickel or aluminum.

[0096] In some embodiments, a passivation layer 108 is formed before forming the first electrode 103 and the second electrode 107 . The passivation layer 108 covers the first surface 110 and the surface of the first doped conductive layer 102 . The passivation layer 108 also covers the second surface 120 and the surface of the second doped conductive layer 105 .

[0097] The material of the passivation layer 108 may be at least one of silicon oxide, aluminum oxide, silicon nitride, or silicon oxynitride.

[0098] In some embodiments, the passivation layer 108 may be a single-layer structure. In some embodiments, the passivation layer 108 may also be a multi-layer structure, in which the materials of each layer may be different from each other, or the materials of a portion of the layers may be different from each other, while the materials of the remaining portions may be the same. For example, the passivation layer 108 may be a multi-layer structure of a silicon nitride layer and an aluminum oxide layer.

[0099] In some embodiments, before forming the passivation layer 108 , the protective layer 101 located on the first surface 110 may be removed.

[0100] In some embodiments, the orthographic projections of the first electrode 103 and the second electrode 107 on the substrate surface can both be located within the second zone 140, and the orthographic projections of the first electrode 103 and the second electrode 107 on the substrate surface located in the same area of ​​the substrate are deemed to be directly opposite each other; the orthographic projections of the first electrode and the second electrode on the substrate surface can also be staggered, that is, the orthographic projections of the first electrode and the second electrode on the substrate surface are located in different areas of the substrate, for example, the orthographic projection of the first electrode on the substrate surface is located in the second area, and the orthographic projection of the second electrode on the substrate surface is located in the first area.

[0101] In the embodiment of the present disclosure, first, a protective layer 101 is formed on the first surface 110 of the substrate 100. The protective layer 101 protects the substrate 100 that does not need to be etched during the process of forming the first groove 150. Then, a first doped conductive layer 102 is formed in the first groove 150. By first defining the position of the first doped conductive layer 102, secondary processing of the first doped conductive layer 102 is avoided in the subsequent process of forming the first doped conductive layer 102. At the same time, the protective layer 101 also serves as a barrier layer in the process of forming the first doped conductive layer 102, and can also avoid the substrate 100 from being etched during the formation of the first doped conductive layer 102. First, the doped conductive layer 102 is damaged during the process, thereby avoiding affecting the reliability of the first region 130, thereby improving the reliability of the solar cell; secondly, by forming the first groove 150, the glue overflow during the formation of the first electrode 103 is reduced when the first electrode 103 is formed, thereby reducing the loss of glue. At the same time, the first doped conductive layer 102 is formed in the first groove 150, so that the first electrode 103 can contact the first doped conductive layer 102 more deeply, and the protrusion of the first region 130 can reduce unnecessary contact between the first electrode 103 and the substrate 100, and can also avoid leakage current.

[0102] Another embodiment of the present disclosure provides a solar cell, which can be formed using the aforementioned method for manufacturing a solar cell. The solar cell provided by the present disclosure embodiment is described below with reference to the accompanying drawings. For portions identical or corresponding to those in the aforementioned embodiments, reference can be made to the aforementioned embodiments and will not be repeated here.

[0103] refer to Figure 10 In some embodiments, a solar cell may include: a substrate 100, the substrate 100 includes a first surface 110 and a second surface 120 opposite to each other, the first surface 110 includes first areas 130 and second areas 140 arranged alternately, and the substrate 100 also includes a first groove 150.

[0104] The solar cell may further include: a first doped conductive layer 102 , and the first doped conductive layer 102 is located in the first groove 150 .

[0105] The solar cell may further include: a first electrode 103 , the first electrode 103 being in contact with and electrically connected to the first doped conductive layer 102 .

[0106] In some embodiments, the substrate 100 further includes: a first pyramid structure 160, the first pyramid structure 160 being located on the first surface 110; and a second pyramid structure 180, the second pyramid structure 180 being located on the second surface 120, wherein the base of the first pyramid structure 160 is smaller than the base of the second pyramid structure 180. By setting the base of the second pyramid structure 180 larger than the base of the first pyramid structure 160, a differentiated suede surface is formed on the first surface 110 and the second surface 120. Moreover, the second pyramid structure 180 having a larger base can improve the reflectivity of the second surface 120. When light is transmitted from the first surface 110 to the second surface 120 within the substrate 100, the second pyramid structure 180 can reflect the light back into the substrate 100, thereby improving the bifaciality of the formed solar cell and, in turn, improving the switching voltage of the formed solar cell.

[0107] The larger base size here may refer to that the average base size of the first pyramid structure in a certain area is larger than the average base size of the second pyramid structure in the same area, or it may refer to that the base size of any first pyramid structure in a certain area is larger than the base size of the second pyramid structure. The base size may refer to the side length or diagonal length of the base of the first pyramid structure.

[0108] In some embodiments, the substrate 100 further includes a third pyramid structure 170, which is located within the first recess 150. The base of the third pyramid structure 170 is smaller than or equal to the base of the first pyramid structure 160. For the substrate 100 exposed by the first recess 150, the first doped conductive layer 102 and the first electrode 103 will block light from the substrate 100 corresponding to the first recess 150. Therefore, by reducing the base of the third pyramid structure 170, the flatness of the surface of the substrate 100 within the first recess 150 can be improved, thereby improving the uniformity of the first doped conductive layer 102.

[0109] In some embodiments, the base size of the first pyramid structure 160 may be 1 μm to 3 μm, such as 1 μm, 2 μm or 3 μm. The base size of the second pyramid structure 180 may be 5 μm to 10 μm, such as 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm.

[0110] Another embodiment of the present disclosure provides a tandem battery. The bottom cell in the tandem battery can be a solar cell as described in the above embodiment, or a solar cell formed using the above solar cell manufacturing method. The tandem battery provided by the embodiment of the present disclosure will be described below with reference to the accompanying drawings. For parts that are identical or corresponding to those in the above embodiment, reference can be made to the above embodiment and will not be repeated here.

[0111] refer to Figure 11 , Figure 11 A schematic structural diagram of a stacked battery provided in one embodiment of the present disclosure.

[0112] The stacked cell may include: a bottom cell 400, a composite layer 401 and a perovskite top cell 402 stacked in sequence along a preset direction; wherein the bottom cell 400 is a solar cell formed by the above-mentioned solar cell manufacturing method, or a solar cell as described above.

[0113] The back electrode 404 in the bottom cell 400 may refer to the second electrode 107 in the above embodiment.

[0114] The composite layer 401 is made of a transparent conductive oxide (TCO) to provide lateral conductivity and transmit light, such as indium tin oxide (ITO), hydrogenated indium oxide (IO:H), or zinc oxide (ZnO).

[0115] The perovskite top cell 402 may include a hole transport layer 412 , a perovskite absorber layer 422 , an electron transport layer 432 , and an electrode 442 .

[0116] Yet another embodiment of the present disclosure provides a photovoltaic assembly, comprising: a cell string, the cell string comprising: a plurality of solar cells formed by the above-mentioned method for manufacturing solar cells, or, comprising a plurality of the above-mentioned solar cells, or, comprising a plurality of the above-mentioned stacked cells; a welding ribbon, the welding ribbon being electrically connected to at least two solar cells or stacked cells to connect adjacent solar cells or stacked cells in series; an encapsulation film, the encapsulation film being used to cover the surface of the cell string; and a cover plate, the cover plate being used to cover the surface of the encapsulation film away from the cell string.

[0117] In some embodiments, the encapsulation film includes a first encapsulation layer and a second encapsulation layer, wherein the first encapsulation layer covers one of the front or back sides of the solar cell, and the second encapsulation layer covers the other of the front or back sides of the solar cell. Specifically, at least one of the first encapsulation layer or the second encapsulation layer can be an organic encapsulation film such as polyvinyl butyral (PVB) film, ethylene-vinyl acetate copolymer (EVA) film, polyethylene octene co-elastomer (POE) film or polyethylene terephthalate (PET) film, or at least one of the first encapsulation layer or the second encapsulation layer can also be an EP film, EPE film or PVP film. Among them, EP film refers to a co-extruded film composed of stacked EVA film and POE film, EPE film refers to a co-extruded film formed by stacking EVA film + POE film + EVA film in sequence, and PVP film refers to a co-extruded film formed by stacking POE film + EVA film + POE film. Co-extruded films can be prepared by sequentially extruding one or more raw materials onto another already manufactured film during the film processing process, or by bonding different types of already manufactured films together.

[0118] In some cases, there is a boundary line between the first encapsulation layer and the second encapsulation layer before lamination. After the lamination process, the photovoltaic module is formed and there is no longer the concept of the first encapsulation layer and the second encapsulation layer, that is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film.

[0119] In some embodiments, the cover plate can be a glass cover plate, a plastic cover plate, or other light-transmitting cover plate. Specifically, the surface of the cover plate facing the encapsulation film can have a concave-convex surface or a velvet surface with multiple raised structures to increase the utilization of incident light. The cover plate includes a first cover plate and a second cover plate, with the first cover plate facing the first encapsulation layer and the second cover plate facing the second encapsulation layer.

[0120] Those skilled in the art will appreciate that the above-described embodiments are specific examples for implementing the present disclosure, and in actual applications, various changes may be made to them in form and detail without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the embodiments of the present disclosure. Therefore, the scope of protection of the embodiments of the present disclosure shall be based on the scope defined in the claims.

Claims

1. A method for manufacturing a solar cell, characterized in that: include: Providing a substrate, the substrate comprising a first surface and a second surface opposite to each other, the first surface comprising first areas and second areas arranged alternately; forming a protective layer, wherein the protective layer is located on the first surface; Etching the protective layer and the substrate in the second area to form a first groove; forming a first doped conductive layer, wherein the first doped conductive layer is located in the first groove; A first electrode is formed, wherein the first electrode is electrically connected to the first doped conductive layer.

2. The method for manufacturing a solar cell according to claim 1, wherein: The method for forming the protective layer includes: performing oxidation treatment, wherein the process parameters of the oxidation treatment include: process time of 3000s-4500s, process temperature of 850°C-1000°C, and oxygen gas flow rate of 2000sccm-20000sccm.

3. The method for manufacturing a solar cell according to claim 1, wherein: The method of forming the first groove includes: performing a first laser treatment, wherein the first laser treatment irradiates the protective layer located in the second area; A first etching process is performed to etch the protection layer and the substrate in the second area.

4. The method for manufacturing a solar cell according to claim 3, wherein: The parameters of the first laser treatment include: power of 30W~40W, laser type of green laser or purple laser; the parameters of the first etching treatment include: volume percentage concentration of etching solution of 8%~13%.

5. The method for manufacturing a solar cell according to claim 1, wherein: After forming the first doped conductive layer, the method further includes: forming a tunneling layer, wherein the tunneling layer covers at least a portion of the second surface; A second doped conductive layer is formed, where the second doped conductive layer covers a surface of the tunneling layer.

6. The method for manufacturing a solar cell according to claim 5, wherein: Before forming the protective layer, the method further includes: performing a first texturing process, wherein the first texturing process forms a first pyramid structure on the first surface; After forming the second doped conductive layer, the method further includes: performing a second texturing process, wherein the second texturing process forms a second pyramid structure on the second surface, and the base size of the first pyramid structure is smaller than the base size of the second pyramid structure.

7. The method for manufacturing a solar cell according to claim 6, wherein: The process parameters of the first texturing treatment include: a process temperature of 70° C. to 75° C., a volume percentage concentration of the texturing solution of 0.4% to 0.7%, and a volume percentage concentration of the first additive of 0.2% to 0.5%; The process parameters of the second texturing treatment include: process temperature of 75°C~80°C, volume percentage concentration of texturing solution of 0.4%~0.7%, volume percentage concentration of the second additive of 0.2%~0.5%, and the protective ability of the first additive is greater than that of the second additive.

8. The method for manufacturing a solar cell according to claim 6, wherein: Before forming the first doped conductive layer, the method further includes: performing a third texturing process to form a third pyramid structure in the first groove, wherein the base size of the third pyramid structure is smaller than or equal to the base size of the first pyramid structure.

9. The method for manufacturing a solar cell according to claim 5, wherein: The method of forming the second doped conductive layer includes: forming a second initial doped conductive layer, wherein the second initial doped conductive layer covers a surface of the tunneling layer; The second initial doped conductive layer located in the first region is removed, and the remaining second initial doped conductive layer serves as the second doped conductive layer.

10. The method for manufacturing a solar cell according to claim 9, wherein: The method of removing a portion of the second initial doped conductive layer includes: performing a second laser treatment, wherein the second laser treatment irradiates a surface of the second initially doped conductive layer located in the first region; A second etching process is performed to etch the second initial doped conductive layer located in the first region.

11. A solar cell formed by the method for manufacturing a solar cell according to any one of claims 1 to 10, characterized in that: include: A substrate, the substrate comprising a first surface and a second surface opposite to each other, the first surface comprising first areas and second areas arranged alternately, and the substrate further comprising a first groove; a first doped conductive layer, wherein the first doped conductive layer is located in the first groove; A first electrode is in contact and electrically connected with the first doped conductive layer.

12. The solar cell according to claim 11, wherein: The substrate further comprises: a first pyramid structure, wherein the first pyramid structure is located on the first surface; A second pyramid structure is provided, wherein the second pyramid structure is located on the second surface, and a size of a base of the first pyramid structure is smaller than a size of a base of the second pyramid structure.

13. The solar cell according to claim 12, wherein: The base further includes: a third pyramid structure, the third pyramid structure is located in the first groove, and the base size of the third pyramid structure is smaller than or equal to the base size of the first pyramid structure.

14. A stacked battery, characterized in that: include: A bottom cell, a composite layer, and a perovskite top cell stacked in sequence along a preset direction; Wherein, the bottom cell is a solar cell formed by the method for manufacturing a solar cell according to any one of claims 1 to 10, or a solar cell according to any one of claims 11 to 13.

15. A photovoltaic module, characterized in that: include: A battery string, the battery string comprising: a plurality of solar cells formed by the method for manufacturing a solar cell according to any one of claims 1 to 10, or a plurality of solar cells according to any one of claims 11 to 13, or a plurality of stacked cells according to claim 14; a welding ribbon, the welding ribbon being electrically connected to at least two solar cells or stacked cells to connect adjacent solar cells or stacked cells in series; A packaging film, the packaging film is used to cover the surface of the battery string; A cover plate is used to cover the surface of the packaging film away from the battery string.

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