Optical layer for pixel of micro light emitting diode (LED) device

Abstract

A micro light emitting diode (uLED) includes: a pixel defined by a mesa of a semiconductor layer having sidewalls, the mesa including an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding sidewalls of the pixels; a current diffusion layer in contact with the one or more n-contact materials and the n-type layer; an optical layer disposed on the current diffusion layer, the optical layer including an optical segment opposite the n-type layer and the first dielectric material, the optical segment including a second dielectric material, and the optical layer including reflective sidewalls adjacent the optical segment and opposite portions of the one or more n-contact materials; and an anode in contact with the p-type layer. Micro LED dies and devices including uLEDs and methods of making the same are also provided.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to micro light emitting diode (uLED) dies, and devices having uLED dies, and methods of making and using uLED dies. The uLED comprises a pixel and an optical layer or optical coating over the emitting surface of the pixel (preferably over a current spreading layer). The microLED die comprises a plurality of pixels and an optical layer or optical coating over the emitting surface of the pixel (preferably over a current spreading layer). The microLED device comprises a uLED die that is suitable for hybrid bonding with a target wafer (e.g., a CMOS wafer) because there is a combination of metal-to-metal bonding and dielectric-to-dielectric bonding between the uLED die (which may be referred to as a source wafer) and the target wafer. Background Art

[0002] Semiconductor light emitting devices or optical power emitting devices (such as devices that emit ultraviolet (UV) or infrared (IR) optical power) - which include light emitting diodes, resonant cavity light emitting diodes, vertical cavity laser diodes, and edge emitting lasers - are one of the most efficient light sources currently available. For example, due to their compact size and low power requirements, semiconductor light or optical power emitting devices (for simplicity, referred to herein as LEDs) are attractive candidates for light sources such as camera flashes, for handheld battery-powered devices such as cameras and cell phones. For example, they can also be used in other applications such as automotive lighting, video flashlights, and general lighting (such as home, store, office and studio lighting, theater / stage lighting, and architectural lighting).

[0003] High-intensity / brightness light-emitting devices capable of operating across the visible spectrum include Group III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also known as Group III nitride materials. Group III nitride light-emitting devices are typically fabricated by epitaxially growing a stack of semiconductor layers of varying composition and dopant concentrations on a growth substrate such as sapphire, silicon carbide, a Group III nitride, or other suitable substrate using metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Sapphire is often used as a growth substrate due to its widespread commercial availability and relative ease of use. The stack, grown on the growth substrate, typically includes one or more n-type layers doped with, for example, Si, formed above the substrate; a light-emitting or active region formed above the one or more n-type layers; and one or more p-type layers doped with, for example, Mg, formed above the active region.

[0004] A variety of emerging display applications—including wearable devices, head-mounted displays, and large-area displays—require miniaturized chips consisting of high-density arrays of microLEDs (µLEDs or uLEDs) with lateral dimensions down to less than 100 µm × 100 µm. MicroLEDs (uLEDs), typically about 50 µm or less in diameter or width, are used to create color displays by closely arraying microLEDs containing red, blue, and green wavelengths.

[0005] Monolithic uLED arrays may require (e.g., Al-based or Ag-based) metal side contacts. These contacts can serve as the electrical cathode for each pixel and also provide reflective sidewalls between pixels to reduce light scattering and propagation in the lateral direction. For some monolithic uLED architectures, the substrate, sometimes referred to as the "growth" substrate (e.g., sapphire, silicon), can be removed after the array is integrated with the backplane driver and controller combination. This provides several advantages, such as enhanced light extraction and beam profile. A typical method of removing the substrate (e.g., a sapphire substrate) is through a laser lift-off (LLO) process, in which a laser beam (a UV laser in the case of a sapphire substrate) is used to separate the substrate from the epitaxial layers (which are grown on the substrate). For such architectures, achieving excellent brightness performance can be a challenge.

[0006] There is a need for improving and / or maximizing optical efficiency in uLED designs. Summary of the Invention

[0007] Provided herein are micro light emitting diode (uLED) dies, devices having uLED dies, and methods of making and using uLED dies.

[0008] One aspect provides a micro-light emitting diode (uLED) comprising: a pixel defined by a mesa of a semiconductor layer having sidewalls, the mesa comprising an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding the sidewalls of the pixel; a current spreading layer in contact with one or more n-contact materials and the n-type layer; an optical layer disposed on the current spreading layer, the optical layer comprising an optical segment opposite the n-type layer and the first dielectric material, the optical segment comprising a second dielectric material, and the optical layer comprising a reflective sidewall adjacent to an opposite portion of the optical segment and the one or more n-contact materials; and an anode in contact with the p-type layer. In one or more embodiments, the optical layer is configured to effectively act as a lens and / or anti-reflective coating for projecting light from the pixel.

[0009] In another aspect, a micro-light emitting diode (uLED) die includes: a plurality of pixels, each pixel having sidewalls and defined by mesas of a semiconductor layer, each mesa including an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding the sidewalls of each pixel; a plurality of n-contact materials between adjacent pixels on the first dielectric material; a current spreading layer in contact with a common cathode, each n-type layer, and the n-contact material; an optical layer on the current spreading layer, the optical layer including an optical segment opposite each n-type layer and the first dielectric material, the optical segment including a second dielectric material, and the optical layer including reflective sidewalls adjacent to opposing portions of the optical segment and the n-contact material; and a plurality of anodes in contact with each p-type layer. In one or more embodiments, the optical layer is configured to effectively act as a lens and / or anti-reflective coating for projected light from each pixel.

[0010] One aspect provides a method for manufacturing a micro-light-emitting diode (uLED) device, comprising: depositing a coating material on a micro-light-emitting diode (uLED) die, the uLED die comprising a plurality of pixels comprising mesas of a semiconductor layer, a first dielectric material surrounding sidewalls of each pixel, and a current spreading layer connecting a common cathode to each n-type layer of the mesas; selectively etching the coating material to form an optical segment comprising a second dielectric material on the current spreading layer opposite each n-type layer and the first dielectric material; and depositing and etching a metal material to form reflective sidewalls of the optical segment, thereby forming an optical layer comprising the optical segment and the reflective sidewalls. In one or more embodiments, the optical layer is configured to effectively act as a lens and / or anti-reflective coating for projected light from each pixel.

[0011] Additional aspects are micro light emitting diode (uLED) devices, each uLED device comprising: a source wafer including any micro light emitting diode (uLED) die herein, including any uLED herein; and a target wafer bonded to the source wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] To facilitate a detailed understanding of the features of the present disclosure listed above, the present disclosure briefly summarized above may be described in more detail with reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only typical embodiments of the present disclosure and should not be considered to limit its scope, as the present disclosure may admit of other equally effective embodiments. The embodiments as described herein are illustrated in the figures of the accompanying drawings by way of example and not limitation, in which similar reference numerals indicate similar elements. The drawings herein are not to scale.

[0013] Figure 1 is a schematic diagram illustrating a cross section of a micro light emitting diode (uLED) according to one or more embodiments; Figure 2 is a schematic diagram showing a system including Figure 1 Cross-section of a micro light-emitting diode (uLED) device; Figure 3 is a schematic diagram illustrating a cross section of a micro light emitting diode (uLED) according to one or more embodiments; Figure 4 is a schematic diagram showing a system including Figure 3 Cross-section of a micro light-emitting diode (uLED) device; Figure 5 is a schematic diagram illustrating a cross section of a micro light emitting diode (uLED) according to one or more embodiments; Figure 6 is a schematic diagram showing a system including Figure 5 Cross-section of a micro light-emitting diode (uLED) device; Figure 7 is a schematic diagram illustrating a cross section of a micro light emitting diode (uLED) according to one or more embodiments; Figure 8 is a schematic diagram showing a system including Figure 7 Cross-section of a micro light-emitting diode (uLED) device; Figure 9 A process flow diagram for fabricating micro light emitting diode (uLED) dies according to one or more embodiments is provided; Figure 10 A process flow diagram for fabricating micro light emitting diode (uLED) dies according to one or more embodiments is provided; Figure 11 shows a top plan view of an exemplary display device according to one or more embodiments; Figure 12 schematically illustrates an exemplary display system including a uLED device according to embodiments herein; and Figure 13 A block diagram of a visualization system is shown in accordance with one or more embodiments. DETAILED DESCRIPTION

[0014] Before describing several exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure is capable of other embodiments and can be practiced or carried out in various ways.

[0015] References to LEDs refer to light-emitting diodes that emit light when current flows through them. In one or more embodiments, the LEDs herein have one or more characteristic dimensions (e.g., height, width, depth, thickness, etc.) ranging from greater than or equal to 75 microns to less than or equal to 300 microns. In one or more embodiments, one or more of the height, width, depth, and thickness have values ​​ranging from 100 to 300 microns. References to microns herein allow for a variation of ±1%-5%. In preferred embodiments, one or more of the height, width, depth, and thickness have values ​​ranging from 200 microns to ±1%-5%. In some instances, LEDs are referred to as microLEDs (uLEDs or µLEDs), which refer to light-emitting diodes having one or more characteristic dimensions (e.g., height, width, depth, thickness, etc.) on the order of microns or tens of microns. In one or more embodiments, one or more of the height, width, depth, and thickness have values ​​ranging from 1 to less than 75 microns, such as from 1 to 50 microns, or from 1 to 25 microns. In general, in one or more embodiments, the LEDs herein may have characteristic dimensions ranging from 1 micron to 300 microns, and all values ​​and subranges therebetween.

[0016] LEDs capable of operating across the visible spectrum include III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also known as III-nitride materials. Typically, III-nitride light-emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of varying composition and dopant concentrations on a growth substrate such as sapphire, silicon carbide, a III-nitride, or other suitable substrate using metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Sapphire is often used as a growth substrate due to its widespread commercial availability and relative ease of use. The stack grown on the growth substrate typically includes one or more n-type layers doped with, for example, Si, formed above the substrate; a light-emitting or active region formed above the one or more n-type layers; and one or more p-type layers doped with, for example, Mg, formed above the active region. The LED die is the structure comprising the substrate and the stack of semiconductor layers.

[0017] Methods of depositing materials, layers, and films include, but are not limited to, sputtering deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced atomic layer deposition (PEALD), plasma enhanced chemical vapor deposition (PECVD), and combinations thereof.

[0018] The method for forming or growing a semiconductor layer comprising an n-type layer, an active region, and a p-type layer is performed according to methods known in the art. In one or more embodiments, the semiconductor layer is formed by epitaxial (EPI) growth. The semiconductor layer according to one or more embodiments comprises an epitaxial layer, a Group III nitride layer, or an epitaxial Group III nitride layer. In one or more embodiments, the semiconductor layer comprises a Group III nitride material, and in specific embodiments, an epitaxial Group III nitride material. In some embodiments, the Group III nitride material comprises one or more of gallium (Ga), aluminum (Al), and indium (In). Therefore, in some embodiments, the semiconductor layer comprises one or more of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum indium nitride (InAlN), aluminum indium gallium nitride (AlInGaN), and the like. Depending on whether a p-type or n-type Group III nitride material is desired, the Group III nitride material can be doped with one or more of silicon (Si), oxygen (O), boron (B), phosphorus (P), germanium (Ge), manganese (Mn), or magnesium (Mg). In one or more embodiments, the combined thickness of the semiconductor layers is in a range from about 2 μm to about 10 μm, and all values ​​and subranges therebetween.

[0019] According to one or more embodiments, the term "substrate" as used herein refers to an intermediate or final structure having a surface or portion of a surface on which a process is performed. Additionally, in some embodiments, reference to a substrate also refers to only a portion of a substrate, unless the context clearly indicates otherwise. Furthermore, according to some embodiments, reference to depositing on a substrate includes depositing on a bare substrate, or depositing on a substrate having one or more films, features, or materials deposited or formed thereon.

[0020] In one or more embodiments, "substrate" means any substrate or material surface formed on a substrate upon which film processing is performed during a fabrication process. In exemplary embodiments, depending on the application, the substrate surface upon which processing is performed includes materials such as silicon, silicon oxide, silicon-on-insulator (SOI), strained silicon, amorphous silicon, doped silicon, carbon-doped silicon oxide, germanium, gallium arsenide, glass, sapphire, and any other suitable material, such as metals, metal nitrides, Group III nitrides (e.g., GaN, AlN, InN, and alloys), metal alloys, and other conductive materials, and metal phosphides (e.g., InP). Substrates include, but are not limited to, light emitting diode (LED) devices. In some embodiments, the substrate is exposed to pretreatment processes to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, e-beam cure, and / or bake the substrate surface. In addition to film processing directly on the surface of the substrate itself, in some embodiments, any of the disclosed film processing steps is also performed on an underlying layer formed on the substrate, and the term "substrate surface" is intended to include such underlying layers as indicated by the context. Thus, for example, where a film / layer or portion of a film / layer has already been deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0021] In this disclosure, the terms "wafer" and "substrate" will be used interchangeably. Thus, as used herein, a wafer serves as a substrate for forming the LED devices described herein.

[0022] Suitable applications for uLED devices include, but are not limited to, augmented reality / virtual reality (AR / VR) systems. One or more AR / VR systems include: augmented reality (AR) or virtual reality (VR) headsets, glasses, or projectors.

[0023] In some uLED architectures, a common top cathode contact is arranged with a thin current spreading layer (e.g., a transparent conductive oxide (TCO) layer). Exemplary current spreading layers include indium tin oxide (ITO) and / or indium zinc oxide (IZO). The semiconductor layer can be thinned to the 1-2 micron range, which enables a good ohmic contact to be formed with the TCO layer. The bottom anode contact for each pixel is electrically connected to the target wafer, such as a CMOS. This architecture has issues with brightness performance, which may be limited by: (1) absorption layers (e.g., p-metal and metal sidewalls that affect extraction efficiency (ExE)); (2) lack of scattering (low ExE); and (3) wide-angle radiation (e.g., Lambertian radiation).

[0024] The uLEDs and dies described herein, as well as devices incorporating the same, advantageously address this issue by incorporating optical coatings or layers on the emitting surfaces of pixels and on the emitting surfaces of monolithic pixel arrays or dies. The optical coatings or layers are designed to achieve emission directionality while maximizing light extraction efficiency (ExE) and internal quantum efficiency (IQE). In one or more embodiments, the optical layer can effectively act as a lens for the projected light from the pixel and / or as an antireflection coating. The optical layer includes optical segments and reflective sidewalls. In one or more embodiments, the optical coating (without the reflective sidewalls) effectively acts as an antireflection coating. The optical coating and / or optical segments are typically a dielectric material such as silicon dioxide (SiO2) or silicone. The optical coating and / or optical segments can be multilayered. The reflective sidewalls are metal (e.g., aluminum oxide) and extend any reflective walls of the underlying pixel. The optical coating can be patterned to create the optical segments. The optical segments can be patterned to suit the end application. In one or more embodiments, the periodic pattern of the optical segments is designed to have a concave lens shape similar in size to the pixel area. The periodic pattern and the pixel array are aligned, inducing a preferential pointing axis for the light beam. Compared to a reference design, simulations show a large enhancement level of greater than 90% flux gain within a 60-degree collection cone. When power is applied, the far-field angular emission response of a pixel of a uLED with planar optical segments and reflective sidewalls according to embodiments herein is higher for angles (θ) greater than or equal to 0° to less than or equal to 40° compared to a uLED without an otherwise identically structured optical layer.

[0025] In one or more embodiments, the optical layers, optical segments, and / or optical coatings herein have a minimum thickness in the range of 500 nanometers to 1 micron, and all values ​​and subranges therebetween. In one or more embodiments, the optical segments are centered around pixels. In some embodiments, the optical segments or optical coatings comprise a layered structure. In one or more embodiments, the optical segments or optical coatings comprise a stack of thin layers to form an interferometric filter, comprising, for example, a layered pair of high-refractive index films / low-refractive index films arranged at a thickness of approximately λ / 4, where λ is the wavelength of light in the medium through which it propagates. In one or more embodiments, the paired films comprise a silicon dioxide (SiO2) layer and a titanium dioxide (TiO2) layer. In one or more embodiments, the paired films comprise a silicon dioxide (SiO2) layer and a niobium pentoxide (NbO5) layer.

[0026] The micro-LEDs and dies in this article are primarily designed to preferentially generate light with a narrow angular distribution centered on the axis. This can be effectively achieved by fabricating thin, transparent optical segments or optical coatings above the pixels. The inclusion of reflective sidewalls surrounding the optical segments helps eliminate crosstalk and maximize brightness.

[0027] In one or more embodiments, the optical layers and optical coatings herein effectively affect the projected light from the light emitting array. In one or more embodiments, the optical layers and optical coatings herein are effective as anti-reflective coatings. In one or more embodiments, the optical layers and optical coatings herein are effective for beam forming. In some embodiments, the optical layers and / or optical coatings can be used to correct or minimize two-dimensional or three-dimensional optical errors, including pincushion distortion, barrel distortion, longitudinal chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, optical elements can be used to magnify and / or correct images. Advantageously, in some embodiments, magnification of the displayed image allows the light emitting array to be physically smaller, lighter in weight, and require less power than larger displays. Additionally, magnification can increase the field of view of the displayed content, thereby allowing the display to appear equal to the user's normal field of view.

[0028] Figure 1 is a schematic diagram illustrating a cross-section of a micro-light-emitting diode (uLED), according to one or more embodiments. The uLED 101 includes a pixel 107 defined by a mesa 104 of a semiconductor layer having sidewalls 109, the mesa including an n-type layer 104n, an active region 104a, and a p-type layer 104p. A first dielectric material 114 surrounds the sidewalls 109 of the pixel 107. A current spreading layer 112 contacts an n-contact material 116, the n-type layer 104n, a portion of the first dielectric material 114, and a common cathode 102. The n-contact material 116 and the common cathode 102 are in electrical contact with the n-type layer 104n through the current spreading layer 112. An anode 124 contacts the p-type layer 104p and is located on a substrate 133.

[0029] An optical layer 115 is disposed on the current spreading layer 112 and includes an optical segment 105 and a reflective sidewall 117 adjacent to the optical segment 105. The optical segment 105 is located opposite the n-type layer 104n and the first dielectric material 114. In one or more embodiments, the optical segment 105 comprises a second dielectric material. The reflective sidewall 117 is located opposite the n-contact material 116 and the common cathode 105. In one or more embodiments, the optical layer 115 is configured to effectively act as a lens and / or anti-reflective coating for projecting light from the pixel. In this embodiment, the optical segment 105 includes a flat surface 105s opposite the current spreading layer 112. Reference herein to a flat surface means that the surface is substantially in the same plane, with any deviation from that plane being less than or equal to approximately 0.5% or 0.25% of the thickness of the optical segment. The minimum thickness of an optical segment having a flat surface is based on the average thickness of the entire optical segment.

[0030] Figure 2 is a schematic diagram showing a system including a Figure 1A cross section of a micro light emitting diode (uLED) device having a uLED die. The uLED device 200 includes a uLED die 201 comprising a plurality of pixels, each pixel having sidewalls (similar to Figure 1 ), and each pixel is defined by a mesa 204, 206, 208, 210 of the semiconductor layer, each of which includes an n-type layer, an active region, and a p-type layer. A first dielectric material 214 surrounds the sidewalls of each pixel. A plurality of n-contact materials 216, 218, 220 are located between adjacent pixels on the first dielectric material 214. The common electrode 202 is in electrical contact with the n-type layer and the n-contact materials 216, 218, 220. A plurality of anodes 224, 226, 228, 230 (i.e., die anodes) are in contact with corresponding contacts or electrodes (anodes) 234, 236, 238, 240 of each p-type layer and substrate 233. The common cathode 202 is in contact with corresponding contacts or electrodes (cathodes) 242 of the substrate 233. In Figure 2 , the upper edges of the mesas 204, 206, 208, 210 are offset from the upper edges of the n-contact materials 216, 218, 220 and the common cathode 202. It is understood that other designs may planarize the combination of the upper edges of the mesas 204, 206, 208, 210 and the n-contact materials 216, 218, 220 and the common cathode 202.

[0031] An optical layer, including optical segments 205, 207, 209, and 211 and reflective sidewalls 203, 217, 219, and 221 adjacent to optical segment 105, is disposed on current spreading layer 212. Optical segments 205, 207, 209, and 211 are located opposite the n-type layer of mesas 204, 206, 208, and 210 and portions of first dielectric material 214. In one or more embodiments, optical segments 205, 207, 209, and 211 comprise a second dielectric material. Reflective sidewalls 217, 219, and 221 are located opposite portions of n-contact material 216, 218, and 220. Reflective sidewall 203 is located opposite common cathode 202. In one or more embodiments, the optical layer is configured to effectively act as a lens and / or antireflective coating for projecting light from the pixel. In this embodiment, optical segments 205, 207, 209, and 211 comprise a flat surface opposite current spreading layer 212.

[0032] In one or more embodiments, substrate 233 is a target wafer to which die 201, which is a source wafer, is bonded (e.g., hybrid bonded). In one or more embodiments, the target wafer is a complementary metal oxide semiconductor (CMOS) wafer that is hybrid bonded to the source wafer, in that a combination of metal-to-metal bonding and dielectric-to-dielectric bonding exists between the source and target wafers.

[0033] According to one or more embodiments, a hybrid bonding process is performed for assembly of a uLED device. That is, die 201 is hybrid bonded to substrate 233, which can be a target substrate having target metal contacts or electrodes. For example, a surface of each of anodes 224, 226, 228, 230 is bonded to a surface of each corresponding contact or electrode (anode) 234, 236, 238, 240 of substrate 233. Common cathode 202 is bonded to a contact or electrode (cathode) 242 of substrate 233. Furthermore, first dielectric material 214, which in one or more embodiments is a dielectric material, is bonded to the bulk of substrate 233.

[0034] Figure 3 is a schematic diagram illustrating a cross-section of a micro-light-emitting diode (uLED), according to one or more embodiments. The uLED 301 includes a pixel 307 defined by a mesa 304 of a semiconductor layer having sidewalls 309, the mesa including an n-type layer 304n, an active region 304a, and a p-type layer 304p. A first dielectric material 314 surrounds the sidewalls 309 of the pixel 307. A current spreading layer 312 contacts an n-contact material 316, the n-type layer 304n, a portion of the first dielectric material 314, and a common cathode 302. The n-contact material 316 and the common cathode 302 are in electrical contact with the n-type layer 304n through the current spreading layer 312. An anode 324 contacts the p-type layer 304p and is located on a substrate 333.

[0035] An optical coating 305 is disposed on the current spreading layer 312, opposite the n-type layer 304n and the first dielectric material 314. In one or more embodiments, the optical coating 305 comprises a second dielectric material. In one or more embodiments, the optical coating 305 is configured to effectively function as an antireflective coating. In this embodiment, the optical layer 305 comprises a flat surface 305s opposite the current spreading layer 312.

[0036] Figure 4 is a schematic diagram showing a system including a Figure 3 A cross section of a micro light emitting diode (uLED) device having a uLED die. The uLED device 400 includes a uLED die 401 comprising a plurality of pixels, each pixel having sidewalls (similar to Figure 3), and each pixel is defined by a mesa 404, 406, 408, 410 of the semiconductor layer, each of which includes an n-type layer, an active region, and a p-type layer. A first dielectric material 414 surrounds the sidewalls of each pixel. A plurality of n-contact materials 416, 418, 420 are located between adjacent pixels on the first dielectric material 414. The common electrode 402 is in electrical contact with the n-type layer and the n-contact materials 416, 418, 420. A plurality of anodes 424, 426, 428, 430 (i.e., die anodes) are in contact with corresponding contacts or electrodes (anodes) 434, 436, 438, 440 of each p-type layer and substrate 433. The common cathode 402 is in contact with corresponding contacts or electrodes (cathodes) 442 of the substrate 433. In Figure 4 4, the upper edges of the mesas 404, 406, 408, 410 are offset from the upper edges of the n-contact materials 416, 418, 420 and the common cathode 402. It is understood that other designs may planarize the combination of the upper edges of the mesas 404, 406, 408, 410 and the n-contact materials 416, 418, 420 and the common cathode 402.

[0037] An optical coating 405 is disposed on the current spreading layer 412. Optical coating 405 is opposite the n-type layer of mesas 404, 406, 408, and 410 and a portion of first dielectric material 414. In one or more embodiments, optical layer 405 comprises a second dielectric material. In one or more embodiments, the optical coating is configured to effectively function as an antireflective coating. In this embodiment, optical coating 405 comprises a flat surface opposite current spreading layer 412.

[0038] In one or more embodiments, substrate 433 is a target wafer to which die 401, which is a source wafer, is bonded (e.g., hybrid bonded). In one or more embodiments, the target wafer is a complementary metal oxide semiconductor (CMOS) wafer that is hybrid bonded to the source wafer, in that a combination of metal-to-metal bonding and dielectric-to-dielectric bonding exists between the source and target wafers.

[0039] According to one or more embodiments, a hybrid bonding process is performed for assembly of a uLED device. That is, die 401 is hybrid bonded to substrate 433, which can be a target substrate having target metal contacts or electrodes. For example, a surface of each of anodes 424, 426, 428, 430 is bonded to a surface of each corresponding contact or electrode (anode) 434, 436, 438, 440 of substrate 433. Common cathode 402 is bonded to contact or electrode (cathode) 442 of substrate 433. Furthermore, first dielectric material 414, which in one or more embodiments is a dielectric material, is bonded to the bulk of substrate 433.

[0040] Figure 5 is a schematic diagram illustrating a cross-section of a micro-light-emitting diode (uLED), according to one or more embodiments. The uLED 501 includes a pixel 507 defined by a mesa 504 of a semiconductor layer having sidewalls 509, the mesa including an n-type layer 504n, an active region 504a, and a p-type layer 504p. A first dielectric material 514 surrounds the sidewalls 509 of the pixel 507. A current spreading layer 512 contacts an n-contact material 516, the n-type layer 504n, a portion of the first dielectric material 514, and a common cathode 502. The n-contact material 516 and the common cathode 502 are in electrical contact with the n-type layer 504n through the current spreading layer 512. An anode 524 contacts the p-type layer 504p and is located on a substrate 533.

[0041] An optical layer 515 is disposed on the current spreading layer 512 and includes an optical segment 505 and a reflective sidewall 517 adjacent to the optical segment 505. The optical segment 505 is located opposite the n-type layer 504n and the first dielectric material 514. In one or more embodiments, the optical segment 505 comprises a second dielectric material. The reflective sidewall 517 is located opposite the n-contact material 516 and the common cathode 505. In one or more embodiments, the optical layer 515 is configured to effectively act as a lens and / or anti-reflective coating for projecting light from the pixel. In this embodiment, the optical segment 505 includes a convex surface 505s opposite the current spreading layer 512. Reference herein to a convex surface means that such a surface is curved toward the current spreading layer, having its greatest thickness at its edge closest to the reflective sidewall and its smallest thickness between these edges (preferably at the center of the optical segment).

[0042] Figure 6 is a schematic diagram showing a system including a Figure 5 A cross section of a micro light emitting diode (uLED) device having a uLED die. The uLED device 600 includes a uLED die 601 comprising a plurality of pixels, each pixel having sidewalls (similar to Figure 5), and each pixel is defined by a mesa 604, 606, 608, 610 of the semiconductor layer, each of which includes an n-type layer, an active region, and a p-type layer. A first dielectric material 614 surrounds the sidewalls of each pixel. A plurality of n-contact materials 616, 618, 620 are located between adjacent pixels on the first dielectric material 614. The common electrode 602 is in electrical contact with the n-type layer and the n-contact materials 616, 618, 620. A plurality of anodes 624, 626, 628, 630 (i.e., die anodes) are in contact with corresponding contacts or electrodes (anodes) 634, 636, 638, 640 of each p-type layer and substrate 633. The common cathode 602 is in contact with corresponding contacts or electrodes (cathodes) 642 of the substrate 633. In Figure 6 6, the upper edges of the mesas 604, 606, 608, 610 are offset from the upper edges of the n-contact materials 616, 618, 620 and the common cathode 602. It is understood that other designs may planarize the combination of the upper edges of the mesas 604, 606, 608, 610 and the n-contact materials 616, 618, 620 and the common cathode 602.

[0043] An optical layer, including optical segments 605, 607, 609, and 611 and reflective sidewalls 603, 617, 619, and 621 adjacent to optical segment 605, is disposed on current spreading layer 612. Optical segments 605, 607, 609, and 611 are opposite the n-type layer of mesas 604, 606, 608, and 610 and portions of first dielectric material 614. In one or more embodiments, optical segments 605, 607, 609, and 611 comprise a second dielectric material. Reflective sidewalls 617, 619, and 621 are opposite portions of n-contact material 616, 618, and 620. Reflective sidewall 603 is opposite common cathode 602. In one or more embodiments, the optical layer is configured to effectively act as a lens and / or antireflective coating for projecting light from the pixel. In this embodiment, optical segments 605, 607, 609, and 611 comprise a convex surface opposite current spreading layer 612.

[0044] In one or more embodiments, substrate 633 is a target wafer to which die 601, which is a source wafer, is bonded (e.g., hybrid bonded). In one or more embodiments, the target wafer is a complementary metal oxide semiconductor (CMOS) wafer that is hybrid bonded to the source wafer, in that a combination of metal-to-metal bonding and dielectric-to-dielectric bonding exists between the source and target wafers.

[0045] According to one or more embodiments, a hybrid bonding process is performed for assembly of a uLED device. That is, die 601 is hybrid bonded to substrate 633, which can be a target substrate having target metal contacts or electrodes. For example, a surface of each of anodes 624, 626, 628, 630 is bonded to a surface of each corresponding contact or electrode (anode) 634, 636, 638, 640 of substrate 633. Common cathode 602 is bonded to contact or electrode (cathode) 642 of substrate 633. Furthermore, first dielectric material 614, which in one or more embodiments is a dielectric material, is bonded to the bulk of substrate 633.

[0046] Figure 7 is a schematic diagram illustrating a cross-section of a micro-light-emitting diode (uLED), according to one or more embodiments. The uLED 701 includes a pixel 707 defined by a mesa 704 of a semiconductor layer having sidewalls 709, the mesa including an n-type layer 704n, an active region 704a, and a p-type layer 704p. A first dielectric material 714 surrounds the sidewalls 709 of the pixel 707. A current spreading layer 712 contacts an n-contact material 716, the n-type layer 704n, a portion of the first dielectric material 714, and a common cathode 702. The n-contact material 716 and the common cathode 702 are in electrical contact with the n-type layer 704n through the current spreading layer 712. An anode 724 contacts the p-type layer 704p and is located on a substrate 733.

[0047] An optical coating patterned into optical segments 705 is disposed on the current spreading layer 712. This embodiment does not include reflective sidewalls. Optical segments 705 are opposite the n-type layer 704n and the first dielectric material 714. In one or more embodiments, the optical segments 705 include a second dielectric material. In one or more embodiments, the optical segments 705 exist in a configuration that effectively functions as an antireflective coating. In this embodiment, the optical segments 705 include a concave surface 705s opposite the current spreading layer 712. Reference herein to a concave surface means that such a surface curves away from the current spreading layer, having its minimum thickness at the outer edges and having its minimum thickness between the outer edges (preferably at the center of the optical segment).

[0048] Figure 8 is a schematic diagram showing a system including a Figure 7 A cross section of a micro light emitting diode (uLED) device having a uLED die. The uLED device 800 includes a uLED die 801 comprising a plurality of pixels, each pixel having sidewalls (similar to Figure 7), and each pixel is defined by a mesa 804, 806, 808, 810 of the semiconductor layer, each of which includes an n-type layer, an active region, and a p-type layer. A first dielectric material 814 surrounds the sidewalls of each pixel. A plurality of n-contact materials 816, 818, 820 are located between adjacent pixels on the first dielectric material 814. The common electrode 802 is in electrical contact with the n-type layer and the n-contact materials 816, 818, 820. A plurality of anodes 824, 826, 828, 830 (i.e., die anodes) are in contact with corresponding contacts or electrodes (anodes) 834, 836, 838, 840 of each p-type layer and substrate 833. The common cathode 802 is in contact with corresponding contacts or electrodes (cathodes) 842 of the substrate 833. In Figure 8 802. In the embodiment shown in FIG5 , the upper edges of the mesas 804, 806, 808, 810 are offset from the upper edges of the n-contact materials 816, 818, 820 and the common cathode 802. It is understood that other designs may planarize the combination of the upper edges of the mesas 804, 806, 808, 810 and the n-contact materials 816, 818, 820 and the common cathode 802.

[0049] An optical coating patterned to form optical segments 805, 807, 809, and 811 is disposed on current spreading layer 812. Optical segments 805, 807, 809, and 811 are located opposite the n-type layer of mesas 804, 806, 808, and 810 and portions of first dielectric material 814. In one or more embodiments, optical segments 805, 807, 809, and 811 comprise a second dielectric material. In one or more embodiments, the optical segments are configured to effectively act as lenses and / or antireflective coatings for projecting light from the pixels. In this embodiment, optical segments 805, 807, 809, and 811 comprise concave surfaces opposite current spreading layer 812.

[0050] In one or more embodiments, substrate 833 is a target wafer to which die 801, which is a source wafer, is bonded (e.g., hybrid bonded). In one or more embodiments, the target wafer is a complementary metal oxide semiconductor (CMOS) wafer that is hybrid bonded to the source wafer, in that a combination of metal-to-metal bonding and dielectric-to-dielectric bonding exists between the source and target wafers.

[0051] According to one or more embodiments, a hybrid bonding process is performed for assembly of a uLED device. That is, die 801 is hybrid bonded to substrate 833, which can be a target substrate having target metal contacts or electrodes. For example, a surface of each of anodes 824, 826, 828, 830 is bonded to a surface of each corresponding contact or electrode (anode) 834, 836, 838, 840 of substrate 833. Common cathode 802 is bonded to a contact or electrode (cathode) 842 of substrate 833. Furthermore, first dielectric material 814, which in one or more embodiments is a dielectric material, is bonded to the bulk of substrate 833.

[0052] In one or more embodiments herein, the first dielectric material and the second dielectric material independently include one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN).

[0053] In one or more embodiments herein, the common cathode, anode, n-contact, and reflective sidewalls include one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

[0054] In one or more embodiments herein, the current spreading layer includes indium tin oxide (ITO) and / or indium zinc oxide (IZO).

[0055] In one or more embodiments herein, the n-type layer includes n-GaN, and the p-type layer includes p-GaN.

[0056] In one or more embodiments herein, the thickness of the n-type layer is in a range from 0.05 μm to 0.5 μm, and all values ​​and ranges therebetween; and / or the thickness of the p-type layer is in a range from 0.05 μm to 0.5 μm, and all values ​​and ranges therebetween.

[0057] In one or more embodiments, the target metal contact includes one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

[0058] In one or more embodiments, the target wafer includes a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and group III nitrides. In one or more embodiments, the substrate body includes a dielectric material selected from the group consisting of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN).

[0059] In one or more embodiments, the target substrate further comprises a material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and Group III nitrides.

[0060] In one or more embodiments, the die anodes are directly bonded to corresponding target wafer electrodes over corresponding p-contact bonding areas, and wherein the diameter of the p-contact bonding areas is in the range of 0.5 microns to less than or equal to 30 microns, including all values ​​and subranges therebetween. In one or more embodiments, the width of each die anode is 95% to 100% of the width of each corresponding target wafer electrode at each location where they are directly bonded, and all values ​​and subranges therebetween, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.

[0061] Figure 9 A process flow diagram for fabricating a micro-light-emitting diode (uLED) die according to one or more embodiments is provided. The fabrication process 900 includes a first operation at 910, in which a coating material is deposited on a uLED die having a plurality of pixels, a common cathode, and a current spreading layer. At operation 920, the coating material is patterned, for example by etching (preferably selective etching), to produce optical segments. At operation 930, metal is deposited and patterned, for example by etching, to produce reflective sidewalls of the optical segments, thereby forming an optical layer.

[0062] In one or more embodiments, patterning is performed according to any suitable technique known to those skilled in the art. According to one or more embodiments, patterning can be performed using conventional masking, wet etching, and / or dry etching processes.

[0063] At operation 940 , the uLED die is further processed for bonding to a substrate (eg, a target wafer).

[0064] Figure 10 A process flow diagram for manufacturing a micro-light-emitting diode (uLED) die according to one or more embodiments is provided. The manufacturing process 950 includes a first operation at 960, in which a coating material is deposited on the uLED die having a plurality of pixels, a common cathode, and a current spreading layer. At operation 970, the coating material is patterned, for example by etching (preferably selective etching), to produce an optical coating.

[0065] In one or more embodiments, patterning is performed according to any suitable technique known to those skilled in the art. According to one or more embodiments, patterning can be performed using conventional masking, wet etching, and / or dry etching processes.

[0066] At operation 980 , the uLED die is further processed for bonding to a substrate (eg, a target wafer).

[0067] uLED devices Figure 11 A top plan view of an exemplary uLED display device is shown that includes a uLED monolithic array 1100 that includes a plurality of pixels arranged in a 6×19 grid. Pixels 1155a and 1155b are examples. In this embodiment, a common cathode 1140 is connected to the pixels. Each pixel includes an anode (not shown) present on the underside. In one or more embodiments, the array includes an arrangement of 2×2 mesas, 4×4 mesas, 20×20 mesas, 50×50 mesas, 100×100 mesas, or n1×n2 mesas, where each of n1 and n2 is a number in the range from 2 to 1000, and n1 and n2 can be equal or unequal.

[0068] In one or more embodiments, arrays of microLEDs (µLEDs or uLEDs) are used. MicroLEDs can support high-density pixels with lateral dimensions less than 100 µm x 100 µm. In some embodiments, microLEDs with a diameter or width of approximately 50 µm or less can be used. Such microLEDs can be used to create color displays by closely packing microLEDs covering red, blue, and green wavelengths.

[0069] In some embodiments, the light-emitting array includes a small number of micro-LEDs located on a substrate with an area of ​​centimeters or larger. In some embodiments, the light-emitting array includes a micro-LED pixel array having hundreds, thousands, or millions of light-emitting LEDs, which are located together on a substrate with an area of ​​centimeters or smaller. In some embodiments, the micro-LEDs may include light-emitting diodes with a size between 30 microns and 500 microns. The (multiple) light-emitting arrays may be monochrome, RGB, or other desired chromaticities. In some embodiments, the pixels may be square, rectangular, hexagonal, or have a curved perimeter. The pixels may have the same size, different sizes, or similar sizes and are grouped to present a larger effective pixel size.

[0070] In some embodiments, the light-emitting pixels and circuitry supporting the light-emitting array are packaged and optionally include a connected base or printed circuit board for powering and controlling the light generation of the semiconductor LEDs. In some embodiments, the printed circuit board supporting the light-emitting array includes electrical vias, a heat sink, a ground plane, electrical traces, and a flip-chip or other mounting system. The base or printed circuit board can be formed from any suitable material (e.g., ceramic, silicon, aluminum, etc.). If the base material is conductive, an insulating layer is formed over the substrate material, and a metal electrode pattern is formed over the insulating layer. The base can act as a mechanical support, thereby providing an electrical interface between the electrodes on the light-emitting array and the power supply, and also provides a heat sink function.

[0071] In some embodiments, the LED light array includes optical elements, such as lenses, metalenses, and / or pre-collimators. The optical elements may also or may alternatively include apertures, filters, Fresnel lenses, convex lenses, concave lenses, or any other suitable optical elements that affect the projected light from the light array. Additionally, one or more optical elements may have one or more coatings, including UV blocking coatings or anti-reflective coatings. In some embodiments, the optical device can be used to correct or minimize two-dimensional or three-dimensional optical errors, including pincushion distortion, barrel distortion, longitudinal chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, the optical elements can be used to magnify and / or correct the image. Advantageously, in some embodiments, magnification of the displayed image allows the light array to be physically smaller, lighter, and require less power than a larger display. Additionally, magnification can increase the field of view of the displayed content, thereby allowing the display to appear equal to the user's normal field of view.

[0072] application Figure 12 An exemplary display system 1200 utilizing the LEDs disclosed herein, including uLEDs, is schematically illustrated. Display system 1200 includes an LED lighting array 1202 in electrical communication with an LED driver 1204 and a display 1208. Display system 1200 also includes a system controller 1206, such as a microprocessor. Controller 1206 is coupled to LED driver 1204. Controller 1206 may also be coupled to display 1208 and optional sensor(s) 1210, and is powered by a power supply 1212. In one or more embodiments, user data input is provided to system controller 1206.

[0073] In one or more embodiments, the system is a camera flash system utilizing uLEDs. In such embodiments, LED lighting array 1202 is a lighting array and lens system, and display 1208 includes a camera, wherein the LEDs of 1202 and the camera of 1208 can be controlled by controller 1206 to match their fields of view.

[0074] Optionally, the sensors 1210 having control inputs may include, for example, position sensors (e.g., gyroscopes and / or accelerometers) and / or other sensors that can be used to determine the position, velocity, and orientation of the system. Signals from the sensors 1210 may be provided to the controller 1206 for use in determining an appropriate course of action for the controller 1206 (e.g., which LEDs are currently illuminating a target, and which LEDs will illuminate the target after a predetermined amount of time).

[0075] In operation, the illumination from some or all pixels of the LED array in 1202 can be adjusted (deactivated, operated at full intensity, or operated at an intermediate intensity). As described above, beam focusing or steering of light emitted by the LED array in 1202 can be performed electronically by activating one or more subsets of pixels to allow dynamic adjustment of the beam shape without moving optics or changing the focus of lenses in the lighting device.

[0076] LED array systems such as those described herein can support a variety of other beam steering or other applications that benefit from fine-grained intensity, spatial, and temporal control of light distribution. These applications can include, but are not limited to, precise spatial patterning of light emitted from a pixel block or individual pixels. Depending on the application, the emitted light can be spectrally distinct, adaptive over time, and / or environmentally responsive. Arrays of light-emitting pixels can provide pre-programmed light distributions in various intensity, spatial, or temporal patterns. The associated optics can be distinct at the pixel, pixel block, or device level. An example light-emitting pixel array can include a device with a commonly controlled center block of high-intensity pixels having associated common optics, while edge pixels can have separate optics. In addition to flashlights, common applications supported by light-emitting pixel arrays include video lighting, automotive headlights, architectural and area lighting, and street lighting.

[0077] Other applications of the LED devices herein include augmented reality / virtual reality (AR / VR) systems, which can utilize the uLEDs disclosed herein. One or more AR / VR systems include: augmented reality (AR) or virtual reality (VR) headsets, glasses, or projectors. Such AR / VR systems include an LED light array, an LED driver (or light array controller), a system controller, an AR or VR display, and a sensor system 810. Control inputs can be provided to the sensor system, while power and user data inputs are provided to the system controller. It will be understood that in some embodiments, the modules included in the AR / VR system can be compactly arranged in a single structure, or one or more elements can be mounted separately and connected via wireless or wired communication. For example, the light array, AR or VR display, and sensor system can be mounted on a headset or glasses, with the LED driver and / or system controller mounted separately.

[0078] In one embodiment, a light-emitting array can be used to project light in a graphic pattern or object pattern that can support an AR / VR system. In some embodiments, separate light-emitting arrays can be used to provide a display image, where AR features are provided by different and separate micro-LED arrays. In some embodiments, selected groups of pixels can be used to display content to the user, while tracking pixels can be used to provide tracking light used in eye tracking. Content display pixels are designed to emit visible light, having at least a portion of the visible band (approximately 400 nm to 750 nm). In contrast, tracking pixels can emit light in the visible band or the IR band (approximately 750 nm to 2200 nm), or some combination thereof. As an alternative example, tracking pixels can operate in the range of 800 to 1000 nanometers. In some embodiments, tracking pixels can emit tracking light during periods when content pixels are off and not displaying content to the user.

[0079] AR / VR systems can incorporate a variety of optical devices in the LED array and / or AR / VR display, for example to couple light emitted by the LED array into the AR / VR display, as described above. For AR / VR applications, these optical devices can include nanofins and be designed to polarize the light they transmit.

[0080] In one embodiment, a light array controller can be used to provide power and real-time control for the light array. For example, the light array controller can be capable of pixel-level or group-level control of amplitude and duty cycle. In some embodiments, the light array controller also includes a frame buffer for storing generated or processed images that can be provided to the light array. Other supported modules can include digital control interfaces such as an inter-integrated circuit (I2C) serial bus, a serial peripheral interface (SPI), USB-C, HDMI, DisplayPort, or other suitable image or control modules configured to transmit the required image data, control data, or instructions.

[0081] In operation, pixels in an image can be used to define the response of a corresponding light-emitting array, where the intensity and spatial modulation of the LED pixels are based on the image(s). To reduce data rate issues, in some embodiments, groups of pixels (e.g., 5×5 blocks) can be controlled as a single block. In some embodiments, high-speed and high-data-rate operation is supported, where pixel values ​​from successive images can be loaded as successive frames in an image sequence at a rate between 30 Hz and 100 Hz (with 60 Hz being a typical rate). Pulse-width modulation can be used to control each pixel to emit light in a pattern and at an intensity that depends at least in part on the image.

[0082] In some embodiments, the sensor system may include: external sensors that monitor the environment, such as cameras, depth sensors, or audio sensors; and internal sensors that monitor the position of the AR / VR headset, such as accelerometers or two-axis or three-axis gyroscopes. Other sensors may include, but are not limited to, air pressure, strain sensors, temperature sensors, or any other suitable sensors required for local or remote environmental monitoring. In some embodiments, the control input may include detected touches or taps, gesture inputs, or controls based on the position of the headset or display. As another example, an estimated position of the AR / VR system relative to an initial position may be determined based on one or more measurement signals from one or more gyroscopes or position sensors that measure translational or rotational movement.

[0083] In some embodiments, the system controller uses data from the sensor system to integrate the measurement signal received from the accelerometer over time to estimate a velocity vector, and integrates the velocity vector over time to determine an estimated position of a reference point for the AR / VR system. In other embodiments, the reference point used to describe the position of the AR / VR system can be based on a depth sensor, a camera positioning view, or a light field flow.

[0084] Based on changes in the position, orientation, or movement of the AR / VR system, the system controller can send images or instructions to the light array controller. Changes or modifications to images or instructions can also be made through user data input or automatic data input as needed. User data input can include, but is not limited to, data input provided by audio commands, tactile feedback, eye or pupil positioning, or a connected keyboard, mouse, or game controller.

[0085] Figure 13 A block diagram of an example of a visualization system 10 is shown. The visualization system 10 may include a wearable housing 12, such as a headset or goggles. The housing 12 may mechanically support and house the elements described in detail below. In some examples, one or more of the elements described in detail below may be included in one or more additional housings that may be separate from the wearable housing 12 and may be coupled to the wearable housing 12 wirelessly and / or via a wired connection. For example, a separate housing may reduce the weight of the wearable goggles, such as by including batteries, radios, and other elements. The housing 12 may include one or more batteries 14 that may power any or all of the elements described in detail below. The housing 12 may include circuitry that may be electrically coupled to an external power source, such as a wall outlet, to charge the batteries 14. The housing 12 may include one or more radios 16 for wirelessly communicating with a server or network via a suitable protocol, such as WiFi.

[0086] The visualization system 10 may include one or more sensors 18, such as optical sensors, audio sensors, tactile sensors, thermal sensors, gyroscope sensors, time-of-flight sensors, triangulation-based sensors, and the like. In some examples, one or more of these sensors may sense the location, position, and / or orientation of a user. In some examples, one or more sensors 18 may generate sensor signals in response to the sensed location, position, and / or orientation. The sensor signals may include sensor data corresponding to the sensed location, position, and / or orientation. For example, the sensor data may include a depth map of the surrounding environment. In some examples, such as for an augmented reality system, one or more sensors 18 may capture real-time video images of the surrounding environment near the user.

[0087] The visualization system 10 may include one or more video generation processors 20. The one or more video generation processors 20 may receive scene data representing a three-dimensional scene from a server and / or storage medium, such as a set of position coordinates of objects in the scene or a depth map of the scene. The one or more video generation processors 20 may receive one or more sensor signals from one or more sensors 18. In response to the scene data representing the surrounding environment and at least one sensor signal representing the location and / or orientation of the user relative to the surrounding environment, the one or more video generation processors 20 may generate at least one video signal corresponding to a view of the scene. In some examples, the one or more video generation processors 20 may generate two video signals, one for each eye of the user, the two video signals representing views of the scene from the perspective of the user's left eye and right eye, respectively. In some examples, the one or more video generation processors 20 may generate more than two video signals and combine the video signals to provide one video signal for both eyes, two video signals for both eyes, or other combinations.

[0088] The visualization system 10 may include one or more light sources 22 that may provide light for a display of the visualization system 10. Suitable light sources 22 may include a light emitting diode, a monolithic light emitting diode, a plurality of light emitting diodes, an array of light emitting diodes, an array of light emitting diodes disposed on a common substrate, segmented light emitting diodes disposed on a single substrate and having individually addressable and controllable (and / or controllable in groups and / or molecular sets) light emitting diode elements, an array of micro light emitting diodes (microLEDs), and the like.

[0089] The LED may be a white light emitting diode. For example, the white light emitting diode may emit excitation light, such as blue light or violet light. The white light emitting diode may include one or more phosphors that may absorb some or all of the excitation light and, in response, emit phosphor light having a wavelength greater than that of the excitation light (such as yellow light).

[0090] One or more light sources 22 may include light emitting elements having different colors or wavelengths. For example, the light source may include a red light emitting diode (LED) that may emit red light, a green light emitting diode (LED) that may emit green light, and a blue light emitting diode (LED) that may emit blue light. The red, green, and blue light may be combined in a specific ratio to produce any suitable color that is visually perceptible in the visible portion of the electromagnetic spectrum.

[0091] The visualization system 10 may include one or more modulators 24. The modulators 24 may be implemented in one of at least two configurations.

[0092] In a first configuration, modulator 24 may include circuitry that can directly modulate light source 22. For example, light source 22 may include an array of light-emitting diodes, and modulator 24 may directly modulate the electrical power, voltage, and / or current directed to each light-emitting diode in the array to form modulated light. Modulation may be performed in an analog and / or digital manner. In some examples, light source 22 may include an array of red light-emitting diodes, an array of green light-emitting diodes, and an array of blue light-emitting diodes, and modulator 24 may directly modulate the red light-emitting diodes, the green light-emitting diodes, and the blue light-emitting diodes to form modulated light to produce a particular image.

[0093] In a second configuration, the modulator 24 may include a modulation panel, such as a liquid crystal panel. The light source 22 may generate uniform or nearly uniform illumination to illuminate the modulation panel. The modulation panel may include pixels. Each pixel may selectively attenuate a corresponding portion of the modulation panel area in response to an electrical modulation signal to form modulated light. In some examples, the modulator 24 may include multiple modulation panels capable of modulating light of different colors. For example, the modulator 24 may include a red modulation panel capable of attenuating red light from a red light source (such as a red light-emitting diode), a green modulation panel capable of attenuating green light from a green light source (such as a green light-emitting diode), and a blue modulation panel capable of attenuating blue light from a blue light source (such as a blue light-emitting diode).

[0094] In some examples of the second configuration, modulator 24 can receive uniform white light, or nearly uniform white light, from a white light source, such as a white light emitting diode. The modulation panel can include a wavelength-selective filter on each pixel of the modulation panel. The panel pixels can be arranged in groups, such as three or four, where each group can form a pixel of a color image. For example, each group can include a panel pixel with a red filter, a panel pixel with a green filter, and a panel pixel with a blue filter. Other suitable configurations can also be used.

[0095] The visualization system 10 may include one or more modulation processors 26 that may receive a video signal (such as from one or more video generation processors 20) and, in response, may generate an electrical modulation signal. For configurations in which the modulator 24 directly modulates the light source 22, the electrical modulation signal may drive the light source 24. For configurations in which the modulator 24 includes a modulation panel, the electrical modulation signal may drive the modulation panel.

[0096] The visualization system 10 may include one or more beam combiners 28 (also referred to as beam splitters 28) that may combine light beams of different colors to form a single polychromatic light beam. For configurations in which the light source 22 may include multiple light emitting diodes of different colors, the visualization system 10 may include one or more wavelength-sensitive (e.g., dichroic) beam splitters 28 that may combine the different colors of light to form a single polychromatic light beam.

[0097] The visualization system 10 can direct modulated light toward the viewer's eyes in one of at least two configurations. In a first configuration, the visualization system 10 can function as a projector and can include suitable projection optics 30 that can project the modulated light onto one or more screens 32. The screens 32 can be positioned at a suitable distance from the user's eyes. The visualization system 10 can optionally include one or more lenses 34 that can position a virtual image of the screen 32 at a suitable distance from the eyes, such as a close-focus distance of 500 mm, 750 mm, or another suitable distance. In some examples, the visualization system 10 can include a single screen 32 so that the modulated light can be directed toward both eyes of the user. In some examples, the visualization system 10 can include two screens 32 so that the modulated light from each screen 32 can be directed toward a respective eye of the user. In some examples, the visualization system 10 can include more than two screens 32. In a second configuration, the visualization system 10 can direct the modulated light directly into one or both eyes of the viewer. For example, projection optics 30 may form an image on the retina of one eye of a user, or on the retina of each of both eyes of a user. Example

[0098] Various embodiments are listed below. It will be understood that the embodiments listed below can be combined with all aspects of the scope of the present invention and other embodiments.

[0099] Embodiment (a). A micro-light emitting diode (uLED) includes: a pixel defined by a mesa of a semiconductor layer having sidewalls, the mesa including an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding the sidewalls of the pixel; a current spreading layer in contact with one or more n-contact materials and the n-type layer; an optical layer disposed on the current spreading layer, the optical layer including an optical segment opposite the n-type layer and the first dielectric material, the optical segment including a second dielectric material, and the optical layer including a reflective sidewall adjacent to an opposite portion of the optical segment and the one or more n-contact materials; and an anode in contact with the p-type layer.

[0100] Embodiment (b) The uLED of embodiment (a), wherein the optical segment is at the center of the pixel.

[0101] Embodiment (c) The uLED of embodiment (a) or (b), wherein the optical segment comprises a flat surface opposite the current spreading layer.

[0102] Embodiment (d) The uLED of embodiment (a) or (b), wherein the optical segment comprises a concave surface opposite the current spreading layer.

[0103] Embodiment (e). The uLED of any one of embodiments (a) to (d), wherein the first dielectric material and the second dielectric material independently comprise one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN); and / or the anode and n-contact material and the reflective sidewalls comprise one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

[0104] Embodiment (f) The uLED according to any one of embodiments (a) to (e), wherein the minimum thickness of the optical segment is in the range of 500 nm to 1 μm.

[0105] Embodiment (g) The uLED according to any one of embodiments (a) to (f), wherein the optical segment comprises a layered structure.

[0106] Embodiment (h) The uLED according to embodiment (g), wherein the layered structure comprises one or more pairs of silicon dioxide (SiO2) layers and titanium dioxide (TiO2) layers, or one or more pairs of silicon dioxide (SiO2) layers and niobium pentoxide (NbO5) layers.

[0107] Embodiment (i). The uLED of any one of embodiments (a) to (h), wherein when power is applied to the pixel, for angles (θ) greater than or equal to 0° to less than or equal to 40°, the far-field angular emission response is higher than a comparative uLED having the same structure without the optical layer.

[0108] Embodiment (j). A micro-light emitting diode (uLED) die comprising: a plurality of pixels, each pixel having sidewalls and defined by a mesa of a semiconductor layer, each mesa comprising an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding the sidewalls of each pixel; a plurality of n-contact materials between adjacent pixels on the first dielectric material; a current spreading layer in contact with a common cathode, each n-type layer, and the n-contact material; an optical layer on the current spreading layer, the optical layer comprising an optical segment opposite each n-type layer and the first dielectric material, the optical segment comprising a second dielectric material, and the optical layer comprising reflective sidewalls adjacent to opposing portions of the optical segment and the n-contact material; and a plurality of anodes in contact with each p-type layer.

[0109] Embodiment (k) The uLED die of embodiment (j), wherein the optical segment comprises a planar surface opposite the current spreading layer.

[0110] Embodiment (l) The uLED die of embodiment (j) or (k), wherein the optical segment comprises a concave surface opposite the current spreading layer.

[0111] Embodiment (m) The uLED die of any one of embodiments (j) to (l), wherein the minimum thickness of the optical segment is in the range of 500 nm to 1 μm.

[0112] Embodiment (n) The uLED die of any one of embodiments (j) to (m), wherein the optical segment comprises a layered structure.

[0113] Embodiment (o) The uLED die of embodiment (n), wherein the layered structure comprises one or more pairs of silicon dioxide (SiO2) layers and titanium dioxide (TiO2) layers, or one or more pairs of silicon dioxide (SiO2) layers and niobium pentoxide (NbO5) layers.

[0114] Embodiment (p) The uLED die of any one of embodiments (j) to (o), wherein the optical segment is at the center of each pixel.

[0115] Embodiment (q). The uLED die of any one of embodiments (j) to (p), wherein the first dielectric material and the second dielectric material independently comprise one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN); and / or the anode and n-contact material and the reflective sidewalls comprise one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

[0116] Embodiment (r) The uLED die of any one of embodiments (j) to (q), wherein the current spreading layer comprises indium tin oxide (ITO) and / or indium zinc oxide (IZO).

[0117] Embodiment (s) A micro light emitting diode (uLED) device comprises: a source wafer comprising the micro light emitting diode (uLED) die according to any one of embodiments (j) to (r); and a target wafer bonded to the source wafer.

[0118] Embodiment (t) The uLED device of embodiment (s), wherein the target wafer is a complementary metal oxide semiconductor (CMOS) wafer that is hybrid bonded to the source wafer in that there is a combination of metal-to-metal bonding and dielectric-to-dielectric bonding between the source wafer and the target wafer.

[0119] Embodiment (u) The uLED device of embodiment (s) or (t), wherein the target wafer comprises a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and Group III nitrides.

[0120] Embodiment (v) Any uLED or uLED die or uLED device according to embodiments (a) to (u), wherein the thickness of the mesa is in the range from 1 μm to 10 μm.

[0121] Embodiment (w) Any uLED or uLED die or uLED device according to embodiments (a) to (v), wherein the n-type layer and the p-type layer each comprise GaN.

[0122] Embodiment (ww). Any uLED or uLED die or uLED device according to embodiments (a) to (w), wherein the optical layer is present in a configuration that effectively acts as a lens for projected light for each pixel.

[0123] Embodiment (xx) Any uLED or uLED die or uLED device according to embodiments (a) to (w), wherein the optical layer is present in a configuration effective to function as an anti-reflective coating.

[0124] Embodiment (y). A method for manufacturing a micro light-emitting diode (uLED) device, comprising: depositing a coating material on a micro light-emitting diode (uLED) die, the uLED die comprising a plurality of pixels including mesas of a semiconductor layer, a first dielectric material surrounding a sidewall of each pixel, and a current spreading layer connecting a common cathode to each n-type layer of the mesas; selectively etching the coating material to form an optical segment on the current spreading layer opposite each n-type layer and the first dielectric material, the optical segment comprising a second dielectric material; and depositing and etching a metal material to form a reflective sidewall of the optical segment, thereby forming an optical layer comprising the optical segment and the reflective sidewall.

[0125] Embodiment (yy) The method of embodiment (y), wherein the semiconductor layer is deposited on a growth substrate, and the growth substrate is removed before depositing the current spreading layer on the n-type layer.

[0126] Embodiment (z) The method of embodiment (x) or (y) or (yy), wherein the optical layer is present in a configuration that effectively functions as a lens for projecting light for each pixel and / or effectively functions as an anti-reflective coating.

[0127] Throughout this specification, reference to "one embodiment," "certain embodiments," "one or more embodiments," or "an embodiment" means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the appearance of phrases such as "in one or more embodiments," "in certain embodiments," "in an embodiment," or "in an embodiment" throughout this specification is not necessarily referring to the same embodiment of the present disclosure. Furthermore, in one or more embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner.

[0128] Many modifications and other embodiments of the present invention will occur to those skilled in the art having the benefit of the teachings presented in the foregoing description and the associated drawings. Therefore, it should be understood that the present invention is not limited to the specific embodiments disclosed, and that modifications and embodiments are intended to be included within the scope of the appended claims. It should also be understood that other embodiments of the present invention can be practiced without elements / steps not specifically disclosed herein.

Claims

1. A micro light emitting diode (uLED), comprising: a pixel defined by a mesa of a semiconductor layer having sidewalls, the mesa including an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding sidewalls of the pixel; a current spreading layer in contact with the one or more n-contact materials and the n-type layer; an optical layer disposed on the current spreading layer, the optical layer comprising an optical segment opposite the n-type layer and the first dielectric material, the optical segment comprising a second dielectric material, and the optical layer comprising a reflective sidewall adjacent to an opposite portion of the optical segment and the one or more n-contact materials; and An anode is in contact with the p-type layer.

2. The uLED of claim 1 , wherein the optical segment is at the center of the pixel.

3. The uLED of claim 1 , wherein the optical segment comprises a flat surface opposite the current spreading layer.

4. The uLED of claim 1 , wherein the optical segment comprises a concave surface opposite the current spreading layer.

5. The uLED of claim 1 , wherein the first dielectric material and the second dielectric material independently comprise one or more of silicon oxide (SiO), silicon dioxide (SiO 2 ), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al 2 O 3 ) and aluminum nitride (AlN); and / or the anode and the n-contact material and the reflective sidewall comprise one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt) and palladium (Pd).

6. The uLED of claim 1 , wherein the optical segment comprises a minimum thickness in the range of 500 nanometers to 1 micrometer.

7. The uLED of claim 1 , wherein the optical segment comprises a layered structure.

8. The uLED according to claim 7, wherein the layered structure comprises one or more pairs of silicon dioxide (SiO2) layers and titanium dioxide (TiO2) layers, or one or more pairs of silicon dioxide (SiO2) layers and niobium pentoxide (NbO5) layers.

9. A micro light emitting diode (uLED) die comprising: a plurality of pixels, each pixel having sidewalls and defined by a mesa of the semiconductor layer, each mesa comprising an n-type layer, an active region, and a p-type layer; a first dielectric material surrounding the sidewalls of each pixel; a plurality of n-contact materials between adjacent pixels on the first dielectric material; a current spreading layer in contact with the common cathode, each n-type layer, and the n-contact material; an optical layer on the current spreading layer, the optical layer comprising an optical segment opposite each n-type layer and the first dielectric material, the optical segment comprising a second dielectric material, and the optical layer comprising a reflective sidewall adjacent to opposing portions of the optical segment and the n-contact material; and A plurality of anodes are in contact with each p-type layer.

10. The uLED die of claim 9, wherein the optical segment comprises a flat surface opposite the current spreading layer.

11. The uLED die of claim 9, wherein the optical segment comprises a concave surface opposite the current spreading layer.

12. The uLED die of claim 9, wherein the optical segment comprises a minimum thickness in the range of 500 nanometers to 1 micrometer.

13. The uLED die of claim 9, wherein the optical segment comprises a layered structure.

14. The uLED die of claim 13, wherein the layered structure comprises one or more pairs of silicon dioxide (SiO2) layers and titanium dioxide (TiO2) layers, or one or more pairs of silicon dioxide (SiO2) layers and niobium pentoxide (NbO5) layers.

15. The uLED die of claim 9, wherein the current spreading layer comprises indium tin oxide (ITO) and / or indium zinc oxide (IZO).

16. A micro light emitting diode (uLED) device comprising: A source wafer comprising a micro light emitting diode (uLED) die according to claim 10; and Bond the target wafer to the source wafer.

17. The uLED device of claim 16, wherein the target wafer is a complementary metal oxide semiconductor (CMOS) wafer that is hybrid bonded to the source wafer in that there is a combination of metal-to-metal bonding and dielectric-to-dielectric bonding between the source and target wafers.

18. The uLED device of claim 16, wherein the target wafer comprises a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and Group III nitrides.

19. A method of manufacturing a micro light emitting diode (uLED) device, comprising: depositing a coating material on a micro light emitting diode (uLED) die comprising a plurality of pixels including mesas of a semiconductor layer, a first dielectric material surrounding sidewalls of each pixel, and a current spreading layer connecting a common cathode to each n-type layer of the mesa; selectively etching the coating material to produce an optical segment on the current spreading layer opposite each of the n-type layer and the first dielectric material, the optical segment comprising the second dielectric material; A metal material is deposited and etched to prepare the reflective sidewalls of the optical segment, thereby forming an optical layer including the optical segment and the reflective sidewalls.

20. The method of claim 19, wherein the semiconductor layer is deposited on a growth substrate, the growth substrate being removed before depositing the current spreading layer onto the n-type layer.

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