Data transmission method, device and virtual path router

Abstract

The present disclosure provides a data transmission method and device and a virtual path router, and relates to the technical field of computers. The method comprises the following steps: in response to determining that a first data unit transmitted by a first input unit under the condition that the target OVC is authorized is the last data unit of the first data, controlling the target OVC to be in a tail effective occupation state; in response to determining that the target OVC is in the tail effective occupation state and the first input unit is in an SA state, controlling a second input unit to enter the SA state, transmitting second data through the second input unit, and transmitting the first data unit through the target OVC, under the condition that the second input unit is in a VA state based on the authorization of the target OVC; and in response to the second data reaching the target OVC, transmitting the second data through the target OVC. The method can solve the problem of data flow interruption and improve the data transmission efficiency.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, and particularly relates to a data transmission method and device, a virtual channel router, a data transmission system, a chip, a computer readable storage medium and a computer program product. BACKGROUND

[0002] A network-on-chip (NoC) is a high-performance interconnection structure for a multi-processing unit system inside a chip, and uses a routing network for efficient traffic routing. A router in the routing network can be referred to as a virtual channel router or a virtualized router, and the virtualized router includes one or more input units and one or more output units. In a scenario where different input units simultaneously compete for the same virtual channel of the same output unit, a data flow interruption problem occurs in the process of transmitting a message packet by the virtual channel, resulting in low transmission efficiency of the virtualized router. SUMMARY

[0003] Embodiments of the present disclosure provide a data transmission method, device, virtual channel router, data transmission system, chip, computer readable storage medium and computer program product.

[0004] According to a first aspect of the present disclosure, a data transmission method is provided, applied to a virtualized router, the virtualized router including a first input unit, a second input unit and a target output virtual channel (OVC), and the data transmission method includes: in response to determining that a first data unit transmitted by the first input unit under the condition of authorization of the target OVC is the last data unit of first data, controlling the target OVC to be in a tail valid occupancy state; in response to determining that the target OVC is in the tail valid occupancy state and the first input unit is in a state A (SA) state, controlling the second input unit to enter the SA state, transmitting second data through the second input unit, and transmitting the first data unit through the target OVC, in a case where the second input unit is in a virtual active (VA) state based on authorization of the target OVC; and in response to the second data reaching the target OVC, transmitting the second data through the target OVC.

[0005] In a possible implementation, the first data can further include a second data unit, and the second data unit is a previous data unit of the first data unit.

[0006] The above-mentioned response to determining that the first data unit transmitted by the first input unit under the condition of authorization of the target OVC is the last data unit of first data, and controlling the target OVC to be in a tail valid occupancy state, can include:

[0007] In response to determining that the first input unit is in the SA state based on the authorization of the target OVC during transmission of the second data unit, and the first data unit is the last data unit of the first data, the target OVC is controlled to enter a trailer valid occupation state.

[0008] In a possible implementation, the method provided by the first aspect can further include:

[0009] In the case that the first input unit is in the SA state during transmission of the second data unit, in response to determining that the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-trailer occupation state.

[0010] In a possible implementation, the method provided by the first aspect can further include: in the case that the target OVC is in the non-trailer occupation state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, it is determined whether the next data unit of the second data unit is the last data unit of the first data.

[0011] In a possible implementation, the above determining, in the case that the target OVC is in the non-trailer occupation state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, whether the next data unit of the second data unit is the last data unit of the first data, can include: in the case that the target OVC is in the non-trailer occupation state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, the current count value of a counter of the first data is increased by 1 to obtain an updated count value; if the updated count value is less than a first total quantity, it is determined that the next data unit of the second data unit is not the last data unit of the first data; wherein the first total quantity represents a total quantity of data units included in the first data; if the updated count value is equal to the first total quantity, it is determined that the next data unit of the second data unit is the last data unit of the first data.

[0012] In a possible implementation, the first total quantity is determined based on a preset length of a data unit, address information included in a header of the first data, and length information recording a total length of the first data; wherein the address information includes a valid start address of the first data.

[0013] In a possible implementation, the method provided in the first aspect further includes: in response to determining that the first input unit is in the VA state during transmission of the first data unit based on authorization of the target OVC and that the first data unit is the last data unit of the first data, controlling the target OVC to enter the valid end-of-packet occupancy state.

[0014] In a possible implementation, the method provided in the first aspect further includes: in response to determining that the first input unit is in the VA state during transmission of the first data unit based on authorization of the target OVC and that the first data unit is not the last data unit of the first data, controlling the target OVC to enter the non-end-of-packet occupancy state.

[0015] In a possible implementation, the method provided in the first aspect further includes: in response to determining that the first input unit is in the VA state during transmission of the first data unit, determining whether the first data unit is the last data unit of the first data.

[0016] In a possible implementation, the method provided in the first aspect further includes: in response to determining that the first input unit is in the SA state during transmission of the first data unit and that the second input unit is in the VA state, determining whether a data unit of second data currently transmitted by the second input unit is the last data unit of the second data; if yes, controlling the target OVC to remain in the valid end-of-packet occupancy state; and if no, controlling the target OVC to enter the non-end-of-packet occupancy state.

[0017] In a possible implementation, the method provided in the first aspect further includes: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in the valid end-of-packet occupancy state; if yes, determining whether there is a case that the first input unit is in the SA state based on authorization of the target OVC; and in response to determining that there is the case that the first input unit is in the SA state based on authorization of the target OVC, controlling the second input unit to enter the SA state.

[0018] In a possible implementation, the method provided by the first aspect further includes: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in a tail effective occupancy state; if yes, determining whether there is a case that the first input unit is in the SA state based on authorization of the target OVC; and in response to determining that there is no case that the first input unit is in the SA state based on authorization of the target OVC, controlling the second input unit to remain in the VA state.

[0019] In a possible implementation, the method provided by the first aspect further includes: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in a tail effective occupancy state; and in response to determining that the target OVC is not in the tail effective occupancy state, controlling the second input unit to remain in the VA state.

[0020] In a possible implementation, the method provided by the first aspect further includes: in a case that the second input unit is in the VA state based on authorization of the target OVC, determining whether the target OVC is in the idle state.

[0021] According to a second aspect of the present disclosure, a data transmission apparatus is provided, and is applied to a virtual channel router, the virtual channel router including a first input unit, a second input unit, and a target output virtual channel (OVC), the apparatus including an output state module and a state control and transmission module.

[0022] The output state module is configured to control the target OVC to be in a tail effective occupancy state in response to determining that the first data unit transmitted by the first input unit in the case of authorization of the target OVC is the last data unit of the first data.

[0023] The state control and transmission module is configured to, in a case that the second input unit is in the VA state based on authorization of the target OVC, control the second input unit to enter the SA state, transmit second data through the second input unit, and transmit the first data unit through the target OVC in response to determining that the target OVC is in the tail effective occupancy state and the first input unit is in the SA state.

[0024] The state control and transmission module is further configured to transmit the second data through the target OVC in response to the second data reaching the target OVC.

[0025] In a possible implementation, the first data further includes a second data unit, and the second data unit is a previous data unit of the first data unit.

[0026] The state control and transmission module is further configured to control the target OVC to enter a packet tail valid occupation state in response to determining that the first input unit is in the SA state based on the authorization of the target OVC during transmission of the second data unit and that the first data unit is the last data unit of the first data.

[0027] In a possible implementation, the output state module is further configured to control the target OVC to enter a non-packet tail occupation state in response to determining that the first data unit is not the last data unit of the first data in a case where the first input unit is in the SA state during transmission of the second data unit.

[0028] In a possible implementation, the data transmission apparatus further includes a first determination module configured to determine whether a next data unit of the second data unit is the last data unit of the first data in response to determining that the first input unit is in the SA state during transmission of the second data unit in a case where the target OVC is in the non-packet tail occupation state.

[0029] In a possible implementation, the first determination module can be further configured to add 1 to a current count value of a counter of the first data to obtain an updated count value in response to determining that the first input unit is in the SA state during transmission of the second data unit in a case where the target OVC is in the non-packet tail occupation state; and determine that the next data unit of the second data unit is not the last data unit of the first data if the updated count value is less than a first total quantity, or determine that the next data unit of the second data unit is the last data unit of the first data if the updated count value is equal to the first total quantity, where the first total quantity indicates a total quantity of data units included in the first data.

[0030] In a possible implementation, the first total quantity is determined based on a preset length of the data unit, address information included in a packet header of the first data, and length information recording a total length of the first data, where the address information includes a valid start address of the first data.

[0031] In a possible implementation, the output state module is further configured to control the target OVC to enter a packet tail valid occupation state in response to determining that the first input unit is in the VA state based on the authorization of the target OVC during transmission of the first data unit and that the first data unit is the last data unit of the first data in a case where the target OVC is in the idle state.

[0032] In a possible implementation, the output state module is further configured to: in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state based on the authorization of the target OVC during transmission of the first data unit, and the first data unit is not the last data unit of the first data, control the target OVC to enter the non-trailer occupancy state.

[0033] In a possible implementation, the data transmission apparatus further includes a second determination module configured to, in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state during transmission of the first data unit, determine whether the first data unit is the last data unit of the first data.

[0034] In a possible implementation, the data transmission apparatus further includes a third determination module configured to, in the case that the target OVC is in the trailer valid occupancy state, in response to determining that the first input unit is in the SA state during transmission of the first data unit, and the second input unit is in the VA state, determine whether the data unit of the second data currently transmitted by the second input unit is the last data unit of the second data.

[0035] The output state module is further configured to: if the data unit of the second data currently transmitted by the second input unit is the last data unit of the second data, control the target OVC to remain in the trailer valid occupancy state; and if the data unit of the second data currently transmitted by the second input unit is not the last data unit of the second data, control the target OVC to enter the non-trailer occupancy state.

[0036] In a possible implementation, the data transmission apparatus further includes a state determination module and an input state module. The state determination module is configured to, in response to determining that the target OVC is not in the idle state, determine whether the target OVC is in the trailer valid occupancy state; if yes, determine whether there is a case that the first input unit is in the SA state based on the authorization of the target OVC. The input state module is configured to, in response to determining that there is the case that the first input unit is in the SA state based on the authorization of the target OVC, control the second input unit to enter the SA state.

[0037] In a possible implementation, the data transmission apparatus further includes a state determination module and an input state module. The state determination module is configured to, in response to determining that the target OVC is not in the idle state, determine whether the target OVC is in the trailer valid occupancy state; if yes, determine whether there is a case that the first input unit is in the SA state based on the authorization of the target OVC. The input state module is configured to, in response to determining that there is not the case that the first input unit is in the SA state based on the authorization of the target OVC, control the second input unit to remain in the VA state.

[0038] In a possible implementation, the data transmission apparatus further includes a state determining module and an input state module. The state determining module is configured to determine whether the target OVC is in a tail effective occupation state in response to determining that the target OVC is not in the idle state. The input state module is configured to control the second input unit to remain in the VA state in response to determining that the target OVC is not in the tail effective occupation state.

[0039] In a possible implementation, the state determining module is further configured to determine whether the target OVC is in the idle state in a case where the second input unit is in the VA state based on authorization of the target OVC.

[0040] According to a third aspect of the present disclosure, a virtual channel router is provided, including: a target output virtual channel (OVC); a first input unit configured to transmit first data in a case where the target OVC is authorized; and a second input unit configured to transmit second data in a case where the target OVC is authorized.

[0041] In a case where a first data unit transmitted by the first input unit in the case where the target OVC is authorized is a last data unit of the first data, the target OVC is controlled to be in a tail effective occupation state.

[0042] In a case where the second input unit is in the VA state based on authorization of the target OVC, in response to the target OVC being in the tail effective occupation state and the first input unit being in a SA state, the second input unit enters the SA state, the second input unit transmits the second data, and the target OVC transmits the first data unit.

[0043] In a case where the target OVC receives the second data, the target OVC transmits the second data.

[0044] Optionally, the virtual channel router can implement the method in the first aspect and any possible implementation manner of the first aspect.

[0045] According to a fourth aspect of the present disclosure, a data transmission system is provided, including: a target output virtual channel (OVC), a first input unit, and a second input unit. The first input unit is configured to transmit first data in a case where the target OVC is authorized, and the second input unit is configured to transmit second data in a case where the target OVC is authorized.

[0046] In a case where the first data unit transmitted by the first input unit in response to the target OVC authorization is the last data unit of the first data, the target OVC is controlled to be in a tail valid occupancy state. In a case where the second input unit is in the VA state based on the authorization of the target OVC, in response to the target OVC being in the tail valid occupancy state and the first input unit being in the SA state, the second input unit enters the SA state, the second input unit transmits second data, and the target OVC transmits the first data unit; in a case where the target OVC receives the second data, the target OVC transmits the second data.

[0047] Optionally, the data transmission system can implement the method in the first aspect and any possible implementation manner in the first aspect.

[0048] According to a fifth aspect of the present disclosure, a chip is provided, which includes a processor, the processor being operable to implement the method in the first aspect and any possible implementation manner in the first aspect. For example, the chip can be a NoC chip, a switch chip, or the like.

[0049] According to a sixth aspect of the present disclosure, a data transmission apparatus is provided, which includes a processor and a memory for storing processor-executable instructions.

[0050] The processor is configured to implement the method in the first aspect and any possible implementation manner in the first aspect when executing the instructions stored in the memory.

[0051] According to a seventh aspect of the present disclosure, a non-volatile computer-readable storage medium is provided, which stores computer program instructions, the computer program instructions being executed by a processor to implement the method in the first aspect and any possible implementation manner in the first aspect.

[0052] According to an eighth aspect of the present disclosure, a computer program product is provided, which includes a computer program, the computer program being executed by a processor to implement the steps of the method in the first aspect and any possible implementation manner in the first aspect.

[0053] The data transmission method, apparatus, virtual channel router, data transmission system, chip, computer-readable storage medium, and computer program product provided by the embodiments of the present disclosure can solve the problem of data flow interruption during data transmission, and can improve the data transmission efficiency of the virtual channel router.

[0054] It should be understood that the content described in this section is not intended to identify key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.

[0055] Other features and aspects of the present disclosure will become apparent from a detailed description of exemplary embodiments with reference to the following drawings. BRIEF DESCRIPTION OF DRAWINGS

[0056] Other features, objects, and advantages of the present disclosure will become more apparent from a detailed description of non-limiting embodiments with reference to the following drawings:

[0057] Figure 1 Block diagram of a computing system for an embodiment of the present disclosure;

[0058] Figure 2 Diagram of a data transfer scenario for an embodiment of the present disclosure;

[0059] Figure 3 Block diagram of a computing system for an embodiment of the present disclosure;

[0060] Figure 4 Flowchart of a data transfer method for an embodiment of the present disclosure;

[0061] Figure 5 Diagram of a data transfer scenario for an exemplary embodiment of the present disclosure;

[0062] Figure 6 Diagram of a data transfer scenario for another exemplary embodiment of the present disclosure;

[0063] Figure 7 Flowchart of a data transfer method for an exemplary embodiment of the present disclosure;

[0064] Figure 8 Flowchart of a data transfer method for another exemplary embodiment of the present disclosure;

[0065] Figure 9 Block diagram of a data transfer apparatus for an embodiment of the present disclosure;

[0066] Figure 10 Block diagram of an apparatus for data transfer according to an exemplary embodiment. DETAILED DESCRIPTION

[0067] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. Like reference numerals in the drawings denote the same or similar elements. Although various aspects of the embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically noted.

[0068] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0069] In addition, for a better understanding of the present disclosure, numerous specific details are given in the following detailed description. It will be understood by those skilled in the art that the present disclosure can be practiced without certain specific details. In some instances, well-known methods, procedures, elements, and circuits have not been described in detail so as not to obscure the underlying principles of the present disclosure.

[0070] Network on chip is a high performance interconnect structure for multi-processing unit system inside a chip. NoC architecture uses system level network technology to deliver traffic inside a chip. Compared with traditional bus architecture, NoC can provide high bandwidth, low latency, scalable switching network. Network on chip uses routing network for efficient traffic routing. The routing network includes routers, and in some implementations, the topology of the routing network can be butterfly, ring, mesh or torus, etc.

[0071] The router in the routing network can be referred to as a virtual channel (VC) router or a virtual channel router. Virtual channel refers to virtualizing the same physical channel into multiple channels for time division multiplexing, and there is a certain isolation between the transmission of each virtual channel. It is a technology for multiplexing channel to remove deadlock.

[0072] In combination Figure 1 The virtual channel router (or VC router) 100 includes an input unit, an output unit, a routing table 130, a VC allocator 140, a switch allocator 150, and a switch 160.

[0073] The number of input units can be one or more, Figure 1 The number of output units can be one or more, Figure 1 The number of output units can be one or more,

[0074] The routing table 130 can be used to find the output unit corresponding to the virtual channel router 100 according to the destination information in the message packet. The VC allocator 140 is used to allocate the virtual channel (which can be referred to as the output virtual channel (OVC)) corresponding to the output unit between multiple input units. The switch allocator 150 is used to allocate a switching time slice to the transmission unit of the message packet to achieve orderly and efficient switching.

[0075] The input unit includes an input state machine group and a VC buffer group. The number of the input state machine group can be one or more, Figure 1 One input state machine group can include one or more input state machines. The input state machine group 111-1 can include one or more input state machines. The number of the VC buffer group can be one or more, Figure 1 One VC buffer group can include one or more input state machines. For example, the VC buffer group 112-1 can include one or more input state machines. The VC buffer group can store data and control information of each VC. The VC buffer can be private to each VC, shared by all VCs, or both private and shared.

[0076] As shown in FIG. 1, Figure 1 The output unit includes an output state machine group and a VC buffer state group. The number of the output state machine group can be one or more, Figure 1 One output state machine group can include one or more output state machines. For example, the output state machine group 121-1 can include one or more output state machines. The number of the VC buffer state group can be one or more, Figure 1 One VC buffer state group can include one or more output state machines. For example, the VC buffer state group 122-1 can include one or more output state machines. The VC buffer state group can store the number of credits available for each VC. The VC buffer state can be private to each VC, shared by all VCs, or both private and shared.

[0077] For example, the input state machine of the input unit can include four states: an IDLE state, a Routing Table (RT) state, a VC Allocater (VA) state, and a Switch Allocater (SA) state.

[0078] When a message packet arrives at the input unit, the input state machine of the input unit transitions from the idle state to the RT state, requests the routing table information, and obtains the information of the output unit. When the routing table query is completed and the output unit is determined, the input state machine transitions to the VA state, requests the VC allocator 140 to allocate a virtual channel, and obtains the VC authorization information in the output unit. When the virtual channel allocation is completed, the input state machine transitions to the SA state, requests the switch allocator 150, and obtains the switch time slice authorization information in the output unit. When the switch time slice authorization is completed, the input state machine returns to the idle state, and waits for the next message packet.

[0079] The output state machine of the output unit includes two states: an idle state and an active state. In the idle state, the output unit is in a standby state, waiting for the occurrence of a triggering event. Once the event is triggered, the state machine will transition to the active state, at which time the virtual channel has been allocated and occupied, and the output unit waits to be authorized by the input unit to send the corresponding message packet.

[0080] In some embodiments, based on the state machine configuration of the input unit and the output unit described above, there is a data flow interruption problem in the transmission of data. For example, referring to Figure 2 , the message packet 1 of the input unit 1 and the message packet 2 of the input unit 2 compete for the same OVC of the same output unit. The message packet 1 arrives at the input unit 1 at clock cycle 1, but needs to wait until the input state machine 1 of the input unit 1 is in the SA state (i.e., clock cycle 3) to reach the output unit 1, so the data unit 11 of the message packet 1 is stalled for 2 clock cycles. The message packet 2 arrives at the input unit 2 at clock cycle 1, but the input unit 2 needs to wait until the output state machine 1 is in the idle state to obtain the VA authorization to enter the SA state (i.e., clock cycle 7) to reach the output unit 1, so the data unit 21 of the message packet 2 is stalled for 6 clock cycles. From the perspective of the output unit 1, the data transmission is interrupted for 1 clock cycle, i.e., no data is transmitted at clock cycle 7, and the data flow interruption problem occurs, resulting in low data transmission efficiency.

[0081] To solve the above problem, the present disclosure provides a data transmission method, device, virtual channel router, data transmission system, chip, computer readable storage medium and computer program product, which can solve the data flow interruption problem when data is transmitted based on a virtual channel router, and can improve the data transmission efficiency of the virtual channel router.

[0082] Figure 3 An exemplary computing system 300 architecture is shown, which can apply embodiments of the data transmission method, device, virtual channel router, data transmission system, chip, computer readable storage medium and computer program product of the present disclosure.

[0083] As Figure 3As shown, the computing system 300 can include a network-on-chip 310, and can also include a memory controller 320, a memory 330, an interconnect link 340, a multimedia engine 350, and a client 360.

[0084] The network-on-chip 310 includes a routing network 312, which includes the VC router 100. The implementation of the VC router 100 can refer to the related description in Figure 1 , except for the specific implementation of the output state machine of the output unit. For example, the VC router 100 includes an input unit including a set of input state machines and a set of VC buffers, an output unit including a set of output state machines and a set of VC buffer states, a routing table 130, a VC allocator 140, a switch allocator 150, and a switch 160. The related description can refer to Figure 1 , and will not be described here.

[0085] The network-on-chip 310 is used to connect the memory controller 320 and the interconnect link 340. The memory controller 320 is an interface to connect the memory 330. The network-on-chip 310 uses network interfaces 311-1 to 311-5 to exchange information between the memory controller 320, the interconnect link 340, and the plurality of clients 360.

[0086] The interconnect link 340 is used for interconnection between chips, such as interconnection through NVIDIA's high-speed interconnect technology (NvLink), Peripheral Component Interconnect Express (PCIE), Compute Express Link (CXL), etc.

[0087] The client 360 includes a CPU complex 361, a GPU 362, and a hub 363. The hub 363 is used to exchange information with the multimedia engine 350. The number of clients 360 can be multiple or 0. The types of clients can also be other types, such as a display, one or more input / output peripherals (I / O), a network card, etc.

[0088] The computing system 300, the network-on-chip 310, the routing network 312, and the VC router 100 can achieve the following effects: in response to determining that the first data unit transmitted by the first input unit obtaining the target OVC authorization is the last data unit of the first data, the target OVC is controlled to be in a tail-occupied available state; in a case where a second input unit transmitting second data is based on the authorization of the target OVC being in a VA state, in response to determining that the target OVC is in the tail-occupied available state and the first input unit is in an SA state, the second input unit is controlled to enter the SA state; and the second data can be transmitted through the target OVC, so that the problem of data flow interruption can be avoided, and the transmission efficiency can be improved.

[0089] The network-on-chip 310, the routing network 312, the VC router 100, and the input unit, the output unit, the routing table 130, the VC allocator 140, the switch allocator 150, and the switch 160 in the VC router 100 can be hardware, and when being hardware, can be implemented as multiple chips or a single chip; when being software, can be implemented as multiple software or software modules or a single software or software module, and are not limited herein.

[0090] It should be understood that Figure 3 The number of the network-on-chip, the storage controller, the memory, the interconnection link, the multimedia engine, and the client in the computing system 300 is only illustrative. Any number can be used according to implementation needs.

[0091] The technical solution provided by the present disclosure can improve the transmission efficiency by modifying the output state machine. For example, the output state machine of the output unit includes the following states: an idle (IDLE) state, an occupied (Occupied, O) state, and a tail-occupied available (Occupied Tail Avail, OTA) state.

[0092] The idle state represents that no message packet is authorized to be occupied.

[0093] The occupied (Occupied, O) state can also be referred to as a non-tail-occupied available state or an occupied arbitration state. The O state represents that a message packet of an input unit is using the OVC.

[0094] The OTA state represents that the OVC is in an occupied state, and a message packet of an input unit is using the OVC, but other input units can apply for a VA arbitration. The authorization of the VA arbitration depends on the tail of the message packet using the OVC being successfully authorized by the switch allocator SA. After the input unit applying for the VA arbitration is authorized, the input unit enters the SA state from the VA state and transmits the message packet.

[0095] Please refer to Figure 4 , Figure 4A flowchart of a data transmission method provided by an embodiment of the present disclosure, an execution subject can be the network-on-chip 310, the routing network 312, the VC router 100, etc., the VC router 100 includes a first input unit, a second input unit, and a target OVC, the target OVC can be included in an output unit, wherein the flowchart 400 includes the following steps.

[0096] Step 401, in response to determining that the first data unit transmitted by the first input unit under the authorization of the target OVC is the last data unit of the first data, the target OVC is controlled to be in a packet tail valid occupancy state.

[0097] In an embodiment of the present disclosure, data can be transmitted and processed in units of data units, for example, data but can be flits, etc., which is not limited.

[0098] For example, the first input unit obtains the authorization of the target OVC, the execution subject determines whether the first data unit transmitted by the first input unit is the last data unit of the first data, for example, determines whether the first data unit is a packet tail, if so, the target OVC is controlled to be in an OTA state, in this way, by determining the time when the first input unit occupying the target OVC ends, and by identifying the target OVC in a packet tail valid occupancy state, other input units (for example, the second input unit) are allowed to apply for VA arbitration.

[0099] For example, controlling the target OVC to be in a packet tail valid occupancy state can mean controlling the output state machine of the target OVC to be in a packet tail valid occupancy state.

[0100] In combination Figure 5 In a case where it is determined that the first data unit transmitted by the first input unit obtaining the authorization of the target OVC is the last data unit of the first data, the state (or output state machine) of the target OVC is controlled to be in an OTA state.

[0101] Step 402, in a case where the second input unit is in a VA state based on the authorization of the target OVC, in response to determining that the target OVC is in a packet tail valid occupancy state and the first input unit is in an SA state, the second input unit is controlled to enter an SA state, the second data is transmitted through the second input unit, and the first data unit is transmitted through the target OVC.

[0102] The first input unit, the second input unit and the target OVC in or entering a certain state in the embodiments of the present disclosure can refer to that the input state machine of the first input unit, the input state machine of the second input unit and the output state machine of the target OVC are in or enter corresponding states. For example, the second input unit in the VA state can refer to that the input state machine of the second input unit is in the VA state. The first input unit in the SA state can refer to that the input state machine of the first input unit is in the SA state. The second input unit entering the SA state can refer to that the input state machine of the second input unit enters the SA state.

[0103] For example, the second input unit and the first input unit simultaneously compete for the target OVC, the second data has arrived at the second input unit, the second input unit has obtained the VA authorization of the target OVC, and the input state machine of the second input unit is in the VA state. In this case, if it is determined that the target OVC is in the tail-end valid occupation state and the input state machine of the first input unit is in the SA state, it indicates that the first input unit can successfully transmit the first data through the target OVC, and then the input state machine of the second input unit is controlled to enter the SA state to transmit the second data.

[0104] In combination Figure 5 In the case that the second input unit based on the authorization of the target OVC is in the VA state when transmitting the second data, in response to the determination that the target OVC is in the OTA state and the first input unit is in the SA state, the second input unit is controlled to enter the SA state from the VA state. Figure 5 For example, the second data packet can also be divided into one or more data units for transmission. In the case that the second input unit is in the SA state, the second data is transmitted. The first data unit from the first input unit arrives at the target OVC, and the target OVC outputs the first data unit.

[0105] In step 403, in response to the second data arriving at the target OVC, the second data is transmitted through the target OVC.

[0106] For example, in combination Figure 5 After the target OVC outputs the first data unit, the second data from the second input unit immediately arrives at the target OVC, and the target OVC outputs the first data unit and then outputs the second data without any clock period in between, so that the data transmission is not interrupted, and the problem of data flow interruption can be avoided.

[0107] The method provided by the embodiments of the present disclosure can control the target OVC to be in the tail valid occupancy state in the case that the first data unit transmitted by the first input unit of the target OVC is the last data unit of the first data, and the first input unit is about to release the occupancy of the target OVC. In the case that the second input unit that wants to transmit the second data is in the VA state based on the authorization of the target OVC, the second input unit is controlled to enter the SA state from the VA state in response to the determination that the target OVC is in the tail valid occupancy state and the first input unit is in the SA state. In this way, compared with the case that the SA authorization of the target OVC is obtained only after the transmission of the last data unit of the first data by the target OVC, the second input unit can enter the SA state in advance, that is, the second input unit can enter the SA state based on the SA authorization of the target OVC and transmit the second data during the transmission of the last data unit of the first data by the target OVC, so that the second data can reach the target OVC immediately after the output of the first data unit by the target OVC, and there is no discontinuity between the first data and the second data output by the target OVC, and the data transmission efficiency can be improved.

[0108] In addition, the shorter the length of the data is, the greater the efficiency improvement is. For example, the efficiency is improved by 20% for a 4-beat packet, and the efficiency is improved by 50% for a 1-beat packet. The basic microarchitecture of the VC router is not changed, and the data transmission efficiency can be improved by modifying the state setting of the output unit, and the scheme is simple and easy to implement.

[0109] In some embodiments, the method provided by the embodiments of the present disclosure can further include: in the case that the target OVC is in the idle state, determining whether the first data unit is the last data unit of the first data in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit. The above step 401 can be performed before the step.

[0110] In combination with Figure 6 , the first data is divided into data unit 11, data unit 12 and data unit 13, and the second data is divided into data unit 21, data unit 22 and data unit 23. In clock cycle 2, the target OVC is not occupied and is in the available state. It is determined that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the data unit 11, and it is determined whether the data unit 11 is the last data unit of the first data.

[0111] For example, in combination with Figure 7, step 701, it is determined that the output state machine of the target OVC is in the idle state. Step 702, the target OVC or the output state machine determines that a message packet obtains the VA authorization of the target OVC, and the message packet can be a data unit. In the disclosure, the message packet can also be referred to as data, or a data packet, and the name is not limited. Wherein, the message packet belongs to a record in a VC buffer of a certain input unit. The target OVC corresponding to the record is the same as the OVC corresponding to the output state machine. The record is in the VA state and requests to obtain the VA authorization of the target OVC. At this time, the records of multiple input units can be in the VA state and are all competing for the VA authorization of the same OVC. Step 703, it is determined whether the message packet of the VA authorization is at the end of the message packet. If not, step 704 is executed. If yes, step 707 is executed.

[0112] Optionally, the method provided by the embodiment of the disclosure can further include: in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state during transmission of the first data unit and the first data unit is not the last data unit of the first data, controlling the target OVC to enter the non-packet tail occupation state.

[0113] In combination with FIG. 7, if the message packet of the VA authorization is not at the end of the message packet in step 703, step 704 is executed. Step 704, the output state machine of the target OVC enters the O state (i.e., the non-packet tail occupation state). At this time, the OVC corresponding to the output state machine has been occupied, and other input units cannot obtain the VA authorization of the target OVC.

[0114] In combination with Figure 6 At clock cycle 2, it is determined that the data unit 11 transmitted by the first input unit is not the last data unit of the first data, and at clock cycle 3, the target OVC enters the non-packet tail occupation state from the idle state, Figure 6 In the above embodiment, the O is represented by O.

[0115] Optionally, the above step 401, in response to determining that the first data unit transmitted by the first input unit under the authorization of the target OVC is the last data unit of the first data, controls the target OVC to be in the packet tail effective occupation state, can include: in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state based on the authorization of the target OVC during transmission of the first data unit and the first data unit is the last data unit of the first data, controlling the target OVC to enter the packet tail effective occupation state.

[0116] In combination with FIG. 7, if the message packet authorized by the VA is at the end of the message packet, step 703 is executed, and step 707 is executed. In step 707, the output state machine of the target OVC enters the OTA state. At this time, the output state machine corresponds to the OVC being occupied, and other input units can request the VA authorization of the target OVC.

[0117] Figure 6 Taking the first data including three data units as an example, the data unit 11 is not the last data unit of the first data. If the first data only includes the data unit 11, the data unit 11 is the last data unit of the first data, and the target OVC enters the OTA state in the clock cycle 3.

[0118] In some embodiments, the first data can include a second data unit and a first data unit, and the second data unit is a previous data unit of the first data unit.

[0119] Optionally, the method provided by the embodiments of the present disclosure can further include: in a case where the target OVC is in the non-packet-end occupation state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, determining whether a next data unit of the second data unit is a last data unit of the first data. The step 401 can be executed before the step 401.

[0120] For example, the number of currently received data units can be counted by a counter, and when the counter shows that the next beat will reach the total number, it can be determined that the next data unit is the last data unit of the first data or that the next beat is at the end of the message packet.

[0121] Optionally, the above-mentioned step of, in a case where the target OVC is in the non-packet-end occupation state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, determining whether the first data unit is the last data unit of the first data, can include: in a case where the target OVC is in the non-packet-end occupation state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, adding 1 to a current count value of a counter of the first data to obtain an updated count value; if the updated count value is less than a first total number, it is determined that the next data unit of the second data unit is not the last data unit of the first data; wherein the first total number represents a total number of data units included in the first data; if the updated count value is equal to the first total number, it is determined that the next data unit of the second data unit is the last data unit of the first data.

[0122] For example, the counter of the first data is used to count the transmission of data units in the first data. For example, the current count value of the counter of the first data indicates the number of data units in the first data that have been transmitted currently when the second data unit is transmitted, and the data units in the first data that have been transmitted include the second data unit.

[0123] For example, the first total number indicates the total number of data units included in the first data.

[0124] For example, assuming that the first total number is equal to 5, if the current count value of the counter of the first data is equal to 3, the second data unit is the third transmitted data unit in the first data, 3+1=4, and 4 is less than the first total number 5, the next data unit of the second data unit is not the end of the first data. If the current count value of the counter of the first data is equal to 4, the second data unit is the fourth transmitted data unit in the first data, 4+1=5, and 5 is equal to the first total number 5, the next data unit of the second data unit is the end of the first data.

[0125] Optionally, the first total number can be determined based on a preset length of a data unit, address information included in a header of the first data, and length information recording a total length of the first data.

[0126] For example, the header of the first data includes address information and length information. The length information records the total length of the first data. The address information includes the valid start address of the first data.

[0127] For example, the length information records that the total length of the first data is 64 bits, the address information indicates that the valid start address of the first data is 0, and the preset length of a data unit is 32 bits, and the first total number is 2.

[0128] For another example, the length information records that the total length of the first data is 64 bits, the address information indicates that the valid start address of the first data is 16 bits, the preset length of a data unit is 32 bits, and the first total number is 3.

[0129] Optionally, the method provided by the embodiments of the present disclosure can further include: in a case where the first input unit is in the SA state during transmission of the second data unit, in response to determining that the first data unit is not the last data unit of the first data, controlling the target OVC to enter the non-end-of-packet occupancy state.

[0130] Optionally, the step 401 can comprise: in response to determining that the first data unit transmitted by the first input unit in the case where the target OVC is authorized is the last data unit of the first data, controlling the target OVC to be in the tail-end valid occupancy state, can comprise: in response to determining that the first input unit is in the SA state based on the authorization of the target OVC during transmission of the second data unit, and the first data unit is the last data unit of the first data, controlling the target OVC to enter the tail-end valid occupancy state.

[0131] For example, in combination with the above step 401, the step 402 can comprise: in response to determining that the first data unit transmitted by the first input unit in the case where the target OVC is authorized is not the last data unit of the first data, controlling the target OVC to be in the non-tail-end occupancy state. Figure 7 For example, in combination with the above step 401, the step 402 can comprise: in response to determining that the first data unit transmitted by the first input unit in the case where the target OVC is authorized is not the last data unit of the first data, controlling the target OVC to be in the non-tail-end occupancy state.

[0132] For example, in combination with the above step 401, the step 402 can comprise: in response to determining that the first data unit transmitted by the first input unit in the case where the target OVC is authorized is not the last data unit of the first data, controlling the target OVC to be in the non-tail-end occupancy state. Figure 6 In clock cycle 3, the target OVC is in the O state, the first input unit is in the SA state during transmission of the data unit 11, the next data unit (data unit 12) of the data unit 11 is not the last data unit of the first data, and the state machine of the target OVC enters the O state. In clock cycle 4, the target OVC is in the O state, the first input unit is in the SA state during transmission of the data unit 12, the next data unit (data unit 13) of the data unit 12 is the last data unit of the first data, and in clock cycle 5, the state machine of the target OVC enters the OTA state.

[0133] In some embodiments, the method provided by the embodiments of the present disclosure can further comprise: in the case where the target OVC is in the tail-end valid occupancy state, in response to determining that the first input unit is in the SA state during transmission of the first data unit, and the second input unit is in the VA state, determining whether the data unit of the second data currently transmitted by the second input unit is the last data unit of the second data. If yes, controlling the target OVC to remain in the tail-end valid occupancy state. If no, controlling the target OVC to enter the non-tail-end occupancy state.

[0134] For example, in combination with the above step 401, the step 402 can comprise: in response to determining that the first data unit transmitted by the first input unit in the case where the target OVC is authorized is not the last data unit of the first data, controlling the target OVC to be in the non-tail-end occupancy state. Figure 7, step 708, the target OVC or output state machine receives a message packet to obtain SA grant of the target OVC. The message packet belongs to a record in a VC buffer of a certain input unit. The OVC corresponding to the record is the same as the OVC corresponding to the output state machine. The record is in the SA state and requests to obtain SA grant. At this time, records of multiple input units can be in the SA state and are competing for SA grant of the same output unit. Step 709, it is determined whether a VA grant message packet is received at this time, for example, whether another message packet wants to occupy the target OVC for transmission. If not, step 701 is performed, and the output state machine of the target OVC enters the idle state. If yes, step 710 is performed. Step 710, it is determined whether the VA grant message packet is at the end of the message packet. If not, step 704 is performed. If yes, step 707 is performed. Note that the SA grant message packet and the VA grant message packet of the OVC at this time are two different message packets.

[0135] In combination Figure 6 At clock cycle 5, the target OVC is in the OTA state, the first input unit is in the SA state during the transmission of the data unit 13, and the second input unit is in the VA state. It is determined that the data unit 21 of the second data currently transmitted by the second input unit is not the last data unit of the second data, and the target OVC is controlled to enter the O state at clock cycle 6. Assuming that the data unit 21 (the case where the second data only includes one data unit) is the last data unit of the second data, the target OVC remains in the OTA state.

[0136] In some embodiments, the method provided by the embodiments of the present disclosure can further include: in the case where the second input unit is in the VA state based on the grant of the target OVC, determining whether the target OVC is in the idle state. The step can be performed before step 402.

[0137] In combination Figure 8 , step 801, the input state machine is in the VA state. At this time, the input state machine requests the VA arbitrator for the corresponding OVC to obtain VA grant. Step 802, the input state machine receives a message packet to obtain VA grant of the target OVC at this time. The message packet belongs to a record in a VC buffer of a certain input unit. The record is granted the VA request to be successful by the VA arbitrator, but its final grant depends on further judgment. Step 803, it is determined whether the output state machine of the target OVC corresponding to the VA grant message packet is in the idle state. If not, further judgment can be performed, and step 804 is performed. If yes, step 806 is performed, and the input state machine enters the SA state.

[0138] Optionally, the method provided by the embodiments of the present disclosure can further include: in the case that the first input unit is in the VA state based on the authorization of the target OVC during transmission of the first data unit, and the second input unit is in the VA state based on the authorization of the target OVC during transmission of the second data unit, in response to determining that the target OVC is in the idle state, controlling the first input unit to enter the SA state.

[0139] In combination Figure 6 At clock cycle 2, the first input unit is in the VA state based on the authorization of the target OVC, the second input unit is in the VA state based on the authorization of the target OVC, and the target OVC is in the idle state at this time, one of the first input units is selected to enter the SA state, for example, the state machine of the first input unit is controlled to enter the SA state. The target OVC does not authorize the second input unit, and the second input unit remains in the VA state.

[0140] In some embodiments, the method provided by the embodiments of the present disclosure can further include: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in the tail effective occupancy state. If yes, determining whether there is a first input unit in the SA state based on the authorization of the target OVC. In response to determining that there is a first input unit in the SA state based on the authorization of the target OVC, controlling the second input unit to enter the SA state.

[0141] In some embodiments, the method provided by the embodiments of the present disclosure can further include: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in the tail effective occupancy state; if yes, determining whether there is a first input unit in the SA state based on the authorization of the target OVC; in response to determining that there is no first input unit in the SA state based on the authorization of the target OVC, controlling the second input unit to remain in the VA state.

[0142] In some embodiments, the method provided by the embodiments of the present disclosure can further include: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in the tail effective occupancy state; in response to determining that the target OVC is not in the tail effective occupancy state, controlling the second input unit to remain in the VA state.

[0143] In combination Figure 8, step 804, determine whether the output state machine of the OVC corresponding to the message packet of the VA authorization is in the OTA state. If not, execute step 801. If yes, execute step 805. The output state machine of the OVC corresponding to the message packet of the VA authorization is not in the OTA state, which means it is in the O state, and the VA authorization cannot be completed. If the output state machine of the OVC corresponding to the message packet of the VA authorization is in the OTA state, further determination is needed. Step 805: determine whether the output state machine of the OVC corresponding to the message packet of the VA authorization (e.g. the first data) has received other message packets (e.g. the second data) to obtain the SA authorization of the OVC. If not, execute step 801. If yes, execute step 806. The output state machine of the OVC corresponding to the message packet of the VA authorization has received other messages to obtain the SA authorization of the OVC, which means it is in the OTA state, and the previous message packet of the OVC is about to exit the occupation of the OVC. At this time, the VA authorization request of the message packet can avoid pipeline stall. Step 806: the input state machine obtains the authorization and enters the SA state.

[0144] In combination Figure 6 In clock cycle 3, the second input unit is in the VA state, the target OVC is not in the idle state, and the target OVC is not in the OTA state. Therefore, the second input unit remains in the VA state. In clock cycle 4, the second input unit is in the VA state, the target OVC is not in the idle state, and the target OVC is not in the OTA state. Therefore, the second input unit remains in the VA state. In clock cycle 5, the second input unit is in the VA state, the target OVC is not in the idle state, and the target OVC is in the OTA state. It is determined whether there is another input unit based on the authorization of the target OVC in the SA state. It is determined that there is the first input unit based on the authorization of the target OVC in the SA state. The data unit 13 of the first input unit can be normally transmitted. In clock cycle 6, the second input unit is controlled to enter the SA state.

[0145] For example, in combination Figure 6, two input units of the first data and the second data are in competition for the same VC of the same output unit. The data unit 11 reaches the first input unit at clock cycle 1, but needs to wait until the input state machine is in the SA state, that is, clock cycle 3, to reach the target OVC, so the data unit 11 of the first data is stalled for 2 clock cycles. The first data obtains the VA authorization at clock cycle 2, and the state corresponding to the target OVC enters the O state at clock cycle 3. The data unit 12 of the first data obtains the SA authorization at clock cycle 4, and the next data unit 13 thereof is the end of the packet, at clock cycle 5, the state of the target OVC changes from the O state to the OTA state, and the OTA state indicates that the VA request of the other message packet is receivable, and has the opportunity to enter the SA state in advance when pre-authorization. The second data reaches the second input unit at clock cycle 1, but needs to wait until the state of the target OVC is in the OTA state and the first data is in the SA authorization success, so that the second input unit obtains the VA authorization to enter the SA state, that is, enters the SA state at clock cycle 6, and then at clock cycle 7, the second data reaches the target OVC, so the data unit 11 of the second data is stalled for 5 clock cycles. From the target OVC, there is no stall in the whole data stream transmission, that is, there is no stall between the data unit 13 and the data unit 21, and the data transmission rate can be improved.

[0146] As shown in Figure 9 , the embodiment of the present disclosure also provides a data transmission device 900 applied to a virtual channel router, the virtual channel router comprising a first input unit, a second input unit and a target output virtual channel OVC. The data transmission device 900 comprises an output state module 901 and a state control and transmission module 902.

[0147] The output state module 901 is configured to control the target OVC to be in the end-of-packet valid occupation state in response to determining that the first data unit transmitted by the first input unit under the authorization of the target OVC is the last data unit of the first data.

[0148] The state control and transmission module 902 is configured to control the second input unit to enter the SA state, transmit the second data through the second input unit, and transmit the first data unit through the target OVC in response to determining that the target OVC is in the end-of-packet valid occupation state and the first input unit is in the SA state, based on the authorization of the target OVC being in the VA state.

[0149] The state control and transmission module 902 is further configured to transmit the second data through the target OVC in response to the second data reaching the target OVC.

[0150] In a possible implementation, the first data further includes a second data unit, and the second data unit is a previous data unit of the first data unit.

[0151] The state control and transmission module 902 is further configured to, in response to determining that the first input unit is in the SA state based on the authorization of the target OVC during transmission of the second data unit, and that the first data unit is the last data unit of the first data, control the target OVC to enter the EOP valid occupancy state.

[0152] In a possible implementation, the output state module 901 is further configured to, in the case that the first input unit is in the SA state during transmission of the second data unit, in response to determining that the first data unit is not the last data unit of the first data, control the target OVC to enter the non-EOP occupancy state.

[0153] In a possible implementation, the data transmission apparatus 900 further includes a first determination module configured to, in the case that the target OVC is in the non-EOP occupancy state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, determine whether a next data unit of the second data unit is the last data unit of the first data.

[0154] In a possible implementation, the first determination module can be further configured to, in the case that the target OVC is in the non-EOP occupancy state, in response to determining that the first input unit is in the SA state during transmission of the second data unit, add 1 to a current count value of a counter of the first data to obtain an updated count value; if the updated count value is less than a first total quantity, determine that the next data unit of the second data unit is not the last data unit of the first data; and if the updated count value is equal to the first total quantity, determine that the next data unit of the second data unit is the last data unit of the first data; wherein the first total quantity indicates a total quantity of data units included in the first data.

[0155] In a possible implementation, the first total quantity is determined based on a preset length of a data unit, address information included in a header of the first data, and length information recording a total length of the first data; and the address information includes a valid start address of the first data.

[0156] In a possible implementation, the output state module 901 is further configured to, in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state based on the authorization of the target OVC during transmission of the first data unit, and that the first data unit is the last data unit of the first data, control the target OVC to enter the EOP valid occupancy state.

[0157] In a possible implementation, the output state module 901 is further configured to: in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state based on the authorization of the target OVC during transmission of the first data unit, and the first data unit is not the last data unit of the first data, control the target OVC to enter the non-packet tail occupancy state.

[0158] In a possible implementation, the data transmission apparatus 900 further includes a second determination module configured to, in the case that the target OVC is in the idle state, in response to determining that the first input unit is in the VA state during transmission of the first data unit, determine whether the first data unit is the last data unit of the first data.

[0159] In a possible implementation, the data transmission apparatus 900 further includes a third determination module configured to, in the case that the target OVC is in the packet tail effective occupancy state, in response to determining that the first input unit is in the SA state during transmission of the first data unit, and the second input unit is in the VA state, determine whether the data unit of the second data currently transmitted by the second input unit is the last data unit of the second data.

[0160] The output state module 901 is further configured to: if the data unit of the second data currently transmitted by the second input unit is the last data unit of the second data, control the target OVC to remain in the packet tail effective occupancy state; and if the data unit of the second data currently transmitted by the second input unit is not the last data unit of the second data, control the target OVC to enter the non-packet tail occupancy state.

[0161] In a possible implementation, the data transmission apparatus 900 further includes a state judgment module and an input state module. The state judgment module is configured to, in response to determining that the target OVC is not in the idle state, determine whether the target OVC is in the packet tail effective occupancy state; if yes, determine whether there is a case that the first input unit is in the SA state based on the authorization of the target OVC. The input state module is configured to, in response to determining that there is a case that the first input unit is in the SA state based on the authorization of the target OVC, control the second input unit to enter the SA state.

[0162] In a possible implementation, the data transmission apparatus 900 further includes a state determining module and an input state module. The state determining module is configured to, in response to determining that the target OVC is not in the idle state, determine whether the target OVC is in the tail effective occupation state. The input state module is configured to, in response to determining that the target OVC is not in the tail effective occupation state, control the second input unit to remain in the VA state.

[0163] In a possible implementation, the data transmission apparatus 900 further includes a state determining module and an input state module. The state determining module is configured to, in response to determining that the target OVC is not in the idle state, determine whether the target OVC is in the tail effective occupation state. The input state module is configured to, in response to determining that the target OVC is not in the tail effective occupation state, control the second input unit to remain in the VA state.

[0164] In a possible implementation, the data transmission apparatus 900 further includes that the state determining module is further configured to, in the case that the second input unit is in the VA state based on the authorization of the target OVC, determine whether the target OVC is in the idle state.

[0165] The data transmission apparatus provided by the present disclosure can be an on-chip network, a routing network, a VC router, or a chip, and can solve the problem of data flow transmission pause and improve the data transmission rate.

[0166] It should be noted that, although the image display method and the apparatus are described above by way of example, those skilled in the art can understand that the present disclosure should not be limited thereto. In fact, the user can flexibly set each step and module according to personal preferences and / or actual application scenarios, as long as the technical solutions of the present disclosure are met.

[0167] In some embodiments, the apparatus provided by the embodiments of the present disclosure has functions or includes modules that can be used to execute the methods described in the above method embodiments, and the specific implementation can refer to the description of the above method embodiments. For brevity, details are not repeated here.

[0168] The embodiments of the present disclosure further provide a virtual channel router, including: a target output virtual channel (OVC); a first input unit configured to transmit first data in the case of authorization of the target OVC; and a second input unit configured to transmit second data in the case of authorization of the target OVC.

[0169] In response to the first data unit transmitted by the first input unit in the case of authorization of the target OVC being the last data unit of the first data, the target OVC is controlled to be in a tail valid occupancy state. In the case of the authorization of the target OVC based on the second input unit being in a VA state, in response to the target OVC being in the tail valid occupancy state and the first input unit being in an SA state, the second input unit enters the SA state, the second input unit transmits second data, and the target OVC transmits the first data unit. In the case of the target OVC receiving the second data, the target OVC transmits the second data.

[0170] Optionally, the virtual channel router can implement the method of any possible implementation manner provided by the present disclosure.

[0171] The embodiment of the present disclosure further provides a data transmission system, comprising: a target output virtual channel OVC, a first input unit, and a second input unit. The first input unit is configured to transmit first data in the case of authorization of the target OVC, and the second input unit is configured to transmit second data in the case of authorization of the target OVC. In response to the first data unit transmitted by the first input unit in the case of authorization of the target OVC being the last data unit of the first data, the target OVC is controlled to be in a tail valid occupancy state; in the case of the authorization of the target OVC based on the second input unit being in a VA state, in response to the target OVC being in the tail valid occupancy state and the first input unit being in an SA state, the second input unit enters the SA state, the second input unit transmits second data, and the target OVC transmits the first data unit; in the case of the target OVC receiving the second data, the target OVC transmits the second data.

[0172] Optionally, the data transmission system can implement the method of any possible implementation manner provided by the present disclosure.

[0173] The embodiment of the present disclosure further provides a chip, which comprises a processor, and the processor can be used to implement the method of any possible implementation manner provided by the present disclosure. For example, the chip can be a NoC chip, a switch chip, or the like.

[0174] The embodiment of the present disclosure further provides a computer readable storage medium, which stores computer program instructions, and the computer program instructions are executed by a processor to implement the above method. The computer readable storage medium can be a volatile or non-volatile computer readable storage medium.

[0175] The embodiment of the present disclosure further provides an electronic device or a data transmission apparatus, comprising: a processor; a memory for storing processor executable instructions; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0176] The embodiments of the present disclosure further provide a computer program product, which can implement the method described in any of the above embodiments when executed by a processor.

[0177] Figure 10 is a block diagram of an apparatus 1000 for data transmission according to an exemplary embodiment. The apparatus for data transmission can also be referred to as a data transmission apparatus. For example, the apparatus 1000 for data transmission can be provided as a network-on-chip, a routing network, a VC router, or a chip, etc.

[0178] Referring to Figure 10 The apparatus 1000 for data transmission comprises a server 1010, which comprises an input / output unit 1011, a memory 1012 and a processor 1020. The processor 1020 can execute one or more units. In the present disclosure, the term "computer readable medium" refers to any medium involved in providing the processor 1020 with instructions, such as, but not limited to, optical discs, magnetic discs, read-only memory, random access memory, solid state devices and drives, or any other tangible medium suitable for storing electronic signals, or computer readable signal medium, which can include transient media such as carrier waves. The input / output unit 1011 processes inputs from a user interface interface 1001 and an operation interface interface 1002, which can be processed by input devices such as, but not limited to, a keyboard, a mouse, a touch device, or a voice command, etc.

[0179] The server 1010 can be connected to an external memory 1003, which can include removable memory such as, but not limited to, a portable hard disk, optical media (CD or DVD), magnetic media, or any other medium from which a computer can read executable instructions. The server 1010 can be connected to an output device 1004, such as a display that outputs data and other information to a user, and requests additional information from the user. The server 1010 can be connected to the user interface interface 1001, the operation interface interface 1002, the external memory 1003 and the output device 1004 through a wireless protocol such as, but not limited to, the 802.11 standard, Bluetooth, or a mobile phone protocol, or through a physical transmission protocol such as a cable or an optical fiber. The output device 1004 can also further serve as an input device for interaction with the user.

[0180] The processor 1020 can execute one or more modules. The data cell calculation module 1021 can be configured to determine whether the first data cell transmitted by the first input unit under the authorization of the target OVC is the last data cell of the first data, and can also be configured to calculate whether the next beat of the message packet of each virtual channel is at the end of the packet, calculate the number of beats of the message packet according to the address and length in the packet header, and set the message packet beat counter to count the number of message packets currently received. When the counter shows that the next beat is about to be full of the number of packets, it can be determined that the next beat is at the end of the message packet. The output state control module 1023 is configured to control the target OVC to be in the valid occupancy state at the end of the packet in response to determining that the first data cell transmitted by the first input unit under the authorization of the target OVC is the last data cell of the first data, for example, it can be configured to control whether the state control output state machine enters a state in which VA pre-arbitration is allowed, and start VA pre-authorization of other message packets in advance. The input state control module 1022 is configured to control the second input unit to enter the SA state in response to determining that the target OVC is in the valid occupancy state at the end of the packet and the first input unit is in the SA state, in a case where the authorization of the target OVC for the second input unit transmitting the second data is in the VA state, for example, it can be configured to start a VA request based on the VA pre-arbitration state in which the output state control module 1023 is currently in, and finally control the input state machine to enter the SA state when the VA grants the request and other message packets obtain the SA authorization. The processor 1020 can also include a transmission module configured to transmit the second data through the second input unit, transmit the first data cell through the target OVC, and transmit the second data through the target OVC in response to the second data reaching the target OVC. Through the coordinated control of the entire process, the problem of data flow interruption can be solved.

[0181] In an example embodiment, a non-transitory computer-readable storage medium, for example, a memory 1012 including computer program instructions, is also provided, and the computer program instructions can be executed by the processor 1020 of the device 1000 for data transmission to complete the above method.

[0182] The present disclosure can be a system, a method, and / or a computer program product. The computer program product can include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present disclosure.

[0183] Computer readable storage media can be tangible storage media which can retain and store instructions for use by an instruction execution device. Computer readable storage media can be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer readable storage media include the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch cards or

[0184] programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, and / or any suitable combination of the foregoing. Computer readable storage media, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted via a wire cable.

[0185] Computer readable program instructions for carrying out operations of the present disclosure can be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate array (FPGA), or programmable logic array (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.

[0186] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0187] These computer readable program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. These computer readable program instructions can also be stored in a computer readable storage medium that can include random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other data storage device. When the computer readable program instructions are loaded into the computer and other programmable data processing apparatus, a series of operational steps are implemented that provide processes such that the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0188] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer, other programmable data processing apparatus, or other device implement the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0189] The flow diagrams and the block diagrams in the drawings are presented to illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flow diagrams and the block diagrams can represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical functions ("instructions"). In some alternative implementations, the functions noted in the block can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and

[0190] Embodiments of the present disclosure have been described above, and the description is intended to be illustrative of the embodiments and not exhaustive, and is not limited to the embodiments disclosed. Numerous modifications and adaptations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The choice of words in this document is intended to best explain the principles of the embodiments, practical application, or technical improvement in the art, or to enable others skilled in the art to understand the embodiments disclosed herein.

[0191] It should be understood that the various forms of flow shown above can be re-ordered, added to, or deleted from without departing from the scope and spirit of the technology disclosed in the present disclosure. For example, the steps recited in the present disclosure can be performed in parallel, in series, or in a different order, without departing from the desired results of the technology disclosed in the present disclosure, and are not limited herein.

[0192] The above detailed description does not in any way limit the scope of the present disclosure. It is understood that various modifications, combinations, sub-combinations, and alternatives can be made to the specific embodiments disclosed without departing from the spirit and principles of the present disclosure. Any modification, equivalent substitution, improvement, and the like not described above are also included within the scope of the present disclosure.

Claims

1. A data transmission method applied to a virtual lane router, the virtual lane router comprising a first input unit, a second input unit and a target output virtual channel (OVC), the method comprising: controlling the target OVC to be in a tail valid occupancy state in response to determining that a first data unit transmitted by the first input unit under authorization of the target OVC is a last data unit of first data; controlling the second input unit to enter a SA state, transmitting second data through the second input unit and transmitting the first data unit through the target OVC in response to determining that the target OVC is in the tail valid occupancy state and the first input unit is in a SA state under authorization of the target OVC based on the second input unit; transmitting the second data through the target OVC in response to the second data reaching the target OVC.

2. The method of claim 1, wherein, The first data further comprises a second data unit, the second data unit being a previous data unit of the first data unit. The controlling the target OVC to be in the tail valid occupancy state in response to determining that the first data unit transmitted by the first input unit under authorization of the target OVC is a last data unit of first data comprises: controlling the target OVC to enter the tail valid occupancy state in response to determining that the first data unit is a last data unit of the first data under authorization of the target OVC based on the second input unit during transmission of the second data unit and the first input unit being in the SA state.

3. The method of claim 1, wherein, The method further comprises: controlling the target OVC to enter a non-tail occupancy state in response to determining that the first data unit is not a last data unit of the first data under the first input unit being in the SA state during transmission of the second data unit.

4. The method of claim 2 or 3, wherein, The method further comprises: determining whether a next data unit of the second data unit is a last data unit of the first data in response to determining that the first input unit is in the SA state during transmission of the second data unit under the target OVC being in the non-tail occupancy state.

5. The method of claim 4, wherein, The determining whether the next data unit of the second data unit is a last data unit of the first data in response to determining that the first input unit is in the SA state during transmission of the second data unit under the target OVC being in the non-tail occupancy state comprises: adding 1 to a current count value of a counter of the first data to obtain an updated count value in response to determining that the first input unit is in the SA state during transmission of the second data unit under the target OVC being in the non-tail occupancy state; determining that the next data unit of the second data unit is not a last data unit of the first data if the updated count value is less than a first total quantity, wherein the first total quantity represents a total quantity of data units included in the first data. If the updated count value is equal to the first total number, it is determined that a next data unit of the second data unit is a last data unit of the first data.

6. The method of claim 5, wherein, The first total number is determined based on a preset length of a data unit, address information included in a packet header of the first data, and length information recording a total length of the first data, wherein the address information includes a valid start address of the first data.

7. The method of claim 1, wherein, The controlling the target OVC in the packet tail valid occupancy state in response to the determination that the first input unit is in the last data unit of the first data in the case that the target OVC is authorized in the target OVC includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state.

8. The method of claim 1, wherein, The method further includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state.

9. The method of claim 7 or 8, wherein, The method further includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state.

10. The method of claim 1, wherein, The method further includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state. The method further includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state.

11. The method of claim 1, wherein, The method further includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state. The method further includes: In the case that the target OVC is in the idle state, in response to the determination that the first input unit is in the VA state based on the authorization of the target OVC during the transmission of the first data unit, and the first data unit is not the last data unit of the first data, the target OVC is controlled to enter a non-packet tail occupancy state.

12. The method of claim 1, wherein, ​ ​ ​ in response to determining that the first input unit is not in the SA state based on the authorization of the target OVC being in the SA state, controlling the second input unit to remain in the VA state.

13. The method of claim 1, wherein, The method further comprises: in response to determining that the target OVC is not in the idle state, determining whether the target OVC is in a tail effective occupancy state; in response to determining that the target OVC is not in the tail effective occupancy state, controlling the second input unit to remain in the VA state.

14. The method of any one of claims 11-13, wherein, The method further comprises: in a case where the second input unit is based on the authorization of the target OVC being in the VA state, determining whether the target OVC is in the idle state.

15. A data transmission apparatus applied to a virtual channel router, the virtual channel router comprising a first input unit, a second input unit and a target output virtual channel (OVC), the apparatus comprising: an output state module configured to, in response to determining that a first data unit transmitted by the first input unit in the case of the authorization of the target OVC is the last data unit of first data, control the target OVC to be in a tail effective occupancy state; a state control and transmission module configured to, in a case where the second input unit is based on the authorization of the target OVC being in the VA state, in response to determining that the target OVC is in the tail effective occupancy state and the first input unit is in the SA state, control the second input unit to enter the SA state, transmit second data through the second input unit, and transmit the first data unit through the target OVC; wherein the state control and transmission module is further configured to, in response to the second data reaching the target OVC, transmit the second data through the target OVC.

16. A virtual channel router comprising: a target output virtual channel (OVC), a first input unit configured to transmit first data in the case of the authorization of the target OVC; a second input unit configured to transmit second data in the case of the authorization of the target OVC; wherein, in response to a first data unit transmitted by the first input unit in the case of the authorization of the target OVC being the last data unit of the first data, the target OVC is controlled to be in a tail effective occupancy state; in a case where the second input unit is based on the authorization of the target OVC being in the VA state, in response to the target OVC being in the tail effective occupancy state and the first input unit being in the SA state, the second input unit enters the SA state, the second input unit transmits second data, and the target OVC transmits the first data unit; in a case where the target OVC receives the second data, the target OVC transmits the second data.

17. A data transmission system comprising: a target output virtual channel (OVC), a first input unit configured to transmit first data in the case of the authorization of the target OVC; a second input unit configured to transmit second data in the case of the authorization of the target OVC; wherein, in response to the first data unit transmitted by the first input unit in the case that the target OVC is authorized, the target OVC is controlled to be in a tail-end valid occupancy state, the first data unit is the last data unit of the first data; in the case that the second input unit is in the VA state based on the authorization of the target OVC, in response to the target OVC being in the tail-end valid occupancy state and the first input unit being in the SA state, the second input unit enters the SA state, the second input unit transmits the second data, and the target OVC transmits the first data unit; in the case that the target OVC receives the second data, the target OVC transmits the second data. 18.A chip comprising a processor configured to perform the method of any one of claims 1 to 14. 19.A data transmission apparatus comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the method of any one of claims 1 to 14 when executing the instructions stored in the memory. 20.A non-volatile computer-readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the method of any one of claims 1 to 14. 21.A computer program product comprising a computer program which, when executed by a processor, implements the steps of the method of any one of claims 1 to 14.

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