Broadband high-precision simulation signal generation method and system and simulation signal generator

Abstract

The embodiment of the application provides a wideband high-precision simulation signal generation method, system and simulation signal generator, the method comprises the following steps: generating a rotation speed simulation basic signal through a field programmable gate array to control a direct digital synthesis chip, the rotation speed simulation basic signal is a waveform-adjustable sine wave or square wave; inputting the rotation speed simulation basic signal into an inverting amplifier, and adjusting the amplitude based on a digital potentiometer controlled by the field programmable gate array; generating a set bias voltage through a digital-to-analog conversion chip; inputting the rotation speed simulation basic signal after amplitude adjustment and the bias voltage into a non-inverting summing operational amplifier to superimpose, forming a composite signal with direct current bias; outputting the composite signal after improving the driving capability through a power amplifier, and taking the composite signal after improving the driving capability as a target rotation speed simulation signal which can directly drive a turbine monitoring instrument system load. The simulation signal generated by the application can cover a wider frequency and has high precision.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of signal generators, and particularly relates to a wideband high-precision simulation signal generation method and system and a simulation signal generator. BACKGROUND

[0002] In the monitoring and control of rotating machinery systems such as steam turbines, TSI (Turbine Supervisory Instrumentation) systems play a crucial role. TSI systems are responsible for monitoring key parameters such as the speed, vibration, and displacement of rotating machinery to ensure safe operation and high performance of the equipment. To ensure the measurement accuracy of TSI systems, it is necessary to regularly calibrate and test the monitor instruments. Traditional calibration methods rely on analog signal generators, which are usually capable of generating fixed-frequency signals, but have significant limitations in terms of precision and frequency range.

[0003] The current market uses rotational speed signal generators, which are analog signal generators. These devices usually rely on the analog characteristics of circuit components to generate frequency signals. Although this type of instrument can provide basic signal output, there are several problems in actual application:

[0004] 1. Insufficient precision: The output frequency of analog signal generators is easily affected by external factors such as temperature and time drift, making it difficult to ensure long-term frequency stability.

[0005] 2. Limited frequency range: Analog signal generators usually only work in a narrow frequency range, making it difficult to meet the requirements of TSI systems that require a wide range of frequency signals (such as 0.01 Hz to 100 kHz).

[0006] 3. Discontinuous frequency adjustment: Most analog signal generators cannot generate continuously changing frequency signals, especially when simulating mechanical rotational speed changes, they cannot truly reflect the smooth frequency change curve detected by the sensor.

[0007] In addition, the operating environment of modern mechanical equipment is becoming increasingly complex, and TSI systems need to have higher response speed and precision to meet the performance testing needs of new equipment. For example, during the start-up, operation, and shutdown of a steam turbine, the rotational speed of the rotating machinery will change dynamically, and the rotational speed sensor (such as an eddy current sensor, a reluctance sensor, and a Hall sensor) needs to detect these changes and output corresponding frequency signals. However, traditional signal generators cannot simulate such continuously changing rotational speed signals, which affects the accuracy of TSI systems during calibration and testing.

[0008] In order to solve these problems, an emulated signal generator capable of covering a wider frequency range, having high precision and being able to output a continuously changing frequency signal is urgently needed, so as to more realistically and effectively simulate the dynamic speed change of a rotating mechanical equipment and more accurately calibrate a TSI system. SUMMARY

[0009] The present application proposes a wide-frequency high-precision emulated signal generation method, system and emulated signal generator, which are used to solve the defects of the prior art.

[0010] According to a first aspect of an embodiment of the present application, a wide-frequency high-precision emulated signal generation method is provided, comprising:

[0011] A speed emulation basic signal is generated by a field programmable gate array controlling a direct digital synthesis chip, the speed emulation basic signal being a waveform-adjustable sine wave or square wave;

[0012] The speed emulation basic signal is input into an inverting amplifier, and a digital potentiometer is controlled based on the field programmable gate array to perform amplitude adjustment;

[0013] A set bias voltage is generated by a digital-to-analog conversion chip;

[0014] The speed emulation basic signal after amplitude adjustment and the bias voltage are input into a non-inverting summing operational amplifier to be superimposed, forming a composite signal with a direct current bias;

[0015] The composite signal is output after being boosted in driving capability by a power amplifier, and the composite signal after being boosted in driving capability is output as a target speed emulation signal that can directly drive a turbine monitoring instrument system load.

[0016] In some embodiments, before the speed emulation basic signal is input into the inverting amplifier, the method further comprises:

[0017] According to a target frequency value, the direct digital synthesis chip is controlled to switch a clock frequency based on the field programmable gate array.

[0018] In some embodiments, the method further comprises:

[0019] When the clock frequency is switched, a current phase accumulation value is calculated based on the field programmable gate array;

[0020] The phase accumulation value is written into a phase register of the direct digital synthesis chip.

[0021] In some embodiments, the amplitude adjustment based on the field programmable gate array controlling the digital potentiometer comprises:

[0022] obtaining an amplitude requirement of the target sensor;

[0023] controlling a digital potentiometer and the amplitude requirement of the target sensor based on the field programmable gate array to dynamically adjust the resistance value of the feedback resistor;

[0024] amplitude adjusting the rotational speed simulation base signal based on the resistance value of the feedback resistor and the rotational speed simulation base signal to change the signal gain.

[0025] In some embodiments, the target sensor includes an eddy current sensor, a magneto-resistive sensor, and / or a Hall sensor.

[0026] In some embodiments, the generating the rotational speed simulation base signal by the field programmable gate array controlling the direct digital synthesis chip includes:

[0027] the field programmable gate array sends a clock signal to the direct digital synthesis chip;

[0028] controlling the minimum frequency step of the direct digital synthesis chip according to the clock signal;

[0029] the rotational speed simulation base signal is calculated by the following formula:

[0030] ;

[0031] wherein, the rotational speed simulation base signal, is a control word, is a clock frequency, is the number of bits of a phase accumulator.

[0032] In some embodiments, the frequency range of the rotational speed simulation base signal is 0.01 Hz to 100 kHz, the value of 28, the controlling the minimum frequency step of the direct digital synthesis chip according to the clock signal includes:

[0033] when the frequency range of the generated rotational speed simulation base signal is a low frequency signal greater than or equal to 0.01 Hz to less than 400 Hz, the frequency of the clock signal is 50 kHz, and the minimum frequency step is calculated by the following formula:

[0034] ;

[0035] when the frequency range of the generated rotational speed simulation base signal is a low frequency signal greater than or equal to 400 Hz to less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz, and the minimum frequency step is calculated by the following formula:

[0036] ;

[0037] wherein, is the minimum frequency step.

[0038] In some embodiments, the changing signal gain is calculated by the following formula:

[0039] ;

[0040] wherein, is a feedback resistance, is an input resistance in the rotational speed simulation base signal, is a gain coefficient.

[0041] According to a second aspect of the embodiments of the present application, a wide-frequency high-precision simulation signal generation system is provided, comprising:

[0042] a base signal generation module configured to generate a rotational speed simulation base signal by a field programmable gate array (FPGA) controlling a direct digital synthesis (DDS) chip, the rotational speed simulation base signal being a waveform-adjustable sine wave or square wave;

[0043] an amplitude adjustment module configured to input the rotational speed simulation base signal into an inverting amplifier and adjust the amplitude of the rotational speed simulation base signal based on the FPGA controlling a digital potentiometer;

[0044] a bias voltage generation module configured to generate a set bias voltage by a digital-to-analog conversion (DAC) chip;

[0045] a composite signal generation module configured to input the amplitude-adjusted rotational speed simulation base signal and the bias voltage into a non-inverting operational amplifier to form a composite signal with DC bias;

[0046] a target rotational speed simulation signal generation module configured to output the composite signal after the power amplifier improves the driving capability, and output the composite signal after the power amplifier improves the driving capability as a target rotational speed simulation signal that can directly drive a turbine monitoring instrument system load.

[0047] According to a third aspect of the embodiments of the present application, a simulation signal generator is provided, which is configured with the above wide-frequency high-precision simulation signal generation system, comprising: an FPGA, a DDS chip, an inverting amplifier, a DAC chip, a non-inverting operational amplifier, and a power amplifier,

[0048] the FPGA is configured to dynamically switch the clock frequency of the DDS chip and control the phase continuity;

[0049] the inverting amplifier is configured to adjust the gain based on the FPGA;

[0050] The in-phase addition operation amplifier is used for superimposing the bias voltage generated by the digital-to-analog conversion chip and the simulation signal;

[0051] The power amplifier is used for enhancing the driving capability of the superimposed bias voltage and the simulation signal.

[0052] The simulation signal generation method and system and the simulation signal generator of the embodiment have at least the following beneficial effects:

[0053] The embodiment of the application generates a rotating speed simulation base signal through a field programmable gate array controlling a direct digital synthesis chip. The field programmable gate array dynamically controls the clock frequency of the direct digital synthesis chip, covering the full frequency band of 0.01 Hz-100 kHz, solving the problem of narrow frequency range and insufficient precision of traditional analog signal sources. The field programmable gate array calculates and writes the phase accumulator value in real time during frequency switching, eliminating waveform breakage and ensuring the smoothness of the rotating speed simulation signal in dynamic change scenarios such as turbine start-stop. The rotating speed simulation base signal is input into an inverting amplifier, and the amplitude is adjusted based on the field programmable gate array controlling a digital potentiometer, dynamically matching the sensor characteristics. The gain of the inverting amplifier is adjusted in real time through the digital potentiometer, so that the signal amplitude accurately adapts to the voltage requirements of eddy current / magnetic resistance / Hall sensors, solving the calibration distortion caused by fixed amplitude of traditional devices. The response time is adjusted by the resistance value of the digital potentiometer, meeting the requirement of fast switching of signal amplitude in real-time calibration scenarios. A set bias voltage is generated through a digital-to-analog conversion chip, realizing sensor DC characteristic simulation. The digital-to-analog conversion chip generates a programmable bias voltage to simulate the DC offset in the output of the real sensor, solving the signal distortion caused by the absence of bias in TSI system calibration. The independently generated bias voltage avoids mutual interference with the base signal, providing pure input for subsequent addition operation and improving signal superposition compatibility. The amplitude-adjusted signal and the bias voltage are input into a non-inverting adder amplifier for superposition, realizing composite signal synthesis. The non-inverting adder linearly superimposes the amplitude-optimized base signal and the bias voltage to form a composite simulation signal with DC bias, which directly matches the electrical characteristics of the TSI system input end. The low output impedance characteristic of the operational amplifier suppresses noise coupling in the signal transmission process, improving the signal-to-noise ratio of the calibration signal and enhancing the anti-interference ability. The composite signal is output after being enhanced by a power amplifier to improve the driving capability, ensuring that the composite signal can drive the high-resistance load of the TSI system and solving the calibration failure caused by insufficient driving of the traditional signal source. The power protection circuit is designed to prevent overload damage, meeting the long-term stable operation demand in the turbine field environment. The field programmable gate array of the embodiment of the application can also adjust the frequency control word and phase register of the direct digital synthesis chip in real time to ensure the phase continuity of the output signal when the frequency changes. The device can simulate the output signals of different sensors, adapt to a frequency range of 0.01 Hz to 100 kHz, and provide high-precision and stable simulation signals, which are particularly suitable for testing and calibration of different types of sensor monitoring modules using eddy current sensors, magnetic resistance sensors and Hall sensors. BRIEF DESCRIPTION OF DRAWINGS

[0054] Figure 1 A flowchart of the wideband high-precision simulation signal generation method of the embodiment of the application;

[0055] Figure 2 Schematic diagram of a variable gain amplifier according to an embodiment of the present application;

[0056] Figure 3 Schematic diagram of a bias voltage and power amplifier according to an embodiment of the present application;

[0057] Figure 4 Structure diagram of a wideband high-precision simulation signal generation system according to an embodiment of the present application;

[0058] Figure 5 Principle block diagram of a simulation signal generator according to an embodiment of the present application. DETAILED DESCRIPTION

[0059] In order to enable a person skilled in the art to better understand the technical solutions of the present application, the present application will be described in further detail below in combination with the drawings and specific embodiments.

[0060] The embodiments of the present application will be described in further detail below in combination with the drawings and embodiments. The detailed description of the following embodiments and the drawings are used to exemplarily illustrate the principles of the present application, but cannot be used to limit the scope of the present application, i.e., the present application is not limited to the described embodiments.

[0061] Referring to the drawings shown, Figure 1 The embodiments of the present application disclose specific implementation steps of a wideband high-precision simulation signal generation method, which is implemented based on a wideband high-precision simulation signal generation system, and the system is configured in a simulation signal generator. In order to enable a person skilled in the art to implement the technical solutions of the present application, the method specifically includes the following steps 110-150.

[0062] Step 110: generating a rotation speed simulation basic signal by a field programmable gate array (FPGA) controlling a direct digital synthesis (DDS) chip, the rotation speed simulation basic signal being a waveform-adjustable sine wave or square wave.

[0063] In some embodiments, the generating of the rotation speed simulation basic signal by the FPGA controlling the DDS chip includes: the FPGA sending a clock signal to the DDS chip; and according to the clock signal, controlling the generation of the minimum frequency step of the DDS chip.

[0064] In some embodiments, the FPGA adjusts the frequency control word and the phase register value of the DDS chip in real time to ensure the phase continuity of the simulation signal when the frequency changes, and to avoid signal jump or distortion.

[0065] In an exemplary embodiment, the rotation speed simulation basic signal is calculated by the following formula:

[0066] ;

[0067] wherein, is the rotational speed simulation base signal, is the control word, is the clock frequency, is the number of bits of the phase accumulator.

[0068] In some embodiments, the frequency range of the rotational speed simulation base signal is 0.01 Hz to 100 kHz, the The value of is 28. In order to ensure that the signal generation has sufficient resolution and stability in the entire frequency range, the embodiments of the present application provide a clock signal through a field programmable gate array, and dynamically switch the clock frequency of the high frequency band and the low frequency band according to the output frequency. The specific frequency separation point is set at 400 Hz, so that the best frequency resolution can be obtained in different frequency bands. For example, the preferred programmable waveform generator chip of the present application generates the target signal through an internal phase accumulator, a waveform lookup table and a digital-to-analog converter. The phase accumulator generates a phase increment according to the input control word to control the frequency of the signal; the waveform lookup table stores the sampling points of various waveforms, such as sine wave or square wave; finally, the digital-to-analog converter converts these digital waveform data into analog signals to generate the target frequency signal.

[0069] For example, the clock signal provided by the field programmable gate array switches the clock signal of different frequencies according to the high / low of the simulation signal frequency, so as to improve the resolution of the output frequency. The minimum frequency step of controlling the generation of the direct digital synthesis chip includes the following two cases:

[0070] 1) When the frequency range of the generated rotational speed simulation base signal is a low frequency signal greater than or equal to 0.01 Hz and less than 400 Hz, the frequency of the clock signal is 50 kHz to improve the resolution of the low frequency signal. The minimum frequency step is calculated by the following formula:

[0071] ;

[0072] wherein, is the minimum frequency step, and this frequency resolution is sufficient to ensure that a stable and high-precision signal is generated in the high frequency band, which is suitable for the simulation scene of high-speed rotating machinery.

[0073] 2) When the frequency range of the generated rotational speed simulation base signal is a low frequency signal greater than or equal to 400 Hz and less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz to improve the resolution of the high frequency signal. The minimum frequency step is calculated by the following formula:

[0074] ;

[0075] wherein, As the minimum frequency step, this frequency resolution ensures that in the low frequency range, especially in the frequency range of 0.01 Hz to 400 Hz, extremely accurate low frequency signals can be generated, suitable for simulation of low speed rotating machinery and accurate simulation of slowly changing signals.

[0076] The clock frequency switching mechanism provided by the embodiments of the present application ensures that the best frequency resolution and signal stability can be obtained in the entire frequency range. Through flexible clock control, the direct digital synthesis chip can realize high-precision signal generation from 0.01 Hz to 100 kHz, meeting the application requirements of different frequency ranges. When high frequency signals need to be generated, the FPGA provides a 12 MHz clock to ensure the stability and anti-interference ability of the signal; while in the low frequency range, a 50 kHz clock frequency can ensure sufficient frequency resolution, especially the frequency accuracy in the extremely low frequency range. In addition, the direct digital synthesis chip also supports multiple waveform outputs, including sine wave, square wave and triangular wave. According to the specific application requirements, the embodiments of the present application can flexibly select the appropriate waveform type. For example, when simulating an eddy current sensor, a sine wave signal is usually superimposed on a negative DC voltage; when simulating a Hall sensor, a square wave signal may need to be superimposed on a positive DC voltage; when simulating a reluctance sensor, a sine wave signal is directly used. Users can flexibly configure various waveform types according to different test scenarios and requirements to ensure the accuracy of the simulation signal. In summary, through the direct digital synthesis chip to generate high-precision frequency signals, combined with the flexible clock switching mechanism provided by the field programmable gate array, the embodiments of the present application can generate accurate simulation speed signals in the frequency range from 0.01 Hz to 100 kHz. The frequency separation point is set to 400 Hz, and through dynamic switching of the clock frequency, the best frequency resolution and signal stability can be obtained in the high frequency range and the low frequency range, suitable for various test application scenarios.

[0077] The development of digital signal generation technology, especially direct digital synthesis technology, provides new possibilities for solving the problems in the background art. Direct digital synthesis technology has extremely high frequency resolution, which can ensure accurate frequency control in the entire frequency range. The embodiments of the present application are based on a chip with direct digital synthesis technology and generate frequency signals through digital means, which have high precision, wide frequency range and good stability. Compared with traditional analog signal generators, direct digital synthesis technology can more flexibly control frequency, phase and waveform, but in order to realize smooth transition and dynamic adjustment of frequency, the field programmable gate array is also needed to accurately control the frequency and phase in real time. The introduction of the field programmable gate array enables the system to generate continuously changing signal curves, perfectly simulating the frequency signals detected by the sensor during the change of the mechanical rotating speed.

[0078] The FPGA adjusts the frequency and phase of the DDS chip dynamically to ensure that the output signal can maintain smooth transition during the frequency change. When the frequency changes, the FPGA not only changes the frequency control word, but also adjusts the phase register of the DDS chip in time according to the current phase state, to ensure the continuity of the phase and avoid the discontinuity or jump phenomenon of the waveform. The DDS chip has a phase register function, which allows the user to directly set the phase value of the output signal at any time. When the output frequency needs to be changed, the FPGA not only adjusts the frequency control word step by step, but also synchronously adjusts the value in the phase register. Specifically, when the FPGA adjusts the frequency of the DDS from the current output frequency to a new frequency , the smooth transition of the phase must be considered. In order to maintain the continuity of the phase, the FPGA calculates the current phase accumulation while updating the frequency control word, and writes the accumulated phase as the starting phase of the next period into the phase register. In this way, even if the frequency is changing step by step, the phase register always ensures that the phase of the waveform will not jump. In the TSI system, especially when simulating the eddy current sensor signal, the phase and frequency of the signal must change synchronously to ensure the accuracy and continuity of the simulation result. Through the accurate control of the FPGA, the DDS chip can adjust the phase register according to the current accumulated phase at the moment of each frequency switching, to ensure that the output signal always transits smoothly and does not appear phase jump or irregular waveform. In summary, the embodiments of the present application realize the smooth output of the signal during the frequency change through the frequency and phase control of the FPGA. The FPGA adjusts the value of the phase register while updating the frequency control word, to ensure the continuity of the phase of the waveform and avoid the signal mutation or discontinuity phenomenon during the frequency switching process. This technology not only ensures the accuracy and stability of the signal, but also provides higher accuracy for the simulation system, and is especially suitable for the TSI system calibration and test scene with high requirements for frequency and phase.

[0079] ​The embodiment of the present application controls the frequency and phase output of the direct digital synthesis chip through the field programmable gate array. The field programmable gate array can dynamically adjust the frequency value and phase value of the output of the direct digital synthesis chip according to the frequency initial value, the final value and the change rate, thereby ensuring the continuity and smoothness of the signal when the frequency changes, which enables the embodiment of the present application to accurately simulate the signal response detected by the sensor when the rotating machinery changes the rotating speed, and generate a continuously changing frequency curve. Through the high-speed parallel processing capability of the field programmable gate array, real-time signal updating and adjustment are realized, and the mutation phenomenon generated when the traditional analog signal generator switches the frequency is avoided. The embodiment of the present application generates accurate sine wave and square wave signals by taking the direct digital synthesis chip as a core signal generation module. Through the direct digital synthesis technology, a wide frequency range coverage is realized, and a simulation rotating speed signal of 0.01 Hz to 100 kHz can be generated. The direct digital synthesis chip has good frequency resolution and frequency stability, and can generate high-precision simulation signals in different rotating machinery rotating speed ranges, which is suitable for the signal simulation characteristics of eddy current sensors, reluctance sensors and Hall sensors.

[0080] Step 120: inputting the rotating speed simulation base signal into the inverting amplifier and adjusting the amplitude based on the field programmable gate array controlled digital potentiometer.

[0081] In some embodiments, reference is made to the accompanying drawings Figure 2 As shown, in order to adapt to the demand of different sensors for signal alternating current amplitude, the embodiment of the present application integrates a digital variable gain amplifier for adjusting the output amplitude of the simulation signal. For example, the digital variable gain amplifier of the present application adopts an inverting operational amplifier as a core amplification circuit, and combines a field programmable gate array controlled digital potentiometer to realize accurate adjustment of the signal amplitude. The gain of the inverting operational amplifier is determined by the feedback resistance, and the present application dynamically changes the feedback resistance value through the field programmable gate array controlled digital potentiometer, thereby adjusting the gain of the operational amplifier and realizing control of the output signal amplitude.

[0082] In some embodiments, the gain of the inverting amplifier is adjusted through the field programmable gate array controlled digital potentiometer, and the field programmable gate array adjusts the resistance value of the feedback resistance according to the set parameters to change the gain of the inverting amplifier.

[0083] In some embodiments, the amplitude adjustment based on the field programmable gate array controlled digital potentiometer includes: obtaining the amplitude requirement of the target sensor; dynamically adjusting the feedback resistance resistance value based on the field programmable gate array controlled digital potentiometer and the amplitude requirement of the target sensor; and adjusting the amplitude of the rotating speed simulation base signal based on the feedback resistance resistance value and the rotating speed simulation base signal to change the signal gain.

[0084] In an exemplary embodiment, the target sensor includes an eddy current sensor, a magneto-resistive sensor, and / or a Hall sensor.

[0085] In an exemplary embodiment, the change in signal gain is calculated by the following formula:

[0086] ;

[0087] wherein, is a feedback resistance, is an input resistance in the rotational speed simulation base signal, is a gain coefficient. The feedback resistance is adjusted by a field programmable gate array controlling a digital potentiometer , which can directly change the gain coefficient of the amplifier . The field programmable gate array adjusts the resistance value of the digital potentiometer according to the amplitude parameter set by the user, thereby changing the feedback resistance of the operational amplifier and realizing real-time control of the signal gain. When it is necessary to reduce the output signal amplitude, the field programmable gate array reduces the resistance value of the digital potentiometer, reduces the feedback resistance, and reduces the gain; when it is necessary to increase the signal amplitude, the field programmable gate array increases the resistance value of the feedback resistance, increases the gain of the amplifier. This method not only can accurately control the amplitude of the output signal, but also can quickly respond to different test requirements, ensuring that the output signal amplitude is consistent with the set value. This control scheme based on the inverting operational amplifier and the digital potentiometer makes the amplitude adjustment of the output signal more flexible and accurate, while avoiding the errors and instability generated in the adjustment process of traditional analog circuits. The embodiments of the present application can adjust the gain of the variable gain amplifier through the field programmable gate array according to the user settings, so that the amplitude of the output signal matches the actual output characteristics of the sensor. This way not only ensures the linear output of the signal, but also can flexibly adjust the signal amplitude according to different test requirements, adapt to various loads and application scenarios.

[0088] Step 130: generate a set bias voltage through a digital-to-analog conversion (DAC) chip.

[0089] In some embodiments, the digital-to-analog conversion chip is controlled by a field programmable gate array to generate different bias voltages to adapt to different sensor simulation requirements, and the bias voltage is superimposed with the simulation signal in the same-phase addition method operational amplifier.

[0090] The embodiment of the application generates a set bias voltage through a digital-to-analog conversion chip, can generate a direct current bias signal suitable for various sensor requirements according to different application scenarios, especially for sensors such as eddy current sensors that require a specific bias voltage. The module can provide a stable bias voltage to ensure the reliability and accuracy of the output signal. Based on this, the embodiment of the application can flexibly adapt to various application requirements without changing the overall architecture, and then adapt to special sensor requirements.

[0091] Step 140: superimpose the amplitude-adjusted rotation speed simulation basis signal and the bias voltage input into a non-inverting amplifier to form a composite signal with direct current bias.

[0092] In some embodiments, before inputting the rotation speed simulation basis signal into the inverting amplifier, the method further comprises: based on the field programmable gate array, controlling the direct digital synthesis chip to switch the clock frequency according to the target frequency value.

[0093] In an exemplary embodiment, the method further comprises: based on the field programmable gate array, calculating a current phase accumulation value when the clock frequency is switched; and writing the phase accumulation value into a phase register of the direct digital synthesis chip.

[0094] Referring to the accompanying Figure 3 As shown, the field programmable gate array generates a bias voltage through a digital-to-analog conversion chip, and inputs the bias voltage and an alternating current signal output by a digital variable gain amplifier into a non-inverting amplifier. Then, the signal is power-boosted by a power amplifier to ensure that the signal has sufficient load driving capability. The non-inverting amplifier uses a non-inverting configuration, which superimposes the alternating current signal output by the inverting amplifier and the bias voltage generated by the digital-to-analog conversion. In this way, through the non-inverting addition amplifier, the output signal contains not only the amplitude characteristics of the alternating current signal, but also the set direct current bias, thereby realizing complete simulation of the sensor signal. Finally, the signal processed by the addition amplifier is sent to the power amplifier. The main function of the power amplifier is to provide sufficient driving capability to ensure that the output signal can drive different loads. Although the power amplifier does not change the amplitude or bias of the signal, it can ensure that the signal is not distorted during transmission and has sufficient current driving capability to meet the requirements of sensor calibration and test equipment.

[0095] Based on this, the embodiment of the application can generate a simulation signal with accurate bias voltage and adjustable amplitude, and ensure that the signal output has sufficient load capacity through the power amplifier to meet the requirements of various test scenarios.

[0096] Step 150: output the composite signal after the power amplifier boosting driving capability, and output the composite signal after the boosting driving capability as a target rotating speed simulation signal which can directly drive the turbine monitoring instrument system load.

[0097] In some embodiments, the application also builds a user interaction interface, and the user can control the working state of the field programmable gate array and other circuit modules by inputting setting parameters (such as sensor type, signal frequency, alternating current amplitude, bias voltage, etc.). The field programmable gate array dynamically adjusts the frequency, waveform, phase and amplitude of the signal according to the input setting parameters to generate the required simulation rotating speed signal. This human-computer interface design makes the system operation simple and facilitates the user to adjust and set the parameters according to different test requirements.

[0098] The embodiment of the application generates a rotating speed simulation base signal through a field programmable gate array controlling a direct digital synthesis chip. The field programmable gate array dynamically controls the clock frequency of the direct digital synthesis chip, covering the full frequency band of 0.01 Hz-100 kHz, solving the problem of narrow frequency range and insufficient precision of traditional analog signal sources. The field programmable gate array calculates and writes the phase accumulator value in real time during frequency switching, eliminating waveform breakage and ensuring the smoothness of the rotating speed simulation signal in dynamic change scenarios such as turbine start-stop. The rotating speed simulation base signal is input into an inverting amplifier, and the amplitude is adjusted based on the field programmable gate array controlling a digital potentiometer, dynamically matching the sensor characteristics. The gain of the inverting amplifier is adjusted in real time through the digital potentiometer, so that the signal amplitude accurately adapts to the voltage requirements of eddy current / magnetic resistance / Hall sensors, solving the calibration distortion caused by fixed amplitude of traditional devices. The response time is adjusted through the resistance value of the digital potentiometer, meeting the requirement of fast switching of signal amplitude in real-time calibration scenarios. A set bias voltage is generated through a digital-to-analog conversion chip, realizing sensor DC characteristic simulation. The digital-to-analog conversion chip generates a programmable bias voltage to simulate the DC offset in the output of the real sensor, solving the signal distortion caused by the lack of bias in TSI system calibration. The independently generated bias voltage avoids mutual interference with the base signal, providing pure input for subsequent addition operation and improving signal superposition compatibility. The amplitude-adjusted signal and the bias voltage are input into a non-inverting adder amplifier for superposition, realizing composite signal synthesis. The non-inverting adder linearly superimposes the amplitude-optimized base signal and the bias voltage to form a composite simulation signal with DC bias, which directly matches the electrical characteristics of the TSI system input end. The low output impedance characteristic of the operational amplifier suppresses noise coupling in the signal transmission process, improves the signal-to-noise ratio of the calibration signal, and enhances the anti-interference ability. The composite signal is output after being enhanced by a power amplifier to improve the driving capability, ensuring that the composite signal can drive the high-impedance load of the TSI system and solving the calibration failure caused by insufficient driving of the traditional signal source. The power protection circuit is designed to prevent overload damage, meeting the long-term stable operation demand in the turbine field environment. The field programmable gate array of the embodiment of the application can also adjust the frequency control word and phase register of the direct digital synthesis chip in real time to ensure the phase continuity of the output signal when the frequency changes. The device can simulate the output signals of different sensors, adapt to a frequency range of 0.01 Hz to 100 kHz, provide high-precision and stable simulation signals, and is particularly suitable for testing and calibration of different types of sensor monitoring modules using eddy current sensors, magnetic resistance sensors and Hall sensors.

[0099] Referring to the drawings Figure 4As shown, the embodiment of the present application further provides a wideband high-precision simulation signal generation system, comprising: a basic signal generation module 410, an amplitude adjustment module 420, a bias voltage generation module 430, a composite signal generation module 440, and a target rotating speed simulation signal generation module 450.

[0100] The basic signal generation module 410 is configured to generate a rotating speed simulation basic signal by a field programmable gate array controlling a direct digital synthesis chip, wherein the rotating speed simulation basic signal is a waveform-adjustable sine wave or square wave.

[0101] The basic signal generation module 410 of the embodiment of the present application realizes smooth frequency change and continuous output. By real-time dynamic control of the frequency and phase of the direct digital synthesis chip through the field programmable gate array, it can ensure that the generated signal is a smooth and continuous curve when the rotating speed changes, avoiding the occurrence of frequency jump or mutation. This continuous output characteristic is very critical because it can perfectly simulate the frequency signal detected by the sensor when the mechanical rotating speed changes, ensuring the high consistency of the simulation signal and the actual working condition. For the rotating speed monitor test and calibration in the TSI system, it can more truly reflect the actual running state of the equipment, improving the accuracy of the test and calibration.

[0102] The amplitude adjustment module 420 is configured to input the rotating speed simulation basic signal into an inverting amplifier and perform amplitude adjustment based on the field programmable gate array controlling a digital potentiometer. The amplitude adjustment module 420 of the embodiment of the present application integrates a digital variable gain amplifier (i.e., an inverting amplifier), enabling users to flexibly adjust the amplitude of the output signal, ensuring the stability and linear output of the signal amplitude. By adjusting the gain, appropriate signal amplitude can be generated for different application requirements, suitable for different loads and test conditions. Compared with traditional fixed amplifiers, the embodiment of the present application provides better flexibility, especially when the test conditions change, it can be quickly adjusted to ensure stable and reliable signal output.

[0103] The bias voltage generation module 430 is configured to generate a set bias voltage by a digital-to-analog conversion chip. The bias voltage generation module 430 of the embodiment of the present application meets the direct current bias requirements of different sensors. This module can generate corresponding direct current bias voltage according to the type of the sensor, for example: when simulating the signal output of an eddy current sensor, a sine wave signal with a range of -8V to -12V is output. And the bias voltage generation module 430 can be used in conjunction with the digital variable gain amplifier to ensure that the voltage range and waveform of the output signal meet the application requirements of different types of sensors.

[0104] The composite signal generation module 440 is configured to superimpose the amplitude-adjusted rotating speed simulation basic signal and the bias voltage into a non-inverting operational amplifier to form a composite signal with direct current bias.

[0105] This application integrates a digital variable gain amplifier and a bias voltage generation module to adapt to the signal amplitude and bias voltage requirements of different sensors. A power amplification circuit ensures sufficient driving capability for the output signal, meeting the needs of sensor output signal simulation in various applications. This application features high precision, a wide frequency range, and continuous smooth output, meeting the stringent requirements of TSI systems for signal simulation equipment. It has broad application prospects in the performance testing, fault diagnosis, and calibration of rotating machinery and equipment.

[0106] The target speed simulation signal generation module 450 is used to amplify the driving capability of the composite signal through a power amplifier and output the amplified composite signal as the target speed simulation signal that can directly drive the load of the turbine monitoring instrument system. This embodiment of the application, based on the composite signal generation module 440 and the target speed simulation signal generation module 450 using a field-programmable gate array (FPGA), provides users with extremely high flexibility and scalability. Users can quickly adjust the frequency, phase, and amplitude of the signal through simple parameter settings to adapt to different simulation requirements. The high flexibility of the FPGA allows the system to quickly adapt to different test standards and requirements that may emerge in the future, thereby enhancing the applicability and service life of this embodiment.

[0107] This application embodiment achieves high-precision simulated speed signals over a wide frequency range by combining a direct digital synthesis chip (DDS) with real-time control via a field-programmable gate array (FPGA). It can also adjust the frequency and phase of the output signal in real time according to speed changes. This embodiment significantly improves the performance of the simulated speed signal generator, overcoming the shortcomings of traditional analog signal generators such as insufficient accuracy, limited frequency range, and unsmooth frequency changes. The high-precision frequency output, continuous and smooth signal changes, flexible amplitude adjustment, bias voltage generation, and the powerful control capabilities of the FPGA enable this embodiment to be widely used in the calibration and performance testing of speed monitors in TSI systems, ensuring the accuracy and stability of test data.

[0108] This application also provides a simulation signal generator, configured with the aforementioned wideband, high-precision simulation signal generation system, as shown in the attached figure. Figure 5 As shown, the simulated signal generator includes: a field-programmable gate array, a direct digital synthesis chip, an inverting amplifier, a digital-to-analog converter chip, a non-inverting adder operational amplifier, and a power amplifier.

[0109] In some implementations, the field-programmable gate array is used to dynamically switch the clock frequency of the direct digital synthesis chip and control phase continuity.

[0110] In some embodiments, the inverting amplifier is configured to regulate the gain based on the field programmable gate array.

[0111] In some embodiments, the non-inverting summing operational amplifier is configured to superimpose the bias voltage generated by the digital-to-analog conversion chip and the simulation signal.

[0112] In some embodiments, the power amplifier is configured to enhance the driving capability of the superimposed bias voltage and the simulation signal.

[0113] In some embodiments, the simulation signal generator further comprises a central processing unit. The central processing unit controls the gain of the adjusting amplifier through the field programmable gate array according to user settings, so that the amplitude of the output signal matches the actual output characteristics of the sensor.

[0114] In some embodiments, the simulation signal generator is particularly applicable to a rotational speed simulation signal generator in a turbine technology instrument system.

[0115] The embodiment of the present application combines the control advantages of a direct digital synthesis technology chip and a field programmable gate array, and proposes a wide-range and high-precision rotational speed simulation signal generator, which can generate a continuous frequency change signal in the range of 0.01 Hz to 100 kHz, is suitable for inspection and calibration in a turbine monitoring instrument system, and can particularly simulate the signal output characteristics of common sensors, is suitable for simulation of various sensor signals (such as eddy current sensors, reluctance sensors and Hall sensors), and solves the technical problems of insufficient precision, narrow frequency range and discontinuous frequency in the prior art. The generator of the embodiment of the present application can generate high-precision simulation rotational speed signals in a wide frequency range, and is suitable for calibration and performance verification of a rotational speed monitor in a turbine technology instrument system. This signal generator is particularly suitable for generating continuous and smooth frequency signals when the rotational speed of a rotating machine changes, thereby realizing accurate simulation and testing of a rotating machine system. The simulation signal generator of the embodiment of the present application generates signals by using direct digital synthesis technology, and compared with a traditional analog signal generator, the signal output of the embodiment of the present application is more stable, is less affected by external environments (such as temperature and time drift), and guarantees the frequency stability, consistency and repeatability in long-term use. Therefore, the embodiment of the present application can meet the application scenarios with high requirements for rotational speed signal simulation precision, and is particularly suitable for testing and calibration of a rotational speed monitor in a TSI system.

[0116] The simulation signal generator of the embodiment of the application is based on the cooperation of a field programmable gate array and a direct digital synthesis chip, utilizes the field programmable gate array to control the frequency and phase output by the direct digital synthesis chip in real time, ensures the smooth transition of the signal when the rotating speed signal changes, and simulates the frequency signal detected by the sensor in the process of the change of the mechanical rotating speed. Through the high-precision control of the field programmable gate array, the application can generate continuously changing signals such as sine waves and square waves, perfectly simulates the rotating speed signal characteristics of the rotating mechanical equipment under different operating conditions, and includes the signal output modes of the eddy current sensor, the reluctance sensor and the Hall sensor.

[0117] It can be understood that the above embodiments are only exemplary embodiments adopted for illustrating the principles of the application, and the application is not limited thereto. Various modifications and improvements can be made by those of ordinary skill in the art without departing from the spirit and essence of the application, and these modifications and improvements are also considered as the protection scope of the application.

Claims

1. A method for generating wideband, high-precision simulation signals, characterized in that, include: The rotational speed simulation base signal is generated by controlling a direct digital synthesis chip through a field-programmable gate array. The rotational speed simulation base signal is a sine wave or a square wave with adjustable waveform. The simulated rotational speed signal is input into an inverting amplifier, and the amplitude is adjusted by controlling a digital potentiometer based on the field-programmable gate array. A set bias voltage is generated by a digital-to-analog converter chip; The amplitude-adjusted basic speed simulation signal is superimposed on the bias voltage input in-phase adder operational amplifier to form a composite signal with DC bias. The composite signal is amplified by a power amplifier and then output. The amplified composite signal is then used as the target speed simulation signal that can directly drive the load of the turbine monitoring instrument system. The step of generating the basic speed simulation signal by controlling the direct digital synthesis chip via a field-programmable gate array (FPGA) includes: the FPGA sending a clock signal to the direct digital synthesis chip; controlling the minimum frequency step of the direct digital synthesis chip based on the clock signal; and calculating the basic speed simulation signal using the following formula: ； in, This is the basic signal for the speed simulation. For control words, For clock frequency, The number of bits in the phase accumulator; The frequency range of the basic signal for the rotational speed simulation is 0.01Hz to 100kHz. The value is 28. The step of controlling the minimum frequency step of generating the direct digital synthesis chip according to the clock signal includes: when the frequency range of the generated rotational speed simulation base signal is a low-frequency signal greater than or equal to 0.01 Hz to less than 400 Hz, the frequency of the clock signal is 50 kHz, and the minimum frequency step is calculated by the following formula: ； When the frequency range of the generated rotational speed simulation base signal is a low-frequency signal greater than or equal to 400 Hz and less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz, and the minimum frequency step is calculated by the following formula: ； in, This is the minimum frequency step.

2. The method according to claim 1, characterized in that, Before inputting the simulated rotational speed base signal into the inverting amplifier, the method further includes: Based on the target frequency value, the direct digital synthesis chip is controlled to switch clock frequencies using the field-programmable gate array.

3. The method according to claim 2, characterized in that, The method further includes: When the clock frequency changes, the current phase accumulation value is calculated based on the field-programmable gate array; The accumulated phase value is written into the phase register of the direct digital synthesis chip.

4. The method according to claim 1, characterized in that, The amplitude adjustment based on the field-programmable gate array (FPGA) controlling the digital potentiometer includes: Obtain the amplitude requirements of the target sensor; The feedback resistor value is dynamically adjusted based on the amplitude requirements of the field-programmable gate array (FPGA) controlled by the digital potentiometer and the target sensor. The amplitude of the speed simulation base signal is adjusted based on the feedback resistor value and the speed simulation base signal to change the signal gain.

5. The method according to claim 4, characterized in that, The target sensor includes an eddy current sensor, a magnetoresistive sensor, and / or a Hall sensor.

6. The method according to claim 4, characterized in that, The change in signal gain is calculated using the following formula: ； in, For feedback resistor, The input resistance is used in the basic signal for the speed simulation. This is the gain coefficient.

7. A wideband, high-precision simulation signal generation system, characterized in that, include: The basic signal generation module is used to generate a basic speed simulation signal by controlling a direct digital synthesis chip through a field-programmable gate array. The basic speed simulation signal is a sine wave or a square wave with adjustable waveform. An amplitude adjustment module is used to input the rotational speed simulation basis signal into an inverting amplifier and control a digital potentiometer based on the field-programmable gate array to adjust the amplitude. The bias voltage generation module is used to generate a set bias voltage through a digital-to-analog converter chip; The composite signal generation module is used to superimpose the amplitude-adjusted speed simulation base signal with the bias voltage input in-phase adder operational amplifier to form a composite signal with DC bias. The target speed simulation signal generation module is used to output the composite signal after the driving capability is enhanced by a power amplifier, and the output composite signal with enhanced driving capability is used as the target speed simulation signal that can directly drive the load of the turbine monitoring instrument system. The step of generating the basic speed simulation signal by controlling the direct digital synthesis chip via a field-programmable gate array (FPGA) includes: the FPGA sending a clock signal to the direct digital synthesis chip; controlling the minimum frequency step of the direct digital synthesis chip based on the clock signal; and calculating the basic speed simulation signal using the following formula: ； in, This is the basic signal for the speed simulation. For control words, For clock frequency, The number of bits in the phase accumulator; The frequency range of the basic signal for the rotational speed simulation is 0.01Hz to 100kHz. The value is 28. The step of controlling the minimum frequency step of generating the direct digital synthesis chip according to the clock signal includes: when the frequency range of the generated rotational speed simulation base signal is a low-frequency signal greater than or equal to 0.01 Hz to less than 400 Hz, the frequency of the clock signal is 50 kHz, and the minimum frequency step is calculated by the following formula: ； When the frequency range of the generated rotational speed simulation base signal is a low-frequency signal greater than or equal to 400 Hz and less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz, and the minimum frequency step is calculated by the following formula: ； in, This is the minimum frequency step.

8. A simulation signal generator, configured with the wideband, high-precision simulation signal generation system as described in claim 7, characterized in that, This includes: field-programmable gate arrays (FPGAs), direct digital synthesizers (DDS), inverting amplifiers, digital-to-analog converters (DACs), non-inverting operational amplifiers (NOAMPs), and power amplifiers. The field-programmable gate array is used to dynamically switch the clock frequency of the direct digital synthesis chip and control the phase continuity. The inverting amplifier is used to adjust the gain based on the field-programmable gate array; The in-phase adder operational amplifier is used to superimpose the bias voltage generated by the digital-to-analog converter chip with the simulation signal; The power amplifier is used to enhance the driving capability of the superimposed bias voltage and the simulated signal.

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