Signal transmission method, signal transmission device and setting method thereof

Abstract

The embodiment of the invention provides a signal transmission method, a signal transmission device and a setting method thereof. The signal transmission method comprises the following steps: acquiring a target signal generated by a signal initiating module through an encoding module at the side of the signal initiating module, and encoding the acquired target signal to obtain an encoded data packet; the target signal comprises an interrupt signal and / or a control signal; the coding data packet is transmitted to a decoding module at the side of the signal receiving module through a data bus; and decoding the coded data packet through a decoding module to obtain a target signal, and transmitting the target signal to a signal receiving module. Through the scheme of the embodiment, channel resources are saved, the channel area is saved, the target signal integration difficulty is simplified, and the signal wiring complexity is reduced.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of digital system design, and in particular to a signal transmission method, a signal transmission device, and a setting method thereof. Background Art

[0002] Interrupt transmission is an essential component of digital chip design. In digital system technology, an interrupt occurs when a functional module (for example, including but not limited to an accelerator) within a digital system generates some service that requires the processor to process. At this point, the functional module needs to initiate an interrupt to the processor, prompting it to respond. There are typically multiple interrupt signals, each representing a service that the interrupt source requires the processor to handle.

[0003] Digital system designs often integrate numerous functional modules, resulting in a large number of interrupts that need to be sent to the processor. These functional modules are integrated in different locations on the chip, making interrupt signal routing very complex for chip design. The gaps between modules in chip design are called channels, and the reserved area for channel space is limited. Traditionally, interrupt signal transmission is done directly within the channel, transmitting interrupts to the processor. This method consumes a lot of channel area, with hundreds or even thousands of interrupts on a single chip needing to be transmitted from the channel to the processor. In current digital chip designs, interrupts are transmitted using direct lines, which significantly consumes channel area resources. Summary of the Invention

[0004] The embodiments of the present disclosure provide a signal transmission method, a signal transmission device, and a configuration method thereof.

[0005] In a first aspect, an embodiment of the present disclosure provides a signal transmission method, comprising:

[0006] Acquire the target signal generated by the signal initiation module through the encoding module on the signal initiation module side, and encode the acquired target signal to obtain an encoded data packet; the target signal includes: an interrupt signal and / or a control signal;

[0007] Transmitting the encoded data packet to the decoding module on the signal receiving module side via the data bus;

[0008] The coded data packet is decoded by the decoding module to obtain the target signal, and the target signal is transmitted to the signal receiving module.

[0009] In a second aspect, an embodiment of the present disclosure further provides a signal transmission device, comprising:

[0010] An encoding module is configured to obtain a target signal generated by the signal initiation module, encode the target signal, and obtain an encoded data packet; the target signal includes: an interrupt signal and / or a control signal;

[0011] a data bus configured to transmit the encoded data packet to a decoding module;

[0012] The decoding module is configured to decode the encoded data packet to obtain the target signal, and transmit the target signal to the signal receiving module.

[0013] In a third aspect, an embodiment of the present disclosure further provides a method for setting a signal transmission device, wherein the signal transmission device is the signal transmission device described above, and the signal transmission device includes a signal initiating module and a signal receiving module, wherein the signal initiating module is used to generate a target signal, and the signal receiving module is used to receive the target signal, and the method includes:

[0014] Setting a coding module on the signal initiation module side and connecting the signal initiation module with the coding module;

[0015] Setting a decoding module on the signal receiving module side and connecting the signal receiving module with the decoding module;

[0016] A data bus is provided between the encoding module and the decoding module as a data channel between the signal initiating module and the signal receiving module;

[0017] The encoding module is configured to obtain the target signal generated by the signal initiating module, encode the target signal, and obtain an encoded data packet; the data bus is configured to transmit the encoded data packet to the decoding module; the decoding module is configured to decode the encoded data packet to obtain the target signal, and transmit the target signal to the signal receiving module.

[0018] In this disclosed embodiment, an encoding module on the signal initiation module acquires a target signal generated by the signal initiation module and encodes the acquired target signal to obtain an encoded data packet, which includes an interrupt signal and / or a control signal. The encoded data packet is then transmitted via a data bus to a decoding module on the signal receiving module. The decoding module decodes the encoded data packet to obtain the target signal, which is then transmitted to the signal receiving module. This embodiment conserves channel resources and channel area, simplifies target signal integration, and reduces signal routing complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In the accompanying drawings of the embodiments of the present disclosure:

[0020] Figure 1 Schematic diagram of digital system signal transmission structure provided for related technologies;

[0021] Figure 2 A flow chart of a signal transmission method provided in an embodiment of the present disclosure;

[0022] Figure 3 A schematic diagram of the structure of a signal transmission method provided in an embodiment of the present disclosure;

[0023] Figure 4 A schematic diagram of the distribution of signal initiating modules and signal receiving modules obtained after block division according to an embodiment of the present disclosure;

[0024] Figure 5 A schematic diagram of the configuration of the encoding module and the decoding module provided in an embodiment of the present disclosure;

[0025] Figure 6 A schematic diagram of the configuration of a multiplexer provided in an embodiment of the present disclosure;

[0026] Figure 7 A block diagram of the signal transmission device provided in an embodiment of the present disclosure;

[0027] Figure 8 This is a flow chart of a method for setting up a signal transmission device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the technical solution of the present disclosure, the communication perception data processing method and computer-readable storage medium provided by the embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0029] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, but the illustrated embodiments may be embodied in different forms, and the present disclosure should not be construed as limited to the embodiments set forth below. Rather, these embodiments are provided so that the present disclosure will be thorough and complete and will fully understand the scope of the present disclosure to those skilled in the art.

[0030] The accompanying drawings of the embodiments of the present disclosure are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification. Together with the detailed embodiments, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed embodiments with reference to the accompanying drawings.

[0031] The present disclosure may be described with reference to plan views and / or cross-sectional views by way of ideal schematic views of the present disclosure. Therefore, the exemplary illustrations may be modified according to manufacturing techniques and / or tolerances.

[0032] In the absence of conflict, the various embodiments of the present disclosure and the various features therein may be combined with each other.

[0033] The terms used in this disclosure are only used to describe specific embodiments and are not intended to limit the disclosure. As used in this disclosure, the term "and / or" includes any and all combinations of one or more related enumerated items. As used in this disclosure, the singular forms "a" and "the" are also intended to include plural forms, unless the context clearly indicates otherwise. As used in this disclosure, the terms "comprising" and "made of" specify the presence of the features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0034] Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meanings as those commonly understood by those skilled in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning unless expressly defined in this disclosure.

[0035] Interrupt transmission is an essential component of digital chip design. In digital system technology, an interrupt occurs when a functional module (for example, including but not limited to an accelerator) within a digital system generates some service that requires the processor to process. At this point, the functional module needs to initiate an interrupt to the processor, prompting it to respond. There are typically multiple interrupt signals, each representing a service that the interrupt source requires the processor to handle.

[0036] In digital system design, a large number of functional modules are often integrated, which results in a large number of interrupts that need to be sent to the processor. These functional modules are integrated in different locations on the chip, and the routing of interrupt signals is very complicated for chip design. The gaps between modules in chip design are called channels, and the area reserved for channel space is limited. Traditional interrupt signal transmission is done directly in the channel to transmit the interrupt to the processor. This method consumes a lot of channel area, and often there are hundreds or even thousands of interrupts on a chip that need to be transmitted from the channel to the processor. In current digital chip design, interrupts are transmitted using direct lines, such as Figure 1 As shown (where each block represents a functional module, processor 1, processor 1, processor 2, and processor 3 serve as receiving modules for interrupt signals), a lot of channel area resources are occupied.

[0037] In this disclosed embodiment, an encoding module on the signal initiation module acquires a target signal generated by the signal initiation module and encodes the acquired target signal to obtain an encoded data packet, which includes an interrupt signal and / or a control signal. The encoded data packet is then transmitted via a data bus to a decoding module on the signal receiving module. The decoding module decodes the encoded data packet to obtain the target signal, which is then transmitted to the signal receiving module. This embodiment conserves channel resources and channel area, simplifies target signal integration, and reduces signal routing complexity.

[0038] The embodiments of the present disclosure can be applied to any electronic product that needs to transmit a target signal (for example, including but not limited to an interrupt signal, a control signal, etc.), including but not limited to a SOC (system on chip) chip, such as a digital chip.

[0039] The following is a detailed introduction to the embodiments of the present disclosure.

[0040] The present disclosure provides a signal transmission method. Figure 2 、 Figure 3 As shown, it includes steps S11-S13:

[0041] S11. Acquire the target signal generated by the signal initiating module through the encoding module on the signal initiating module side, and encode the acquired target signal to obtain an encoded data packet.

[0042] In the embodiment of the present disclosure, the signal initiating module 1 (eg Figure 3 The signal initiation module 1-1, signal initiation module 1-2, signal initiation module 1-3, signal initiation module 1-4, signal initiation module 1-5, signal initiation module 1-6, signal initiation module 1-7) may include but are not limited to functional modules and / or first processing modules, and the target signal may include but are not limited to interrupt signals and / or control signals, and the control signal may include but are not limited to single-bit control signals, global control signals, etc.

[0043] In an embodiment of the present disclosure, each signal initiating module 1 may include at least one signal initiating submodule, each signal initiating submodule including but not limited to a functional module and / or a first processing module, and the signal initiating submodule is configured to generate a target signal.

[0044] In the embodiment of the present disclosure, all signal initiating submodules may be divided into blocks according to a preset division rule; each divided block includes at least one signal initiating submodule; and each block is respectively regarded as a signal initiating module 1.

[0045] In the embodiments of the present disclosure, Figure 4It is a distribution diagram of each signal initiating module 1 and signal receiving module 2 obtained after block division, wherein the signal initiating module 1 includes: signal initiating module 1-1, signal initiating module 1-2, signal initiating module 1-3, signal initiating module 1-4, signal initiating module 1-5, signal initiating module 1-6, signal initiating module 1-7; the signal receiving module 2 includes: signal receiving module 2-1, signal receiving module 2-2, signal receiving module 2-3.

[0046] In an embodiment of the present disclosure, for example, all functional modules in a digital chip are divided according to a division rule to obtain a plurality of blocks, each of which includes at least one signal initiating submodule.

[0047] In the embodiment of the present disclosure, the division rule may include but is not limited to any one or more of the following:

[0048] The distance between each signal initiator module;

[0049] Whether the functions of each signal initiator module are the same;

[0050] Whether each signal initiator module uses the same clock domain; and,

[0051] Pre-set device layout requirements for signal transmission devices.

[0052] In the embodiment of the present disclosure, the signal initiating submodules can be divided into areas based on distance, and the signal initiating submodules with closer distances (for example, the distance between the signal initiating submodules is less than a preset first distance threshold) can be divided into one block; the signal initiating submodules can be divided into areas based on function, and the signal initiating submodules with the same or similar functions can be divided into one block; the signal initiating submodules can be divided into areas based on clock domains, and the signal initiating submodules using the same clock domain can be divided into one block; and the areas can also be divided according to pre-set device layout requirements.

[0053] In the embodiment of the present disclosure, before implementing the solution of step S11, a coding module 3 (eg Figure 3 The coding module 3-1, coding module 3-2, coding module 3-3, coding module 3-4, coding module 3-5, coding module 3-6, coding module 3-7) in the signal initiating module 1 is connected to the corresponding coding module 3.

[0054] In the embodiment of the present disclosure, the setting diagram of the encoding module 3 can be as follows: Figure 5As shown, for example, coding module 3-1, coding module 3-2, coding module 3-3, coding module 3-4, coding module 3-5, coding module 3-6, and coding module 3-7 can be respectively set at signal initiating module 1-1, signal initiating module 1-2, signal initiating module 1-3, signal initiating module 1-4, signal initiating module 1-5, signal initiating module 1-6, and signal initiating module 1-7.

[0055] In the embodiment of the present disclosure, the number of encoding modules 3 to be set may be determined according to the number of target signals generated by the signal initiating module 1 .

[0056] In the embodiment of the present disclosure, determining the number of encoding modules 3 to be set according to the number of target signals generated by the signal initiating module 1 may include:

[0057] Based on the number of target signals that each coding module 3 can process and the maximum number of target signals that each signal initiation module 1 can generate, the number of coding modules 3 required for each signal initiation module 1 is determined as the set number of coding modules 3 corresponding to each signal initiation module 1.

[0058] In the embodiment of the present disclosure, the number of target signals that each encoding module 3 can process can be determined based on the processing capability of the selected encoding module 3. For the signal initiation module 1, the maximum number of target signals that each signal initiation module 1 can generate (for example, the maximum number of target signals that all the signal initiation submodules included can generate) can be determined. When configuring the encoding modules 3, all encoding modules (one or more) configured at each signal initiation module 3 can ensure that they can at least process the maximum number of target signals generated by the signal initiation module 1 at the same time. For example, if the maximum number of target signals that a signal initiation module 1 can generate at the same time is 100, then the encoding module 3 configured at the signal initiation module 1 has the ability to process at least 100 target signals. Alternatively, the encoding module 3 (one or more) configured at the signal initiation module 1 can at least have the ability to process the maximum number of target signals that the signal initiation module 1 can generate. For example, if the maximum number of target signals that a signal initiation module 1 can generate is 200, then the encoding module 3 configured at the signal initiation module 1 has the ability to process at least 200 target signals. Based on the above principles, the number of encoding modules 3 required for each signal initiating module 1 can be determined as the set number of encoding modules 3 corresponding to each signal initiating module 1.

[0059] In the embodiment of the present disclosure, the encoding module 3 may be disposed inside the signal initiating module 1 and / or within a first preset range outside the signal initiating module 1 .

[0060] In the embodiment of the present disclosure, the first preset range may be determined according to the performance of the encoding module 3 and is not limited in detail herein.

[0061] In the embodiment of the present disclosure, the detailed setting position of the encoding module 3 can be determined according to the requirements and the performance of the encoding module 3, and is not limited in detail here.

[0062] In the embodiment of the present disclosure, after the signal initiating module 1 generates the target signal, the encoding module 3 obtains the target signal and encodes the target signal to obtain an encoded data packet.

[0063] In the disclosed embodiment, for example, when the signal initiating module 1 initiates an interrupt, it transmits the generated interrupt signal to the encoding module 3 connected to the signal initiating module 1. The encoding module 3 internally converts the interrupt signal into an encoded data packet in a specific format, which can reduce the area occupied by the data outside the encoding module 3 to an area equal to the data bit width.

[0064] In the embodiment of the present disclosure, before transmitting the encoded data packet to the decoding module 4 on the signal receiving module 2 side via the data bus, the method further includes:

[0065] The coded data packets of the multiple coding modules 3 are aggregated, and the aggregated coded data packets are transmitted to the data bus.

[0066] In the embodiment of the present disclosure, a multiplexer 5 can be set between the encoding module 3 and the decoding module 4. The multiplexer 5 can merge multiple encoded data packets into one, so that the encoded data packets of multiple encoding modules 3 can be aggregated into one data bus through the multiplexer 5.

[0067] In the embodiment of the present disclosure, Figure 6 As shown, multiplexers 5-1, 5-2, 5-3, and 5-4 can be set between the encoding module 3-1, encoding module 3-2, encoding module 3-3, encoding module 3-4, encoding module 3-5, and encoding module 3-6 and the decoding module 4-1 and decoding module 4-2.

[0068] In the embodiment of the present disclosure, an input port of a multiplexer 5 can be connected to the encoding modules 3 corresponding to one or more signal initiating modules 1 to receive encoded data packets sent by the encoding modules 3 of the one or more signal initiating modules 1.

[0069] In the embodiment of the present disclosure, the number of multiplexers 5 can be determined based on the number of target signals generated and the number of signals that each multiplexer 5 can process. The specific number and specific setting positions of the multiplexers 5 are not limited here.

[0070] In the disclosed embodiment, data is further merged through the multiplexer 5 to further reduce channel surface resources, thereby completely converting the occupied resources into data bit width. This occupies very little channel area for medium and large chips.

[0071] S12: Transmit the encoded data packet to the decoding module on the signal receiving module side via the data bus.

[0072] In the embodiment of the present disclosure, the signal receiving module 2 may include but is not limited to a second processing module, for example, a processor.

[0073] In the disclosed embodiment, since encoding module 3 is provided on the signal initiating module 1 side, decoding module 4 is further required to decode the encoded data packets. The target signals are aggregated and the encoded data packets are generated to facilitate data transmission and conserve communication resources. Therefore, decoding module 4 is provided on the signal receiving module 2 side and connected to the signal receiving module 2.

[0074] In the embodiment of the present disclosure, Figure 3 As shown in the structural diagram, the decoding module 4 includes: a signal receiving module 2-1, a signal receiving module 2-2, and a signal receiving module 2-3.

[0075] In the embodiment of the present disclosure, during the setting process of the decoding module 4 , one signal receiving module 2 may be connected to at least one decoding module 4 . For example, one signal receiving module 2 may be connected to only one decoding module 4 .

[0076] In the embodiment of the present disclosure, Figure 5 As shown, for the signal receiving module 2-1, the signal receiving module 2-2, and the signal receiving module 2-3, a decoding module 4 may be provided respectively, for example, a decoding module 4-1, a decoding module 4-2, and a decoding module 4-3.

[0077] In the embodiment of the present disclosure, there may be one or more signal receiving modules 2. In the case where there are multiple signal receiving modules 2, at least one decoding module 4 may be provided at each signal receiving module 2, and the decoding modules 4 at each signal receiving module 1 are interconnected. Figure 6 The line a shown is used to connect the decoding module 4-1, the decoding module 4-2, and the decoding module 4-3 so that the encoded data packets can be shared among these decoding modules, so that the target signal of any signal initiating module 1 can be sent to any signal receiving module 2.

[0078] In the embodiment of the present disclosure, the decoding module 4 is disposed inside the signal receiving module 1 and / or within a second preset range outside the signal receiving module 2 .

[0079] In the embodiment of the present disclosure, the decoding modules 4 may be connected based on the principle that the distance between the physical locations (second physical locations) of the decoding modules 4 is the shortest.

[0080] In the embodiment of the present disclosure, since a direct line is used to transmit the target signal, which occupies a lot of channel area resources, a data bus can be set in the channel between the encoding module 3 and the decoding module 4 to transmit the encoded data packet to the decoding module through the data bus.

[0081] In the embodiment of the present disclosure, a data bus is provided in the channel between the encoding module 3 and the decoding module 4, which may include:

[0082] Determining a first physical position of each encoding module 3 and a second physical position of each decoding module 4;

[0083] Based on the principle that the distance between the first physical position and the second physical position is the shortest, a data bus is set in the channel between each encoding module 3 and the decoding module 4 closest to the encoding module 3 .

[0084] In the embodiment of the present disclosure, a data bus can be set based on the physical positions of the encoding module 3 and the decoding module 4 on the circuit board or chip (such as the first physical position and the second physical position mentioned above), and the encoding module 3 and decoding module 4 that are closest to each other are connected through the data bus, so as to save the transmission distance of the target signal as much as possible.

[0085] In the disclosed embodiment, the data bus may include, but is not limited to, a serial bus. Through the serial bus, the target signals (e.g., interrupt signals) generated by the signal initiation module 1 can be serialized onto the same line, thereby saving channel area and simplifying the integration of the target signals.

[0086] In the embodiment of the present disclosure, the aforementioned multiplexer 5 may be provided based on the provided data bus.

[0087] In the embodiment of the present disclosure, a multiplexer 5 may be provided between the data bus and the encoding module 3 so as to aggregate the encoded data packets of the encoding module 3 to the data bus through the multiplexer 5 .

[0088] In the embodiment of the present disclosure, a multiplexer 5 can be set between the encoding modules 3 corresponding to multiple signal initiating modules 1 and the data bus based on the principle of minimum lines and / or the principle of shortest route, so as to aggregate the encoded data packets of the encoding modules 3 corresponding to multiple signal initiating modules 1 to the data bus through the multiplexer 5.

[0089] In the embodiment of the present disclosure, based on the set data bus, the encoded data packet can be transmitted to the decoding module 4.

[0090] S13. Decode the coded data packet through the decoding module to obtain a target signal, and transmit the target signal to the signal receiving module.

[0091] In the embodiment of the present disclosure, transmitting the target signal to the signal receiving module 2 may include:

[0092] After any first decoding module obtains the target signal, if the destination of the target signal is the first signal receiving module corresponding to the first decoding module, the target signal is transmitted to the first signal receiving module.

[0093] In the embodiment of the present disclosure, the encoded data packet of any encoding module 3 can be transmitted to the decoding module 4 (for example, the first decoding module) closest to the encoding module 3 through the multiplexer 5 and the data bus. When the nearest decoding module 4 determines that the destination of the target signal in the currently received encoded data packet is the signal receiving module 2 (for example, the first signal receiving module) corresponding to the nearest decoding module 4, the decoded target signal can be transmitted to the first signal receiving module.

[0094] In the embodiment of the present disclosure, transmitting the target signal to the signal receiving module 2 may further include:

[0095] After any second decoding module obtains the target signal, if the destination of the target signal is not the second signal receiving module corresponding to the second decoding module, the second decoding module shares the encoded data packet with all decoding modules, and the third decoding module connected to the third signal receiving module as the destination decodes the encoded data packet to obtain the target signal, and sends the target signal to the third signal receiving module.

[0096] In the embodiment of the present disclosure, since the various decoding modules 4 are interconnected and can share encoded data packets, when any decoding module 4 (for example, the second decoding module) determines that the destination of the target signal in the currently received encoded data packet is not the signal receiving module corresponding to the arbitrary decoding module 4 (for example, the second signal receiving module), the encoded data packet can be shared so that the decoding module 4 (for example, the third decoding module) at the destination of the target signal decodes the encoded data packet and transmits the decoded target signal to the signal receiving module 2 (for example, the third signal receiving module) at the destination.

[0097] The present disclosure also provides a signal transmission device A, such as Figure 7 As shown, it may include:

[0098] The encoding module 3 is configured to obtain the target signal generated by the signal initiating module 1, encode the target signal, and obtain an encoded data packet;

[0099] a data bus 6 configured to transmit the encoded data packets to the decoding module 4;

[0100] The decoding module 4 is configured to decode the encoded data packet to obtain a target signal and transmit the target signal to the signal receiving module 2 .

[0101] In the embodiment of the present disclosure, the encoding module is provided on the signal initiating module side and is connected to the signal initiating module 1;

[0102] The decoding module 4 is arranged on the side of the signal receiving module 2 and is connected to the signal receiving module 2;

[0103] The data bus 6 is provided between the encoding module 3 and the decoding module 4 , serving as a data channel between the signal initiating module 1 and the signal receiving module 2 .

[0104] In the embodiment of the present disclosure, the encoding module 3 is disposed within a first preset range inside the signal initiating module 1 and / or outside the signal initiating module 2;

[0105] The decoding module 4 is disposed inside the signal receiving module 2 and / or within a second preset range outside the signal receiving module 2 .

[0106] In the embodiment of the present disclosure, each signal initiation module 1 is each block obtained by dividing all signal initiation sub-modules into blocks, and each block includes at least one signal initiation sub-module.

[0107] In the embodiment of the present disclosure, a multiplexer 5 is provided between the data bus 6 and the encoding module 3;

[0108] The multiplexer 5 is configured to aggregate the coded data packets from the coding module 3 to the data bus.

[0109] In the embodiment of the present disclosure, the signal initiating module 1 includes a functional module and / or a first processing module;

[0110] The signal receiving module 2 includes a second processing module.

[0111] In the embodiments of the present disclosure, any of the aforementioned data transmission method embodiments are applicable to the signal transmission device embodiments and will not be described in detail here.

[0112] The embodiment of the present disclosure also provides a method for setting a signal transmission device, wherein the signal transmission device is the above-mentioned signal transmission device, and the signal transmission device includes a signal initiating module and a signal receiving module, wherein the signal initiating module is used to generate a target signal, and the signal receiving module is used to receive the target signal. Figure 8 As shown, the method includes steps S21-S24:

[0113] S21. Setting a coding module on the signal initiation module side and connecting the signal initiation module to the coding module;

[0114] S22, setting a decoding module on the signal receiving module side, and connecting the signal receiving module to the decoding module;

[0115] S23, setting a data bus between the encoding module and the decoding module as a data channel between the signal initiating module and the signal receiving module;

[0116] S24. Set the encoding module to obtain the target signal generated by the signal initiating module, encode the target signal, and obtain an encoded data packet; set the data bus to transmit the encoded data packet to the decoding module; set the decoding module to decode the encoded data packet to obtain the target signal, and transmit the target signal to the signal receiving module.

[0117] In the embodiment of the present disclosure, the detailed implementation order of the solutions in the above steps S21-S24 can be adjusted according to needs and is not limited to the fixed implementation order of the above steps S21-S24.

[0118] In an embodiment of the present disclosure, the method may further include:

[0119] The number of encoding modules to be set is determined according to the number of target signals generated by the signal initiating module.

[0120] In an embodiment of the present disclosure, determining the number of encoding modules to be set according to the number of target signals generated by the signal initiating module includes:

[0121] Based on the number of target signals that each coding module can process and the maximum number of target signals that each signal initiation module can generate, the number of coding modules required for each signal initiation module is determined as the set number of coding modules corresponding to each signal initiation module.

[0122] In an embodiment of the present disclosure, each signal initiation module includes at least one signal initiation submodule; the method further includes:

[0123] Divide all signal initiating submodules into blocks according to a preset division rule; each divided block contains at least one signal initiating submodule;

[0124] Each block is regarded as a signal initiating module.

[0125] In the embodiment of the present disclosure, the division rule may include any one or more of the following:

[0126] The distance between each signal initiator module;

[0127] Whether the functions of each signal initiator module are the same;

[0128] Whether each signal initiator module uses the same clock domain; and,

[0129] Pre-set device layout requirements for signal transmission devices.

[0130] In the embodiment of the present disclosure, a data bus is set between the encoding module and the decoding module, including:

[0131] A data bus is provided in the channel between the encoding module and the decoding module.

[0132] In an embodiment of the present disclosure, setting a data bus in a channel between an encoding module and a decoding module may include:

[0133] Determining a first physical location of each encoding module and a second physical location of each decoding module;

[0134] Based on the principle that the distance between the first physical position and the second physical position is the shortest, a data bus is set in the channel between each encoding module and the decoding module closest to the encoding module.

[0135] In an embodiment of the present disclosure, the method may further include:

[0136] Based on the principle that the distance between the second physical location and the second physical location is the shortest, the decoding modules are connected.

[0137] In an embodiment of the present disclosure, the method may further include:

[0138] A multiplexer is provided between the data bus and the encoding module so as to aggregate the encoded data packets of the encoding module to the data bus through the multiplexer.

[0139] In an embodiment of the present disclosure, a multiplexer is provided between the data bus and the encoding module to aggregate the data of the encoding module to the data bus through the multiplexer, including:

[0140] Based on the principle of minimum lines and / or shortest route, a multiplexer is set between the encoding modules corresponding to multiple signal initiation modules and the data bus, so that the encoded data packets of the encoding modules corresponding to multiple signal initiation modules are aggregated to the data bus through the multiplexer.

[0141] In the embodiments of the present disclosure, any of the aforementioned data transmission method embodiments are applicable to the setting method embodiments of the signal transmission device, and will not be described one by one here.

[0142] The embodiments of the present disclosure include at least the following advantages:

[0143] 1. By encoding the target signal through the encoding module and converting it into a coded data packet for transmission, the resources occupied by data transmission can be reduced to the area resources of the data bit width, greatly saving channel resources.

[0144] 2. Further merging data through a multiplexer can further reduce channel surface resources, thereby completely converting the occupied resources into data bit width. This occupies very little channel area for medium and large chips.

[0145] 3. Transmitting coded data packets in the form of a data bus reduces the channel area occupied by the target signal wiring and reduces the design difficulty of related circuits.

[0146] 4. Based on the embodiment of the present disclosure, the direct line transmission method of interrupt signals in the related art can be changed, and the interruption is converted into a coded data packet at the interruption source, and then restored to the interruption signal at the interruption destination, thereby saving channel resources, reducing the channel area occupied by the interrupt signal wiring, and reducing the design difficulty of the interruption system in the digital system design.

[0147] Those skilled in the art will appreciate that all or some of the functional modules / units disclosed above may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0148] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation.

[0149] Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit (CPU), a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As is well known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH) or other disk storage; compact disc (CD-ROM), digital versatile disc (DVD) or other optical disc storage; magnetic cassettes, tapes, disk storage or other magnetic storage; any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, as is well known to those skilled in the art, communication media typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0150] The present disclosure has disclosed example embodiments, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly indicated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A signal transmission method, comprising: Acquire the target signal generated by the signal initiation module through the encoding module on the signal initiation module side, and encode the acquired target signal to obtain an encoded data packet; The target signal includes: an interrupt signal and / or a control signal; Transmitting the encoded data packet to the decoding module on the signal receiving module side via the data bus; The coded data packet is decoded by the decoding module to obtain the target signal, and the target signal is transmitted to the signal receiving module.

2. The signal transmission method according to claim 1, wherein: The transmitting the target signal to the signal receiving module includes: After any first decoding module obtains the target signal, if the destination of the target signal is the first signal receiving module corresponding to the first decoding module, the target signal is transmitted to the first signal receiving module.

3. The signal transmission method according to claim 1, wherein: The transmitting the target signal to the signal receiving module includes: After any second decoding module obtains the target signal, if the destination of the target signal is not the second signal receiving module corresponding to the second decoding module, the second decoding module shares the encoded data packet with all decoding modules, and the third decoding module connected to the third signal receiving module as the destination decodes the encoded data packet to obtain the target signal, and sends the target signal to the third signal receiving module.

4. The signal transmission method according to claim 1, wherein: Before transmitting the encoded data packet to the decoding module on the signal receiving module side through the data bus, the method further includes: The coded data packets of the plurality of coding modules are aggregated, and the aggregated coded data packets are transmitted to the data bus.

5. A signal transmission device, comprising: An encoding module is configured to obtain a target signal generated by the signal initiation module, encode the target signal, and obtain an encoded data packet; The target signal includes: an interrupt signal and / or a control signal; a data bus configured to transmit the encoded data packet to a decoding module; The decoding module is configured to decode the encoded data packet to obtain the target signal, and transmit the target signal to the signal receiving module.

6. The signal transmission device according to claim 5, wherein: The encoding module is arranged on the side of the signal initiating module and is connected to the signal initiating module; The decoding module is arranged on the side of the signal receiving module and is connected to the signal receiving module; The data bus is provided between the encoding module and the decoding module, and serves as a data channel between the signal initiating module and the signal receiving module.

7. The signal transmission device according to claim 6, wherein: The encoding module is arranged within a first preset range inside the signal initiation module and / or outside the signal initiation module; The decoding module is disposed inside the signal receiving module and / or within a second preset range outside the signal receiving module.

8. The signal transmission device according to claim 5, wherein: Each of the signal initiation modules is a block obtained by dividing all the signal initiation submodules into blocks, and each block includes at least one of the signal initiation submodules.

9. The signal transmission device according to claim 5, wherein: A multiplexer is provided between the data bus and the encoding module; The multiplexer is configured to aggregate the encoded data packets of the encoding module to the data bus.

10. The signal transmission device according to any one of claims 5 to 9, wherein: The signal initiation module includes a functional module and / or a first processing module; The signal receiving module includes a second processing module.

11. A method for setting up a signal transmission device, the signal transmission device being the signal transmission device according to any one of claims 5 to 10, the signal transmission device comprising a signal initiating module and a signal receiving module, the signal initiating module being configured to generate a target signal, the signal receiving module being configured to receive the target signal, the method comprising: Setting a coding module on the signal initiation module side and connecting the signal initiation module with the coding module; Setting a decoding module on the signal receiving module side and connecting the signal receiving module with the decoding module; A data bus is provided between the encoding module and the decoding module as a data channel between the signal initiating module and the signal receiving module; The encoding module is configured to obtain the target signal generated by the signal initiating module, encode the target signal, and obtain an encoded data packet; the data bus is configured to transmit the encoded data packet to the decoding module; the decoding module is configured to decode the encoded data packet to obtain the target signal, and transmit the target signal to the signal receiving module.

12. The method for setting up a signal transmission device according to claim 11, wherein: The method further comprises: The number of encoding modules to be set is determined according to the number of target signals generated by the signal initiating module.

13. The method for setting up a signal transmission device according to claim 12, wherein: The determining the number of encoding modules to be set according to the number of target signals generated by the signal initiating module includes: Based on the number of target signals that each encoding module can process and the maximum number of target signals that each signal initiation module can generate, the number of encoding modules required for each signal initiation module is determined as the set number of encoding modules corresponding to each signal initiation module.

14. The method for setting up a signal transmission device according to claim 11, wherein: Each of the signal initiation modules includes at least one signal initiation submodule; the method further includes: Dividing all the signal initiating submodules into blocks according to a preset division rule; each divided block contains at least one of the signal initiating submodules; Each of the blocks is used as a signal initiating module.

15. The method for setting up a signal transmission device according to claim 14, wherein: The division rules include any one or more of the following: The distance between each of the signal initiating submodules; Whether the functions of the signal initiating submodules are the same; Whether the signal initiating submodules use the same clock domain; and Pre-set device layout requirements for the signal transmission device.

16. The method for setting up a signal transmission device according to claim 11, wherein: The data bus is set between the encoding module and the decoding module, including: The data bus is provided in a channel between the encoding module and the decoding module.

17. The method for optimizing a signal transmission device according to claim 16, wherein: The data bus is provided in a channel between the encoding module and the decoding module, comprising: Determining a first physical position of each of the encoding modules and a second physical position of each of the decoding modules; Based on the principle that the distance between the first physical position and the second physical position is the shortest, the data bus is set in the channel between each encoding module and the decoding module closest to the encoding module.

18. The method for optimizing a signal transmission device according to claim 17, wherein: The method further comprises: Based on the principle that the distance between the second physical location and the second physical location is the shortest, the decoding modules are connected.

19. The method for optimizing a signal transmission device according to claim 11, wherein: The method further comprises: A multiplexer is provided between the data bus and the encoding module, so as to aggregate the encoded data packets of the encoding module to the data bus through the multiplexer.

20. The method for optimizing a signal transmission device according to claim 19, wherein: The step of providing a multiplexer between the data bus and the encoding module to aggregate the data of the encoding module to the data bus through the multiplexer includes: Based on the principle of minimum lines and / or shortest route, the multiplexer is set between the encoding modules corresponding to the multiple signal initiation modules and the data bus, so as to aggregate the encoded data packets of the encoding modules corresponding to the multiple signal initiation modules to the data bus through the multiplexer.

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