Display panel and detection method of routing resistance thereof

Abstract

The invention discloses a display panel and a detection method of wiring resistance of the display panel. The display panel comprises a substrate and a detection unit, the detection unit comprises a first detection line located on one side of the substrate, and the first detection line is arranged in the edge area of the display panel, the line breakage risk area or the side edge line of the end face of the substrate. The detection routing is arranged in the high-risk area, so that the detection routing and an actual working line are in the same mechanical stress environment, the resistance change of the detection routing can accurately map the breaking risk of the working line, and the problem of misjudgment caused by deviation of a measurement position in traditional detection is solved. Meanwhile, the detection wire is independent of the working circuit, so that direct piercing damage to a fragile bonding pad of the working circuit is avoided, interference of measurement current to a display signal is avoided, and therefore, accurate measurement of wire resistance in a high-wire-breakage risk area in the display panel and accurate troubleshooting of a wire fault position are realized.

Description

Technical Field

[0001] The present application relates to the technical field of display devices, and in particular to a method for detecting a display panel and trace resistance thereof. Background Art

[0002] With the development of display technology, display devices (such as mobile phones, tablets, wearable wristbands, or televisions) have been widely used, and users' requirements for display devices have gradually increased. Display devices are gradually developing towards being thinner and lighter, and featuring full screens. However, this also makes the corresponding display device manufacturing more difficult, and places higher demands on the manufacturing process and detection methods to detect problems. Summary of the Invention

[0003] The embodiments of the present application provide a method for detecting a display panel and its wiring resistance, which can effectively measure the wiring resistance in a high-breakage risk area of ​​the display panel and accurately detect the location of wiring faults.

[0004] In a first aspect, an embodiment of the present application provides a display panel comprising a substrate and a detection unit; the detection unit comprises a first detection line located on one side of the substrate, the first detection line being located in an edge area of ​​the display panel, an area at risk of line breakage, or including a side line located on an end face of the substrate.

[0005] The display panel provided by the embodiment of the first aspect of the present application realizes in-situ monitoring of high-risk areas by directly arranging the first detection line of the detection unit in the edge area of ​​the display panel, the line breakage risk area or the side line of the substrate end surface.

[0006] Since the first detection line and the actual working line are in the same mechanical stress environment, the resistance change of the first detection line can accurately map the risk of line breakage in the working line, solving the problem of misjudgment caused by the measurement position deviating from the risk area in traditional detection, and realizing accurate detection of the fault location of the line.

[0007] At the same time, the detection trace is independent of the working circuit, which not only avoids direct penetration damage to the fragile pads of the working circuit, but also eliminates the interference of the measurement current on the display signal, and realizes accurate measurement of the trace resistance in the high-breakage risk area of ​​the display panel.

[0008] In a second aspect, an embodiment of the present application provides a method for detecting the trace resistance of a display panel. The display panel includes a substrate and a detection unit. The detection unit includes a first detection trace located on one side of the substrate. The first detection trace is located in an edge area of ​​the display panel, a breakage risk area, or a side trace located on an end surface of the substrate. The detection method includes:

[0009] Detect both ends of the first detection line to obtain a resistance value of the first detection line. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The features, advantages and technical effects of exemplary embodiments of the present application will be described below with reference to the accompanying drawings.

[0011] Figure 1 This is a schematic diagram of the overall structure of a display panel provided by an embodiment of the first aspect of the present application;

[0012] Figure 2a yes Figure 1 A schematic diagram of the wiring structure of a detection unit at position A in the middle;

[0013] Figure 2b yes Figure 1 A schematic diagram of an enlarged structure at position B in the middle;

[0014] Figure 2c yes Figure 1 A schematic diagram of a cross-sectional structure along the CC direction;

[0015] Figure 2d yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0016] Figure 3a yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0017] Figure 3b yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0018] Figure 4 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0019] Figure 5 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0020] Figure 6 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0021] Figure 7 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0022] Figure 8 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0023] Figure 9 yes Figure 1Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0024] Figure 10 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0025] Figure 11 yes Figure 1 Schematic diagram of the wiring structure of another detection unit at position A in the middle;

[0026] Figure 12 This is a schematic diagram of the overall structure of the second side of a display panel provided by an embodiment of the first aspect of the present application;

[0027] Figure 13 yes Figure 12 A schematic diagram of the wiring structure of a detection unit at position D in the middle;

[0028] Figure 14 yes Figure 12 Schematic diagram of the wiring structure of another detection unit at position D in the middle;

[0029] Figure 15 This is a flow chart of a method for detecting the trace resistance of a display panel provided in an embodiment of the second aspect of the present application;

[0030] Figure 16 This is a flow chart of another method for detecting the trace resistance of a display panel provided by an embodiment of the second aspect of the present application;

[0031] Figure 17 This is a flow chart of another method for detecting the wiring resistance of a display panel provided in an embodiment of the second aspect of the present application.

[0032] in:

[0033] 100-display panel;

[0034] 10-substrate; 10a-first side; 10b-second side;

[0035] 20-detection unit; 21-first detection line; 2-detection line group; 22-second detection line; 23-third detection line;

[0036] 20a-first subsection; 20b-second subsection; 20c-third subsection; 20d-fourth subsection; 20e-fifth subsection;

[0037] 3-printed circuit board; 30-substrate; 31-integrated circuit chip;

[0038] L1-connection component; L2-side routing; L21-first side routing; L22-second side routing; L3-back routing; L4-printed circuit routing; L5-chip routing;

[0039] Pd1-first pad; Pd2-second pad;

[0040] In the drawings, like parts are given like reference numerals, but the drawings are not necessarily drawn to scale. DETAILED DESCRIPTION

[0041] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In the detailed description below, many specific details are set forth in order to provide a comprehensive understanding of the present application. However, it will be apparent to those skilled in the art that the present application can be implemented without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples of the present application. In the accompanying drawings and the following description, at least some of the well-known structures and technologies are not shown in order to avoid unnecessary ambiguity in the present application; and, for clarity, the sizes of some structures may be exaggerated. In addition, the features, structures, or characteristics described below may be combined in any suitable manner in one or more embodiments.

[0042] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.

[0043] The directional words appearing in the following description are all directions shown in the figures, and do not limit the specific structure of the display module and display device of this application. In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0044] In the related art, in the design of borderless spliced ​​public information display screens (PID), in order to pursue an extremely narrow border effect, its packaging process usually adopts chip on film (COF) and flexible printed circuit (FPC) bending technology to directly bind the driver chip to the FPC, and set the FPC on the back of the glass substrate.

[0045] This structure is applied to PID. Due to the aesthetic requirements of multiple display screens, the PID signal routing needs to detour from the front of the panel to the side of the substrate. That is, the side routing is formed on the end face of the PID display screen, and then the back line is fanned out through the back of the substrate to connect to the FPC, ensuring an extremely narrow frame.

[0046] Because the side traces need to cross the cut end surface of the glass substrate or flexible substrate, and the back traces need to be routed at a high density on the back of the substrate, both are located in areas of mechanical stress concentration, bending risk areas, and areas prone to microcracks. These areas are precisely the weak links in the bonding process that are most prone to wire breakage, cold solder joints, or poor overlap. For example, the side traces may break due to stress fatigue at the corner of the substrate, or the contact resistance at the overlap point of the back trace and the side trace may increase abnormally due to the difference in thermal expansion coefficient.

[0047] Traditional detection solutions only have detection pad groups set up at the four corners of the panel, and can only measure the resistance of the entire working path of "panel line → front pad → side trace → back line" by piercing the terminals.

[0048] Traditional detection solutions only detect overall resistance anomalies, but fail to pinpoint the specific faulty line segment. If the series resistance of the side trace and back trace exceeds the specified value, it's impossible to distinguish whether the side trace is broken, the back trace is poorly bonded, or both the side trace and back trace have defects, resulting in a lack of targeted process improvements.

[0049] Furthermore, traditional inspection methods require repeated penetration of the pads. The pads at the ends of the side traces and the back trace end are located in mechanically sensitive areas, such as at the substrate edge or at bend transitions. These multiple penetrations can easily cause surface deformation or even microcracks on the pads, introducing measurement errors and potentially damaging the already high-risk display traces, leading to the detection itself causing breakage.

[0050] Therefore, a new design scheme for detection routing is urgently needed.

[0051] In order to meet the technical needs and considerations for the above-mentioned technical problems, an embodiment of the present application provides a display panel and a method for detecting the wiring resistance of the display panel.

[0052] Figure 1FIG. 1 shows the overall structure of a display panel 100 provided by an embodiment of the first aspect of the present application. Figure 2a Shown Figure 1 A wiring structure of a detection unit 20 at position A in the middle, Figure 2b Shown Figure 1 An amplified structure at position B in the middle, Figure 2c Shown Figure 1 A cross-sectional structure along the CC direction, Figure 2d Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0053] See also Figure 1 and Figures 2a to 2d In a first aspect, an embodiment of the present application provides a display panel 100 , including a substrate 10 and a detection unit 20 .

[0054] The detection unit 20 includes a first detection line 21 located on one side of the substrate 10 . The first detection line 21 is located at an edge area of ​​the display panel 100 , a line breakage risk area, or a side line L2 located at an end surface of the substrate 10 .

[0055] The display panel 100 provided in the first aspect embodiment of the present application realizes in-situ monitoring of high-risk areas by directly arranging the first detection line 21 of the detection unit 20 in the edge area of ​​the display panel 100, the line breakage risk area or the side line L2 of the end face of the substrate 10.

[0056] Since the first detection line 21 and the actual working line are in the same mechanical stress environment, the resistance change of the first detection line 21 can accurately map the risk of line breakage of the working line, solving the misjudgment problem caused by the measurement position deviating from the risk area in traditional detection, and realizing accurate detection of the fault location of the line.

[0057] At the same time, the detection line is independent of the working line, which not only avoids direct penetration damage to the fragile pads of the working line, but also eliminates the interference of the measurement current on the display signal, and realizes accurate measurement of the line resistance in the high breakage risk area in the display panel 100.

[0058] The display panel 100 includes a substrate 10 and a detection unit 20 . The detection unit 20 includes a first detection trace 21 located at one side of the substrate 10 .

[0059] Exemplarily, the display panel 100 is composed of multiple layers of wiring layers and insulating layers alternately stacked between two adjacent wiring layers, wherein the first detection wiring 21 of the detection unit 20 is integrated into a specific wiring layer of one of the layers, and there is at least one insulating layer between the wiring layer and the glass substrate to achieve electrical isolation and pass the preparation feasibility verification.

[0060] Illustratively, the substrate 10 mentioned in the embodiment of the first aspect of the present application further includes a glass substrate and at least one insulating layer on the side of the wiring layer where the first detection wiring 21 of the detection unit 20 is located, close to the glass substrate.

[0061] The first detection traces 21 are arranged at the edge area of ​​the display panel 100 , the line breakage risk area, or the side traces L2 of the end surface of the substrate 10 .

[0062] Exemplarily, the edge area of ​​the display panel 100 refers to the non-display area where the width of the outer edge of the substrate 10 is less than 200 μm. The edge area is subjected to mechanical stress concentration due to the need to accommodate packaging processes such as side routing L2, FPC, and COF binding. Microcracks are easily generated on the cut end surface of the substrate 10, making it a high-incidence area for wire breaks.

[0063] For example, the wire breakage risk areas specifically include: stress concentration areas at the corners of the substrate 10, heterogeneous material interface areas where the fan-out back line and the side trace L2 overlap, and fatigue failure areas at the repeated bending positions of the FPC.

[0064] Further specific definitions of the edge area and the disconnection risk area of ​​the display panel 100 in the embodiment of the first aspect of the present application will be further elaborated in other embodiments of the first aspect of the present application.

[0065] For example, see Figure 2b In an embodiment where the first detection line 21 also includes a back line L3, L3 is located on the non-light-emitting side of the display panel 100 and in a corner area where two edges of the display panel 100 intersect. Both ends of the back line L3 extend to an edge position of the display panel 100, and one end of the back line L3 is connected to the side line, which can further truly reflect the risk of wire breakage caused by stress concentration in the corner area of ​​the substrate 10 or the display panel 100.

[0066] For example, the side trace L2 on the end face of the substrate 10 adopts the same preparation process as the working circuit of the display panel 100. The conductive layer is deposited and patterned on the side of the substrate 10 through the same photomask process, ensuring that the detection trace experiences the same thermal stress, etching deviation and film thickness fluctuation, thereby truly mapping the risk of disconnection of the working circuit.

[0067] The first detection trace 21 of the detection unit 20 is independent of the working circuit. Although the two are prepared on the same layer, they are physically separated.

[0068] When the detection unit 20 is working, the current flows through the first detection trace 21 without being coupled to the adjacent working traces, thereby preventing interference with the display signal.

[0069] Exemplarily, the first detection trace 21 extends along an edge of the substrate 10 or crosses a wire-breakage risk area.

[0070] At the end surface of the substrate 10 , the first detection line 21 is arranged in parallel with the side line L2 of the working circuit, and simultaneously withstands the substrate 10 environment of the residual stress of cutting.

[0071] At the repeatedly bent position of the FPC or the overlap position of the fan-out back line and the side line L2, the first detection line 21 simulates the bending curvature or overlap process of the working line, so that the two are subjected to the same deformation load or working environment.

[0072] By measuring the resistance change of the first detection trace 21 , the failure probability of the working circuit in the risk area can be directly inverted.

[0073] For example, when a microcrack appears at a corner of the substrate 10 , the resistance of the first detection trace 21 will increase synchronously, and the magnitude of the change is positively correlated with the risk of breakage of the working circuit.

[0074] Since the first detection trace 21 accurately covers the physical risk path of the working circuit, its resistance anomaly can be directly located to a specific failure point, thereby accurately determining the cause of the failure.

[0075] At the same time, the detection process does not require contact with the fragile pads of the working line located in the edge area, the line break risk area or the side routing L2 position. Only a single penetration measurement is required on the dedicated pad of the detection unit 20, which avoids mechanical damage and improves operational efficiency.

[0076] Illustratively, the pad and the trace are manufactured using the same process, the pad is relatively thick, and the trace is relatively thin, and the pad is only a portion of the trace that is thickened for the convenience of welding.

[0077] Optionally, in the display panel 100 during the process verification stage, the pads may also be solder pads prepared in a single process step, so as to facilitate manual verification by technicians.

[0078] The specific morphology of the pad will be further described in other embodiments of the first aspect of this application.

[0079] Illustratively, the display panel 100 provided in the embodiment of the first aspect of the present application is a display panel 100 using light-emitting diodes as light-emitting elements, including micro light-emitting diodes (Micro-LEDs), mini light-emitting diodes (Mini-LEDs) or ordinary light-emitting diodes (LEDs), wherein the size of a single light-emitting diode of a MicroLED is less than 50 microns, and the size of a single light-emitting diode of a MiniLED is between 100 microns and 200 microns.

[0080] Illustratively, the display panel 100 provided in the embodiment of the first aspect of the present application is a PID screen, and materials such as glass are used as the rigid substrate of the display panel 100 .

[0081] Exemplarily, the working circuit adjacent to the detection unit includes at least one side line prepared by the same process as the first detection line in the detection unit, and the working circuit also includes a back line connected to one end of the side line, a line on the printed circuit board, a connecting line of the chip area on the printed circuit board, and a panel circuit of the display panel connected to the other end of the side line, etc.

[0082] Optionally, in the working circuit, the panel circuit connected to the side routing includes but is not limited to a multiplexing unit (Demultiplexer, Demux), an electrostatic discharge circuit unit (Electo-Static Discharge, ESD), a pixel circuit unit, a shift register unit (VSR), etc. The side routing can be flexibly allocated according to the position of the working circuit and working needs.

[0083] Optionally, the display panel 100 provided in the embodiment of the first aspect of the present application can also be other display panels 100 such as an organic light-emitting diode (OLED), a quantum dot organic light-emitting diode (QD-OLED), or a liquid crystal panel (LCD).

[0084] Optionally, the display panel 100 provided in the embodiment of the first aspect of the present application may further include a substrate made of a flexible material, and the first detection line 21 may further be arranged at a repeatedly bent position of the display panel 100 as a newly added line breakage risk area.

[0085] It should be noted that, in order to facilitate the display of the wiring structure of the detection unit 20 in the display panel 100 provided in the embodiment of the first aspect of the present application and the reader's understanding, Figure 2a and Figure 2d The light-emitting side, end face, and backlight side of the display panel 100 are shown in the same plane, and Figure 2a and Figure 2d Only a partial structure of the display panel is shown instead of the complete structure, and the dotted edge in the figure is not the actual edge of the display panel.

[0086] The dotted edges in other drawings of the display panel provided in the following embodiments of the first aspect of the present application are also applicable to the above description and will not be repeated in the subsequent embodiments of the first aspect of the present application.

[0087] Figure 3a Shown Figure 1 Another wiring structure of the detection unit at position A in the middle.

[0088] Please continue reading Figure 3a In some embodiments, the substrate 10 includes a first side 10 a and a second side 10 b that are oppositely arranged along its thickness direction. The first side 10 a is a side facing the light emitting side of the display panel 100 .

[0089] The first detection trace 21 includes a connection component L1 and two side traces L2 connected by the connection component L1 . The connection component L1 is located on the first side 10 a .

[0090] In these embodiments, the first detection line 21 is used to implement path detection for the risk of line breakage at the side line L2, and the two side lines L2 are connected by the connecting component L1, without the need to insert detection terminals into the opposite first side 10a and second side 10b of the display panel 100 respectively, further simplifying the detection method and helping to improve detection efficiency.

[0091] The connecting component L1 directly bridges the two side traces L2 on the front side of the substrate 10, i.e., the first side 10a, so that the detection current forms a complete loop of "the second side 10b pad → the first side trace L2 → the connecting component L1 → the second side trace L2 → the second side 10b pad".

[0092] The design of the connection component L1 simplifies the traditional inspection process that requires operation across both the front and back sides to a single-sided process: the inspection terminal only needs to penetrate the pad group on the same plane of the second side 10b to measure the overall resistance state of the side trace L2, completely avoiding the operational risks of simultaneously inserting the probe needle on the front and back sides of the substrate 10, that is, the first side 10a and the second side 10b.

[0093] Exemplarily, the connection component L1 is patterned and prepared by using the same process as the metal routing on the same layer as the working circuit.

[0094] When the connecting component L1 crosses the area between the side traces L2, it also synchronously replicates the stress distribution characteristics of the working line, so that the detection trace is subjected to mechanical loads that are completely consistent with the actual working line at the bending points, cutting end faces and other risk areas of breakage or at the edge areas, thereby accurately capturing hidden dangers such as microcrack initiation or lap interface degradation.

[0095] Exemplarily, in the first detection trace 21, a solder pad is formed between the connecting component L1 and the side trace L2 or at one end of the side trace L2. The solder pad and the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the side trace L2 and the connecting component L1 are relatively thin, which is convenient for penetration detection.

[0096] For example, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are located in the same pad group, the side routing L2 and the side routing L2 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the side routing L2 and the side routing L2 at the same position in the working circuit of the display panel 100 are located in the same routing group, which further truly reflects the risk of wire breakage in the layout area.

[0097] Please continue reading Figure 3a In some embodiments, the two side traces L2 are arranged adjacent to each other.

[0098] In these embodiments, the two side lines L2 for the first detection line 21 are arranged adjacent to each other, which can further focus on reflecting the risk of line breakage at nearby positions and is more meaningful for reference.

[0099] Exemplarily, the two side traces L2 used for the first detection trace 21 are arranged adjacent to each other, and the spacing between the two side traces L2 is less than or equal to the standard trace spacing of the working circuit.

[0100] The dense arrangement of the two side traces L2 enables the first detection trace 21 to focus on a specific high-risk sub-region, thereby enhancing the capture sensitivity of local failure signals through physical proximity.

[0101] When the substrate 10 is subjected to mechanical risks such as bending or environmental risks such as temperature changes, the two adjacent side traces L2 are subjected to synchronous mechanical loads at the same position, and their resistance changes show a strong correlation, ensuring that the two adjacent side traces L2 reproduce the actual arrangement density and environmental stress state of the working circuit in a very small area.

[0102] For example, the design of two adjacent side lines L2 is particularly suitable for detecting the corner area where the edges of the display panel 100 intersect. The working line here is most likely to break due to the sudden change in curvature, and the adjacent detection lines cover this area with a higher density, thereby improving the risk perception resolution per unit area and providing more precise failure location data for process optimization.

[0103] Please continue reading Figure 3a In some embodiments, the first detection trace 21 includes a first pad Pd1 located on the first side 10a, the first pad Pd1 is located between an end of the side trace L2 close to the connection component L1 and the connection component L1, and the first pad Pd1 is connected to the connection component L1 and the side trace L2.

[0104] In these embodiments, the arrangement of the first pad Pd1 further facilitates detection of the via at the location of the connection component L1.

[0105] The first pad Pd1 is located at the key node of stress conduction, namely the interface transition zone between the connecting component L1 and the side trace L2, where microcracks or contact failure are most likely to occur due to differences in material thermal expansion coefficients and bending stress concentration.

[0106] When the detection terminal penetrates the first pad Pd1, the current flows through a local sub-path precisely defined as "first pad Pd1→connection component L1→first pad Pd1", thereby directly capturing the resistance characteristics of the connection interface.

[0107] The setting of the first pad Pd1 can further transform the overall detection of the entire side trace L2 loop into a directional detection of the microscopic connection reliability. If an abnormality occurs in the overlapping interface between the connection component L1 and the side trace L2, the resistance value measured by the first pad Pd1 will increase.

[0108] Since the first pad Pd1 is closer to the overlapping position of the connecting component L1 and the side trace L2, the sensitivity of the first pad Pd1 is higher than that of the pad at the end of the first detection trace 21 away from the connecting component L1. The pad at the end of the first detection trace 21 away from the connecting component L1 can be the pad at the end of the side trace L2 away from the connecting component L1, or it can be other pads at the end of the side trace L2 away from other traces connected to the end of the side trace L2 away from the connecting component L1.

[0109] The embodiment in which the end of the side line L2 away from the connection component L1 is connected to other lines will be further described in other embodiments of the first aspect of the present application below.

[0110] Exemplarily, the first pad Pd1 and the side trace L2 or the connecting component L1 are manufactured using the same process. The first pad Pd1 is thicker, while the side trace L2 and the connecting component L1 are thinner, which facilitates penetration detection.

[0111] In other words, the width of the first pad Pd1 is greater than the width of the trace, and the width direction is the arrangement direction of the side trace L2 and is perpendicular to the extension direction of the side trace L2.

[0112] For example, the first pad Pd1 arranged at this position and the pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow. The first pad Pd1 arranged at this position and the pad at the same position in the working circuit of the display panel 100 are located in the same pad group, which further truly reflects the risk of wire breakage in the layout area.

[0113] This embodiment is suitable for detecting disconnection risks or failures caused by cracks in the edge area of ​​the display panel 100 .

[0114] Please continue reading Figure 3aIn some embodiments, the first pad Pd1 is integrally formed with the connection component L1.

[0115] In these embodiments, the first pad Pd1 and the side trace L2 or the connection component L1 are formed by the same process. The first pad Pd1 is thicker, while the side trace L2 and the connection component L1 are thinner, further improving the manufacturing efficiency.

[0116] Figure 3b Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0117] See also Figure 3b In some embodiments, the first detection trace 21 further includes a back trace L3 located on the second side 10 b , and one end of the back trace L3 is connected to the side trace L2 .

[0118] In these embodiments, the first detection trace 21 further introduces the back trace L3 , further expanding the detection area to the overlap position of the back trace L3 and the side trace L2 or the arrangement area of ​​the back trace L3 .

[0119] The back trace L3 runs along the back side of the substrate 10, i.e., the second side 10b, and extends to the edge of the bonding area along the fan-out direction, completely covering the overlap interface between the back trace L3 and the side trace L2 in the working circuit and the back trace fatigue area and other risk areas of disconnection.

[0120] When the detection current flows in from the second side 10b pad, it flows through the back trace L3, the overlapping interface, the side trace L2, the connection component L1, the side trace L2, the overlapping interface and the back trace L3 in sequence, and finally returns to the second side 10b pad on the other side to form a closed loop path, so that the measurement value simultaneously includes three key failure locations: the stress crack at the corner of the side trace L2, the contact resistance of the heterogeneous material overlapping interface, and the fatigue damage in the back line fatigue zone.

[0121] The path design of the first detection line 21 including the back side line L3 further expands the detection range from a single side to the risk areas on both the front and back sides, further clearly indicating the overall bonding process defects.

[0122] For example, the back trace L3 and the side trace L2 adopt an inverted trapezoidal overlap structure at the end surface, and the contact area of ​​the back trace L3 and the side trace L2 is completely consistent with the working circuit in the display panel 100, so that the detection results can be directly used for process optimization.

[0123] Exemplarily, in the first detection trace 21, a solder pad is formed between the connecting component L1 and the side trace L2, between the side trace L2 and the back trace L3, or at one end of the back trace L3. The solder pad and the back trace L3, the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the size of the back trace L3, the side trace L2 and the connecting component L1 is relatively thin, which is convenient for penetration detection.

[0124] Exemplarily, the solder pad arranged at this position is prepared and formed in the same process flow as the solder pad at the same position in the working circuit of the display panel 100, and the solder pad arranged at this position is located in the same pad group as the solder pad at the same position in the working circuit of the display panel 100. The side routing L2 is prepared and formed in the same process flow as the side routing L2 at the same position in the working circuit of the display panel 100, and the side routing L2 is located in the same routing group as the side routing L2 at the same position in the working circuit of the display panel 100. The back routing L3 is prepared and formed in the same process flow as the back routing L3 at the same position in the working circuit of the display panel 100, and the back routing L3 is located in the same routing group as the back routing L3 at the same position in the working circuit of the display panel 100, which further truly reflects the risk of wire breakage in the layout area.

[0125] Please continue reading Figure 3b In some embodiments, the first detection trace 21 further includes a second pad Pd2 located on the second side 10b, the second pad Pd2 is located at an end of the back trace L3 away from the side trace L2, and the back trace L3 is connected to the second pad Pd2.

[0126] In these embodiments, the arrangement of the second pads Pd2 further facilitates the detection of the complete path formed by the connection component L1, the side traces L2 and the back traces L3.

[0127] When the detection terminal penetrates the second pad Pd2, the current forms a complete path along "second pad Pd2 → back trace L3 → overlapping interface → side trace L2 → first side 10a pad → connection component L1 → first side 10a pad on the other side → side trace L2 → overlapping interface → other side back trace L3 → other side second pad Pd2", thereby further covering the risk areas on both sides of the substrate 10.

[0128] The terminal positioning of the second pad Pd2 makes it a detection point for the cumulative effect of back line fatigue. Under the fatigue condition of repeated bending of the FPC, the back line L3 undergoes plastic deformation. The second pad Pd2 can accurately capture the working condition changes of the back line L3.

[0129] At the same time, the setting of the second pad Pd2 incorporates the contact resistance of the overlapping interface into the path of the first detection line 21. When micro-area voids appear in the back line L3 and the side line L2, the abnormal increase in resistance measured by the second pad Pd2 is more accurate than the detection of the side line L2.

[0130] Illustratively, the second pad Pd2 adopts a metal stacking structure, which maintains stable contact characteristics at the bonding temperature, ensuring the reliability of long-term detection.

[0131] Exemplarily, the area of ​​the second pad Pd2 is larger than the area of ​​the first pad Pd1, which further facilitates the detection of the entire loop of the first detection trace 21 including the back trace L3, while avoiding the risk of inaccurate measurement results caused by excessive fluctuations in the contact resistance of the second pad Pd2 due to penetration into the second pad Pd2.

[0132] Exemplarily, the second pad Pd2 and the back trace L3 are manufactured by the same process. The second pad Pd2 is thicker, while the back trace L3 is thinner, which is convenient for penetration detection.

[0133] For example, the second pad Pd2 arranged at this position and the pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow. The second pad Pd2 arranged at this position and the pad at the same position in the working circuit of the display panel 100 are located in the same pad group, which further truly reflects the risk of wire breakage in the layout area.

[0134] Please continue reading Figure 3b In some embodiments, the second pad Pd2 and the back trace L3 are integrally formed.

[0135] In these embodiments, the second pad Pd2 and the back trace L3 are formed by the same process. The second pad Pd2 is thicker, while the back trace L3 is thinner, which further improves the manufacturing efficiency.

[0136] Figure 4 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0137] See also Figure 4 In some embodiments, the display panel 100 further includes a printed circuit board 3 disposed on the second side 10b. The printed circuit board 3 includes a substrate 30 and a printed circuit trace L4 located on a side of the substrate 30 away from the second side 10b. The printed circuit trace L4 is connected to an end of the back trace L3 away from the side trace L2.

[0138] The first detection trace 21 further includes a printed circuit trace L4 connected to the back trace L3 .

[0139] In these embodiments, the first detection trace 21 further introduces the printed circuit trace L4, further expanding the detection area to the overlapping position of the back trace L3 and the printed circuit trace L4 or the layout area of ​​the printed circuit trace L4.

[0140] Exemplarily, the display panel 100 is attached to a printed circuit board 3 on the second side 10 b of the substrate 10 . The printed circuit board 3 includes a base material 30 made of a polyimide material and printed circuit traces L4 on the surface of the base material 30 .

[0141] Exemplarily, the printed circuit trace L4 is crimped and bound to the end of the back trace L3 through an anisotropic conductive adhesive film, so that the first detection trace 21 is further extended to cover the area of ​​the printed circuit board 3 .

[0142] The printed circuit trace L4 replicates the serpentine bending path of the working circuit on the printed circuit board 3 with the same line width and spacing, and simultaneously withstands equivalent mechanical fatigue in the dynamic bending lamp test.

[0143] When the detection current starts from one side of the printed circuit trace L4, it flows through the back trace L3, the side trace L2, the connecting component L1, the other side trace L2, the other back trace L3, and then is introduced into the other side printed circuit trace L4.

[0144] The design of the first detection line 21 introduced into the printed circuit line L4 incorporates at least the following failure risks into single-channel monitoring: micro cracks on the end surface of the substrate 10, delamination of the circuit and the bonding interface on the second side 10b of the substrate 10, and fatigue fracture of the copper line of the printed circuit board 3.

[0145] Furthermore, the first detection trace 21 is particularly targeted at bonding process defects, such as contact failure caused by uneven distribution of conductive particles at the overlap position of the back trace L3 and the printed circuit trace L4.

[0146] For example, the printed circuit trace L4 is designed to be widened and strain-resistant at the bend of the printed circuit board 3 , and the curvature radius of the printed circuit trace L4 is consistent with the actual working line.

[0147] Exemplarily, in the first detection trace 21, a solder pad is formed between the connecting component L1 and the side trace L2, between the side trace L2 and the back trace L3, between the back trace L3 and the printed circuit trace L4, or at one end of the printed circuit trace L4. The solder pad and the printed circuit trace L4, the back trace L3, the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the size of the printed circuit trace L4, the back trace L3, the side trace L2 and the connecting component L1 are relatively thin, which is convenient for penetration detection.

[0148] Exemplarily, the solder pad arranged at this position is prepared and formed in the same process as the solder pad at the same position in the working circuit of the display panel 100, and the solder pad arranged at this position is located in the same pad group as the solder pad at the same position in the working circuit of the display panel 100. The side trace L2 is prepared and formed in the same process as the side trace L2 at the same position in the working circuit of the display panel 100, and the side trace L2 is located in the same trace group as the side trace L2 at the same position in the working circuit of the display panel 100. The back trace L3 is prepared and formed in the same process as the back trace L3 at the same position in the working circuit of the display panel 100, and the back trace L3 is located in the same trace group as the back trace L3 at the same position in the working circuit of the display panel 100. The printed circuit trace L4 is prepared and formed in the same process as the printed circuit trace L4 at the same position in the working circuit of the printed circuit board 3, and the printed circuit trace L4 is located in the same trace group as the printed circuit trace L4 at the same position in the working circuit of the display panel 100, which further truly reflects the risk of wire breakage in the layout area.

[0149] Figure 5 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0150] See also Figure 5 In some embodiments, the display panel 100 further includes a chip trace L5 and an integrated circuit chip 31 located on a side of the substrate 30 away from the second side 10b, and the chip trace L5 is connected to an end of the printed circuit trace L4 away from the back trace L3.

[0151] The first detection trace 21 further includes a chip trace L5 connected to the printed circuit trace L4.

[0152] In these embodiments, the first detection trace 21 is further introduced into the chip trace L5, further expanding the detection area to the overlapping position of the chip trace L5 and the printed circuit trace L4 or the layout area of ​​the chip trace L5.

[0153] Illustratively, the printed circuit traces L4 are interconnected with the chip traces L5 via a micro-bump array. The chip traces L5 are routed on the substrate 30 and connected to bonding points of the integrated circuit chip 31 .

[0154] The first detection trace 21 further introduces the chip trace L5 design so that the detection path spans at least the following failure locations. The current starts from the side trace L2 of the substrate 10, passes through the back trace L3 and the overlapping position on the second side 10b of the substrate 10, the bending area of ​​the printed circuit board 3, the press-fit area between the printed circuit trace L4 and the chip trace L5, and the chip trace L5 itself, and finally reaches the pin of the integrated circuit chip 31.

[0155] Exemplarily, the chip trace L5 adopts a redundant trace prepared with the same mask as the chip signal line in the working circuit, and simultaneously withstands thermal stress and mechanical pressure during the bonding hot pressing process. The resistance change of the chip trace L5 accurately maps at least the following core risks: contact failure between the printed circuit trace L4 and the chip trace L5 caused by micro-bump voids, breakage of the chip trace L5, and breakage at the pin position of the integrated circuit chip 31.

[0156] Exemplarily, in the first detection trace 21, a solder pad is formed between the connecting component L1 and the side trace L2, between the side trace L2 and the back trace L3, between the back trace L3 and the printed circuit trace L4, between the printed circuit trace L4 and the chip trace L5, or at one end of the chip trace L5. The solder pad and the chip trace L5, printed circuit trace L4, back trace L3, side trace L2 or connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the size of the chip trace L5, printed circuit trace L4, back trace L3, side trace L2 and connecting component L1 is relatively thin, which is convenient for penetration detection.

[0157] Exemplarily, the pad arranged at this position and the pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process, and the pad arranged at this position and the pad at the same position in the working circuit of the display panel 100 are located in the same pad group;

[0158] The side trace L2 and the side trace L2 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process, and the side trace L2 and the side trace L2 at the same position in the working circuit of the display panel 100 are located in the same trace group;

[0159] The back trace L3 and the back trace L3 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process, and the back trace L3 and the back trace L3 at the same position in the working circuit of the display panel 100 are located in the same trace group;

[0160] The printed circuit trace L4 and the printed circuit trace L4 at the same position in the working circuit on the printed circuit board 3 are prepared and formed in the same process. The printed circuit trace L4 and the printed circuit trace L4 at the same position in the working circuit of the display panel 100 are located in the same trace group.

[0161] The chip trace L5 and the chip trace L5 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow. The chip trace L5 and the chip trace L5 at the same position in the working circuit of the display panel 100 are located in the same trace group, which further truly reflects the risk of line breakage in the layout area.

[0162] See also Figures 2a to 2d 、 Figure 3a to Figure 3band Figures 4 and 5 In some embodiments, the end of the first detection line 21 is insulated from other structures of the display panel 100 .

[0163] In these embodiments, the first detection traces 21 are kept at intervals to ensure that no crosstalk occurs with the actual working circuit, thereby further ensuring the independence of the detection results.

[0164] The first detection trace 21 maintains physical insulation isolation from the functional structure of the display panel 100 at its end and in its extension path, ensuring that the detection current is strictly confined within the dedicated trace.

[0165] When the detection terminal applies a test current to the first detection trace 21 , the coupling noise of other signal lines with adjacent spacing is low, thereby eliminating the display screen flickering problem caused by crosstalk in traditional solutions.

[0166] In the non-display area at the edge of the substrate 10 , the first detection trace 21 adopts a serpentine design, and its closest distance to the bonding pin is controlled above the safe threshold of the dielectric strength of the insulation layer, and will not cause dielectric breakdown even under high-frequency detection pulses.

[0167] The insulation design of the first detection trace 21 enables the detection unit 20 to maintain the signal integrity of the working line in a continuous operation state, and especially ensures the transmission stability of the driving current.

[0168] Exemplarily, the end positions are at both ends of the connecting component L1 , and the end positions of the first detection line 21 are insulated from the adjacent side lines L2 on both sides.

[0169] Exemplarily, the end position is at one end of the side wiring L2 located on the second side 10 b , and the end position of the first detection wiring 21 is insulated from the side wiring L2 adjacent to both sides.

[0170] Exemplarily, the end position is at one end of the back wiring L3 away from the side wiring L2 , and the end position of the first detection wiring 21 is insulated from the back wiring L3 adjacent to both sides.

[0171] Exemplarily, the end position is at one end of the printed circuit line L4 away from the back line L3 , and the end position of the first detection line 21 is insulated from the printed circuit lines L4 adjacent to both sides.

[0172] Exemplarily, the end position is at one end of the chip trace L5 away from the printed circuit trace L4 , and the end position of the first detection trace 21 is insulated from the chip traces L5 adjacent on both sides.

[0173] Figure 6 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0174] See also Figure 6 In some embodiments, the detection unit 20 further includes a detection trace group 2, the first detection trace 21 includes a first sub-segment 20a and a second sub-segment 20b connected to at least one end of the first sub-segment 20a, and the detection trace group 2 has the same structure as the second sub-segment 20b.

[0175] In these embodiments, a detection trace group 2 is further introduced. By subtracting the resistance value obtained by the overall measurement of the first detection trace 21 from the resistance value of the detection trace group 2, the resistance value of the first sub-segment 20a as the actual target segment can be obtained. At the same time, the pad at at least one end of the first sub-segment 20a will not be damaged by the inserted detection terminal and will remain in the actual working state, further reflecting the actual detection resistance value of the first sub-segment 20a.

[0176] The detection unit 20 further includes a detection routing group 2. The detection routing group 2 has the same structure as the second sub-segment 20b. It should be understood that the routing in the detection routing group 2 and the second sub-segment 20b in the first detection routing 21 use exactly the same layout design and preparation process. The two are synchronously patterned on the substrate 10 through the same mask process to ensure consistency in line width, thickness and material composition.

[0177] The length deviation of the detection trace group 2 and the second sub-segment 20b is controlled within the range of photolithography overlay accuracy, so that the resistance difference is smaller than the process fluctuation threshold and is controlled within the allowable error range.

[0178] The first detection trace 21 includes a first sub-segment 20a and a second sub-segment 20b connected end to end, and the detection trace group 2 is composed of a replica of the second sub-segment 20b independent of the first sub-segment 20a.

[0179] When performing resistance measurement, the detection terminal only needs to penetrate the pad of the detection trace group 2 to obtain the reference resistance value of the second sub-segment 20b, and then penetrate the pads at both ends of the first detection trace 21 to obtain the total resistance value of the first detection trace 21 including the first sub-segment 20a and the second sub-segment 20b. The resistance value of the second sub-segment 20b can be accurately obtained through differential calculation.

[0180] This embodiment adopts a non-invasive measurement method, using a pad at at least one end of the first subsection 20a to completely avoid detection terminal penetration, thereby avoiding the risk of pad microcracks or contact resistance drift caused by probe indentation in traditional solutions.

[0181] At the same time, since the second sub-segment 20b and the detection trace group 2 have the same process fluctuation characteristics, the resistance difference between the second sub-segment 20b and the detection trace group 2 is automatically offset in the differential calculation, further improving the measurement accuracy of the first sub-segment 20a.

[0182] Finally, the pad at at least one end of the first sub-segment 20a that is not damaged by the penetration maintains the original bonding state, and its resistance data can more accurately reflect the actual state of the working circuit after long-term thermal cycling.

[0183] Please continue reading Figure 6 In some embodiments, the first detection trace 21 includes a connection component L1 and a side trace L2 connected to the connection component L1.

[0184] The first sub-segment 20a is the side trace L2, and the second sub-segment 20b is the connection component L1 connected to the side trace L2.

[0185] In these embodiments, the side trace L2 serves as the first sub-segment 20a. While differentially calculating the resistance of the single side trace L2, it can effectively protect the pad between the side trace L2 and the connection component L1 from being affected by the penetration of the detection terminal, thereby avoiding affecting the measurement results.

[0186] The first detection trace 21 is composed of a side trace L2 as a first sub-segment 20 a and a connection component L1 connected to the side trace L2 as a second sub-segment 20 b .

[0187] Exemplarily, the connection component L1 is located on the front side of the substrate 10, i.e., the first side 10a, and is connected to the interface of the side trace L2 through an inverted trapezoidal overlap structure. The overlap interface area between the connection component L1 and the side trace L2 becomes a high-risk area for microcrack initiation due to the difference in thermal expansion coefficients of heterogeneous materials.

[0188] During testing, first, the detection terminals are inserted into the pads at both ends of a connection component L1 in the detection trace group 2 to obtain the resistance value of the second sub-segment 20b, and then the overall resistance value is measured at the total path pad of the first detection trace 21. Through differential calculation, the resistance value of the first detection trace 21 is subtracted from the resistance value of the second sub-segment 20b to accurately extract the resistance value of the first sub-segment 20a, that is, the single side trace L2.

[0189] The design scheme of the detection unit 20 routing structure using differential calculation can completely avoid probe penetration at the bonding point at at least one end of the side routing L2, avoiding micro cracks and contact resistance drift caused by probe indentation in traditional schemes.

[0190] Furthermore, the side trace L2 that is not mechanically damaged reproduces a resistance change curve synchronized with the working circuit in the temperature cycle test, and the working state recorded by the first detection trace 21 can more realistically reflect the working state of the actual working circuit.

[0191] Finally, the connecting component L1 of the second sub-segment 20b in the first detection trace 21 and the replica of the second sub-segment 20b in the detection trace group 2 are prepared using the same mask, and the line width deviation between the two is within the allowable error range, so that the differential calculation automatically eliminates the reference error introduced by uneven etching.

[0192] For example, the inverted trapezoidal overlap structure of the connection component L1 can also synchronously reproduce the interface stress distribution of the working circuit, so that the detection data of the detection unit 20 can be directly used for optimizing the bonding process parameters of the working circuit.

[0193] Exemplarily, in the first detection trace 21 and the detection trace group 2, a solder pad is formed between the connecting component L1 and the side trace L2, or at one end of the connecting component L1 or the side trace L2. The solder pad and the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the size of the side trace L2 and the connecting component L1 is relatively thin, which is convenient for penetration detection.

[0194] For example, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are located in the same pad group, the side routing L2 and the side routing L2 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the side routing L2 and the side routing L2 at the same position in the working circuit of the display panel 100 are located in the same routing group, which further truly reflects the risk of wire breakage in the layout area.

[0195] Figure 7 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0196] See also Figure 7 In some embodiments, the substrate 10 includes a first side 10a and a second side 10b that are oppositely arranged along its thickness direction. The first side 10a is the side facing the light-emitting side of the display panel 100. The first detection trace 21 includes a connecting component L1 and two side traces L2 connected by the connecting component L1. The connecting component L1 is located on the first side 10a.

[0197] The first sub-segment 20a is a side trace L2, and the second sub-segment 20b is a connecting component L1 connected between two side traces L2.

[0198] In these embodiments, the side trace L2 continues to serve as the first sub-segment 20a, but during measurement, only the ends of the two side traces L2 away from the connection component L1 need to be measured from the second side 10b. When measuring the detection trace group 2, only the two ends of the connection component L1 need to be measured from the first side 10a. While the differential calculation measures the twice resistance value of the side trace L2, it can also effectively protect the pad between the side trace L2 and the connection component L1 from being affected by the penetration of the detection terminal, thereby avoiding affecting the measurement results.

[0199] The side trace L2 as the first sub-segment 20a extends across the end surface of the substrate 10 to the second side 10b. The connecting component L1 as the second sub-segment 20b is on the front side of the substrate 10, that is, the first side 10a, bridging the two side traces L2 to form a "U"-shaped structure.

[0200] During actual testing, the resistance of the second sub-segment 20b, that is, the resistance of the connecting component L1 itself, is first obtained by inserting the terminals into the pads at both ends of the connecting component L1 in the detection trace group 2. Then, the total resistance of the first detection trace 21 is measured at the pads at the ends of the two side traces L2 on the second side 10b. The total resistance includes the resistance of the two side traces L2 and the resistance of the connecting component L1. The resistance of the side trace L2 is accurately extracted through differential calculation, and then divided by the number of side traces L2 to obtain the average resistance of a single side trace L2.

[0201] The bridge design of the connection component L1 completely concentrates the detection operation on a single side of the substrate 10. The measurement of the second sub-segment 20b is completed on the first side 10a, and the total path measurement of the first detection trace 21 is completed on the second side 10b, so that the pads at the overlapping interface between the side trace L2 and the connection component L1 avoid probe contact.

[0202] The pads of the joint interface that are not mechanically damaged truly reflect the working conditions of the working circuit during the temperature cycle test.

[0203] At the same time, the connection component L1 adopts a redundant design with the same mask as the working line, and its line width deviation is controlled within the allowable error range, ensuring that the differential calculation automatically eliminates the process fluctuation error.

[0204] Exemplarily, in the first detection trace 21 and the detection trace group 2, a solder pad is formed between the connecting component L1 and the side trace L2, or at one end of the connecting component L1 or the side trace L2. The solder pad and the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the size of the side trace L2 and the connecting component L1 is relatively thin, which is convenient for penetration detection.

[0205] For example, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are located in the same pad group, the side routing L2 and the side routing L2 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the side routing L2 and the side routing L2 at the same position in the working circuit of the display panel 100 are located in the same routing group, which further truly reflects the risk of wire breakage in the layout area.

[0206] For example, the side lines L2 located on the same first detection line 21 are arranged adjacent to each other, which can more concentratedly reflect the line breakage risk and working environment of a specific area of ​​the end surface of the display panel 100.

[0207] Figure 8 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle, Figure 9 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0208] See also Figure 8 and Figure 9 In some embodiments, the substrate 10 includes a first side 10a and a second side 10b that are opposite to each other along its thickness direction, the first side 10a is the side facing the light-emitting side of the display panel 100, and the first detection trace 21 includes a connecting component L1 and two back traces L3 connected by the connecting component L1, and the back trace L3 is located on the second side 10b.

[0209] The first sub-segment 20a is the backside trace L3, and the second sub-segment 20b is the connecting component L1 connected between two backside traces L3.

[0210] In these embodiments, the back trace L3 serves as the first sub-segment 20a, but during measurement, only the ends of the two back traces L3 away from the connection component L1 need to be measured from the second side 10b. When measuring the detection trace group 2, only the two ends of the connection component L1 need to be measured from the second side 10b. While differential calculation is used to measure twice the resistance of the side trace L2, the pad between the side trace L2 and the connection component L1 can also be effectively protected from being affected by the penetration of the detection terminal, thereby avoiding affecting the measurement results.

[0211] The back trace L3 extends on the second side 10b, and the connecting component L1 serves as a second sub-segment 20b on the back side of the substrate 10, ie, the second side 10b, bridging the two back traces L3 to form a "U"-shaped structure.

[0212] During actual testing, the resistance of the second sub-segment 20b, that is, the resistance of the connecting component L1 itself, is first obtained by inserting the terminals into the pads at both ends of the connecting component L1 in the detection trace group 2. Then, the total resistance of the first detection trace 21 is measured at the pads at the ends of the two back traces L3 on the second side 10b. The total resistance includes the resistance of the two back traces L3 and the resistance of the connecting component L1. The resistance of the back trace L3 is accurately extracted through differential calculation, and then divided by the number of back traces L3 to obtain the average resistance of a single back trace L3.

[0213] The bridge design of the connecting component L1 completely concentrates the detection operation on the second side 10b of the substrate 10. The measurement of the second sub-segment 20b and the total path measurement of the first detection trace 21 are both completed on the second side 10b, so that the pads at the overlapping interface between the back trace L3 and the connecting component L1 avoid probe contact.

[0214] The pads of the joint interface that are not mechanically damaged truly reflect the working conditions of the working circuit during the temperature cycle test.

[0215] At the same time, the connection component L1 adopts a redundant design with the same mask as the working line, and its line width deviation is controlled within the allowable error range, ensuring that the differential calculation automatically eliminates the process fluctuation error.

[0216] Exemplarily, in the first detection trace 21 and the detection trace group 2, a solder pad is formed between the connecting component L1 and the back trace L3, and at one end of the connecting component L1 or the back trace L3. The solder pad and the back trace L3 or the connecting component L1 are prepared using the same process. The size of the solder pad is relatively thick, while the size of the back trace L3 and the connecting component L1 is relatively thin, which is convenient for penetration detection.

[0217] For example, the solder pad arranged at this position is prepared and formed in the same process flow as the solder pad at the same position in the working circuit of the display panel 100, and the solder pad arranged at this position is located in the same pad group as the solder pad at the same position in the working circuit of the display panel 100. The back trace L3 and the back trace L3 at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, and the back trace L3 and the back trace L3 at the same position in the working circuit of the display panel 100 are located in the same trace group, which further truly reflects the risk of wire breakage in the layout area.

[0218] For example, the backside traces L3 located on the same first detection trace 21 are arranged adjacent to each other, which can more concentratedly reflect the disconnection risk and working environment of a specific area on the second side 10 b of the display panel 100 .

[0219] Please continue reading Figure 8 and Figure 9In some embodiments, the connection component L1 is connected between the two back traces L3 at one end of the two back traces L3 close to the side traces L2, or the connection component L1 is connected between the two back traces L3 at one end of the two back traces L3 away from the side traces L2.

[0220] In these embodiments, the connection components L1 can be flexibly arranged according to test requirements.

[0221] In the embodiment of the present application, the spatial layout of the connection component L1 is highly configurable. It can be located at the starting end of the two back lines L3 close to the side lines L2, or it can be configured at the end of the back line L3 away from the side lines L2.

[0222] When the connecting component L1 is arranged at the starting end, it spans the two back traces L3 to form a bridge structure, so that the detection current preferentially passes through the heterogeneous material interface between the back trace L3 and the side trace L2, thereby realizing the measurement of the overlapping interface between the back trace L3 and the side trace L2.

[0223] If the connection element L1 is arranged at the terminal, the resistance detection of the back trace L3 itself is more focused.

[0224] For example, during the R&D phase, the connection component L1 can be placed at the starting end to optimize the bonding process parameters, and during the mass production phase, it can be moved to the end end to monitor the service life of the final product.

[0225] For example, the connection component L1 adopts a serpentine routing design with the same mask as the working line, maintaining the consistency of line width and spacing process when switching the layout position. The inverted trapezoidal overlap structure formed when the connection component L1 crosses the back routing L3 always reproduces the stress distribution characteristics of the working line, ensuring the authenticity of the risk mapping.

[0226] Figure 10 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0227] See also Figure 10 In some embodiments, the substrate 10 includes a first side 10a and a second side 10b that are oppositely arranged along its thickness direction. The first side 10a is the side facing the light-emitting side of the display panel 100. The first detection trace 21 includes a connecting component L1, two side traces L2 connected by the connecting component L1, and a back trace L3. A section of the back trace L3 is connected to the side trace L2. The connecting component L1 is located on the first side 10a, and the back trace L3 is located on the second side 10b.

[0228] The first sub-segment 20 a is the backside trace L3 , and the second sub-segment 20 b is the two side traces L2 and the connection element L1 connected between the two side traces L2 .

[0229] In these embodiments, the back trace L3 continues to serve as the first sub-segment 20a, but during measurement, only the ends of the two back traces L3 away from the side trace L2 need to be measured from the second side 10b. When measuring the detection trace group 2, only the two ends of the side trace L2 need to be measured from the second side 10b. While the differential calculation measures the twice resistance value of the back trace L3, it can also effectively protect the pad between the side trace L2 and the back trace L3 from being affected by the penetration of the detection terminal, thereby avoiding affecting the measurement results.

[0230] The side trace L2, as the first subsegment 20a, extends across the end surface of the substrate 10 to the second side 10b. The back trace L3 extends along the second side 10b. The connecting component L1, as the second subsegment 20b, is located on the front surface of the substrate 10, i.e., the first side 10a, bridging the two side traces L2 and the back trace L3 to form a "U"-shaped structure.

[0231] During actual testing, the resistance of the second sub-segment 20b is first obtained by inserting the terminal into the solder pads at both ends of the side trace L2 in the detection trace group 2 away from the connection component L1, that is, the sum of the resistance of the connection component L1 itself and the resistance of the side trace L2 connected at both ends. Then, the total resistance of the first detection trace 21 is measured at the solder pads at the ends of the two back traces L3 on the second side 10b. The total resistance includes the resistance of the two back traces L3, the resistance of the two side traces L2 and the resistance of the connection component L1. The resistance of the back trace L3 is accurately extracted through differential calculation, and then divided by the number of back traces L3 to obtain the average resistance of a single back trace L3.

[0232] The bridge design connecting the component L1 and the side trace L2 completely concentrates the detection operation on a single side of the substrate 10. The measurement of the second sub-segment 20b and the total path measurement of the first detection trace 21 are both completed on the second side 10b, so that the pads at the overlapping interface between the side trace L2 and the back trace L3 avoid probe contact.

[0233] The pads of the joint interface that are not mechanically damaged truly reflect the working conditions of the working circuit during the temperature cycle test.

[0234] At the same time, the connection component L1 and the side trace L2 adopt a redundant design with the same mask as the working line, and their line width deviation is controlled within the allowable error range, ensuring that the differential calculation automatically eliminates the process fluctuation error.

[0235] Exemplarily, in the first detection trace 21 and the detection trace group 2, solder pads are formed between the connecting component L1 and the side trace L2, between the side trace L2 and the back trace L3, and at one end of the back trace L3 or the side trace L2. The solder pads and the back trace L3, the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pads is relatively thick, while the size of the back trace L3, the side trace L2 and the connecting component L1 is relatively thin, which is convenient for penetration detection.

[0236] Exemplarily, the solder pad arranged at this position is prepared and formed in the same process flow as the solder pad at the same position in the working circuit of the display panel 100, and the solder pad arranged at this position is located in the same pad group as the solder pad at the same position in the working circuit of the display panel 100. The side routing L2 is prepared and formed in the same process flow as the side routing L2 at the same position in the working circuit of the display panel 100, and the side routing L2 is located in the same routing group as the side routing L2 at the same position in the working circuit of the display panel 100. The back routing L3 is prepared and formed in the same process flow as the back routing L3 at the same position in the working circuit of the display panel 100, and the back routing L3 is located in the same routing group as the back routing L3 at the same position in the working circuit of the display panel 100, which further truly reflects the risk of wire breakage in the layout area.

[0237] For example, the side line L2 and the back line L3 located on the same first detection line 21 are arranged adjacent to each other, which can more concentratedly reflect the disconnection risk and working environment of a specific area of ​​the end surface of the display panel 100.

[0238] Figure 11 Shown Figure 1 Another wiring structure of the detection unit 20 at position A in the middle.

[0239] See also Figure 11 In some embodiments, the first detection trace 21 also includes a third sub-segment 20c, which is connected to the end of the first sub-segment 20a away from the second sub-segment 20b. The detection trace group 2 includes a second detection trace 22 and a third detection trace 23. The second detection trace 22 includes a fourth sub-segment 20d, and the third detection trace 23 includes a fifth sub-segment 20e. The fourth sub-segment 20d has the same structure as the second sub-segment 20b, and the fifth sub-segment 20e has the same structure as the third sub-segment 20c.

[0240] In these embodiments, a third subsegment 20c and the fourth and fifth subsegments 20d and 20e of the detection trace group 2 are further introduced. By subtracting the resistance value obtained by the overall measurement of the first detection trace 21 from the resistance values ​​of the fourth and fifth subsegments 20d and 20e of the detection trace group 2, the resistance value of the first subsegment 20a as the actual target segment can be obtained. At the same time, the pads at both ends of the first subsegment 20a will not be damaged by the inserted detection terminal and remain in the actual working state, further reflecting the actual detection resistance value of the first subsegment 20a.

[0241] The detection line group 2 consists of an independently prepared second detection line 22 and a third detection line 23. The second detection line 22 includes a fourth sub-segment 20d with the same structure as the second sub-segment 20b, and the third detection line 23 includes a fifth sub-segment 20e with the same structure as the third sub-segment 20c.

[0242] The fourth sub-segment 20d in this embodiment has the same structure as the second sub-segment 20b, and the fifth sub-segment 20e has the same structure as the third sub-segment 20c, which is consistent with the meaning of other "same structure" in the embodiment of the first aspect of this application.

[0243] In this embodiment, the second detection line 22 includes the fourth sub-segment 20d, and the third detection line 23 includes the fifth sub-segment 20e. This means that the second detection line 22 is composed of only the fourth sub-segment 20d, and the third detection line 23 is composed of only the fifth sub-segment 20e.

[0244] The fourth sub-segment 20d and the second sub-segment 20b are synchronously patterned through the same photomask process. The line width deviation of the fourth sub-segment 20d and the second sub-segment 20b is controlled within the allowable error range, and the resistance value is controlled within the allowable error range.

[0245] The fifth sub-segment 20e and the third sub-segment 20c are synchronously patterned through the same photomask process. The line width deviation of the fifth sub-segment 20e and the third sub-segment 20c is controlled within the allowable error range, and the resistance value is controlled within the allowable error range.

[0246] When measuring, the detection terminal only needs to penetrate the pads at both ends of the fourth sub-segment 20d to obtain the reference resistance value of the second sub-segment 20b, penetrate the pads at both ends of the fifth sub-segment 20e to obtain the reference resistance value of the third sub-segment 20c, and then measure the total resistance value at the end pad of the first detection trace 21. The resistance value of the target segment, that is, the first sub-segment 20a, is accurately extracted through differential calculation.

[0247] The bonding pads at both ends of the first subsegment 20a are completely shielded from probe contact. These undamaged pads provide a true reflection of operating conditions during the temperature cycling test. When the bonding interfaces between the first subsegment 20a and the second and third subsegments 20b and 20c are intact, the resistance curve measured by these unindented pads aligns with that of the operating circuit, providing a more accurate reflection of operating conditions.

[0248] At the same time, the redundant design of the fourth sub-segment 20d and the fifth sub-segment 20e synchronously reproduces the process fluctuation characteristics, so that the line resistance deviation caused by uneven etching is automatically offset in the differential calculation, so that the measurement accuracy of the measured resistance value is within the allowable error range.

[0249] Please continue reading Figure 11 In some embodiments, the substrate 10 includes a first side 10a and a second side 10b that are oppositely arranged along its thickness direction. The first side 10a is the side facing the light-emitting side of the display panel 100. The first detection trace 21 includes a connecting component L1, two side traces L2 connected by the connecting component L1, and a back trace L3. One end of the back trace L3 is connected to the side trace L2. The connecting component L1 is located on the first side 10a, and the back trace L3 is located on the second side 10b.

[0250] The first sub-segment 20a is the side trace L2, the second sub-segment 20b is the connection element L1 connected between the two side traces L2, and the third sub-segment 20c is the back trace L3 connected to the end of the side trace L2 away from the connection element L1.

[0251] In these embodiments, the side trace L2 serves as the first sub-segment 20a, but during measurement, only one end of the two back traces L3 away from the side trace L2 is measured from the second side 10b. When measuring the second detection trace 22 in the detection trace group 2, both ends of the connection component L1 are also measured from the first side 10a. When measuring the third detection trace 23 in the detection trace group 2, both ends of the back trace L3 are also measured from the second side 10b. While differential calculation is used to measure twice the resistance of the side trace L2, the pads at both ends of the side trace L2 can also be effectively protected from being affected by the penetration of the detection terminal, thereby further avoiding affecting the measurement results.

[0252] The side trace L2, as the first subsegment 20a, extends across the end surface of the substrate 10 to the second side 10b. The back trace L3 extends along the second side 10b. The connecting component L1, as the second subsegment 20b, is located on the front surface of the substrate 10, i.e., the first side 10a, bridging the two side traces L2 and the back trace L3 to form a "U"-shaped structure.

[0253] During actual detection, first, the resistance of the second sub-segment 20b, that is, the resistance of the connection component L1 itself, is obtained by inserting the pads into the terminals at both ends of the second detection trace 22 in the detection trace group 2. Then, the resistance of the third sub-segment 20c, that is, the resistance of the back trace L3 itself, is obtained by inserting the pads into the terminals at both ends of the second detection trace 22 in the detection trace group 2. Finally, the total resistance of the first detection trace 21 is measured at the pads at the ends of the two back traces L3 on the second side 10b. The total resistance includes the resistance of the two back traces L3, the resistance of the two side traces L2 and the resistance of the connection component L1. The resistance of the side trace L2 is accurately extracted through differential calculation, and then divided by the number of side traces L2 to obtain the average resistance of a single side trace L2.

[0254] The bridge design of the connection component L1 and the side trace L2 completely concentrates the detection operation on a single side of the substrate 10. The measurement of the second detection trace 22 is completed on the first side 10a, and the measurement of the third detection trace 23 and the total path measurement of the first detection trace 21 are both completed on the second side 10b, so that the pads at both ends of the side trace L2 and the pads at the overlapping interface of the back trace L3 and the connection component L1 avoid probe contact.

[0255] The pads of the joint interface that are not mechanically damaged truly reflect the working conditions of the working circuit during the temperature cycle test.

[0256] At the same time, the connection component L1 and the back trace L3 adopt a redundant design with the same mask as the working line, and their line width deviation is controlled within the allowable error range, ensuring that the differential calculation automatically eliminates the process fluctuation error.

[0257] For example, in the first detection trace 21 and the second detection trace 22 and the third detection trace 23 in the detection trace group 2, solder pads are formed between the connecting component L1 and the side trace L2, between the side trace L2 and the back trace L3, and at one end of the back trace L3 or the side trace L2. The solder pads and the back trace L3, the side trace L2 or the connecting component L1 are prepared using the same process. The size of the solder pads is relatively thick, while the size of the back trace L3, the side trace L2 and the connecting component L1 is relatively thin, which is convenient for penetration detection.

[0258] Exemplarily, the solder pad arranged at this position is prepared and formed in the same process flow as the solder pad at the same position in the working circuit of the display panel 100, and the solder pad arranged at this position is located in the same pad group as the solder pad at the same position in the working circuit of the display panel 100. The side routing L2 is prepared and formed in the same process flow as the side routing L2 at the same position in the working circuit of the display panel 100, and the side routing L2 is located in the same routing group as the side routing L2 at the same position in the working circuit of the display panel 100. The back routing L3 is prepared and formed in the same process flow as the back routing L3 at the same position in the working circuit of the display panel 100, and the back routing L3 is located in the same routing group as the back routing L3 at the same position in the working circuit of the display panel 100, which further truly reflects the risk of wire breakage in the layout area.

[0259] For example, the side line L2 and the back line L3 located on the same first detection line 21 are arranged adjacent to each other, which can more concentratedly reflect the disconnection risk and working environment of a specific area of ​​the end surface of the display panel 100.

[0260] For example, the resistance values ​​of the second detection trace 22 and the third detection trace 23 can also be obtained by differential calculation, thereby further reducing measurement errors.

[0261] In some embodiments, the first detection trace 21 further includes the connected second sub-segment 20 b to the Nth sub-segment, and the detection trace group 2 further includes the second detection trace 22 to the Mth detection trace.

[0262] The Qth sub-segment has the same structure as the Qth detection line, Q is less than M and less than N, M is less than or equal to N, and both M and N are positive integers.

[0263] In these embodiments, the detection routing group 2 can further flexibly set multiple routing sections such as the second detection routing 22 to the Mth detection routing according to the required detection of the first sub-segment 20a, and correspond to the second sub-segment 20b to the Nth sub-segment in the first detection routing 21 and have the same structure, thereby flexibly adjusting the detection method.

[0264] The first detection trace 21 is further expanded into a multi-level structure including the second sub-segment 20 b to the Nth sub-segment connected in series, and the detection trace group 2 correspondingly includes the second detection trace 22 to the Mth detection trace.

[0265] Illustratively, the Qth detection line and the Qth sub-segment in this embodiment have the same structure as the other "same structure" in the embodiment of the first aspect of the present application, which has the same meaning.

[0266] Exemplarily, in this embodiment, the Qth detection trace is only composed of the Qth sub-segment, where the Qth detection trace and the Qth sub-segment of the first detection trace 21 adopt exactly the same layout design and manufacturing process, and are formed synchronously by etching through the same photomask. The line width deviation is controlled within the error range allowed by the lithography alignment accuracy limit, so that the resistance difference between the two is less than the process inherent fluctuation threshold.

[0267] Exemplarily, when M = N, the detection terminal obtains the reference resistance value by piercing the dedicated pads at both ends of each Qth detection trace, and then measures the total resistance value at the pad at the end of the first detection trace 21. The target segment, that is, the independent resistance value of the first sub-segment 20a, is accurately extracted through differential calculation.

[0268] Optionally, if M < N, the traces in some of the detection trace groups 2 are composed of multiple sub-segments and can be flexibly adjusted as needed.

[0269] For all the interface pads of non-target segments, except for the pads at both ends of the first detection trace 21, probe contact can be completely avoided, and the pads not damaged mechanically can truly record the working condition of the trace during the temperature cycle test.

[0270] At the same time, as the synchronous mirror image of the process fluctuation of the Qth sub-segment, the Qth detection trace cancels out the line resistance deviation caused by uneven etching level by level during differential calculation.

[0271] Figure 12 Shows the overall structure of the second side 10b of a display panel 100 provided by an embodiment of the first aspect of the present application. Figure 13 Shows Figure 9 [[ID=E20]]The trace structure of a detection unit 20 at position D in

[0272] Please refer to Figures 12 to 13 , in some embodiments, the substrate 10 includes a first side 10a and a second side 10b that are oppositely arranged along its own thickness direction. The first side 10a is the side facing the light-emitting side of the display panel 100, and the display panel 100 further includes a printed circuit board 3 disposed in contact with the second side 10b.

[0273] The first detection trace 21 further includes a printed circuit trace L4 located on the printed circuit board 3, and the printed circuit trace L4 is connected to one end of the back trace L3 far from the side trace L2.

[0274] In these embodiments, since the pad structures on both sides of the printed circuit trace L4 are relatively stable, it can be measured independently, and the error range of the measured resistance value is within the allowed error range.

[0275] Illustratively, in the first detection trace 21, solder pads are formed at both ends of the printed circuit trace L4. The solder pads and the printed circuit trace L4 are prepared using the same process. The solder pads are relatively thick, while the printed circuit trace L4 is relatively thin, which is convenient for penetration detection.

[0276] Exemplarily, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are located in the same solder pad group, the printed circuit trace L4 and the printed circuit trace L4 at the same position in the working circuit on the printed circuit board 3 are prepared and formed in the same process flow, the printed circuit trace L4 and the printed circuit trace L4 at the same position in the working circuit of the display panel 100 are located in the same trace group, which further truly reflects the risk of wire breakage in the layout area.

[0277] Figure 14 Shown Figure 9 Another wiring structure of the detection unit 20 at the middle D position.

[0278] See also Figure 14 In some embodiments, the printed circuit board 3 further includes a substrate 30 and an integrated circuit chip 31 located on the side of the substrate 30 away from the second side 10b. The first detection trace 21 further includes a chip trace L5 located on the printed circuit board 3. The chip trace L5 is connected to an end of the printed circuit trace L4 away from the back trace L3.

[0279] In these embodiments, the chip trace L5 can be measured individually because the soldering point structures on both sides of the trace L5 are relatively stable, and the error range of the measured resistance value is within the allowable error range.

[0280] Illustratively, in the first detection trace 21 , pads are formed at both ends of the chip trace L5 . The pads and the chip trace L5 are manufactured using the same process. The pads are relatively thick, while the chip trace L5 is relatively thin, which facilitates penetration detection.

[0281] For example, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are prepared and formed in the same process flow, the solder pad arranged at this position and the solder pad at the same position in the working circuit of the display panel 100 are located in the same solder pad group, the chip trace L5 and the chip trace L5 at the same position in the working circuit on the chip board are prepared and formed in the same process flow, the chip trace L5 and the chip trace L5 at the same position in the working circuit of the display panel 100 are located in the same trace group, which further truly reflects the risk of wire breakage in the layout area.

[0282] See also Figures 6 to 11 as well as Figures 13 and 14In some embodiments, the detection unit 20 is insulated from other structures of the display panel 100 .

[0283] In these embodiments, the detection units 20 are kept at intervals to ensure that no crosstalk occurs with the actual working circuit, thereby further ensuring the independence of the detection results.

[0284] The detection unit 20 maintains physical insulation isolation from the functional structure of the display panel 100 at the end and in the extension path, ensuring that the detection current is strictly confined within the dedicated wiring.

[0285] When the detection terminal applies a test current to the first detection trace 21 , the coupling noise of other signal lines with adjacent spacing is low, thereby eliminating the display screen flickering problem caused by crosstalk in traditional solutions.

[0286] In the non-display area at the edge of the substrate 10, the detection unit 20 adopts a serpentine design, and its closest distance to the bonding pin is controlled above the safe threshold of the dielectric strength of the insulation layer, so that dielectric breakdown will not be caused even under high-frequency detection pulses.

[0287] The insulation design of the detection unit 20 enables the detection unit 20 to maintain the integrity of the working circuit signal during continuous operation, and in particular ensures the transmission stability of the driving current.

[0288] Exemplarily, the ends of one of the wirings in the detection unit 20 are located at both ends of the connection component L1 , and the ends of the wiring are insulated from the adjacent side wirings L2 on both sides.

[0289] Exemplarily, an end portion of one of the wirings in the detection unit 20 is located at one end of the side wiring L2 located on the second side 10 b , and the end portion of the wiring is insulated from the adjacent side wirings L2 on both sides.

[0290] Exemplarily, an end portion of one of the wirings in the detection unit 20 is located at one end of the back wiring L3 away from the side wiring L2 , and the end portion of the wiring is insulated from the back wirings L3 adjacent to the two sides.

[0291] Exemplarily, an end portion of one of the traces in the detection unit 20 is located at one end of the printed circuit trace L4 away from the back trace L3 , and the end portion of the trace is insulated from adjacent printed circuit traces L4 on both sides.

[0292] Exemplarily, an end portion of one of the traces in the detection unit 20 is located at an end of the chip trace L5 away from the printed circuit trace L4 , and the end portion of the trace is insulated from the adjacent chip traces L5 on both sides.

[0293] See also Figure 1 and Figure 12In some embodiments, the detection unit 20 is disposed at a corner area where two edges of the display panel 100 intersect.

[0294] In these embodiments, the detection unit 20 is further arranged in a corner area where two edges that are prone to the risk of wire breakage intersect, and by arranging multiple groups of detection units 20, multiple groups of detection results can be further obtained to obtain the first sub-segment 20a, that is, the average resistance value of the target segment, thereby further improving the accuracy of detection.

[0295] See also Figure 2a 、 Figure 2d 、 Figure 3a 、 Figure 3b and Figures 4 to 11 In some embodiments, the side trace L2 includes a first side trace L21 and a second side trace L22 arranged in parallel. The first side trace L21 is located in the detection unit 20, and the second side trace L22 is electrically connected to the circuit in the display panel 100.

[0296] In these embodiments, the first side trace L21 for the detection unit 20 and the second side trace L22 for the normal working circuit are prepared in the same process and on the same layer, which further truly reflects the working status of the side trace L2.

[0297] Please continue reading Figure 2a 、 Figure 2d 、 Figure 3a 、 Figure 3b and Figures 4 to 11 In some embodiments, the first side trace L21 is located on a side of the second side trace L22 close to an edge region of the display panel 100 or a corner region where two edges intersect.

[0298] In these embodiments, the first side trace L21 for the detection unit 20 is arranged to be closer to the second side trace L22 for the normal working line than the edge area or corner area of ​​the display panel 100, thereby obtaining the boundary of the normal working area of ​​the second side trace L22 of the normal working line, thereby further avoiding the risk of wire breaking.

[0299] Figure 15 A flow chart of a method for detecting the wiring resistance of a display panel provided in an embodiment of the second aspect of the present application is shown.

[0300] See also Figure 15 In a second aspect, embodiments of the present application provide a method for detecting the trace resistance of a display panel. The display panel includes a substrate and a detection unit. The detection unit includes a first detection trace located on one side of the substrate. The first detection trace is located in an edge area of ​​the display panel, a breakage risk area, or includes a side trace located on a cross section of the substrate. The detection method includes:

[0301] Step S10: Detect both ends of the first detection line to obtain a resistance value of the first detection line.

[0302] The method for detecting the trace resistance of a display panel provided in the second aspect embodiment of the present application includes the display panel described in any one of the first aspect embodiments of the present application, and therefore has the beneficial effects of the display panel described in any one of the first aspect embodiments of the present application, which will not be repeated here.

[0303] Figure 16 A flow chart of another method for detecting the wiring resistance of a display panel provided in an embodiment of the second aspect of the present application is shown.

[0304] See also Figure 16 In some embodiments, the detection unit further includes a detection trace group, the first detection trace includes a first sub-segment and a second sub-segment connected to at least one end of the first sub-segment, the detection trace group and the second sub-segment have the same structure, and the detection method further includes:

[0305] Step S20: Detect the detection trace group to obtain the resistance value of the second sub-segment;

[0306] Step S30: Subtract the resistance value of the second sub-segment from the resistance value of the first detection trace to obtain the resistance value of the first sub-segment.

[0307] In these embodiments, differential calculation is used to obtain the resistance of the target segment, i.e., the first sub-segment. The pad at at least one end of the first sub-segment does not need to be penetrated by a detection terminal, which can better reflect the actual working condition of the first sub-segment and make the resistance measurement more accurate.

[0308] Figure 17 A flow chart of another method for detecting the wiring resistance of a display panel provided in an embodiment of the second aspect of the present application is shown.

[0309] See also Figure 17 In some embodiments, the detection unit further includes a detection trace group, the first detection trace includes a first subsegment, a second subsegment, and a third subsegment, the second subsegment is connected to at least one end of the first subsegment, and the third subsegment is connected to an end of the first subsegment away from the second subsegment, the detection trace group includes a second detection trace and a third detection trace, the second detection trace includes a fourth subsegment, the third detection trace includes a fifth subsegment, the fourth subsegment has the same structure as the second subsegment, and the fifth subsegment has the same structure as the third subsegment, and the detection method further includes:

[0310] Step S20: Detect both ends of the fourth sub-segment of the second detection trace to obtain a resistance value of the second sub-segment;

[0311] Step S30: Detect both ends of the fifth sub-segment of the third detection trace to obtain a resistance value of the third sub-segment;

[0312] Step S40 : subtract the resistance value of the second subsegment and the resistance value of the third subsegment from the resistance value of the first detection trace to obtain the resistance value of the first subsegment.

[0313] In these embodiments, differential calculation is used to obtain the resistance of the target segment, i.e., the first sub-segment. The pads at both ends of the first sub-segment do not need to be penetrated by detection terminals, which can further reflect the actual working condition of the first sub-segment and make the resistance measurement more accurate.

[0314] In a third aspect, an embodiment of the present application provides a display device, comprising a display panel provided by any one of the embodiments of the first aspect of the present application.

[0315] The display device provided in the third aspect embodiment of the present application includes the display panel provided in any one of the first aspect embodiments. Therefore, the display device 300 provided in the third aspect embodiment of the present application has the beneficial effects of the display panel provided in any one of the first aspect embodiments, which will not be repeated here.

[0316] The display device in the embodiments of the present application includes but is not limited to mobile phones, personal digital assistants (PDAs), tablet computers, e-books, televisions, access control systems, smart landline phones, consoles, and other devices with display functions.

[0317] The display device may be any device having a display function, for example, a mobile device such as a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, an ultra mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA); it may also be a non-mobile device such as a personal computer (PC), a television (TV), an ATM, or an kiosks.

[0318] Although the present application has been described with reference to preferred embodiments, various modifications may be made thereto and components may be substituted with equivalents without departing from the scope of the present application. In particular, the various technical features described in the various embodiments may be combined in any manner as long as there are no structural conflicts. The present application is not limited to the specific embodiments disclosed herein, but encompasses all technical solutions within the scope of the claims.

Claims

1. A display panel, characterized in that: include: substrate; The detection unit includes a first detection line located on one side of the substrate, the first detection line is located in the edge area of ​​the display panel, the line breakage risk area, or includes a side line located on the end surface of the substrate.

2. The display panel according to claim 1, wherein: The substrate comprises a first side and a second side arranged opposite to each other along its thickness direction, wherein the first side is a side facing the light emitting side of the display panel; The first detection trace includes a connecting component and two side traces connected by the connecting component, and the connecting component is located on the first side.

3. The display panel according to claim 2, wherein: The two side wirings are arranged adjacent to each other.

4. The display panel according to claim 2, wherein: The first detection trace includes a first pad located on the first side. The first pad is located between an end of the side trace close to the connection component and the connection component. The first pad is connected to the connection component and the side trace.

5. The display panel according to claim 4, wherein: The first soldering pad and the connecting component are integrally formed.

6. The display panel according to claim 2, wherein: The first detection wiring further includes a back wiring located on the second side, and one end of the back wiring is connected to the side wiring.

7. The display panel according to claim 6, wherein: The first detection trace further includes a second pad located on the second side. The second pad is located at an end of the back trace away from the side trace, and the back trace is connected to the second pad.

8. The display panel according to claim 7, wherein: The second pad and the back side wiring are integrally formed.

9. The display panel according to claim 6, wherein: The display panel further includes a printed circuit board disposed on the second side, the printed circuit board including a substrate and a printed circuit trace located on a side of the substrate away from the second side, the printed circuit trace being connected to an end of the back trace away from the side trace; The first detection trace further includes the printed circuit trace connected to the back trace.

10. The display panel according to claim 9, wherein: The printed circuit board further comprises a chip trace and an integrated circuit chip located on a side of the substrate away from the second side, the chip trace being connected to an end of the printed circuit trace away from the back trace; The first detection trace further includes the chip trace connected to the printed circuit trace.

11. The display panel according to any one of claims 2 to 10, characterized in that: The end of the first detection line is insulated from other structures of the display panel.

12. The display panel according to claim 1, wherein The detection unit further includes a detection line group, the first detection line includes a first sub-segment and a second sub-segment connected to at least one end of the first sub-segment, and the detection line group has the same structure as the second sub-segment.

13. The display panel according to claim 12, wherein: The first detection trace includes a connecting component and the side trace connected to the connecting component; The first sub-segment is the side routing, and the second sub-segment is the connection component connected to the side routing.

14. The display panel according to claim 12, wherein: The substrate includes a first side and a second side arranged opposite to each other along its thickness direction, the first side being a side facing the light-emitting side of the display panel, the first detection trace including a connecting component and two side traces connected by the connecting component, and the connecting component is located on the first side; The first sub-segment is the side routing line, and the second sub-segment is the connection component connected between two side routing lines.

15. The display panel according to claim 12, wherein: The substrate includes a first side and a second side arranged opposite to each other along its thickness direction, the first side being a side facing the light-emitting side of the display panel, the first detection trace including a connecting component and two back traces connected by the connecting component, and the back traces are located on the second side; The first sub-segment is the backside wiring, and the second sub-segment is the connection component connected between two backside wirings.

16. The display panel according to claim 15, wherein: The connecting component is connected between the two back traces at one end of the two back traces close to the side traces, or, The connecting component is connected between the two back traces at one end of the two back traces away from the side traces.

17. The display panel according to claim 12, wherein: The substrate includes a first side and a second side arranged opposite to each other along its thickness direction, the first side being a side facing the light-emitting side of the display panel, the first detection trace including a connecting component, two side traces connected by the connecting component, and a back trace, one end of the back trace being connected to the side trace, the connecting component being located on the first side, and the back trace being located on the second side; The first sub-segment is the backside routing, and the second sub-segment is the two side routings and the connection component connected between the two side routings.

18. The display panel according to claim 12, wherein: The first detection trace also includes a third sub-segment, which is connected to an end of the first sub-segment away from the second sub-segment. The detection trace group includes a second detection trace and a third detection trace. The second detection trace includes a fourth sub-segment, and the third detection trace includes a fifth sub-segment. The fourth sub-segment has the same structure as the second sub-segment, and the fifth sub-segment has the same structure as the third sub-segment.

19. The display panel according to claim 18, wherein: The substrate includes a first side and a second side arranged opposite to each other along its thickness direction, the first side being a side facing the light-emitting side of the display panel, the first detection trace including a connecting component, two side traces connected by the connecting component, and a back trace, one end of the back trace being connected to the side trace, the connecting component being located on the first side, and the back trace being located on the second side; The first sub-segment is the side routing, the second sub-segment is the connection component connected between two side routings, and the third sub-segment is the back routing connected to one end of the side routing away from the connection component.

20. The display panel according to claim 12, wherein: The first detection line further includes the second sub-segment to the Nth sub-segment connected to each other, and the detection line group further includes the second detection line to the Mth detection line; The Qth sub-segment has the same structure as the Qth detection line, Q is less than M and less than N, M is less than or equal to N, and both M and N are positive integers.

21. The display panel according to claim 1, wherein The substrate includes a first side and a second side arranged opposite to each other along its thickness direction, the first side being the side facing the light-emitting side of the display panel, and the display panel further includes a printed circuit board arranged in contact with the second side; The first detection trace further includes a printed circuit trace located on the printed circuit board, and the printed circuit trace is connected to an end of the back trace away from the side trace.

22. The display panel according to claim 21, wherein: The printed circuit board also includes a substrate and an integrated circuit chip located on a side of the substrate away from the second side. The first detection trace also includes a chip trace located on the printed circuit board, and the chip trace is connected to an end of the printed circuit trace away from the back trace.

23. The display panel according to any one of claims 12 to 22, characterized in that: The detection unit is insulated from other structures of the display panel.

24. The display panel according to claim 1, wherein The detection unit is arranged at a corner area where two edges of the display panel intersect.

25. The display panel according to claim 1, wherein The side routing includes a first side routing and a second side routing that are arranged in parallel. The first side routing is located in the detection unit, and the second side routing is electrically connected to a circuit in the display panel.

26. The display panel according to claim 25, wherein: The first side edge routing is located on a side of the second side edge routing close to an edge region of the display panel or a corner region where two edges intersect.

27. A method for detecting the wiring resistance of a display panel, characterized in that: The display panel includes a substrate and a detection unit, the detection unit includes a first detection line located on one side of the substrate, the first detection line is located in an edge area of ​​the display panel, a line breakage risk area, or includes a side line located on an end surface of the substrate, and the detection method includes: Detect both ends of the first detection line to obtain a resistance value of the first detection line.

28. The method for detecting the trace resistance of a display panel according to claim 27, wherein: The detection unit further includes a detection line group, the first detection line includes a first sub-segment and a second sub-segment connected to at least one end of the first sub-segment, the detection line group and the second sub-segment have the same structure, and the detection method further includes: Detecting the detection wiring group to obtain a resistance value of the second sub-segment; The resistance value of the first subsegment is obtained by subtracting the resistance value of the second subsegment from the resistance value of the first detection trace.

29. The method for detecting the trace resistance of a display panel according to claim 27, wherein: The detection unit further includes a detection line group, the first detection line includes a first sub-segment, a second sub-segment, and a third sub-segment, the second sub-segment is connected to at least one end of the first sub-segment, and the third sub-segment is connected to an end of the first sub-segment away from the second sub-segment, the detection line group includes a second detection line and a third detection line, the second detection line includes a fourth sub-segment, and the third detection line includes a fifth sub-segment, the fourth sub-segment has the same structure as the second sub-segment, and the fifth sub-segment has the same structure as the third sub-segment, and the detection method further includes: detecting both ends of the fourth subsegment of the second detection wire to obtain a resistance value of the second subsegment; detecting both ends of the fifth sub-segment of the third detection wire to obtain a resistance value of the third sub-segment; The resistance value of the first subsegment is obtained by subtracting the resistance value of the second subsegment and the resistance value of the third subsegment from the resistance value of the first detection trace.

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